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Mojave on Biostar TH55HD Socket 1156 / NVidia 9800GT

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You meant AutoMerge=True. Correct? I only have AutoMerge=True if I have edited a system SSDT and I placed my edited SSDT in the ACPI patched folder.
probably best you read up on the guide as it mentions about AutoMerge etc near the bottom of post 1:


It's an "old" edit that I did before I started learning about CLOVER hotpatches and CLOVER renaming. I only have the Thinkpad T61 upgraded to Mojave 10.14.6 for bragging rights and don't use it much (but it works great!). I'd have to go back and look at origin and patched, but I believe the rename in my SSDT-0-TP-7U SSDT was something to do with PCI0.GFX0 -> PCI0.VID. If I remember correctly, I named my dGPU 'GFX0' and change the iGPU name to avoid confusion while I was learning/editing. It was my first hack.
[/QUOTE]
can be achieved by a simple edit on config.plist:
Code:
<dict>
                    <key>Comment</key>
                    <string>change GFX0 to IGPU</string>
                    <key>Find</key>
                    <data>R0ZYMA==</data>
                    <key>Replace</key>
                    <data>SUdQVQ==</data>
                </dict>

example:
 
probably best you read up on the guide as it mentions about AutoMerge etc near the bottom of post 1:
From the guide: With AutoMerge=true, patched SSDTs can be placed in ACPI/patched with their original name (from ACPI/origin) and they will be inserted such that the original order of SSDTs is not disturbed.

This is exactly as I am interpreting AutoMerge. If that's the way you are, too, then we're in agreement. I only use AutoMerge=True when I have edited a System SSDT and placed that edited System SSDT in the ACPI patched folder. All other non-edited original System SSDTs stay out of the ACPI patched folder. AutoMerge=True handles the merge of the edited System SSDTs (in the patched folder) with the non-edited original System SSDTs (not in the patched folder).

What's also nice about AutoMerge=True (according to the guide) is that edited system SSDTs (in the ACPI patched folder) adhere to the ordering of the original System SSDTs that they replace. No need to specify SSDT ordering in config.plist.
 
ahh ok, then you can probably just run Piker's script and just use that SSDT it creates
I'd actually like to try that. I tried using ssdtPRGen for my X3480 (now using X3450 overclocked), but couldn't get it to work. There's a Lynnfield L3426 example included with ssdtPRGen, but even it doesn't appear to be supported. If anyone does get an SSDT generated for the X34_0 CPUs using ssdtPRGen, I'd love to see it and try it. My limited experience with the Series 5 Chipset and Nehalem/Clarkedale/Arrandale/Lynnfield (two systems now) is that they don't need ssdtPRGen, they don't need any CLOVER CPU options as long as the correct MacModel is selected (in this case, MacPro5,1) and as long as LPC._DSM injects the correct IONameMatch (3b09 in this case). But sleep doesn't work for me, so I'm still looking at alternatives.
 
@Feartech I took another look at ssdtPRGen and can't find evidence that it still supports the Series 5 chipset and related CPUs. There is an L3426 (Xeon Lynnfield CPU) in the examples, but ssdtPRGen fails when attempting to create the SSDT for that CPU. I was hoping to try it only to see if it helps with sleep (speedstep works perfectly without it), but I don't think ssdtPRGen supports my chipset / CPU.
 
@Feartech I took another look at ssdtPRGen and can't find evidence that it still supports the Series 5 chipset and related CPUs. There is an L3426 (Xeon Lynnfield CPU) in the examples, but ssdtPRGen fails when attempting to create the SSDT for that CPU. I was hoping to try it only to see if it helps with sleep (speedstep works perfectly without it), but I don't think ssdtPRGen supports my chipset / CPU.
maybe not support then:

 
@Feartech I took another look at ssdtPRGen and can't find evidence that it still supports the Series 5 chipset and related CPUs. There is an L3426 (Xeon Lynnfield CPU) in the examples, but ssdtPRGen fails when attempting to create the SSDT for that CPU. I was hoping to try it only to see if it helps with sleep (speedstep works perfectly without it), but I don't think ssdtPRGen supports my chipset / CPU.

No need for ssdtPRgen.sh generated SSDT.aml for any CPU Haswell and newer.
Only requirement: SSDT-XCPM.aml or config.plist/ACPI/SSDT/Generate/PluginType=true.
 
@P1LGRIM That is good to know; This thread is for Intel Series 5 / Lynnfield / Clarkedale (older than Haswell). Do you think Rehabman's "CPU Haswell and newer" advice is relevant?

EDIT: If what you're implying is that ssdtPRgen can still be used for Lynnfield, I wasn't able to get it to work and would love to know how.
 
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@P1LGRIM That is good to know; This thread is for Intel Series 5 / Lynnfield / Clarkedale (older than Haswell). Do you think Rehabman's "CPU Haswell and newer" advice is relevant?

EDIT: If what you're implying is that ssdtPRgen can still be used for Lynnfield, I wasn't able to get it to work and would love to know how.

Have you tried any of the clover CPU settings like halt enabler, cStates, Pstates etc??
 
Have you tried any of the clover CPU settings like halt enabler, cStates, Pstates etc??
Yes. Thank you for your reply. I am currently running without any CLOVER CPU configs (e.g. no generate C / generate P states), because the CLOVER configs reduce the peak multiplier and reduce the number of P states. Speed step works perfectly as the system is currently configured. The only thing not working is Suspend State S3. I now have two Series 5 chipset systems (this Biostar TH55HD and a Dell Latitude E6410) that exhibit the same behavior - both systems have better CPU power management without CLOVER configs when the correct Mac Model is selected (MacPro5,1 for the Biostar TH55HD and MacBookPro6,2 for the Latitude E6410) and when LPCB._DSM injects IO Name "3b09" for the closest IONameMatch.

EDIT: Note that sleep does not work when CLOVER generate P and generate C states is enabled. I've also tried combinations of the other CLOVER CPU config options. It's a desktop, so I'm not very concerned about sleep. I just keep trying new ideas when offered or when I think of them.
 
I added the PCIe x2 SATA III controller to my system for faster SATA SSD performance. This card works well in Mojave after installing AHCI_3rdParty_Sata.kext. I can boot from drives connected to this card and use drives connected to this card for non-boot storage. Drives connected to this controller appear as "internal" drives when AHCI_3rdParty_Sata.kext is installed.

I/O Crest 4 Port SATA III PCI-e 2.0 x2 HyperDuo RAID Hard Drive Controller Card


EDIT: Because of the slot arrangement on the Biostar TH55HD motherboard, installation of the SATA III PCIe x2 card partially blocks the fan on my 9800GT graphics card. I removed the cover on the graphic card (to expose the heatsink) and am using a side case fan to blow fresh air on the graphics heatsink. My GPU temps dropped about 7 deg C (from what they were prior to installation of the SATA card).
 
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