[SUCCESS] Gigabyte Designare Z390 (Thunderbolt 3) + i7-9700K + AMD RX 580

[S1lla]

True Story

Hope the ioreg file helps to understand everything even better.

 

[qthegaijin]

Here are shots from a Macbook Pro 15,2.

 

[Elias64Fr]

View attachment 455006
View attachment 455007

Here are shots from a Macbook Pro 15,2.

@qthegaijin
I'm very interested about Ioreg file of this model for my laptop that are very closed .. by private message
If you have a darwindumper it is better

 

[qthegaijin]

@qthegaijin
I'm very interested about Ioreg file of this model for my laptop that are very closed .. by private message
If you have a darwindumper it is better

Really wish I was more active all these years so I can send PMs, I got like 50+ posts to go.

I have the full iroeg file but i do not have darwindumper. This is my coworkers laptop he let me get quick stats on one day after work so I don't have instant access to it but the full ioreg file should have a bunch more info to decipher.

Also now have a Mac Pro 5,1 set up with opencore and catalina to test all this out on as well.

 

[Elias64Fr]

@CaseySJ

I just start DROM analysis for ThunderboltDROM improvement, This screen shot might help us. I have extracted these data from PciThunderbolt.efi driver :

By compare with real iMac19,1 extracted property from IOReg, Results seem to be :

1. CRC8 preconfigured data for final CR8 calculation depending on next 32bytes or 64bytes
2. Really fixed data !
3. Really fixed data !

 

[lew92]

@CaseySJ

Can you confirm this Settings for TB I've found?

Advanced\Thunderbolt Config (this is more important to make it work) :

• Thunderbolt Support: enabled
• Thunderbolt Usb support: enabled
• Thunderbolt Boot support: enabled
• Titan Ridge Workaround for OSUP: enabled
• Wake from Thunderbolt devices: On
• Thunderbolt PCIe Cache Line size: 128 (other options: 0, 1, 2, 4, 8, 16, 32, 64. default value is 32)
• GIPIO3 force pwr: On
• Wait Time in ms after applying Force pwr: 200
• Skip PCI enumeration: disabled
• Skip PCI OptionRom: Disabled
• Skip PCI Interrupt Assignment: Enabled
• ACPI Removal Object Support: Disabled
• Security Level: No Security
• Call pre boot Smi Handler: disabled
• Reserve P mem per phy slot: 32 (this can edited from 0 to 9999)
• Reserve P mem per phy slot: 32 (this can be edited from 0 to 9999)
• Reserve IO per phy slot: 4 (this can be edited from 0 to 99)
• Native OS Hot PLug: on
• SW SMI on TBT hot-plug: enabled
• GPIO filter: Disabled
• ACPI Notify on TBT hot-plug: disabled
• MSI Enabled in FADT: disabled
• Enable ASPM: L0s (other options are Disabled, L1s and L0sL1s) *Enable LTR
• AIC Location group: CPU0 NB PCIE slot
• AIC Location: PCIeX16_2 (where my card is installed)
• TBT Host Router: Two Port
• Extra Bus Reserved: 106 (this can be edited from 0 to 999)
• Reserved Memory: 737 (this can be edited from 0 to 9999)
• Memory Alignment: 26 (this can be edited from 0 to 999)
• Reserved Memory: 1184 (this can be edited from 0 to 9999)
• PMemory Alignment: 28 (this can be edited from 0 to 99)
• Reserved IO: 32
• Alpine Ridge Workaround Select: disabled

Not all settings are the same with Designare but the bold ones I found.

 

[CaseySJ]

** Quick Comparative Analysis of Thunderbolt DROM and Thunderbolt Config **​

When a real Mac contains more than one Thunderbolt controller, it provides an opportunity to compare ThunderboltDROM and ThunderboltConfig in a manner that facilities some amount of deciphering. In other words, comparative analysis can reveal the meaning of some of the bytes. The more Thunderbolt controllers a Mac has, the better our ability to draw conclusions.

How fortunate then that the 2019 Mac Pro 7,1 contains six Thunderbolt controllers. Yes six of the darn things! Thanks to @S1lla we are given an opportunity to study the differences.

This is a quick summary of some immediate observations:

• The six controllers in MacPro 7,1 are located at PC04.MCP0.US00. They are sub-nodes under this path, as follows:
  • DS09.UPSB
  • DS0A.UPSB
  • DS0D.UPSB
  • DS0E.UPSB
  • DS15.UPSB
  • DS16.UPSB
• Each controller supports two USB-2 ports (HS01, HS02) and two USB-3 ports (SSP1, SSP2).
• Each controller drives all 4 ports by itself. In other words, these controllers are not using so-called companion ports that are controlled by a different XHC (USB) controller.

---

Our Current Best Understanding of Thunderbolt DROM​

In an earlier post, @Elias64Fr decoded the native Designare Z390 DROM as follows:

• 71 -- CRC (cyclic redundancy check)
• 00 00 00 00 00 00 ED 00 -- UID SwitchType3: ED000000000000
• E0 -- CRC
• 40 34 98 01 69 00 ED 00 -- To be defined
• 08 C0 01 01 -- To be defined
• 08 81 80 02 80 00 0000 -- TBPort1 DualLinkport2 HPMAddr0
• 08 82 90 01 80 00 0000 -- TBPort2 DualLinkport1 HPMAddr0
• 08 83 80 04 80 01 0000 -- TBPort3 DualLinkport4 HPMAddr1
• 08 84 90 03 80 01 0000 -- TBPort4 DualLinkport3 HPMAddr1
• 05 85 50 00 00 -- TBPort5 DisplayPort Adapter
• 05 86 50 00 00 -- TBPort6 DisplayPort Adapter
• 02 C7 -- TBSwitch7
• 0B 88 20 01 00 64 00 00 00 00 00 -- TBPort8 PCI Down Adapter DSB1
• 03 89 80 -- TBPort9 PCI Down Adapter DSB4
• 05 8A 50 40 00 -- TBPortA DisplayPort Adapter
• 05 8B 50 40 00 -- TBPortB DisplayPort Adapter
• 0B 01 47 49 47 41 42 59 54 45 00 -- The string "GIGABYTE"
• 11 02 5A 33 39 30 20 44 45 53 49 47 4E 41 52 45 00 -- The string "Z390 DESIGNARE"

As we can see, we have only a partial understanding. Let's first compare the first 10 bytes (UID SwitchType3) of each of the six Mac Pro controllers:

1. 03 02 11 22 33 44 55 00 00 2d
2. 10 03 11 22 33 44 55 00 00 1f
3. 25 00 11 22 33 44 55 00 00 15
4. 36 01 11 22 33 44 55 00 00 7b
5. 69 04 11 22 33 44 55 00 00 3d
6. 7a 05 11 22 33 44 55 00 00 53

If the first and last bytes are CRC (cyclic redundancy check -- or simply the checksum) then we can focus on the inner 8 bytes. The CRC is very important because we will be unable to modify DROM ourselves unless we know how to calculate CRC.

1. 02 11 22 33 44 55 00 00
2. 03 11 22 33 44 55 00 00
3. 00 11 22 33 44 55 00 00
4. 01 11 22 33 44 55 00 00
5. 04 11 22 33 44 55 00 00
6. 05 11 22 33 44 55 00 00

Here we see something interesting in the first column of bytes. They are IDs from 00 to 05, which we might interpret as the Thunderbolt Bus ID. The next 5 bytes are a 5-byte UID that we believe is unique to each computer (not each controller).

In the interest of privacy, the UID numbers above have been modified. They are not the actual values from @S1lla's system.

When we patch our GC-Titan Ridge using DSM2's firmware and use the Thunderbolt DROM he provides, we find that System Information --> Thunderbolt assigns the card to Bus ID 0x02. Now if we look at the DSM2 DROM and skip the first CRC byte (the very first byte), then we see this:

• 02 65 BA 7C 7F 59 00 00

This seems to confirm that this represents the Thunderbolt Bus ID.

---

Our Current Best Understanding of Thunderbolt Config​

We know almost nothing about Thunderbolt Config, except for the last 4 bytes, which we believe are the USB-C Port Numbers. After looking at the six sample Thunderbolt Config files from Mac Pro 7,1 we find some interesting observations:

1. 02 03 02 00 0a 00 05 01 01 00 01 00 05 01 02 00 06 00 05 01 01 00 01 00 03 01 02 00 06 00 05 00
2. 03 03 03 00 09 00 05 01 01 00 00 00 05 01 02 00 04 00 05 01 01 00 00 00 03 01 02 00 08 00 07 00
3. 00 03 00 00 0b 00 05 01 01 00 02 00 05 01 02 00 07 00 05 01 01 00 02 00 03 01 02 00 02 00 01 00
4. 01 03 01 00 0b 00 05 01 01 00 02 00 05 01 02 00 07 00 05 01 01 00 03 00 03 01 02 00 04 00 03 00
5. 04 03 04 00 0c 00 05 01 01 00 03 00 05 01 02 00 08 00 05 01 01 00 04 00 03 01 02 00 0a 00 09 00
6. 05 03 05 00 0c 00 05 01 01 00 03 00 05 01 02 00 08 00 05 01 01 00 05 00 03 01 02 00 0c 00 0b 00

Does that first column look familiar? It represents the Thunderbolt Bus ID. Even though column 3 in this case is the same as column 1, this is not always the case. Other Thunderbolt Config strings have different values in columns 1 and 3.

Now look at those last 4 bytes, where two bytes are in green. They seem to be USB-C Port Numbers because IORegistryExplorer shows the following:

1. Controller 02 has USB-C Port Numbers 03 and 04
2. Controller 03 has USB-C Port Numbers 02 and 01
3. Controller 00 has USB-C Port Numbers 09 and 0A
4. Controller 01 has USB-C Port Numbers 0B and 0C
5. Controller 04 has USB-C Port Numbers 05 and 06
6. Controller 05 has USB-C Port Numbers 07 and 08

Although these values are the same as those in Thunderbolt Config, they belong to different Thunderbolt controllers/buses. Maybe this doesn't really matter as long as each USB-C port number is assigned to a controller.

If we look at a real iMac 19,1 the first few bytes of Thunderbolt DROM are as follows (UID values have been replaced for privacy):

• 19 00 11 22 33 44 55 01 00 26

If we strip away the CRC bytes (19 and 26) we get:

• 00 11 22 33 44 55 01 00

So the Thunderbolt Bus ID or Controller ID is 00 (column 1). Now let's look at Thunderbolt Config:

• 00 02 1c 00 02 00 05 03 01 00 04 00 05 03 02 00 03 00 05 03 01 00 00 00 03 03 02 00 01 00 02 00

Here we see that Thunderbolt Config is for Controller or Bus ID 0 and the last 4 bytes show USB-C port numbers 01 and 02. If we examine IORegistryExplorer, we see that:

• SSP1 = USB-C Port 02
• SSP2 = USB-C Port 01

So we can be reasonably confident that the last 4 bytes of Thunderbolt Config represent the USB-C port numbers. Can you find or guess the meaning of the other Thunderbolt Config values?

---

Next 12 Bytes of Thunderbolt DROM​

We examined the first 10 bytes of Thunderbolt DROM above. Now we turn to the next 12 bytes because they're marked "To be defined".

1. ea 01 bd 01 58 00 01 00 10 00 01 00
2. 88 4d e2 01 58 00 01 00 12 00 01 00
3. 6e 56 27 01 58 00 01 00 15 00 01 00
4. 4c d5 5c 01 58 00 01 00 16 00 01 00
5. e4 1d 7c 01 58 00 01 00 15 00 01 00
6. c6 9e 07 01 58 00 01 00 16 00 01 00

The values in red and blue are of course identical, but the values in black vary. The meanings of these bytes remain elusive. Any guesses?

 

[lew92]

Yeah bro. Nice knowledge but this is so complicated

Or this wasn’t even a answer to my question?

 

[CaseySJ]

Yeah bro. Nice knowledge but this is so complicated

Or this wasn’t even a answer to my question?

• Thunderbolt Support: enabled
• Thunderbolt Usb support: enabled or disabled, up to you
• Thunderbolt Boot support: disabled
• Wake from Thunderbolt devices: try either enabled or disabled
• GIPIO3 force pwr: enabled
• Thunderbolt Security: No Security

We recommend the above settings for Thunderbolt on Designare Z390. UAD Apollo devices work quite well on this system.

• Are you facing any problems with your Apollo Twin X?
• Did you use this build guide for your Designare Z390?

 

[mango1122]

@mango1122. here's the SSDT and OpenCore ACPI config that I'm currently using in my ASRock Z370itx/ac. Just make sure Force Power is enabled in the thunderbolt section of the BIOS and you should be good to go. Let us know how you get on...

Here are the results.
I don't have force Power option on the thunderbolt section of the BIOS. I'll see if I can modify the BIOS using modified Grub shell.
I had changed the SSDT to RP21.

Edit: After examining the BIOS (4.40) using UEFITool and ifrextract I can see an option for GPI03 Force Pwr (at offset 0x4F0). I will set it to enable using the modified Grub and report back.Tried after setting up GPI03 Force Pwr to 0x01 in BIOS and same result as above.

Edit2: ASRock z390 itx with Alpine Ridge JHL6240 Thunderbolt 3 chip and TPS65982 controller. Thunderbolt version is stock from ASRock NVM 14 - Attached.