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[SUCCESS] Gigabyte Designare Z390 (Thunderbolt 3) + i7-9700K + AMD RX 580

I tried your previous update (OC and NDK own build), without succes. That was a fail also, but I got a black screen after the boot proces.

Now this is at the beginning of the boot proces with a new formatted USB drive.
The OpenCore Mini-Guide was updated just a few minutes ago. To overcome the boot crash, what changes have you tried?

It may be necessary to take a video of the boot log with your smartphone because the relevant information about the kernel panic is a few frames before the screenshot that you posted.
 
i have got same thing with not installed on wifi DW1820a and thunderbolt
The DW1820a will not work on this motherboard because the CNVi socket is not a general purpose M.2 slot. The CNVi socket will only accept Intel CNVi modules.

What problem are you seeing with Thunderbolt? Can you post a screenshot?
 
Thkx for M.2 slot i understand now

Thunderbolt is not detected

it is writting not installed
 
Thkx for M.2 slot i understand now

Thunderbolt is not detected

it is writting not installed
Have you seen Note 1 in the Catalina Mini-Guide?


Screen Shot 2020-01-19 at 9.17.20 AM.png
 
Now that I've returned from vacation, I'd like to examine your SSDT-TBT (SSDT-TbtOnPCH.aml). Can you please post:
  • SSDT-TbtOnPCH.aml
  • Your motherboard's DSDT.aml (simply run MaciASL and select File --> New from ACPI --> DSDT).
The Designare firmware does not have MMRP and MMTB methods on RP05. It does have them on LPCB, but they take two arguments instead of one. For this (and a couple other reasons) the SSDT for Designare does not work as-is.

I have a custom DSDT file (Maximus DSDT modified for remove unused methods and devices .. and to be closed to Mac DSDTs) ...

For my SSDT-TbtOnPCH, it also be closed to Mac file... with added code to correctly boot device.

For MMRP and MMTB methods, I don't use them, only TBTD and TBTF. But we can include values directly to SSDT without calling them (for RP05, TBTD return 0x1C and TBTF 0x04) these two data are Device number and Function number of Root Port used for Thunderbolt device (extracted from IOReg).
 
seems to have the issue with n-d-k. this was after a long sleep. been on the machine since the restart so we will see if it happens again when I get up tomorrow.
also I changed from imacpro1,1 to imac19,1 as we had it in clover. seems to be ok. only thing I found was that I lost 1 fan sensor in istat menu. had 2 previously, 1 showed zero. no that's the only one that displays. i211 still does not show download throughput also in istat
I also noticed that with OpenCore product name set to iMacPro1,1 I have two fans listed in iStatMenus, but with iMac19,1 there is only one fan.
 
Yes it is writing no Hardware installed
 
Image shows the WiFi state with the Fenvi FVT919 installed in an x1 PCI slot. (Bluetooth is working)

If it helps, I rebuilt my system recently as I swapped for new hard drives and RAM. After a clean install following @CaseySJ Catalina guide, the Fenvi is working great, Bluetooth and WiFi. Come by easy what others come by hard if you use his golden guide. A lot of excellent work went into this guide.
 
I have a custom DSDT file (Maximus DSDT modified for remove unused methods and devices .. and to be closed to Mac DSDTs) ...

For my SSDT-TbtOnPCH, it also be closed to Mac file... with added code to correctly boot device.

For MMRP and MMTB methods, I don't use them, only TBTD and TBTF. But we can include values directly to SSDT without calling them (for RP05, TBTD return 0x1C and TBTF 0x04) these two data are Device number and Function number of Root Port used for Thunderbolt device (extracted from IOReg).
We have a heavily modified DSDT for Designare Z390 as well. It provides native NVRAM support, removes unnecessary baggage, and makes it more Mac-like. The TBTD and TBTF functions are present in the Z390 Designare DSDT.

Can you post your DSDT.aml and SSDT-TbtOnPCH.aml?

EDIT: We do have MMRP and MMTB but:
  • They take 2 parameters instead of 1, which is why the SSDT-TbtOnPCH fails to load during boot.
  • They are at \_SB0 instead of \_SB0.PCI0.RP05
 
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