DarwinDumper

ACPI Tables

APIC
BGRT
DBG2
DBGP
DSDT
FACP
FACS
FIDT
FPDT
HPET
LPIT
MCFG
RSDT
SSDT-1
SSDT-10
SSDT-2
SSDT-3
SSDT-4
SSDT-5
SSDT-6
SSDT-7
SSDT-8
SSDT-9
SSDT
UEFI

Multiple APIC Description Table

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* Disassembly of /Volumes/OS X El Capitan/Users/dima/Downloads/DarwinDumper_v2.9.9.2/DarwinDumperReports/006_2016-05-16_00-24-11_iMac14,2/DarwinDumper_2.9.9.2_AMI_X64_3526_Cap_dima/ACPI Tables/AML/APIC.aml, Mon May 16 00:24:12 2016

* ACPI Data Table [APIC]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]

[004h 0004 4] Table Length : 00000084

[008h 0008 1] Revision : 03

[009h 0009 1] Checksum : D9

[00Ah 0010 6] Oem ID : "ALASKA"

[010h 0016 8] Oem Table ID : "A M I "

[018h 0024 4] Oem Revision : 01072009

[01Ch 0028 4] Asl Compiler ID : "AMI "

[020h 0032 4] Asl Compiler Revision : 00010013

[024h 0036 4] Local Apic Address : FEE00000

[028h 0040 4] Flags (decoded below) : 00000001

PC-AT Compatibility : 1

[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]

[02Dh 0045 1] Length : 08

[02Eh 0046 1] Processor ID : 01

[02Fh 0047 1] Local Apic ID : 00

[030h 0048 4] Flags (decoded below) : 00000001

Processor Enabled : 1

[034h 0052 1] Subtable Type : 04 [Local APIC NMI]

[035h 0053 1] Length : 06

[036h 0054 1] Processor ID : 01

[037h 0055 2] Flags (decoded below) : 0005

Polarity : 1

Trigger Mode : 1

[039h 0057 1] Interrupt Input LINT : 01

[03Ah 0058 1] Subtable Type : 00 [Processor Local APIC]

[03Bh 0059 1] Length : 08

[03Ch 0060 1] Processor ID : 02

[03Dh 0061 1] Local Apic ID : 02

[03Eh 0062 4] Flags (decoded below) : 00000001

Processor Enabled : 1

[042h 0066 1] Subtable Type : 04 [Local APIC NMI]

[043h 0067 1] Length : 06

[044h 0068 1] Processor ID : 02

[045h 0069 2] Flags (decoded below) : 0005

Polarity : 1

Trigger Mode : 1

[047h 0071 1] Interrupt Input LINT : 01

[048h 0072 1] Subtable Type : 00 [Processor Local APIC]

[049h 0073 1] Length : 08

[04Ah 0074 1] Processor ID : 03

[04Bh 0075 1] Local Apic ID : 01

[04Ch 0076 4] Flags (decoded below) : 00000001

Processor Enabled : 1

[050h 0080 1] Subtable Type : 04 [Local APIC NMI]

[051h 0081 1] Length : 06

[052h 0082 1] Processor ID : 03

[053h 0083 2] Flags (decoded below) : 0005

Polarity : 1

Trigger Mode : 1

[055h 0085 1] Interrupt Input LINT : 01

[056h 0086 1] Subtable Type : 00 [Processor Local APIC]

[057h 0087 1] Length : 08

[058h 0088 1] Processor ID : 04

[059h 0089 1] Local Apic ID : 03

[05Ah 0090 4] Flags (decoded below) : 00000001

Processor Enabled : 1

[05Eh 0094 1] Subtable Type : 04 [Local APIC NMI]

[05Fh 0095 1] Length : 06

[060h 0096 1] Processor ID : 04

[061h 0097 2] Flags (decoded below) : 0005

Polarity : 1

Trigger Mode : 1

[063h 0099 1] Interrupt Input LINT : 01

[064h 0100 1] Subtable Type : 01 [I/O APIC]

[065h 0101 1] Length : 0C

[066h 0102 1] I/O Apic ID : 02

[067h 0103 1] Reserved : 00

[068h 0104 4] Address : FEC00000

[06Ch 0108 4] Interrupt : 00000000

[070h 0112 1] Subtable Type : 02 [Interrupt Source Override]

[071h 0113 1] Length : 0A

[072h 0114 1] Bus : 00

[073h 0115 1] Source : 00

[074h 0116 4] Interrupt : 00000002

[078h 0120 2] Flags (decoded below) : 0000

Polarity : 0

Trigger Mode : 0

[07Ah 0122 1] Subtable Type : 02 [Interrupt Source Override]

[07Bh 0123 1] Length : 0A

[07Ch 0124 1] Bus : 00

[07Dh 0125 1] Source : 09

[07Eh 0126 4] Interrupt : 00000009

[082h 0130 2] Flags (decoded below) : 000D

Polarity : 1

Trigger Mode : 3

Raw Table Data: Length 132 (0x84)

0000: 41 50 49 43 84 00 00 00 03 D9 41 4C 41 53 4B 41 APIC......ALASKA

0010: 41 20 4D 20 49 20 00 00 09 20 07 01 41 4D 49 20 A M I ... ..AMI

0020: 13 00 01 00 00 00 E0 FE 01 00 00 00 00 08 01 00 ................

0030: 01 00 00 00 04 06 01 05 00 01 00 08 02 02 01 00 ................

0040: 00 00 04 06 02 05 00 01 00 08 03 01 01 00 00 00 ................

0050: 04 06 03 05 00 01 00 08 04 03 01 00 00 00 04 06 ................

0060: 04 05 00 01 01 0C 02 00 00 00 C0 FE 00 00 00 00 ................

0070: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 09 09 00 ................

0080: 00 00 0D 00 ....

Boot Graphics Resource Table

View File BGRT.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [BGRT]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "BGRT" [Boot Graphics Resource Table]

[004h 0004 4] Table Length : 00000038

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : F9

[00Ah 0010 6] Oem ID : "ALASKA"

[010h 0016 8] Oem Table ID : "A M I "

[018h 0024 4] Oem Revision : 01072009

[01Ch 0028 4] Asl Compiler ID : "AMI "

[020h 0032 4] Asl Compiler Revision : 00010013

[024h 0036 2] Version : 0001

[026h 0038 1] Status : 01

[027h 0039 1] Image Type : 00

[028h 0040 8] Image Address : 0000000084618018

[030h 0048 4] Image OffsetX : 00000000

[034h 0052 4] Image OffsetY : 00000000

Raw Table Data: Length 56 (0x38)

0000: 42 47 52 54 38 00 00 00 01 F9 41 4C 41 53 4B 41 BGRT8.....ALASKA

0010: 41 20 4D 20 49 20 00 00 09 20 07 01 41 4D 49 20 A M I ... ..AMI

0020: 13 00 01 00 01 00 01 00 18 80 61 84 00 00 00 00 ..........a.....

0030: 00 00 00 00 00 00 00 00 ........

Debug Port Table 2

View File DBG2.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [DBG2]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "DBG2" [Debug Port table type 2]

[004h 0004 4] Table Length : 00000054

[008h 0008 1] Revision : 00

[009h 0009 1] Checksum : F0

[00Ah 0010 6] Oem ID : "INTEL "

[010h 0016 8] Oem Table ID : ""

[018h 0024 4] Oem Revision : 00000000

[01Ch 0028 4] Asl Compiler ID : "MSFT"

[020h 0032 4] Asl Compiler Revision : 0000005F

[024h 0036 4] Info Offset : 0000002C

[028h 0040 4] Info Count : 00000001

[02Ch 0044 1] Revision : 00

[02Dh 0045 2] Length : 0028

[02Fh 0047 1] Register Count : 01

[030h 0048 2] Namepath Length : 0002

[032h 0050 2] Namepath Offset : 0026

[034h 0052 2] OEM Data Length : 0000

[036h 0054 2] OEM Data Offset : 0000

[038h 0056 2] Port Type : 8000

[03Ah 0058 2] Port Subtype : 0000

[03Ch 0060 2] Reserved : 0000

[03Eh 0062 2] Base Address Offset : 0016

[040h 0064 2] Address Size Offset : 0022

[042h 0066 12] Base Address Register : [Generic Address Structure]

[042h 0066 1] Space ID : 01 [SystemIO]

[043h 0067 1] Bit Width : 08

[044h 0068 1] Bit Offset : 00

[045h 0069 1] Encoded Access Width : 00 [Undefined/Legacy]

[046h 0070 8] Address : 00000000000003F8

[04Eh 0078 4] Address Size : 00000020

[052h 0082 2] Namepath : "."

Raw Table Data: Length 84 (0x54)

0000: 44 42 47 32 54 00 00 00 00 F0 49 4E 54 45 4C 20 DBG2T.....INTEL

0010: 00 00 00 00 00 00 00 00 00 00 00 00 4D 53 46 54 ............MSFT

0020: 5F 00 00 00 2C 00 00 00 01 00 00 00 00 28 00 01 _...,........(..

0030: 02 00 26 00 00 00 00 00 00 80 00 00 00 00 16 00 ..&.............

0040: 22 00 01 08 00 00 F8 03 00 00 00 00 00 00 20 00 "............. .

0050: 00 00 2E 00 ....

Debug Port Table

View File DBGP.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [DBGP]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "DBGP" [Debug Port table]

[004h 0004 4] Table Length : 00000034

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : 75

[00Ah 0010 6] Oem ID : "INTEL "

[010h 0016 8] Oem Table ID : ""

[018h 0024 4] Oem Revision : 00000000

[01Ch 0028 4] Asl Compiler ID : "MSFT"

[020h 0032 4] Asl Compiler Revision : 0000005F

[024h 0036 1] Interface Type : 00

[025h 0037 3] Reserved : 000000

[028h 0040 12] Debug Port Register : [Generic Address Structure]

[028h 0040 1] Space ID : 01 [SystemIO]

[029h 0041 1] Bit Width : 08

[02Ah 0042 1] Bit Offset : 00

[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy]

[02Ch 0044 8] Address : 00000000000003F8

Raw Table Data: Length 52 (0x34)

0000: 44 42 47 50 34 00 00 00 01 75 49 4E 54 45 4C 20 DBGP4....uINTEL

0010: 00 00 00 00 00 00 00 00 00 00 00 00 4D 53 46 54 ............MSFT

0020: 5F 00 00 00 00 00 00 00 01 08 00 00 F8 03 00 00 _...............

0030: 00 00 00 00 ....

Differentiated System Description Table

View File DSDT.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* Original Table Header:

* Signature "DSDT"

* Length 0x000229BE (141758)

* Revision 0x02

* Checksum 0x78

* OEM ID "Apple "

* OEM Table ID "A M I "

* OEM Revision 0x01072009 (17244169)

* Compiler ID "INTL"

* Compiler Version 0x20120913 (538052883)

DefinitionBlock ("/Volumes/OS X El Capitan/Users/dima/Downloads/DarwinDumper_v2.9.9.2/DarwinDumperReports/006_2016-05-16_00-24-11_iMac14,2/DarwinDumper_2.9.9.2_AMI_X64_3526_Cap_dima/ACPI Tables/AML/DSDT.aml", "DSDT", 2, "Apple ", "A M I ", 0x01072009)

{

* iASL Warning: There were 17 external control methods found during

* disassembly, but additional ACPI tables to resolve these externals

* were not specified. This resulting disassembler output file may not

* compile because the disassembler did not know how many arguments

* to assign to these methods. To specify the tables needed to resolve

* external control method references, use the one of the following

* example iASL invocations:

* iasl -e <ssdt1.aml,ssdt2.aml...> -d <dsdt.aml>

* iasl -e <dsdt.aml,ssdt2.aml...> -d <ssdt1.aml>

External (_SB_.PCI0.GFX0.GSCI, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above)

External (_SB_.PCI0.GFX0.IUEH, MethodObj) // Warning: Unresolved Method, guessing 1 arguments (may be incorrect, see warning above)

External (_SB_.PCI0.PAUD.PUAM, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above)

External (_SB_.PCI0.PEG0.HPME, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above)

External (_SB_.PCI0.PEG1.HPME, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above)

External (_SB_.PCI0.PEG2.HPME, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above)

External (_SB_.PCI0.XHC_.DUAM, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above)

External (_SB_.PCI0.XHC_.RHUB.INIR, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above)

External (_SB_.TPM_.PTS_, MethodObj) // Warning: Unresolved Method, guessing 1 arguments (may be incorrect, see warning above)

External (AL6F, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above)

External (HLVT, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above)

External (P0L6, MethodObj) // Warning: Unresolved Method, guessing 1 arguments (may be incorrect, see warning above)

External (P1L6, MethodObj) // Warning: Unresolved Method, guessing 1 arguments (may be incorrect, see warning above)

External (P2L6, MethodObj) // Warning: Unresolved Method, guessing 1 arguments (may be incorrect, see warning above)

External (PS0X, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above)

External (PS2X, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above)

External (PS3X, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above)

External (_GPE.AL6F)

External (_GPE.HLVT)

External (_GPE.P0L6)

External (_GPE.P1L6)

External (_GPE.P2L6)

External (_PR_.BGIA, IntObj)

External (_PR_.BGMA, IntObj)

External (_PR_.BGMS, IntObj)

External (_PR_.CPPC)

External (_PR_.CPU0._PPC)

External (_PR_.CPU0._PSS)

External (_PR_.CPU0.LPSS)

External (_PR_.CPU0.TPSS)

External (_PR_.DSAE)

External (_PR_.DTSE)

External (_PR_.DTSF, IntObj)

External (_PR_.ELNG, IntObj)

External (_PR_.EMNA, IntObj)

External (_PR_.EPCS)

External (_PR_.POWS)

External (_PR_.TRPD)

External (_PR_.TRPF)

External (_SB_.IETM)

External (_SB_.PCI0.GFX0.CLID)

External (_SB_.PCI0.GFX0.DD1F)

External (_SB_.PCI0.GFX0.GSSE)

External (_SB_.PCI0.LPCB.H_EC.CHRG)

External (_SB_.PCI0.SAT0.SDSM)

External (_SB_.PCI0.XHC_.PS0X)

External (_SB_.PCI0.XHC_.PS3X)

External (_SB_.PCI0.XHC_.RHUB.PS0X)

External (_SB_.PCI0.XHC_.RHUB.PS2X)

External (_SB_.PCI0.XHC_.RHUB.PS3X)

External (_TZ_.TZ00)

External (_TZ_.TZ01)

External (ALSE)

External (D1F0)

External (D1F1)

External (D1F2)

External (DIDX)

External (GSMI)

External (LHIH)

External (LLOW)

External (M32B, IntObj)

External (M32L, IntObj)

External (M64B, IntObj)

External (M64L, IntObj)

External (MDBG, IntObj)

External (P0WK)

External (P1GP)

External (P1WK)

External (P2GP)

External (P2WK)

External (PDC0)

External (PDC1)

External (PDC2)

External (PDC3)

External (PDC4)

External (PDC5)

External (PDC6)

External (PDC7)

External (SDSM, IntObj)

External (SGGP)

External (SGMD)

Name (ENTK, 0x87)

Name (EXTK, 0xAA)

Name (IO1B, 0x0A00)

Name (IO1L, 0x10)

Name (IO2B, 0x0A10)

Name (IO2L, 0x10)

Name (IO3B, 0x0A20)

Name (IO3L, 0x10)

Name (IO4B, 0x0A30)

Name (IO4L, 0x10)

Name (SP1O, 0x4E)

Name (IOES, Zero)

Name (PEBS, 0xE0000000)

Name (PELN, 0x10000000)

Name (MCHB, 0xFED10000)

Name (MCHL, 0x8000)

Name (EGPB, 0xFED19000)

Name (EGPL, 0x1000)

Name (DMIB, 0xFED18000)

Name (DMIL, 0x1000)

Name (VTBS, 0xFED90000)

Name (VTLN, 0x4000)

Name (CPVD, Zero)

Name (PMBA, 0x1800)

Name (PMLN, 0x80)

Name (SMCR, 0x1830)

Name (TCBR, 0xFED08000)

Name (TCLT, 0x1000)

Name (SMBL, 0x20)

Name (APCB, 0xFEC00000)

Name (APCL, 0x1000)

Name (HPTC, 0x60)

Name (GPBA, 0x1C00)

Name (GPLN, 0x0400)

Name (PFTU, 0xB2)

Name (FMBL, One)

Name (FDTP, 0x02)

Name (FUPS, 0x04)

Name (FUWS, 0x03)

Name (FEMD, 0x04)

Name (TBUS, 0xFF)

Name (TBSW, 0xBC)

Name (ASSB, Zero)

Name (AOTB, Zero)

Name (AAXB, Zero)

Name (PEHP, Zero)

Name (SHPC, One)

Name (PEPM, Zero)

Name (PEER, Zero)

Name (PECS, Zero)

Name (ITKE, Zero)

Name (MBEC, 0xFFFF)

Name (SRSI, 0xB2)

Name (CSMI, 0x61)

Name (SMIA, 0xB2)

Name (SMIB, 0xB3)

Name (OFST, 0x35)

Name (TRST, 0x02)

Name (TCMF, Zero)

Name (TMF1, Zero)

Name (TMF2, Zero)

Name (TMF3, Zero)

Name (TTPF, One)

Name (DTPT, Zero)

Name (TTDP, Zero)

Name (TPMB, 0xFFFFFFFF)

Name (TPMC, 0xFFFFFFFF)

Name (TPMM, 0xFED40000)

Name (FTPM, 0xFFFFFFFF)

Name (AMDT, Zero)

Name (TPMF, Zero)

Name (FDSI, 0xD4)

Name (FESI, 0xD5)

Name (FSSI, 0xD9)

Name (SMIP, 0xB2)

Name (CISI, 0x88)

Name (UWSI, 0x77)

Name (SS1, One)

Name (SS2, Zero)

Name (SS3, One)

Name (SS4, One)

Name (IOST, 0x0000)

Name (TOPM, 0x00000000)

Name (ROMS, 0xFFE00000)

Name (VGAF, One)

OperationRegion (GNVS, SystemMemory, 0x88B06000, 0x05F5)

Field (GNVS, AnyAcc, Lock, Preserve)

{

OSYS, 16,

SMIF, 8,

PRM0, 8,

PRM1, 8,

SCIF, 8,

PRM2, 8,

PRM3, 8,

LCKF, 8,

PRM4, 8,

PRM5, 8,

P80D, 32,

PWRS, 8,

DBGS, 8,

THOF, 8,

ACT1, 8,

ACTT, 8,

PSVT, 8,

TC1V, 8,

TC2V, 8,

TSPV, 8,

CRTT, 8,

DTSE, 8,

DTS1, 8,

DTS2, 8,

DTSF, 8,

Offset (0x1E),

Offset (0x1F),

Offset (0x20),

Offset (0x21),

Offset (0x22),

Offset (0x23),

Offset (0x24),

Offset (0x25),

REVN, 8,

APIC, 8,

TCNT, 8,

PCP0, 8,

PCP1, 8,

PPCM, 8,

PPMF, 32,

C67L, 8,

NATP, 8,

CMAP, 8,

CMBP, 8,

LPTP, 8,

FDCP, 8,

CMCP, 8,

CIRP, 8,

SMSC, 8,

W381, 8,

SMC1, 8,

EMAE, 8,

EMAP, 16,

EMAL, 16,

MEFE, 8,

DSTS, 8,

MORD, 8,

TCGP, 8,

PPRP, 32,

PPRQ, 8,

LPPR, 8,

IDEM, 8,

BID, 16,

PLID, 8,

BTYP, 8,

OSCC, 8,

NEXP, 8,

SBV1, 8,

SBV2, 8,

ECON, 8,

DSEN, 8,

GPIC, 8,

CTYP, 8,

L01C, 8,

VFN0, 8,

VFN1, 8,

VFN2, 8,

VFN3, 8,

VFN4, 8,

VFN5, 8,

VFN6, 8,

VFN7, 8,

VFN8, 8,

VFN9, 8,

ATMC, 8,

PTMC, 8,

PNHM, 32,

TBAL, 32,

TBAH, 32,

RTIP, 8,

TSOD, 8,

PFLV, 8,

BREV, 8,

BBID, 8,

PDTS, 8,

PKGA, 8,

PAMT, 8,

AC0F, 8,

AC1F, 8,

DTS3, 8,

DTS4, 8,

LTR1, 8,

LTR2, 8,

LTR3, 8,

LTR4, 8,

LTR5, 8,

LTR6, 8,

LTR7, 8,

LTR8, 8,

LTR9, 8,

LTRA, 8,

LTRB, 8,

LTRC, 8,

LTRD, 8,

LTRE, 8,

LTRF, 8,

LTRG, 8,

LTRH, 8,

LTRI, 8,

LTRJ, 8,

LTRK, 8,

OBF1, 8,

OBF2, 8,

OBF3, 8,

OBF4, 8,

OBF5, 8,

OBF6, 8,

OBF7, 8,

OBF8, 8,

OBF9, 8,

OBFA, 8,

OBFB, 8,

OBFC, 8,

OBFD, 8,

OBFE, 8,

OBFF, 8,

OBFG, 8,

OBFH, 8,

OBFI, 8,

OBFJ, 8,

OBFK, 8,

XTUB, 32,

XTUS, 32,

XMPB, 32,

DDRF, 8,

RTD3, 8,

PEP0, 8,

PEP3, 8,

DPTF, 8,

SADE, 8,

SACR, 8,

SAHT, 8,

CTDP, 8,

LPMP, 8,

LPMV, 8,

ECEU, 8,

TGFG, 16,

MEMD, 8,

ATRA, 8,

PTRA, 8,

MEMC, 8,

MEMH, 8,

FND1, 8,

FND2, 8,

AMBD, 8,

AMAT, 8,

AMPT, 8,

AMCT, 8,

AMHT, 8,

SKDE, 8,

SKAT, 8,

SKPT, 8,

SKCT, 8,

SKHT, 8,

EFDE, 8,

EFAT, 8,

EFPT, 8,

EFCT, 8,

EFHT, 8,

VRDE, 8,

VRAT, 8,

VRPT, 8,

VRCT, 8,

VRHT, 8,

DPAP, 8,

DPPP, 8,

DPCP, 8,

DCMP, 8,

TRTV, 8,

LPOE, 8,

LPOP, 8,

LPOS, 8,

LPOW, 8,

LPER, 8,

PPSZ, 32,

DISE, 8,

BGMA, 64,

BGMS, 8,

BGIA, 16,

IRMC, 8,

NFCE, 8,

CHEN, 8,

S0ID, 8,

CTDB, 8,

DKSM, 8,

SIO1, 16,

SIO2, 16,

SPBA, 16,

SEC0, 32,

SEC1, 32,

SEC2, 32,

SEC3, 32,

SEC4, 32,

SEC5, 32,

SEC6, 32,

SEC7, 32,

SEC8, 32,

Offset (0x1F4),

WIFD, 8,

WFAT, 8,

WFPT, 8,

WFCT, 8,

WFHT, 8,

PWRE, 8,

PWRP, 8,

Offset (0x203),

XHPR, 8,

RIC0, 8,

DVS0, 8,

DVS1, 8,

DVS2, 8,

DVS3, 8,

GBSX, 8,

IUBE, 8,

IUCE, 8,

IUDE, 8,

ECNO, 8,

AUDD, 16,

IC0D, 16,

IC1D, 16,

IC1S, 16,

VRRD, 16,

PSCP, 8,

I20D, 16,

I21D, 16,

RCG0, 16,

ECDB, 8,

P2ME, 8,

SSH0, 16,

SSL0, 16,

SSD0, 16,

FMH0, 16,

FML0, 16,

FMD0, 16,

FPH0, 16,

FPL0, 16,

FPD0, 16,

SSH1, 16,

SSL1, 16,

SSD1, 16,

FMH1, 16,

FML1, 16,

FMD1, 16,

FPH1, 16,

FPL1, 16,

FPD1, 16,

M0C0, 16,

M1C0, 16,

M2C0, 16,

M0C1, 16,

M1C1, 16,

M2C1, 16,

M0C2, 16,

M1C2, 16,

M0C3, 16,

M1C3, 16,

M0C4, 16,

M1C4, 16,

M0C5, 16,

M1C5, 16,

TBSF, 8,

GIRQ, 32,

DMTP, 8,

DMTD, 8,

DMSH, 8,

LANP, 8,

SHSB, 8,

PLCS, 8,

PLVL, 16,

GN1E, 8,

G1AT, 8,

G1PT, 8,

G1CT, 8,

G1HT, 8,

GN2E, 8,

G2AT, 8,

G2PT, 8,

G2CT, 8,

G2HT, 8,

WWSD, 8,

CVSD, 8,

SSDD, 8,

INLD, 8,

IFAT, 8,

IFPT, 8,

IFCT, 8,

IFHT, 8,

SDWE, 8,

USBH, 8,

BCV4, 8,

WTV0, 8,

WTV1, 8,

APFU, 8,

SOHP, 8,

GP5F, 8,

NOHP, 8,

TBSE, 8,

WKFN, 8,

PEPC, 32,

VRSD, 16,

PB1E, 8,

GNID, 8,

WAND, 8,

WWAT, 8,

WWPT, 8,

WWCT, 8,

WWHT, 8,

Offset (0x2A3),

MPL0, 16,

CHGE, 8,

SAC3, 8,

MEM3, 8,

AMC3, 8,

SKC3, 8,

EFC3, 8,

VRC3, 8,

WFC3, 8,

G1C3, 8,

G2C3, 8,

IFC3, 8,

WWC3, 8,

WGC3, 8,

SPST, 8,

PERE, 8,

Offset (0x2B7),

GN3E, 8,

G3AT, 8,

G3PT, 8,

G3CT, 8,

G3HT, 8,

GN4E, 8,

G4AT, 8,

G4PT, 8,

G4CT, 8,

G4HT, 8,

GN5E, 8,

G5AT, 8,

G5PT, 8,

G5CT, 8,

G5HT, 8,

GN6E, 8,

G6AT, 8,

G6PT, 8,

G6CT, 8,

G6HT, 8,

ECLP, 8,

G3C3, 8,

G4C3, 8,

G5C3, 8,

G6C3, 8,

TSP1, 8,

TSP2, 8,

TSP3, 8,

TSP4, 8,

TSP5, 8,

TSP6, 8,

TSP7, 8,

TSP8, 8,

SSP1, 8,

SSP2, 8,

SSP3, 8,

SSP4, 8,

SSP5, 8,

SSP6, 8,

SSP7, 8,

SSP8, 8,

MEMS, 8,

Offset (0x2F8),

S1DE, 8,

S1AT, 8,

S1PT, 8,

S1CT, 8,

S1HT, 8,

S2DE, 8,

S2AT, 8,

S2PT, 8,

S2CT, 8,

S2HT, 8,

S3DE, 8,

S3AT, 8,

S3PT, 8,

S3CT, 8,

S3HT, 8,

S4DE, 8,

S4AT, 8,

S4PT, 8,

S4CT, 8,

S4HT, 8,

S5DE, 8,

S5AT, 8,

S5PT, 8,

S5CT, 8,

S5HT, 8,

S6DE, 8,

S6AT, 8,

S6PT, 8,

S6CT, 8,

S6HT, 8,

S7DE, 8,

S7AT, 8,

S7PT, 8,

S7CT, 8,

S7HT, 8,

S1S3, 8,

S2S3, 8,

S3S3, 8,

S4S3, 8,

S5S3, 8,

S6S3, 8,

S7S3, 8,

PSME, 8,

PDT1, 8,

PLM1, 16,

PTW1, 16,

PDT2, 8,

PLM2, 16,

PTW2, 16,

DDT1, 8,

DDP1, 8,

DLI1, 16,

DPL1, 16,

DTW1, 16,

DMI1, 16,

DMA1, 16,

DMT1, 16,

DDT2, 8,

DDP2, 8,

DLI2, 16,

DPL2, 16,

DTW2, 16,

DMI2, 16,

DMA2, 16,

DMT2, 16,

WIFE, 8,

DOM1, 8,

LIM1, 16,

TIM1, 16,

DOM2, 8,

LIM2, 16,

TIM2, 16,

DOM3, 8,

LIM3, 16,

TIM3, 16,

TRD0, 8,

TRL0, 8,

TRD1, 8,

TRL1, 8,

WDM1, 8,

CID1, 16,

WDM2, 8,

CID2, 16,

Offset (0x364),

APPE, 8,

MPL1, 16,

MPL2, 16,

SDS0, 8,

SDS1, 8,

SDS2, 8,

SDS3, 8,

SDS4, 8,

SDS5, 8,

SDS6, 8,

SDS7, 8,

SDS8, 8,

SDS9, 8,

SDSA, 8,

TPLB, 8,

TPLH, 16,

WTVX, 8,

WITX, 8,

GPTD, 8,

GDBT, 16,

UTKX, 8,

SPTD, 8,

GEXN, 8,

TBTS, 8,

AICS, 8,

TARS, 8,

FPAT, 8,

FPEN, 8,

FPGN, 32,

FPLV, 8,

CPAD, 16,

CPAB, 8,

TNAT, 8,

CPGN, 32,

CF2T, 8,

ATLB, 32,

SDM0, 8,

SDM1, 8,

SDM2, 8,

SDM3, 8,

SDM4, 8,

SDM5, 8,

SDM6, 8,

SDM7, 8,

SDM8, 8,

SDM9, 8,

SDMA, 8,

USTP, 8,

SSHI, 16,

SSLI, 16,

SSDI, 16,

FMHI, 16,

FMLI, 16,

FMDI, 16,

FPHI, 16,

FPLI, 16,

FPDI, 16,

M0CI, 16,

M1CI, 16,

M0CS, 16,

M1CS, 16,

M0CU, 16,

M1CU, 16,

CAMT, 8,

DS4D, 16,

IVDF, 8,

EIDF, 8,

GFPS, 32,

GFPI, 32,

GNSM, 8,

GNSC, 8,

GGNR, 32,

GBTW, 32,

GBTK, 32,

GBTI, 32,

GPDI, 32,

GPLI, 32,

CL00, 8,

CL01, 8,

CL02, 8,

CL03, 8,

L0EN, 8,

L1EN, 8,

L2EN, 8,

L3EN, 8,

CDIV, 8,

C0TP, 8,

C0CV, 8,

C0GP, 8,

C0IB, 8,

C0IA, 16,

C0P0, 8,

C0P1, 8,

C0P2, 8,

C0P3, 8,

C0G0, 8,

C0G1, 8,

C0G2, 8,

C0G3, 8,

C0F0, 8,

C0F1, 8,

C0F2, 8,

C0F3, 8,

C0A0, 8,

C0A1, 8,

C0A2, 8,

C0A3, 8,

C0I0, 8,

C0I1, 8,

C0I2, 8,

C0I3, 8,

C0PL, 8,

C1TP, 8,

C1CV, 8,

C1GP, 8,

C1IB, 8,

C1IA, 16,

C1P0, 8,

C1P1, 8,

C1P2, 8,

C1P3, 8,

C1G0, 8,

C1G1, 8,

C1G2, 8,

C1G3, 8,

C1F0, 8,

C1F1, 8,

C1F2, 8,

C1F3, 8,

C1A0, 8,

C1A1, 8,

C1A2, 8,

C1A3, 8,

C1I0, 8,

C1I1, 8,

C1I2, 8,

C1I3, 8,

C1PL, 8,

C2TP, 8,

C2CV, 8,

C2GP, 8,

C2IB, 8,

C2IA, 16,

C2P0, 8,

C2P1, 8,

C2P2, 8,

C2P3, 8,

C2G0, 8,

C2G1, 8,

C2G2, 8,

C2G3, 8,

C2F0, 8,

C2F1, 8,

C2F2, 8,

C2F3, 8,

C2A0, 8,

C2A1, 8,

C2A2, 8,

C2A3, 8,

C2I0, 8,

C2I1, 8,

C2I2, 8,

C2I3, 8,

C2PL, 8,

C3TP, 8,

C3CV, 8,

C3GP, 8,

C3IB, 8,

C3IA, 16,

C3P0, 8,

C3P1, 8,

C3P2, 8,

C3P3, 8,

C3G0, 8,

C3G1, 8,

C3G2, 8,

C3G3, 8,

C3F0, 8,

C3F1, 8,

C3F2, 8,

C3F3, 8,

C3A0, 8,

C3A1, 8,

C3A2, 8,

C3A3, 8,

C3I0, 8,

C3I1, 8,

C3I2, 8,

C3I3, 8,

C3PL, 8,

L0SM, 8,

L0H0, 8,

L0H1, 8,

L0H2, 8,

L0H3, 8,

L0H4, 8,

L0H5, 8,

L0H6, 8,

L0H7, 8,

L0H8, 8,

L0PL, 8,

L0M0, 8,

L0M1, 8,

L0M2, 8,

L0M3, 8,

L0M4, 8,

L0M5, 8,

L0M6, 8,

L0M7, 8,

L0M8, 8,

L0M9, 8,

L0MA, 8,

L0MB, 8,

L0MC, 8,

L0MD, 8,

L0ME, 8,

L0MF, 8,

L0DI, 8,

L0BS, 8,

L0A0, 16,

L0A1, 16,

L0A2, 16,

L0A3, 16,

L0A4, 16,

L0A5, 16,

L0A6, 16,

L0A7, 16,

L0A8, 16,

L0A9, 16,

L0AA, 16,

L0AB, 16,

L0D0, 8,

L0D1, 8,

L0D2, 8,

L0D3, 8,

L0D4, 8,

L0D5, 8,

L0D6, 8,

L0D7, 8,

L0D8, 8,

L0D9, 8,

L0DA, 8,

L0DB, 8,

L0DV, 8,

L0CV, 8,

L0LU, 8,

L0NL, 8,

L0EE, 8,

L0VC, 8,

L0FS, 8,

L0DG, 8,

L0C0, 8,

L0C1, 8,

L0C2, 8,

L0C3, 8,

L0CK, 32,

L0CL, 8,

L1SM, 8,

L1H0, 8,

L1H1, 8,

L1H2, 8,

L1H3, 8,

L1H4, 8,

L1H5, 8,

L1H6, 8,

L1H7, 8,

L1H8, 8,

L1PL, 8,

L1M0, 8,

L1M1, 8,

L1M2, 8,

L1M3, 8,

L1M4, 8,

L1M5, 8,

L1M6, 8,

L1M7, 8,

L1M8, 8,

L1M9, 8,

L1MA, 8,

L1MB, 8,

L1MC, 8,

L1MD, 8,

L1ME, 8,

L1MF, 8,

L1DI, 8,

L1BS, 8,

L1A0, 16,

L1A1, 16,

L1A2, 16,

L1A3, 16,

L1A4, 16,

L1A5, 16,

L1A6, 16,

L1A7, 16,

L1A8, 16,

L1A9, 16,

L1AA, 16,

L1AB, 16,

L1D0, 8,

L1D1, 8,

L1D2, 8,

L1D3, 8,

L1D4, 8,

L1D5, 8,

L1D6, 8,

L1D7, 8,

L1D8, 8,

L1D9, 8,

L1DA, 8,

L1DB, 8,

L1DV, 8,

L1CV, 8,

L1LU, 8,

L1NL, 8,

L1EE, 8,

L1VC, 8,

L1FS, 8,

L1DG, 8,

L1C0, 8,

L1C1, 8,

L1C2, 8,

L1C3, 8,

L1CK, 32,

L1CL, 8,

L2SM, 8,

L2H0, 8,

L2H1, 8,

L2H2, 8,

L2H3, 8,

L2H4, 8,

L2H5, 8,

L2H6, 8,

L2H7, 8,

L2H8, 8,

L2PL, 8,

L2M0, 8,

L2M1, 8,

L2M2, 8,

L2M3, 8,

L2M4, 8,

L2M5, 8,

L2M6, 8,

L2M7, 8,

L2M8, 8,

L2M9, 8,

L2MA, 8,

L2MB, 8,

L2MC, 8,

L2MD, 8,

L2ME, 8,

L2MF, 8,

L2DI, 8,

L2BS, 8,

L2A0, 16,

L2A1, 16,

L2A2, 16,

L2A3, 16,

L2A4, 16,

L2A5, 16,

L2A6, 16,

L2A7, 16,

L2A8, 16,

L2A9, 16,

L2AA, 16,

L2AB, 16,

L2D0, 8,

L2D1, 8,

L2D2, 8,

L2D3, 8,

L2D4, 8,

L2D5, 8,

L2D6, 8,

L2D7, 8,

L2D8, 8,

L2D9, 8,

L2DA, 8,

L2DB, 8,

L2DV, 8,

L2CV, 8,

L2LU, 8,

L2NL, 8,

L2EE, 8,

L2VC, 8,

L2FS, 8,

L2DG, 8,

L2C0, 8,

L2C1, 8,

L2C2, 8,

L2C3, 8,

L2CK, 32,

L2CL, 8,

L3SM, 8,

L3H0, 8,

L3H1, 8,

L3H2, 8,

L3H3, 8,

L3H4, 8,

L3H5, 8,

L3H6, 8,

L3H7, 8,

L3H8, 8,

L3PL, 8,

L3M0, 8,

L3M1, 8,

L3M2, 8,

L3M3, 8,

L3M4, 8,

L3M5, 8,

L3M6, 8,

L3M7, 8,

L3M8, 8,

L3M9, 8,

L3MA, 8,

L3MB, 8,

L3MC, 8,

L3MD, 8,

L3ME, 8,

L3MF, 8,

L3DI, 8,

L3BS, 8,

L3A0, 16,

L3A1, 16,

L3A2, 16,

L3A3, 16,

L3A4, 16,

L3A5, 16,

L3A6, 16,

L3A7, 16,

L3A8, 16,

L3A9, 16,

L3AA, 16,

L3AB, 16,

L3D0, 8,

L3D1, 8,

L3D2, 8,

L3D3, 8,

L3D4, 8,

L3D5, 8,

L3D6, 8,

L3D7, 8,

L3D8, 8,

L3D9, 8,

L3DA, 8,

L3DB, 8,

L3DV, 8,

L3CV, 8,

L3LU, 8,

L3NL, 8,

L3EE, 8,

L3VC, 8,

L3FS, 8,

L3DG, 8,

L3C0, 8,

L3C1, 8,

L3C2, 8,

L3C3, 8,

L3CK, 32,

L3CL, 8,

ECR1, 8,

Offset (0x5AA),

I2SC, 8,

ODV0, 8,

ODV1, 8,

ODV2, 8,

ODV3, 8,

ODV4, 8,

ODV5, 8,

UBCB, 32,

EMOD, 8,

WIFC, 8,

Offset (0x5BE),

TPLS, 8,

TPDB, 8,

TPDH, 16,

TPDS, 8,

AG1L, 64,

AG1H, 64,

AG2L, 64,

AG2H, 64,

AG3L, 64,

AG3H, 64,

HEFE, 8,

XDCE, 8

}

Device (PSM)

{

Name (_HID, EisaId ("INT3420")) // _HID: Hardware ID

Name (_UID, Zero) // _UID: Unique ID

Name (_STR, Unicode ("Power Sharing Manager")) // _STR: Description String

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (PSME, One))

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Name (SPLX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (PDT1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (PLM1, Index (DerefOf (Index (SPLX, One)), One))

Store (PTW1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (PDT2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (PLM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (PTW2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Return (SPLX)

}

Name (DPLX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x03)

{

0x80000000,

Package (0x06)

{

0x80000000,

0x80000000

}

})

Method (DPLC, 0, Serialized)

{

Store (DDT1, Index (DerefOf (Index (DPLX, One)), Zero))

Store (DDP1, Index (DerefOf (Index (DPLX, One)), One))

Store (DLI1, Index (DerefOf (Index (DerefOf (Index (DPLX, One)),

0x02)), Zero))

Store (DPL1, Index (DerefOf (Index (DerefOf (Index (DPLX, One)),

0x02)), One))

Store (DTW1, Index (DerefOf (Index (DerefOf (Index (DPLX, One)),

0x02)), 0x02))

Store (DMI1, Index (DerefOf (Index (DerefOf (Index (DPLX, One)),

0x02)), 0x03))

Store (DMA1, Index (DerefOf (Index (DerefOf (Index (DPLX, One)),

0x02)), 0x04))

Store (DMT1, Index (DerefOf (Index (DerefOf (Index (DPLX, One)),

0x02)), 0x05))

Store (DDT2, Index (DerefOf (Index (DPLX, 0x02)), Zero))

Store (DDP2, Index (DerefOf (Index (DPLX, 0x02)), One))

Store (DLI2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)),

0x02)), Zero))

Store (DPL2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)),

0x02)), One))

Store (DTW2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)),

0x02)), 0x02))

Store (DMI2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)),

0x02)), 0x03))

Store (DMA2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)),

0x02)), 0x04))

Store (DMT2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)),

0x02)), 0x05))

Return (DPLX)

}

Scope (_SB)

{

Name (PRSA, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{3,4,5,6,10,11,12,14,15}

})

Alias (PRSA, PRSB)

Alias (PRSA, PRSC)

Alias (PRSA, PRSD)

Alias (PRSA, PRSE)

Alias (PRSA, PRSF)

Alias (PRSA, PRSG)

Alias (PRSA, PRSH)

Name (PR00, Package (0x2A)

{

Package (0x04)

{

0x0001FFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x0001FFFF,

One,

LNKB,

Zero

Package (0x04)

{

0x0001FFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x0001FFFF,

0x03,

LNKD,

Zero

Package (0x04)

{

0x0004FFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x0005FFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x0008FFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x001FFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x001FFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0x001FFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x001FFFFF,

0x03,

LNKD,

Zero

Package (0x04)

{

0x001EFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x001EFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0x001EFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x001EFFFF,

0x03,

LNKD,

Zero

Package (0x04)

{

0x001DFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x001DFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0x001DFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x001DFFFF,

0x03,

LNKD,

Zero

Package (0x04)

{

0x001CFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x001CFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0x001CFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x001CFFFF,

0x03,

LNKD,

Zero

Package (0x04)

{

0x001BFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x001BFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0x001BFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x001BFFFF,

0x03,

LNKD,

Zero

Package (0x04)

{

0x0016FFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x0016FFFF,

One,

LNKB,

Zero

Package (0x04)

{

0x0016FFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x0016FFFF,

0x03,

LNKD,

Zero

Package (0x04)

{

0x0015FFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x0015FFFF,

One,

LNKB,

Zero

Package (0x04)

{

0x0015FFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x0015FFFF,

0x03,

LNKD,

Zero

Package (0x04)

{

0x0014FFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x0014FFFF,

0x03,

LNKD,

Zero

Package (0x04)

{

0x0014FFFF,

One,

LNKB,

Zero

Package (0x04)

{

0x0014FFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x0013FFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x0017FFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x0002FFFF,

Zero,

LNKA,

Zero

}

})

Name (AR00, Package (0x2A)

{

Package (0x04)

{

0x0001FFFF,

Zero,

0x10

Package (0x04)

{

0x0001FFFF,

One,

Zero,

0x11

Package (0x04)

{

0x0001FFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0x0001FFFF,

0x03,

Zero,

0x13

Package (0x04)

{

0x0004FFFF,

Zero,

0x10

Package (0x04)

{

0x0005FFFF,

Zero,

0x10

Package (0x04)

{

0x0008FFFF,

Zero,

0x10

Package (0x04)

{

0x001FFFFF,

Zero,

0x10

Package (0x04)

{

0x001FFFFF,

One,

Zero,

0x11

Package (0x04)

{

0x001FFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0x001FFFFF,

0x03,

Zero,

0x13

Package (0x04)

{

0x001EFFFF,

Zero,

0x14

Package (0x04)

{

0x001EFFFF,

One,

Zero,

0x15

Package (0x04)

{

0x001EFFFF,

0x02,

Zero,

0x16

Package (0x04)

{

0x001EFFFF,

0x03,

Zero,

0x17

Package (0x04)

{

0x001DFFFF,

Zero,

0x10

Package (0x04)

{

0x001DFFFF,

One,

Zero,

0x11

Package (0x04)

{

0x001DFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0x001DFFFF,

0x03,

Zero,

0x13

Package (0x04)

{

0x001CFFFF,

Zero,

0x10

Package (0x04)

{

0x001CFFFF,

One,

Zero,

0x11

Package (0x04)

{

0x001CFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0x001CFFFF,

0x03,

Zero,

0x13

Package (0x04)

{

0x001BFFFF,

Zero,

0x10

Package (0x04)

{

0x001BFFFF,

One,

Zero,

0x11

Package (0x04)

{

0x001BFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0x001BFFFF,

0x03,

Zero,

0x13

Package (0x04)

{

0x0016FFFF,

Zero,

0x10

Package (0x04)

{

0x0016FFFF,

One,

Zero,

0x11

Package (0x04)

{

0x0016FFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0x0016FFFF,

0x03,

Zero,

0x13

Package (0x04)

{

0x0015FFFF,

Zero,

0x10

Package (0x04)

{

0x0015FFFF,

One,

Zero,

0x11

Package (0x04)

{

0x0015FFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0x0015FFFF,

0x03,

Zero,

0x13

Package (0x04)

{

0x0014FFFF,

Zero,

0x10

Package (0x04)

{

0x0014FFFF,

0x03,

Zero,

0x13

Package (0x04)

{

0x0014FFFF,

One,

Zero,

0x11

Package (0x04)

{

0x0014FFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0x0013FFFF,

Zero,

0x14

Package (0x04)

{

0x0017FFFF,

Zero,

0x10

Package (0x04)

{

0x0002FFFF,

Zero,

0x10

}

})

Name (PR01, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKD,

Zero

}

})

Name (AR01, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x10

Package (0x04)

{

0xFFFF,

One,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x13

}

})

Name (PR02, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKA,

Zero

}

})

Name (AR02, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x11

Package (0x04)

{

0xFFFF,

One,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x10

}

})

Name (PR03, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKB,

Zero

}

})

Name (AR03, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x12

Package (0x04)

{

0xFFFF,

One,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x11

}

})

Name (PR0C, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKD,

Zero

}

})

Name (AR0C, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x10

Package (0x04)

{

0xFFFF,

One,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x13

}

})

Name (PR0D, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKA,

Zero

}

})

Name (AR0D, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x11

Package (0x04)

{

0xFFFF,

One,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x10

}

})

Name (PR0E, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKB,

Zero

}

})

Name (AR0E, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x12

Package (0x04)

{

0xFFFF,

One,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x11

}

})

Name (PR0F, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKC,

Zero

}

})

Name (AR0F, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x13

Package (0x04)

{

0xFFFF,

One,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x12

}

})

Name (PR10, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKD,

Zero

}

})

Name (AR10, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x10

Package (0x04)

{

0xFFFF,

One,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x13

}

})

Name (PR04, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKD,

Zero

}

})

Name (AR04, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x10

Package (0x04)

{

0xFFFF,

One,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x13

}

})

Name (PR05, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKA,

Zero

}

})

Name (AR05, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x11

Package (0x04)

{

0xFFFF,

One,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x10

}

})

Name (PR06, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKB,

Zero

}

})

Name (AR06, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x12

Package (0x04)

{

0xFFFF,

One,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x11

}

})

Name (PR07, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKC,

Zero

}

})

Name (AR07, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x13

Package (0x04)

{

0xFFFF,

One,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x12

}

})

Name (PR08, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKD,

Zero

}

})

Name (AR08, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x10

Package (0x04)

{

0xFFFF,

One,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x13

}

})

Name (PR09, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKA,

Zero

}

})

Name (AR09, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x11

Package (0x04)

{

0xFFFF,

One,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x10

}

})

Name (PR0A, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKB,

Zero

}

})

Name (AR0A, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x12

Package (0x04)

{

0xFFFF,

One,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x11

}

})

Name (PR0B, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKC,

Zero

}

})

Name (AR0B, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x13

Package (0x04)

{

0xFFFF,

One,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x12

}

})

Name (PR14, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKD,

Zero

}

})

Name (AR14, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x10

Package (0x04)

{

0xFFFF,

One,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x13

}

})

Name (PR15, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKA,

Zero

}

})

Name (AR15, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x11

Package (0x04)

{

0xFFFF,

One,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x10

}

})

Name (PR16, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKB,

Zero

}

})

Name (AR16, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x12

Package (0x04)

{

0xFFFF,

One,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x11

}

})

Name (PR17, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKC,

Zero

}

})

Name (AR17, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x13

Package (0x04)

{

0xFFFF,

One,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x12

}

})

Name (PR11, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKA,

Zero

}

})

Name (AR11, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x11

Package (0x04)

{

0xFFFF,

One,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x10

}

})

Name (PR12, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKB,

Zero

}

})

Name (AR12, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x12

Package (0x04)

{

0xFFFF,

One,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x11

}

})

Name (PR13, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKC,

Zero

}

})

Name (AR13, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x13

Package (0x04)

{

0xFFFF,

One,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x12

}

})

}

Scope (_SB)

{

Device (PCI0)

{

Name (_HID, EisaId ("PNP0A08")) // _HID: Hardware ID

Name (_CID, EisaId ("PNP0A03")) // _CID: Compatible ID

Name (_ADR, Zero) // _ADR: Address

Method (^BN00, 0, NotSerialized)

{

Return (Zero)

}

Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number

{

Return (BN00 ())

}

Name (_UID, Zero) // _UID: Unique ID

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR00)

}

Return (PR00)

}

OperationRegion (HBUS, PCI_Config, Zero, 0x0100)

Field (HBUS, DWordAcc, NoLock, Preserve)

{

Offset (0x40),

EPEN, 1,

, 11,

EPBR, 20,

Offset (0x48),

MHEN, 1,

, 14,

MHBR, 17,

Offset (0x50),

GCLK, 1,

Offset (0x54),

D0EN, 1,

D1F2, 1,

D1F1, 1,

D1F0, 1,

Offset (0x60),

PXEN, 1,

PXSZ, 2,

, 23,

PXBR, 6,

Offset (0x68),

DIEN, 1,

, 11,

DIBR, 20,

Offset (0x70),

, 20,

MEBR, 12,

Offset (0x80),

PMLK, 1,

, 3,

PM0H, 2,

Offset (0x81),

PM1L, 2,

, 2,

PM1H, 2,

Offset (0x82),

PM2L, 2,

, 2,

PM2H, 2,

Offset (0x83),

PM3L, 2,

, 2,

PM3H, 2,

Offset (0x84),

PM4L, 2,

, 2,

PM4H, 2,

Offset (0x85),

PM5L, 2,

, 2,

PM5H, 2,

Offset (0x86),

PM6L, 2,

, 2,

PM6H, 2,

Offset (0x87),

Offset (0xA8),

, 20,

TUUD, 19,

Offset (0xBC),

, 20,

TLUD, 12,

Offset (0xC8),

, 7,

HTSE, 1

}

Name (BUF0, ResourceTemplate ()

{

WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,

0x0000, // Granularity

0x0000, // Range Minimum

0x00FF, // Range Maximum

0x0000, // Translation Offset

0x0100, // Length

,, _Y00)

DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,

0x00000000, // Granularity

0x00000000, // Range Minimum

0x00000CF7, // Range Maximum

0x00000000, // Translation Offset

0x00000CF8, // Length

,, , TypeStatic)

IO (Decode16,

0x0CF8, // Range Minimum

0x0CF8, // Range Maximum

0x01, // Alignment

0x08, // Length

)

DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,

0x00000000, // Granularity

0x00000D00, // Range Minimum

0x0000FFFF, // Range Maximum

0x00000000, // Translation Offset

0x0000F300, // Length

,, , TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000A0000, // Range Minimum

0x000BFFFF, // Range Maximum

0x00000000, // Translation Offset

0x00020000, // Length

,, , AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000C0000, // Range Minimum

0x000C3FFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y01, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000C4000, // Range Minimum

0x000C7FFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y02, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000C8000, // Range Minimum

0x000CBFFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y03, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000CC000, // Range Minimum

0x000CFFFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y04, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000D0000, // Range Minimum

0x000D3FFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y05, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000D4000, // Range Minimum

0x000D7FFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y06, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000D8000, // Range Minimum

0x000DBFFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y07, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000DC000, // Range Minimum

0x000DFFFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y08, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000E0000, // Range Minimum

0x000E3FFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y09, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000E4000, // Range Minimum

0x000E7FFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y0A, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000E8000, // Range Minimum

0x000EBFFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y0B, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000EC000, // Range Minimum

0x000EFFFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y0C, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000F0000, // Range Minimum

0x000FFFFF, // Range Maximum

0x00000000, // Translation Offset

0x00010000, // Length

,, _Y0D, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,

0x00000000, // Granularity

0x00000000, // Range Minimum

0xDFFFFFFF, // Range Maximum

0x00000000, // Translation Offset

0xE0000000, // Length

,, _Y0E, AddressRangeMemory, TypeStatic)

QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,

0x0000000000000000, // Granularity

0x0000000000010000, // Range Minimum

0x000000000001FFFF, // Range Maximum

0x0000000000000000, // Translation Offset

0x0000000000010000, // Length

,, _Y0F, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,

0x00000000, // Granularity

0xFD000000, // Range Minimum

0xFE7FFFFF, // Range Maximum

0x00000000, // Translation Offset

0x01800000, // Length

,, , AddressRangeMemory, TypeStatic)

})

Name (EP_B, Zero)

Name (MH_B, Zero)

Name (PC_B, Zero)

Name (PC_L, Zero)

Name (DM_B, Zero)

Method (GEPB, 0, Serialized)

{

If (LEqual (EP_B, Zero))

{

ShiftLeft (EPBR, 0x0C, EP_B)

}

Return (EP_B)

}

Method (GMHB, 0, Serialized)

{

If (LEqual (MH_B, Zero))

{

ShiftLeft (MHBR, 0x0F, MH_B)

}

Return (MH_B)

}

Method (GPCB, 0, Serialized)

{

If (LEqual (PC_B, Zero))

{

ShiftLeft (PXBR, 0x1A, PC_B)

}

Return (PC_B)

}

Method (GPCL, 0, Serialized)

{

If (LEqual (PC_L, Zero))

{

ShiftRight (0x10000000, PXSZ, PC_L)

}

Return (PC_L)

}

Method (GDMB, 0, Serialized)

{

If (LEqual (DM_B, Zero))

{

ShiftLeft (DIBR, 0x0C, DM_B)

}

Return (DM_B)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Store (GPCL (), Local0)

CreateWordField (BUF0, \_SB.PCI0._Y00._MAX, PBMX) // _MAX: Maximum Base Address

Store (Subtract (ShiftRight (Local0, 0x14), 0x02), PBMX)

CreateWordField (BUF0, \_SB.PCI0._Y00._LEN, PBLN) // _LEN: Length

Store (Subtract (ShiftRight (Local0, 0x14), One), PBLN)

If (PM1L)

{

CreateDWordField (BUF0, \_SB.PCI0._Y01._LEN, C0LN) // _LEN: Length

Store (Zero, C0LN)

}

If (LEqual (PM1L, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y01._RW, C0RW) // _RW_: Read-Write Status

Store (Zero, C0RW)

}

If (PM1H)

{

CreateDWordField (BUF0, \_SB.PCI0._Y02._LEN, C4LN) // _LEN: Length

Store (Zero, C4LN)

}

If (LEqual (PM1H, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y02._RW, C4RW) // _RW_: Read-Write Status

Store (Zero, C4RW)

}

If (PM2L)

{

CreateDWordField (BUF0, \_SB.PCI0._Y03._LEN, C8LN) // _LEN: Length

Store (Zero, C8LN)

}

If (LEqual (PM2L, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y03._RW, C8RW) // _RW_: Read-Write Status

Store (Zero, C8RW)

}

If (PM2H)

{

CreateDWordField (BUF0, \_SB.PCI0._Y04._LEN, CCLN) // _LEN: Length

Store (Zero, CCLN)

}

If (LEqual (PM2H, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y04._RW, CCRW) // _RW_: Read-Write Status

Store (Zero, CCRW)

}

If (PM3L)

{

CreateDWordField (BUF0, \_SB.PCI0._Y05._LEN, D0LN) // _LEN: Length

Store (Zero, D0LN)

}

If (LEqual (PM3L, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y05._RW, D0RW) // _RW_: Read-Write Status

Store (Zero, D0RW)

}

If (PM3H)

{

CreateDWordField (BUF0, \_SB.PCI0._Y06._LEN, D4LN) // _LEN: Length

Store (Zero, D4LN)

}

If (LEqual (PM3H, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y06._RW, D4RW) // _RW_: Read-Write Status

Store (Zero, D4RW)

}

If (PM4L)

{

CreateDWordField (BUF0, \_SB.PCI0._Y07._LEN, D8LN) // _LEN: Length

Store (Zero, D8LN)

}

If (LEqual (PM4L, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y07._RW, D8RW) // _RW_: Read-Write Status

Store (Zero, D8RW)

}

If (PM4H)

{

CreateDWordField (BUF0, \_SB.PCI0._Y08._LEN, DCLN) // _LEN: Length

Store (Zero, DCLN)

}

If (LEqual (PM4H, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y08._RW, DCRW) // _RW_: Read-Write Status

Store (Zero, DCRW)

}

If (PM5L)

{

CreateDWordField (BUF0, \_SB.PCI0._Y09._LEN, E0LN) // _LEN: Length

Store (Zero, E0LN)

}

If (LEqual (PM5L, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y09._RW, E0RW) // _RW_: Read-Write Status

Store (Zero, E0RW)

}

If (PM5H)

{

CreateDWordField (BUF0, \_SB.PCI0._Y0A._LEN, E4LN) // _LEN: Length

Store (Zero, E4LN)

}

If (LEqual (PM5H, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y0A._RW, E4RW) // _RW_: Read-Write Status

Store (Zero, E4RW)

}

If (PM6L)

{

CreateDWordField (BUF0, \_SB.PCI0._Y0B._LEN, E8LN) // _LEN: Length

Store (Zero, E8LN)

}

If (LEqual (PM6L, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y0B._RW, E8RW) // _RW_: Read-Write Status

Store (Zero, E8RW)

}

If (PM6H)

{

CreateDWordField (BUF0, \_SB.PCI0._Y0C._LEN, ECLN) // _LEN: Length

Store (Zero, ECLN)

}

If (LEqual (PM6H, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y0C._RW, ECRW) // _RW_: Read-Write Status

Store (Zero, ECRW)

}

If (PM0H)

{

CreateDWordField (BUF0, \_SB.PCI0._Y0D._LEN, F0LN) // _LEN: Length

Store (Zero, F0LN)

}

If (LEqual (PM0H, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y0D._RW, F0RW) // _RW_: Read-Write Status

Store (Zero, F0RW)

}

CreateDWordField (BUF0, \_SB.PCI0._Y0E._MIN, M1MN) // _MIN: Minimum Base Address

CreateDWordField (BUF0, \_SB.PCI0._Y0E._MAX, M1MX) // _MAX: Maximum Base Address

CreateDWordField (BUF0, \_SB.PCI0._Y0E._LEN, M1LN) // _LEN: Length

Store (M32L, M1LN)

Store (M32B, M1MN)

Subtract (Add (M1MN, M1LN), One, M1MX)

If (LEqual (M64L, Zero))

{

CreateDWordField (BUF0, \_SB.PCI0._Y0F._LEN, MSLN) // _LEN: Length

Store (Zero, MSLN)

}

Else

{

CreateQWordField (BUF0, \_SB.PCI0._Y0F._LEN, M2LN) // _LEN: Length

CreateQWordField (BUF0, \_SB.PCI0._Y0F._MIN, M2MN) // _MIN: Minimum Base Address

CreateQWordField (BUF0, \_SB.PCI0._Y0F._MAX, M2MX) // _MAX: Maximum Base Address

Store (M64L, M2LN)

Store (M64B, M2MN)

Subtract (Add (M2MN, M2LN), One, M2MX)

}

Return (BUF0)

}

Name (GUID, Buffer (0x10)

{

/* 0000 */ 0x5B, 0x4D, 0xDB, 0x33, 0xF7, 0x1F, 0x1C, 0x40,

/* 0008 */ 0x96, 0x57, 0x74, 0x41, 0xC0, 0x3D, 0xD7, 0x66

})

Name (SUPP, Zero)

Name (CTRL, Zero)

Name (XCNT, Zero)

Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities

{

Store (Arg3, Local0)

CreateDWordField (Local0, Zero, CDW1)

CreateDWordField (Local0, 0x04, CDW2)

CreateDWordField (Local0, 0x08, CDW3)

If (LAnd (LEqual (Arg0, GUID), NEXP))

{

Store (CDW2, SUPP)

Store (CDW3, CTRL)

If (LAnd (LEqual (TBTS, One), LEqual (TNAT, One)))

{

And (CTRL, 0xFFFFFFF7, CTRL)

}

If (Not (And (CDW1, One)))

{

If (And (CTRL, One))

{

NHPG ()

}

If (And (CTRL, 0x04))

{

NPME ()

}

If (LNotEqual (Arg1, One))

{

Or (CDW1, 0x08, CDW1)

}

If (LNotEqual (CDW3, CTRL))

{

Or (CDW1, 0x10, CDW1)

}

Store (CTRL, CDW3)

Store (CTRL, OSCC)

Return (Local0)

}

Else

{

Or (CDW1, 0x04, CDW1)

Return (Local0)

}

Scope (\_SB.PCI0)

{

Device (GFX0)

{

Name (_ADR, 0x00020000) // _ADR: Address

}

Device (B0D4)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Name (_ADR, 0x00040000) // _ADR: Address

}

Scope (\_SB.PCI0)

{

Name (PALK, Zero)

Name (PA0H, Zero)

Name (PA1H, Zero)

Name (PA1L, Zero)

Name (PA2H, Zero)

Name (PA2L, Zero)

Name (PA3H, Zero)

Name (PA3L, Zero)

Name (PA4H, Zero)

Name (PA4L, Zero)

Name (PA5H, Zero)

Name (PA5L, Zero)

Name (PA6H, Zero)

Name (PA6L, Zero)

Method (NPTS, 1, NotSerialized)

{

Store (PM0H, PA0H)

Store (PMLK, PALK)

Store (PM1H, PA1H)

Store (PM1L, PA1L)

Store (PM2H, PA2H)

Store (PM2L, PA2L)

Store (PM3H, PA3H)

Store (PM3L, PA3L)

Store (PM4H, PA4H)

Store (PM4L, PA4L)

Store (PM5H, PA5H)

Store (PM5L, PA5L)

Store (PM6H, PA6H)

Store (PM6L, PA6L)

}

Method (NWAK, 1, NotSerialized)

{

Store (PA0H, PM0H)

Store (PA1H, PM1H)

Store (PA1L, PM1L)

Store (PA2H, PM2H)

Store (PA2L, PM2L)

Store (PA3H, PM3H)

Store (PA3L, PM3L)

Store (PA4H, PM4H)

Store (PA4L, PM4L)

Store (PA5H, PM5H)

Store (PA5L, PM5L)

Store (PA6H, PM6H)

Store (PA6L, PM6L)

Store (PALK, PMLK)

}

Device (PEG0)

{

Name (_ADR, 0x00010000) // _ADR: Address

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR01)

}

Return (PR01)

}

Device (PEGP)

{

Name (_ADR, Zero) // _ADR: Address

}

Device (PEG1)

{

Name (_ADR, 0x00010001) // _ADR: Address

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR02)

}

Return (PR02)

}

Device (PEGP)

{

Name (_ADR, Zero) // _ADR: Address

}

Device (PEG2)

{

Name (_ADR, 0x00010002) // _ADR: Address

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR03)

}

Return (PR03)

}

Device (PEGP)

{

Name (_ADR, Zero) // _ADR: Address

}

Device (LPCB)

{

Name (_ADR, 0x001F0000) // _ADR: Address

Scope (\_SB.PCI0.LPCB)

{

}

Method (SPTS, 1, NotSerialized)

{

Store (One, SLPX)

Store (One, SLPE)

}

Method (SWAK, 1, NotSerialized)

{

Store (Zero, SLPE)

If (RTCX) {}

Else

{

Notify (PWRB, 0x02)

}

OperationRegion (SMIE, SystemIO, PMBA, 0x04)

Field (SMIE, ByteAcc, NoLock, Preserve)

{

, 10,

RTCS, 1,

, 3,

PEXS, 1,

WAKS, 1,

Offset (0x03),

PWBT, 1,

Offset (0x04)

}

OperationRegion (SLPR, SystemIO, SMCR, 0x08)

Field (SLPR, ByteAcc, NoLock, Preserve)

{

, 4,

SLPE, 1,

, 31,

SLPX, 1,

Offset (0x08)

}

OperationRegion (CPSB, SystemMemory, 0x880B5F18, 0x10)

Field (CPSB, AnyAcc, NoLock, Preserve)

{

RTCX, 1,

SBB0, 7,

SBB1, 8,

SBB2, 8,

SBB3, 8,

SBB4, 8,

SBB5, 8,

SBB6, 8,

SBB7, 8,

SBB8, 8,

SBB9, 8,

SBBA, 8,

SBBB, 8,

SBBC, 8,

SBBD, 8,

SBBE, 8,

SBBF, 8

}

Device (SIO1)

{

Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID

Name (_UID, Zero) // _UID: Unique ID

Name (CRS, ResourceTemplate ()

{

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x00, // Alignment

0x00, // Length

_Y10)

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x00, // Alignment

0x00, // Length

_Y11)

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x00, // Alignment

0x00, // Length

_Y12)

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x00, // Alignment

0x00, // Length

_Y13)

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x00, // Alignment

0x00, // Length

_Y14)

})

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

If (LAnd (LLess (SP1O, 0x03F0), LGreater (SP1O, 0xF0)))

{

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y10._MIN, GPI0) // _MIN: Minimum Base Address

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y10._MAX, GPI1) // _MAX: Maximum Base Address

CreateByteField (CRS, \_SB.PCI0.LPCB.SIO1._Y10._LEN, GPIL) // _LEN: Length

Store (SP1O, GPI0)

Store (SP1O, GPI1)

Store (0x02, GPIL)

}

If (IO1B)

{

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y11._MIN, GP10) // _MIN: Minimum Base Address

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y11._MAX, GP11) // _MAX: Maximum Base Address

CreateByteField (CRS, \_SB.PCI0.LPCB.SIO1._Y11._LEN, GPL1) // _LEN: Length

Store (IO1B, GP10)

Store (IO1B, GP11)

Store (IO1L, GPL1)

}

If (IO2B)

{

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y12._MIN, GP20) // _MIN: Minimum Base Address

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y12._MAX, GP21) // _MAX: Maximum Base Address

CreateByteField (CRS, \_SB.PCI0.LPCB.SIO1._Y12._LEN, GPL2) // _LEN: Length

Store (IO2B, GP20)

Store (IO2B, GP21)

Store (IO2L, GPL2)

}

If (IO3B)

{

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y13._MIN, GP30) // _MIN: Minimum Base Address

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y13._MAX, GP31) // _MAX: Maximum Base Address

CreateByteField (CRS, \_SB.PCI0.LPCB.SIO1._Y13._LEN, GPL3) // _LEN: Length

Store (IO3B, GP30)

Store (IO3B, GP31)

Store (IO3L, GPL3)

}

If (IO4B)

{

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y14._MIN, GP40) // _MIN: Minimum Base Address

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y14._MAX, GP41) // _MAX: Maximum Base Address

CreateByteField (CRS, \_SB.PCI0.LPCB.SIO1._Y14._LEN, GPL4) // _LEN: Length

Store (IO4B, GP40)

Store (IO4B, GP41)

Store (IO4L, GPL4)

}

Return (CRS)

}

Name (DCAT, Package (0x15)

{

0x02,

0x03,

One,

0xFF,

0x05,

0xFF,

0x05,

0xFF,

0x06,

0xFF,

0xFF

})

Mutex (MUT0, 0x00)

Method (ENFG, 1, NotSerialized)

{

Acquire (MUT0, 0x0FFF)

Store (ENTK, INDX)

Store (Arg0, LDN)

}

Method (EXFG, 0, NotSerialized)

{

Store (EXTK, INDX)

Release (MUT0)

}

Method (LPTM, 1, NotSerialized)

{

ENFG (CGLD (Arg0))

And (OPT0, 0x02, Local0)

EXFG ()

Return (Local0)

}

Method (UHID, 1, NotSerialized)

{

ENFG (CGLD (Arg0))

And (OPT1, 0x10, Local0)

EXFG ()

If (Local0)

{

Return (0x1005D041)

}

Else

{

Return (0x0105D041)

}

OperationRegion (IOID, SystemIO, SP1O, 0x02)

Field (IOID, ByteAcc, NoLock, Preserve)

{

INDX, 8,

DATA, 8

}

IndexField (INDX, DATA, ByteAcc, NoLock, Preserve)

{

Offset (0x07),

LDN, 8,

Offset (0x21),

SCF1, 8,

SCF2, 8,

SCF3, 8,

SCF4, 8,

SCF5, 8,

SCF6, 8,

Offset (0x29),

CKCF, 8,

Offset (0x2D),

CR2D, 8,

Offset (0x30),

ACTR, 8,

Offset (0x60),

IOAH, 8,

IOAL, 8,

IOH2, 8,

IOL2, 8,

Offset (0x70),

INTR, 4,

INTT, 4,

Offset (0x74),

DMCH, 8,

Offset (0xE0),

RGE0, 8,

RGE1, 8,

RGE2, 8,

RGE3, 8,

RGE4, 8,

RGE5, 8,

RGE6, 8,

RGE7, 8,

RGE8, 8,

RGE9, 8,

Offset (0xF0),

OPT0, 8,

OPT1, 8,

OPT2, 8,

OPT3, 8,

OPT4, 8,

OPT5, 8,

OPT6, 8,

OPT7, 8,

OPT8, 8,

OPT9, 8

}

Method (CGLD, 1, NotSerialized)

{

Return (DerefOf (Index (DCAT, Arg0)))

}

Method (DSTA, 1, NotSerialized)

{

ENFG (CGLD (Arg0))

Store (ACTR, Local0)

EXFG ()

If (LEqual (Local0, 0xFF))

{

Return (Zero)

}

And (Local0, One, Local0)

If (LLess (Arg0, 0x10))

{

Or (IOST, ShiftLeft (Local0, Arg0), IOST)

}

If (Local0)

{

Return (0x0F)

}

Else

{

If (LLess (Arg0, 0x10))

{

If (And (ShiftLeft (One, Arg0), IOST))

{

Return (0x0D)

}

Else

{

Return (Zero)

}

Else

{

Return (Zero)

}

Method (ESTA, 1, NotSerialized)

{

ENFG (CGLD (Arg0))

Store (ACTR, Local0)

EXFG ()

If (LEqual (Local0, 0xFF))

{

Return (Zero)

}

And (Local0, One, Local0)

If (LGreater (Arg0, 0x0F))

{

Or (IOES, ShiftLeft (Local0, And (Arg0, 0x0F)), IOES)

}

If (Local0)

{

Return (0x0F)

}

Else

{

If (LGreater (Arg0, 0x0F))

{

If (And (ShiftLeft (One, And (Arg0, 0x0F)), IOES

))

{

Return (0x0D)

}

Else

{

Return (Zero)

}

Else

{

Return (Zero)

}

Method (DCNT, 2, NotSerialized)

{

ENFG (CGLD (Arg0))

If (LAnd (LLess (DMCH, 0x04), LNotEqual (And (DMCH, 0x03,

Local1), Zero)))

{

RDMA (Arg0, Arg1, Increment (Local1))

}

Store (Arg1, ACTR)

ShiftLeft (IOAH, 0x08, Local1)

Or (IOAL, Local1, Local1)

RRIO (Arg0, Arg1, Local1, 0x08)

EXFG ()

}

Name (CRS1, ResourceTemplate ()

{

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x01, // Alignment

0x00, // Length

_Y17)

IRQNoFlags (_Y15)

{}

DMA (Compatibility, NotBusMaster, Transfer8, _Y16)

{}

})

CreateWordField (CRS1, \_SB.PCI0.LPCB.SIO1._Y15._INT, IRQM) // _INT: Interrupts

CreateByteField (CRS1, \_SB.PCI0.LPCB.SIO1._Y16._DMA, DMAM) // _DMA: Direct Memory Access

CreateWordField (CRS1, \_SB.PCI0.LPCB.SIO1._Y17._MIN, IO11) // _MIN: Minimum Base Address

CreateWordField (CRS1, \_SB.PCI0.LPCB.SIO1._Y17._MAX, IO12) // _MAX: Maximum Base Address

CreateByteField (CRS1, \_SB.PCI0.LPCB.SIO1._Y17._LEN, LEN1) // _LEN: Length

Name (CRS2, ResourceTemplate ()

{

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x01, // Alignment

0x00, // Length

_Y1A)

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x01, // Alignment

0x00, // Length

_Y1B)

IRQNoFlags (_Y18)

{}

DMA (Compatibility, NotBusMaster, Transfer8, _Y19)

{}

})

CreateWordField (CRS2, \_SB.PCI0.LPCB.SIO1._Y18._INT, IRQE) // _INT: Interrupts

CreateByteField (CRS2, \_SB.PCI0.LPCB.SIO1._Y19._DMA, DMAE) // _DMA: Direct Memory Access

CreateWordField (CRS2, \_SB.PCI0.LPCB.SIO1._Y1A._MIN, IO21) // _MIN: Minimum Base Address

CreateWordField (CRS2, \_SB.PCI0.LPCB.SIO1._Y1A._MAX, IO22) // _MAX: Maximum Base Address

CreateByteField (CRS2, \_SB.PCI0.LPCB.SIO1._Y1A._LEN, LEN2) // _LEN: Length

CreateWordField (CRS2, \_SB.PCI0.LPCB.SIO1._Y1B._MIN, IO31) // _MIN: Minimum Base Address

CreateWordField (CRS2, \_SB.PCI0.LPCB.SIO1._Y1B._MAX, IO32) // _MAX: Maximum Base Address

CreateByteField (CRS2, \_SB.PCI0.LPCB.SIO1._Y1B._LEN, LEN3) // _LEN: Length

Name (CRS3, ResourceTemplate ()

{

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x01, // Alignment

0x00, // Length

_Y1E)

IRQ (Level, ActiveLow, Shared, _Y1C)

{}

DMA (Compatibility, NotBusMaster, Transfer8, _Y1D)

{}

})

CreateWordField (CRS3, \_SB.PCI0.LPCB.SIO1._Y1C._INT, IRQT) // _INT: Interrupts

CreateByteField (CRS3, \_SB.PCI0.LPCB.SIO1._Y1C._HE, IRQS) // _HE_: High-Edge

CreateByteField (CRS3, \_SB.PCI0.LPCB.SIO1._Y1D._DMA, DMAT) // _DMA: Direct Memory Access

CreateWordField (CRS3, \_SB.PCI0.LPCB.SIO1._Y1E._MIN, IO41) // _MIN: Minimum Base Address

CreateWordField (CRS3, \_SB.PCI0.LPCB.SIO1._Y1E._MAX, IO42) // _MAX: Maximum Base Address

CreateByteField (CRS3, \_SB.PCI0.LPCB.SIO1._Y1E._LEN, LEN4) // _LEN: Length

Method (DCRS, 2, NotSerialized)

{

ENFG (CGLD (Arg0))

ShiftLeft (IOAH, 0x08, IO11)

Or (IOAL, IO11, IO11)

Store (IO11, IO12)

Store (0x08, LEN1)

If (INTR)

{

ShiftLeft (One, INTR, IRQM)

}

Else

{

Store (Zero, IRQM)

}

If (LOr (LGreater (DMCH, 0x03), LEqual (Arg1, Zero)))

{

Store (Zero, DMAM)

}

Else

{

And (DMCH, 0x03, Local1)

ShiftLeft (One, Local1, DMAM)

}

EXFG ()

Return (CRS1)

}

Method (DCR2, 2, NotSerialized)

{

ENFG (CGLD (Arg0))

ShiftLeft (IOAH, 0x08, IO21)

Or (IOAL, IO21, IO21)

Store (IO21, IO22)

Store (0x08, LEN2)

ShiftLeft (IOH2, 0x08, IO31)

Or (IOL2, IO31, IO31)

Store (IO31, IO32)

Store (0x08, LEN3)

If (INTR)

{

ShiftLeft (One, INTR, IRQE)

}

Else

{

Store (Zero, IRQE)

}

If (LOr (LGreater (DMCH, 0x03), LEqual (Arg1, Zero)))

{

Store (Zero, DMAE)

}

Else

{

And (DMCH, 0x03, Local1)

ShiftLeft (One, Local1, DMAE)

}

EXFG ()

Return (CRS2)

}

Method (DCR3, 2, NotSerialized)

{

ENFG (CGLD (Arg0))

ShiftLeft (IOAH, 0x08, IO41)

Or (IOAL, IO41, IO41)

Store (IO41, IO42)

Store (0x08, LEN4)

If (INTR)

{

ShiftLeft (One, INTR, IRQT)

}

Else

{

Store (Zero, IRQT)

}

If (LOr (LGreater (DMCH, 0x03), LEqual (Arg1, Zero)))

{

Store (Zero, DMAT)

}

Else

{

And (DMCH, 0x03, Local1)

ShiftLeft (One, Local1, DMAT)

}

EXFG ()

Return (CRS3)

}

Method (DSRS, 2, NotSerialized)

{

If (And (LEqual (Arg1, 0x02), LPTM (Arg1)))

{

DSR2 (Arg0, Arg1)

}

Else

{

CreateWordField (Arg0, 0x09, IRQM)

CreateByteField (Arg0, 0x0C, DMAM)

CreateWordField (Arg0, 0x02, IO11)

ENFG (CGLD (Arg1))

And (IO11, 0xFF, IOAL)

ShiftRight (IO11, 0x08, IOAH)

If (IRQM)

{

FindSetRightBit (IRQM, Local0)

Subtract (Local0, One, INTR)

}

Else

{

Store (Zero, INTR)

}

If (DMAM)

{

FindSetRightBit (DMAM, Local0)

Subtract (Local0, One, DMCH)

}

Else

{

Store (0x04, DMCH)

}

EXFG ()

DCNT (Arg1, One)

}

Method (DSR2, 2, NotSerialized)

{

CreateWordField (Arg0, 0x11, IRQE)

CreateByteField (Arg0, 0x14, DMAE)

CreateWordField (Arg0, 0x02, IO21)

CreateWordField (Arg0, 0x0A, IO31)

ENFG (CGLD (Arg1))

And (IO21, 0xFF, IOAL)

ShiftRight (IO21, 0x08, IOAH)

And (IO31, 0xFF, IOL2)

ShiftRight (IO31, 0x08, IOH2)

If (IRQE)

{

FindSetRightBit (IRQE, Local0)

Subtract (Local0, One, INTR)

}

Else

{

Store (Zero, INTR)

}

If (DMAE)

{

FindSetRightBit (DMAE, Local0)

Subtract (Local0, One, DMCH)

}

Else

{

Store (0x04, DMCH)

}

EXFG ()

DCNT (Arg1, One)

}

Method (DSR3, 2, NotSerialized)

{

CreateWordField (Arg0, 0x02, IO41)

CreateWordField (Arg0, 0x09, IRQT)

CreateByteField (Arg0, 0x0B, IRQS)

CreateByteField (Arg0, 0x0D, DMAT)

ENFG (CGLD (Arg1))

And (IO41, 0xFF, IOAL)

ShiftRight (IO41, 0x08, IOAH)

If (IRQT)

{

FindSetRightBit (IRQT, Local0)

Subtract (Local0, One, INTR)

}

Else

{

Store (Zero, INTR)

}

If (DMAT)

{

FindSetRightBit (DMAT, Local0)

Subtract (Local0, One, DMCH)

}

Else

{

Store (0x04, DMCH)

}

EXFG ()

DCNT (Arg1, One)

}

Name (PMFG, Zero)

Method (SIOS, 1, NotSerialized)

{

Store ("SIOS", Debug)

If (LNotEqual (0x05, Arg0))

{

ENFG (0x0A)

Store (Zero, OPT6)

Store (Zero, OPT7)

If (KBFG)

{

Or (OPT6, 0x10, OPT6)

}

Else

{

And (OPT6, 0xEF, OPT6)

}

If (MSFG)

{

Or (OPT6, 0x20, OPT6)

}

Else

{

And (OPT6, 0xDF, OPT6)

}

Store (0xFF, OPT1)

Store (0xFF, OPT3)

Store (0xFF, OPT4)

Or (One, OPT2, Local0)

Store (Local0, OPT2)

EXFG ()

}

Method (SIOW, 1, NotSerialized)

{

Store ("SIOW", Debug)

ENFG (0x0A)

Store (0xFF, OPT3)

And (OPT6, 0xCF, OPT6)

And (OPT2, 0xFE, OPT2)

EXFG ()

}

Method (SIOH, 0, NotSerialized)

{

}

Device (LPTE)

{

Name (_UID, Zero) // _UID: Unique ID

Name (LDN, One)

Method (_HID, 0, NotSerialized) // _HID: Hardware ID

{

If (^^SIO1.LPTM (0x02))

{

Return (0x0104D041)

}

Else

{

Return (0x0004D041)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (^^SIO1.DSTA (0x02))

}

Method (_DIS, 0, NotSerialized) // _DIS: Disable Device

{

^^SIO1.DCNT (0x02, Zero)

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

^^SIO1.DCRS (0x02, One)

If (And (^^SIO1.IO11, 0x04))

{

Store (0x04, ^^SIO1.LEN1)

}

If (^^SIO1.LPTM (0x02))

{

Store (^^SIO1.IRQM, ^^SIO1.IRQE)

Store (^^SIO1.DMAM, ^^SIO1.DMAE)

Store (^^SIO1.IO11, ^^SIO1.IO21)

Store (^^SIO1.IO12, ^^SIO1.IO22)

Store (^^SIO1.LEN1, ^^SIO1.LEN2)

Add (^^SIO1.IO21, 0x0400, ^^SIO1.IO31)

Store (^^SIO1.IO31, ^^SIO1.IO32)

Store (^^SIO1.LEN2, ^^SIO1.LEN3)

Return (^^SIO1.CRS2)

}

Else

{

Return (^^SIO1.CRS1)

}

Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings

{

^^SIO1.DSRS (Arg0, 0x02)

}

Method (_PRS, 0, NotSerialized) // _PRS: Possible Resource Settings

{

If (^^SIO1.LPTM (0x02))

{

Return (EPPR)

}

Else

{

Return (LPPR)

}

Name (LPPR, ResourceTemplate ()

{

StartDependentFn (0x00, 0x00)

{

IO (Decode16,

0x0378, // Range Minimum

0x0378, // Range Maximum

0x01, // Alignment

0x08, // Length

)

IRQNoFlags ()

{5}

}

StartDependentFnNoPri ()

{

IO (Decode16,

0x0378, // Range Minimum

0x0378, // Range Maximum

0x01, // Alignment

0x08, // Length

)

IRQNoFlags ()

{5,6,7,10,11,12}

}

StartDependentFnNoPri ()

{

IO (Decode16,

0x0278, // Range Minimum

0x0278, // Range Maximum

0x01, // Alignment

0x08, // Length

)

IRQNoFlags ()

{5,6,7,10,11,12}

}

StartDependentFnNoPri ()

{

IO (Decode16,

0x03BC, // Range Minimum

0x03BC, // Range Maximum

0x01, // Alignment

0x04, // Length

)

IRQNoFlags ()

{5,6,7,10,11,12}

}

EndDependentFn ()

})

Name (EPPR, ResourceTemplate ()

{

StartDependentFn (0x00, 0x00)

{

IO (Decode16,

0x0378, // Range Minimum

0x0378, // Range Maximum

0x01, // Alignment

0x08, // Length

)

IO (Decode16,

0x0778, // Range Minimum

0x0778, // Range Maximum

0x01, // Alignment

0x08, // Length

)

IRQNoFlags ()

{5}

DMA (Compatibility, NotBusMaster, Transfer8, )

{3}

}

StartDependentFnNoPri ()

{

IO (Decode16,

0x0378, // Range Minimum

0x0378, // Range Maximum

0x01, // Alignment

0x08, // Length

)

IO (Decode16,

0x0778, // Range Minimum

0x0778, // Range Maximum

0x01, // Alignment

0x08, // Length

)

IRQNoFlags ()

{5,6,7,10,11,12}

DMA (Compatibility, NotBusMaster, Transfer8, )

{1,3}

}

StartDependentFnNoPri ()

{

IO (Decode16,

0x0278, // Range Minimum

0x0278, // Range Maximum

0x01, // Alignment

0x08, // Length

)

IO (Decode16,

0x0678, // Range Minimum

0x0678, // Range Maximum

0x01, // Alignment

0x08, // Length

)

IRQNoFlags ()

{5,6,7,10,11,12}

DMA (Compatibility, NotBusMaster, Transfer8, )

{1,3}

}

StartDependentFnNoPri ()

{

IO (Decode16,

0x03BC, // Range Minimum

0x03BC, // Range Maximum

0x01, // Alignment

0x04, // Length

)

IO (Decode16,

0x07BC, // Range Minimum

0x07BC, // Range Maximum

0x01, // Alignment

0x04, // Length

)

IRQNoFlags ()

{5,6,7,10,11,12}

DMA (Compatibility, NotBusMaster, Transfer8, )

{1,3}

}

EndDependentFn ()

})

}

Device (PS2K)

{

Name (_HID, EisaId ("PNP0303")) // _HID: Hardware ID

Name (_UID, Zero) // _UID: Unique ID

Name (LDN, 0x05)

Name (_CID, EisaId ("PNP030B")) // _CID: Compatible ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (And (IOST, 0x0400))

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

IO (Decode16,

0x0060, // Range Minimum

0x0060, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IO (Decode16,

0x0064, // Range Minimum

0x0064, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IRQNoFlags ()

{1}

})

Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings

{

StartDependentFn (0x00, 0x00)

{

IO (Decode16,

0x0060, // Range Minimum

0x0060, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IO (Decode16,

0x0064, // Range Minimum

0x0064, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IRQNoFlags ()

{1}

}

EndDependentFn ()

})

Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake

{

Store (Arg0, KBFG)

}

Scope (\)

{

Name (KBFG, One)

}

Device (PS2M)

{

Name (_HID, EisaId ("PNP0F03")) // _HID: Hardware ID

Name (_UID, Zero) // _UID: Unique ID

Name (LDN, 0x05)

Name (_CID, EisaId ("PNP0F13")) // _CID: Compatible ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (And (IOST, 0x4000))

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Name (CRS1, ResourceTemplate ()

{

IRQNoFlags ()

{12}

})

Name (CRS2, ResourceTemplate ()

{

IO (Decode16,

0x0060, // Range Minimum

0x0060, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IO (Decode16,

0x0064, // Range Minimum

0x0064, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IRQNoFlags ()

{12}

})

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

If (And (IOST, 0x0400))

{

Return (CRS1)

}

Else

{

Return (CRS2)

}

Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings

{

StartDependentFn (0x00, 0x00)

{

IRQNoFlags ()

{12}

}

EndDependentFn ()

})

Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake

{

Store (Arg0, MSFG)

}

Scope (\)

{

Name (MSFG, One)

}

Device (UAR1)

{

Name (_HID, EisaId ("PNP0501")) // _HID: Hardware ID

Name (_UID, Zero) // _UID: Unique ID

Name (LDN, 0x02)

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (^^SIO1.DSTA (Zero))

}

Method (_DIS, 0, NotSerialized) // _DIS: Disable Device

{

^^SIO1.DCNT (Zero, Zero)

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Return (^^SIO1.DCRS (Zero, Zero))

}

Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings

{

^^SIO1.DSRS (Arg0, Zero)

}

Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings

{

StartDependentFn (0x00, 0x00)

{

IO (Decode16,

0x03F8, // Range Minimum

0x03F8, // Range Maximum

0x01, // Alignment

0x08, // Length

)

IRQNoFlags ()

{4}

DMA (Compatibility, NotBusMaster, Transfer8, )

{}

}

StartDependentFnNoPri ()

{

IO (Decode16,

0x03F8, // Range Minimum

0x03F8, // Range Maximum

0x01, // Alignment

0x08, // Length

)

IRQNoFlags ()

{3,4,5,7,9,10,11,12}

DMA (Compatibility, NotBusMaster, Transfer8, )

{}

}

StartDependentFnNoPri ()

{

IO (Decode16,

0x02F8, // Range Minimum

0x02F8, // Range Maximum

0x01, // Alignment

0x08, // Length

)

IRQNoFlags ()

{3,4,5,7,9,10,11,12}

DMA (Compatibility, NotBusMaster, Transfer8, )

{}

}

StartDependentFnNoPri ()

{

IO (Decode16,

0x03E8, // Range Minimum

0x03E8, // Range Maximum

0x01, // Alignment

0x08, // Length

)

IRQNoFlags ()

{3,4,5,7,9,10,11,12}

DMA (Compatibility, NotBusMaster, Transfer8, )

{}

}

StartDependentFnNoPri ()

{

IO (Decode16,

0x02E8, // Range Minimum

0x02E8, // Range Maximum

0x01, // Alignment

0x08, // Length

)

IRQNoFlags ()

{3,4,5,7,9,10,11,12}

DMA (Compatibility, NotBusMaster, Transfer8, )

{}

}

EndDependentFn ()

})

}

Device (HHMD)

{

Name (_HID, EisaId ("PNP0C08")) // _HID: Hardware ID

Name (_UID, One) // _UID: Unique ID

Name (LDN, 0x0B)

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (Zero)

}

Device (RP09)

{

Name (_ADR, 0x001D0000) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0480)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1,

Offset (0x420),

, 30,

DPGE, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

If (LAnd (LEqual (TBTS, One), LEqual (SBNR, TBUS)))

{

Return (TARS)

}

Else

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, One)))

{

Notify (PXSX, 0x02)

Store (One, PMSX)

Store (One, PSPX)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR0C)

}

Return (PR0C)

}

Device (RP10)

{

Name (_ADR, 0x001D0001) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0480)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1,

Offset (0x420),

, 30,

DPGE, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

If (LAnd (LEqual (TBTS, One), LEqual (SBNR, TBUS)))

{

Return (TARS)

}

Else

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, One)))

{

Notify (PXSX, 0x02)

Store (One, PMSX)

Store (One, PSPX)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR0D)

}

Return (PR0D)

}

Device (RP11)

{

Name (_ADR, 0x001D0002) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0480)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1,

Offset (0x420),

, 30,

DPGE, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

If (LAnd (LEqual (TBTS, One), LEqual (SBNR, TBUS)))

{

Return (TARS)

}

Else

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, One)))

{

Notify (PXSX, 0x02)

Store (One, PMSX)

Store (One, PSPX)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR0E)

}

Return (PR0E)

}

Device (RP12)

{

Name (_ADR, 0x001D0003) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0480)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1,

Offset (0x420),

, 30,

DPGE, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

If (LAnd (LEqual (TBTS, One), LEqual (SBNR, TBUS)))

{

Return (TARS)

}

Else

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, One)))

{

Notify (PXSX, 0x02)

Store (One, PMSX)

Store (One, PSPX)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR0F)

}

Return (PR0F)

}

Device (RP13)

{

Name (_ADR, 0x001D0004) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0480)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1,

Offset (0x420),

, 30,

DPGE, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

If (LAnd (LEqual (TBTS, One), LEqual (SBNR, TBUS)))

{

Return (TARS)

}

Else

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, One)))

{

Notify (PXSX, 0x02)

Store (One, PMSX)

Store (One, PSPX)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR10)

}

Return (PR10)

}

Device (RP01)

{

Name (_ADR, 0x001C0000) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0480)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1,

Offset (0x420),

, 30,

DPGE, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

If (LAnd (LEqual (TBTS, One), LEqual (SBNR, TBUS)))

{

Return (TARS)

}

Else

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, One)))

{

Notify (PXSX, 0x02)

Store (One, PMSX)

Store (One, PSPX)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR04)

}

Return (PR04)

}

Device (RP02)

{

Name (_ADR, 0x001C0001) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0480)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1,

Offset (0x420),

, 30,

DPGE, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

If (LAnd (LEqual (TBTS, One), LEqual (SBNR, TBUS)))

{

Return (TARS)

}

Else

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, One)))

{

Notify (PXSX, 0x02)

Store (One, PMSX)

Store (One, PSPX)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR05)

}

Return (PR05)

}

Device (RP03)

{

Name (_ADR, 0x001C0002) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0480)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1,

Offset (0x420),

, 30,

DPGE, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

If (LAnd (LEqual (TBTS, One), LEqual (SBNR, TBUS)))

{

Return (TARS)

}

Else

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, One)))

{

Notify (PXSX, 0x02)

Store (One, PMSX)

Store (One, PSPX)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR06)

}

Return (PR06)

}

Device (RP04)

{

Name (_ADR, 0x001C0003) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0480)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1,

Offset (0x420),

, 30,

DPGE, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

If (LAnd (LEqual (TBTS, One), LEqual (SBNR, TBUS)))

{

Return (TARS)

}

Else

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, One)))

{

Notify (PXSX, 0x02)

Store (One, PMSX)

Store (One, PSPX)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR07)

}

Return (PR07)

}

Device (RP05)

{

Name (_ADR, 0x001C0004) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0480)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1,

Offset (0x420),

, 30,

DPGE, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

If (LAnd (LEqual (TBTS, One), LEqual (SBNR, TBUS)))

{

Return (TARS)

}

Else

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, One)))

{

Notify (PXSX, 0x02)

Store (One, PMSX)

Store (One, PSPX)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR08)

}

Return (PR08)

}

Device (RP06)

{

Name (_ADR, 0x001C0005) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0480)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1,

Offset (0x420),

, 30,

DPGE, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

If (LAnd (LEqual (TBTS, One), LEqual (SBNR, TBUS)))

{

Return (TARS)

}

Else

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, One)))

{

Notify (PXSX, 0x02)

Store (One, PMSX)

Store (One, PSPX)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR09)

}

Return (PR09)

}

Device (RP07)

{

Name (_ADR, 0x001C0006) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0480)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1,

Offset (0x420),

, 30,

DPGE, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

If (LAnd (LEqual (TBTS, One), LEqual (SBNR, TBUS)))

{

Return (TARS)

}

Else

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, One)))

{

Notify (PXSX, 0x02)

Store (One, PMSX)

Store (One, PSPX)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR0A)

}

Return (PR0A)

}

Device (RP08)

{

Name (_ADR, 0x001C0007) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0480)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1,

Offset (0x420),

, 30,

DPGE, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

If (LAnd (LEqual (TBTS, One), LEqual (SBNR, TBUS)))

{

Return (TARS)

}

Else

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, One)))

{

Notify (PXSX, 0x02)

Store (One, PMSX)

Store (One, PSPX)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR0B)

}

Return (PR0B)

}

Device (RP17)

{

Name (_ADR, 0x001B0000) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0480)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1,

Offset (0x420),

, 30,

DPGE, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

If (LAnd (LEqual (TBTS, One), LEqual (SBNR, TBUS)))

{

Return (TARS)

}

Else

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, One)))

{

Notify (PXSX, 0x02)

Store (One, PMSX)

Store (One, PSPX)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR14)

}

Return (PR14)

}

Device (RP18)

{

Name (_ADR, 0x001B0001) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0480)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1,

Offset (0x420),

, 30,

DPGE, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

If (LAnd (LEqual (TBTS, One), LEqual (SBNR, TBUS)))

{

Return (TARS)

}

Else

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, One)))

{

Notify (PXSX, 0x02)

Store (One, PMSX)

Store (One, PSPX)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR15)

}

Return (PR15)

}

Device (RP19)

{

Name (_ADR, 0x001B0002) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0480)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1,

Offset (0x420),

, 30,

DPGE, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

If (LAnd (LEqual (TBTS, One), LEqual (SBNR, TBUS)))

{

Return (TARS)

}

Else

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, One)))

{

Notify (PXSX, 0x02)

Store (One, PMSX)

Store (One, PSPX)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR16)

}

Return (PR16)

}

Device (RP20)

{

Name (_ADR, 0x001B0003) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0480)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1,

Offset (0x420),

, 30,

DPGE, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

If (LAnd (LEqual (TBTS, One), LEqual (SBNR, TBUS)))

{

Return (TARS)

}

Else

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, One)))

{

Notify (PXSX, 0x02)

Store (One, PMSX)

Store (One, PSPX)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR17)

}

Return (PR17)

}

Device (RP14)

{

Name (_ADR, 0x001D0005) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0480)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1,

Offset (0x420),

, 30,

DPGE, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

If (LAnd (LEqual (TBTS, One), LEqual (SBNR, TBUS)))

{

Return (TARS)

}

Else

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, One)))

{

Notify (PXSX, 0x02)

Store (One, PMSX)

Store (One, PSPX)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR11)

}

Return (PR11)

}

Device (RP15)

{

Name (_ADR, 0x001D0006) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0480)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1,

Offset (0x420),

, 30,

DPGE, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

If (LAnd (LEqual (TBTS, One), LEqual (SBNR, TBUS)))

{

Return (TARS)

}

Else

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, One)))

{

Notify (PXSX, 0x02)

Store (One, PMSX)

Store (One, PSPX)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR12)

}

Return (PR12)

}

Device (RP16)

{

Name (_ADR, 0x001D0007) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0480)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1,

Offset (0x420),

, 30,

DPGE, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

If (LAnd (LEqual (TBTS, One), LEqual (SBNR, TBUS)))

{

Return (TARS)

}

Else

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (LAnd (LNotEqual (VDID, 0xFFFFFFFF), LEqual (PMSX, One)))

{

Notify (PXSX, 0x02)

Store (One, PMSX)

Store (One, PSPX)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR13)

}

Return (PR13)

}

Scope (_GPE)

{

}

Name (_S0, Package (0x04) // _S0_: S0 System State

{

Zero,

Zero

})

Name (_S3, Package (0x04) // _S3_: S3 System State

{

0x05,

Zero,

Zero

})

Name (_S4, Package (0x04) // _S4_: S4 System State

{

0x06,

Zero,

Zero

})

Name (_S5, Package (0x04) // _S5_: S5 System State

{

0x07,

Zero,

Zero

})

Method (_PTS, 1, NotSerialized) // _PTS: Prepare To Sleep

{

If (Arg0)

{

\_SB.PCI0.LPCB.SPTS (Arg0)

\_SB.PCI0.NPTS (Arg0)

RPTS (Arg0)

}

Method (_WAK, 1, NotSerialized) // _WAK: Wake

{

RWAK (Arg0)

\_SB.PCI0.NWAK (Arg0)

\_SB.PCI0.LPCB.SWAK (Arg0)

Return (WAKP)

}

Scope (_PR)

{

Processor (CPU0, 0x01, 0x00001810, 0x06) {}

Processor (CPU1, 0x02, 0x00001810, 0x06) {}

Processor (CPU2, 0x03, 0x00001810, 0x06) {}

Processor (CPU3, 0x04, 0x00001810, 0x06) {}

Processor (CPU4, 0x05, 0x00001810, 0x06) {}

Processor (CPU5, 0x06, 0x00001810, 0x06) {}

Processor (CPU6, 0x07, 0x00001810, 0x06) {}

Processor (CPU7, 0x08, 0x00001810, 0x06) {}

}

Scope (_PR.CPU0)

{

Name (CPC1, Package (0x11)

{

0x11,

One,

ResourceTemplate ()

{

0x08, // Bit Width

0x00, // Bit Offset

0x0000000000000771, // Address

0x04, // Access Size

)

0x10,

Zero,

ResourceTemplate ()

{

0x08, // Bit Width

0x00, // Bit Offset

0x0000000000001234, // Address

0x02, // Access Size

)

ResourceTemplate ()

{

0x08, // Bit Width

0x10, // Bit Offset

0x0000000000000774, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x08, // Bit Width

0x00, // Bit Offset

0x0000000000000774, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x08, // Bit Width

0x08, // Bit Offset

0x0000000000000774, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x00, // Bit Width

0x00, // Bit Offset

0x0000000000000000, // Address

ResourceTemplate ()

{

0x00, // Bit Width

0x00, // Bit Offset

0x0000000000000000, // Address

ResourceTemplate ()

{

0x00, // Bit Width

0x00, // Bit Offset

0x0000000000000000, // Address

ResourceTemplate ()

{

0x40, // Bit Width

0x00, // Bit Offset

0x00000000000000E7, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x40, // Bit Width

0x00, // Bit Offset

0x00000000000000E8, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x01, // Bit Width

0x01, // Bit Offset

0x0000000000000777, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x01, // Bit Width

0x00, // Bit Offset

0x0000000000000770, // Address

0x04, // Access Size

)

}

})

Name (CPC2, Package (0x15)

{

0x15,

0x02,

ResourceTemplate ()

{

0x08, // Bit Width

0x00, // Bit Offset

0x0000000000000771, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x08, // Bit Width

0x08, // Bit Offset

0x00000000000000CE, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x08, // Bit Width

0x10, // Bit Offset

0x0000000000000771, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x08, // Bit Width

0x18, // Bit Offset

0x0000000000000771, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x08, // Bit Width

0x08, // Bit Offset

0x0000000000000771, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x08, // Bit Width

0x10, // Bit Offset

0x0000000000000774, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x08, // Bit Width

0x00, // Bit Offset

0x0000000000000774, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x08, // Bit Width

0x08, // Bit Offset

0x0000000000000774, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x00, // Bit Width

0x00, // Bit Offset

0x0000000000000000, // Address

ResourceTemplate ()

{

0x00, // Bit Width

0x00, // Bit Offset

0x0000000000000000, // Address

ResourceTemplate ()

{

0x00, // Bit Width

0x00, // Bit Offset

0x0000000000000000, // Address

ResourceTemplate ()

{

0x40, // Bit Width

0x00, // Bit Offset

0x00000000000000E7, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x40, // Bit Width

0x00, // Bit Offset

0x00000000000000E8, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x02, // Bit Width

0x01, // Bit Offset

0x0000000000000777, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x01, // Bit Width

0x00, // Bit Offset

0x0000000000000770, // Address

0x04, // Access Size

)

One,

ResourceTemplate ()

{

0x0A, // Bit Width

0x20, // Bit Offset

0x0000000000000774, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x08, // Bit Width

0x18, // Bit Offset

0x0000000000000774, // Address

0x04, // Access Size

)

Zero

})

}

Scope (_SB)

{

Device (PAGD)

{

Name (_HID, "ACPI000C") // _HID: Hardware ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (_OSI ("Processor Aggregator Device"))

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Name (_PUR, Package (0x02) // _PUR: Processor Utilization Request

{

One,

Zero

})

}

Scope (_SB.PCI0)

{

Device (PDRC)

{

Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID

Name (_UID, One) // _UID: Unique ID

Name (BUF0, ResourceTemplate ()

{

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00008000, // Address Length

_Y1F)

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00001000, // Address Length

_Y20)

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00001000, // Address Length

_Y21)

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00000000, // Address Length

_Y22)

Memory32Fixed (ReadWrite,

0xFED20000, // Address Base

0x00020000, // Address Length

)

Memory32Fixed (ReadOnly,

0xFED90000, // Address Base

0x00004000, // Address Length

)

Memory32Fixed (ReadWrite,

0xFED45000, // Address Base

0x0004B000, // Address Length

)

Memory32Fixed (ReadOnly,

0xFF000000, // Address Base

0x01000000, // Address Length

)

Memory32Fixed (ReadOnly,

0xFEE00000, // Address Base

0x00100000, // Address Length

)

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00000000, // Address Length

_Y23)

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00000000, // Address Length

_Y24)

})

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y1F._BAS, MBR0) // _BAS: Base Address

Store (GMHB (), MBR0)

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y20._BAS, DBR0) // _BAS: Base Address

Store (GDMB (), DBR0)

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y21._BAS, EBR0) // _BAS: Base Address

Store (GEPB (), EBR0)

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y22._BAS, XBR0) // _BAS: Base Address

Store (GPCB (), XBR0)

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y22._LEN, XSZ0) // _LEN: Length

Store (GPCL (), XSZ0)

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y23._BAS, SXRA) // _BAS: Base Address

Store (SXRB, SXRA)

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y23._LEN, SXRL) // _LEN: Length

Store (SXRS, SXRL)

If (LNot (HPTE))

{

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y24._BAS, HBAS) // _BAS: Base Address

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y24._LEN, HLEN) // _LEN: Length

Store (HPTB, HBAS)

Store (0x0400, HLEN)

}

Return (BUF0)

}

Method (BRTN, 1, Serialized)

{

If (LEqual (And (DIDX, 0x0F00), 0x0400))

{

Notify (\_SB.PCI0.GFX0.DD1F, Arg0)

}

Name (PNVB, 0x88B07C98)

Name (PNVL, 0x0204)

If (LEqual (ECR1, One))

{

Scope (_SB.PCI0)

{

Name (PCIG, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

})

Method (PCID, 4, Serialized)

{

If (LEqual (Arg0, PCIG))

{

If (LGreaterEqual (Arg1, 0x03))

{

If (LEqual (Arg2, Zero))

{

Return (Buffer (0x02)

{

0x01, 0x03

})

}

If (LEqual (Arg2, 0x08))

{

Return (One)

}

If (LEqual (Arg2, 0x09))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Return (Buffer (One)

{

0x00

})

}

Scope (_SB.PCI0)

{

Method (PCIC, 1, Serialized)

{

If (LEqual (ECR1, One))

{

If (LEqual (Arg0, PCIG))

{

Return (One)

}

Return (Zero)

}

OperationRegion (PNVA, SystemMemory, PNVB, PNVL)

Field (PNVA, AnyAcc, Lock, Preserve)

{

RCRV, 32,

PCHS, 16,

PCHG, 16,

RPA1, 32,

RPA2, 32,

RPA3, 32,

RPA4, 32,

RPA5, 32,

RPA6, 32,

RPA7, 32,

RPA8, 32,

RPA9, 32,

RPAA, 32,

RPAB, 32,

RPAC, 32,

RPAD, 32,

RPAE, 32,

RPAF, 32,

RPAG, 32,

RPAH, 32,

RPAI, 32,

RPAJ, 32,

RPAK, 32,

NHLA, 64,

NHLL, 32,

ADFM, 32,

SBRG, 32,

GPEM, 32,

G2L0, 32,

G2L1, 32,

G2L2, 32,

G2L3, 32,

G2L4, 32,

G2L5, 32,

G2L6, 32,

G2L7, 32,

G2L8, 32,

G2L9, 32,

PML1, 16,

PML2, 16,

PML3, 16,

PML4, 16,

PML5, 16,

PML6, 16,

PML7, 16,

PML8, 16,

PML9, 16,

PMLA, 16,

PMLB, 16,

PMLC, 16,

PMLD, 16,

PMLE, 16,

PMLF, 16,

PMLG, 16,

PMLH, 16,

PMLI, 16,

PMLJ, 16,

PMLK, 16,

PNL1, 16,

PNL2, 16,

PNL3, 16,

PNL4, 16,

PNL5, 16,

PNL6, 16,

PNL7, 16,

PNL8, 16,

PNL9, 16,

PNLA, 16,

PNLB, 16,

PNLC, 16,

PNLD, 16,

PNLE, 16,

PNLF, 16,

PNLG, 16,

PNLH, 16,

PNLI, 16,

PNLJ, 16,

PNLK, 16,

U0C0, 32,

U1C0, 32,

ADPM, 32,

XHPC, 8,

XRPC, 8,

XSPC, 8,

XSPA, 8,

HPTB, 32,

HPTE, 8,

SMD0, 8,

SMD1, 8,

SMD2, 8,

SMD3, 8,

SMD4, 8,

SMD5, 8,

SMD6, 8,

SMD7, 8,

SMD8, 8,

SMD9, 8,

SMDA, 8,

SIR0, 8,

SIR1, 8,

SIR2, 8,

SIR3, 8,

SIR4, 8,

SIR5, 8,

SIR6, 8,

SIR7, 8,

SIR8, 8,

SIR9, 8,

SIRA, 8,

SB00, 32,

SB01, 32,

SB02, 32,

SB03, 32,

SB04, 32,

SB05, 32,

SB06, 32,

SB07, 32,

SB08, 32,

SB09, 32,

SB0A, 32,

SB10, 32,

SB11, 32,

SB12, 32,

SB13, 32,

SB14, 32,

SB15, 32,

SB16, 32,

SB17, 32,

SB18, 32,

SB19, 32,

SB1A, 32,

GPEN, 8,

SGIR, 8,

NIT1, 8,

NIT2, 8,

NIT3, 8,

NPM1, 8,

NPM2, 8,

NPM3, 8,

NPC1, 8,

NPC2, 8,

NPC3, 8,

NL11, 16,

NL12, 16,

NL13, 16,

ND21, 8,

ND22, 8,

ND23, 8,

ND11, 32,

ND12, 32,

ND13, 32,

NLR1, 16,

NLR2, 16,

NLR3, 16,

NLD1, 32,

NLD2, 32,

NLD3, 32,

NEA1, 16,

NEA2, 16,

NEA3, 16,

NEB1, 16,

NEB2, 16,

NEB3, 16,

NEC1, 16,

NEC2, 16,

NEC3, 16,

NRA1, 16,

NRA2, 16,

NRA3, 16,

NMB1, 32,

NMB2, 32,

NMB3, 32,

NMV1, 32,

NMV2, 32,

NMV3, 32,

NPB1, 32,

NPB2, 32,

NPB3, 32,

NPV1, 32,

NPV2, 32,

NPV3, 32,

Offset (0x1E6),

SXRB, 32,

SXRS, 32,

CIOE, 8,

CIOI, 8,

TAEN, 8,

TIRQ, 8,

XWMB, 32,

EMH4, 8,

CSKU, 8,

ITA0, 16,

ITA1, 16,

ITA2, 16,

ITA3, 16,

ITS0, 8,

ITS1, 8,

ITS2, 8,

ITS3, 8

}

Scope (_SB)

{

Name (GCOM, Package (0x02)

{

Package (0x08)

{

0x00AF0000,

0x00AE0000,

0x00AC0000,

0x00AD0000

Package (0x0A)

{

0x00AF0000,

0x00AE0000,

0x00AC0000,

0x00AD0000

}

})

Name (GPPG, Package (0x02)

{

Package (0x08)

{

0x18,

0x08,

0x0C

Package (0x0A)

{

0x18,

0x0D,

0x18,

0x0B,

0x0C

}

})

Name (PCFG, Package (0x02)

{

Package (0x08)

{

0x0400,

0x04C0,

0x0400,

0x04C0,

0x0580,

0x0400,

0x04C0,

0x0400

Package (0x0A)

{

0x0400,

0x04C0,

0x0400,

0x04C0,

0x0580,

0x05E8,

0x06A8,

0x0768,

0x0400,

0x0400

}

})

Name (HOWN, Package (0x02)

{

Package (0x08)

{

0xD0,

0xD4,

0xD0,

0xD4,

0xD8,

0xD0,

0xD4,

0xD0

Package (0x0A)

{

0xD0,

0xD4,

0xD0,

0xD4,

0xD8,

0xDC,

0xE0,

0xE4,

0xD0,

0xD0

}

})

Name (POWN, Package (0x02)

{

Package (0x08)

{

0x20,

0x30,

0x20,

0x30,

0x40,

0x20,

0x30,

0x20

Package (0x0A)

{

0x20,

0x2C,

0x20,

0x2C,

0x38,

0x40,

0x4C,

0x58,

0x20,

0x20

}

})

Name (GPEO, Package (0x02)

{

Package (0x08)

{

0x0140,

0x0144,

0x0140,

0x0144,

0x0148,

0x0140,

0x0144,

0x0140

Package (0x0A)

{

0x0140,

0x0144,

0x0140,

0x0144,

0x0148,

0x014C,

0x0150,

0x0154,

0x0140,

0x0140

}

})

Name (GPES, Package (0x0A)

{

Zero,

Zero

})

Name (RXEV, Package (0x0A)

{

Ones,

Ones

})

Method (GNUM, 1, NotSerialized)

{

Store (GNMB (Arg0), Local1)

Store (GGRP (Arg0), Local2)

Return (Add (Local1, Multiply (Local2, 0x18)))

}

Method (INUM, 1, NotSerialized)

{

If (LEqual (PCHS, 0x02))

{

Store (Zero, Local0)

}

Else

{

Store (One, Local0)

}

Store (GNMB (Arg0), Local1)

Store (GGRP (Arg0), Local2)

Store (Zero, Local3)

While (LLess (Local3, Local2))

{

Add (DerefOf (Index (DerefOf (Index (GPPG, Local0)), Local3)),

Local1, Local1)

Increment (Local3)

}

Return (Add (0x18, Mod (Local1, 0x60)))

}

Method (GGRP, 1, Serialized)

{

ShiftRight (And (Arg0, 0x00FF0000), 0x10, Local0)

Return (Local0)

}

Method (GNMB, 1, Serialized)

{

Return (And (Arg0, 0xFFFF))

}

Method (GGPE, 1, NotSerialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (And (ShiftRight (GPEM, Multiply (Local0, 0x02)), 0x03

), Local2)

If (LEqual (Local2, Zero))

{

Return (0x6F)

}

Else

{

Return (Add (Multiply (Subtract (Local2, One), 0x20), Local1

))

}

Method (GADR, 2, NotSerialized)

{

If (LEqual (PCHS, 0x02))

{

Store (Zero, Local0)

}

Else

{

Store (One, Local0)

}

Store (Add (DerefOf (Index (DerefOf (Index (GCOM, Local0)), Arg0

)), SBRG), Local1)

Store (DerefOf (Index (DerefOf (Index (Arg1, Local0)), Arg0)),

Local2)

Return (Add (Local1, Local2))

}

Method (GPC0, 1, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

TEMP, 32

}

Return (TEMP)

}

Method (SPC0, 2, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

TEMP, 32

}

Store (Arg1, TEMP)

}

Method (GPC1, 1, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)

), 0x04), Local2)

OperationRegion (PDW1, SystemMemory, Local2, 0x04)

Field (PDW1, AnyAcc, NoLock, Preserve)

{

TEMP, 32

}

Return (TEMP)

}

Method (SPC1, 2, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)

), 0x04), Local2)

OperationRegion (PDW1, SystemMemory, Local2, 0x04)

Field (PDW1, AnyAcc, NoLock, Preserve)

{

TEMP, 32

}

Store (Arg1, TEMP)

}

Method (SRXO, 2, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

, 28,

TEMP, 1,

Offset (0x04)

}

Store (Arg1, TEMP)

}

Method (GGIV, 1, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

, 1,

TEMP, 1,

Offset (0x04)

}

Return (TEMP)

}

Method (GGOV, 1, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

TEMP, 1,

Offset (0x04)

}

Return (TEMP)

}

Method (SGOV, 2, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

TEMP, 1,

Offset (0x04)

}

Store (Arg1, TEMP)

}

Method (GGII, 1, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

, 23,

TEMP, 1,

Offset (0x04)

}

Return (TEMP)

}

Method (SGII, 2, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

, 23,

TEMP, 1,

Offset (0x04)

}

Store (Arg1, TEMP)

}

Method (GPMV, 1, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

, 10,

TEMP, 3,

Offset (0x04)

}

Return (TEMP)

}

Method (SPMV, 2, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

, 10,

TEMP, 3,

Offset (0x04)

}

Store (Arg1, TEMP)

}

Method (GHPO, 1, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

OperationRegion (PREG, SystemMemory, GADR (Local0, HOWN), 0x04)

Field (PREG, AnyAcc, NoLock, Preserve)

{

TEMP, 32

}

Return (And (ShiftRight (TEMP, Local1), One))

}

Method (SHPO, 2, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

OperationRegion (PREG, SystemMemory, GADR (Local0, HOWN), 0x04)

Field (PREG, AnyAcc, NoLock, Preserve)

{

TEMP, 32

}

Or (And (TEMP, Not (ShiftLeft (One, Local1))),

ShiftLeft (Arg1, Local1), TEMP)

}

Method (GGPO, 1, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, POWN), Multiply (ShiftRight (Local1, 0x03),

0x04)), Local2)

OperationRegion (PREG, SystemMemory, Local2, 0x04)

Field (PREG, AnyAcc, NoLock, Preserve)

{

TEMP, 32

}

Return (And (ShiftRight (TEMP, Multiply (And (Local1, 0x07), 0x04

)), 0x03))

}

Method (SGRA, 2, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

, 20,

TEMP, 1,

Offset (0x04)

}

Store (Arg1, TEMP)

}

Method (SGWP, 2, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)

), 0x04), Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

, 10,

TEMP, 4,

Offset (0x04)

}

Store (Arg1, TEMP)

}

Method (UGP1, 1, Serialized)

{

OperationRegion (GPPX, SystemMemory, GADR (Arg0, GPEO), 0x24)

Field (GPPX, AnyAcc, NoLock, Preserve)

{

STSX, 32,

Offset (0x20),

GENX, 32

}

If (LEqual (And (ShiftRight (GPEM, Multiply (Arg0, 0x02)),

0x03), Zero))

{

Store (And (STSX, GENX), Index (GPES, Arg0))

}

Else

{

Store (Zero, Index (GPES, Arg0))

}

Method (UGPS, 0, Serialized)

{

If (LEqual (PCHS, One))

{

Store (0x0A, Local0)

}

Else

{

Store (0x08, Local0)

}

While (Local0)

{

Decrement (Local0)

UGP1 (Local0)

}

Method (CGP1, 2, Serialized)

{

If (LEqual (And (ShiftRight (GPEM, Multiply (Arg0, 0x02)),

0x03), Zero))

{

OperationRegion (GPPX, SystemMemory, GADR (Arg0, GPEO), 0x04)

Field (GPPX, AnyAcc, NoLock, Preserve)

{

STSX, 32

}

Store (Arg1, STSX)

}

Method (CGPS, 0, Serialized)

{

If (LEqual (PCHS, One))

{

Store (0x0A, Local0)

}

Else

{

Store (0x08, Local0)

}

While (Local0)

{

Decrement (Local0)

CGP1 (Local0, 0xFFFFFFFF)

}

Method (CGLS, 0, Serialized)

{

If (LEqual (PCHS, One))

{

Store (0x0A, Local0)

}

Else

{

Store (0x08, Local0)

}

While (Local0)

{

Decrement (Local0)

If (LEqual (Local0, 0x09))

{

Store (G2L9, Local1)

}

Else

{

If (LEqual (Local0, 0x08))

{

Store (G2L8, Local1)

}

Else

{

If (LEqual (Local0, 0x07))

{

Store (G2L7, Local1)

}

Else

{

If (LEqual (Local0, 0x06))

{

Store (G2L6, Local1)

}

Else

{

If (LEqual (Local0, 0x05))

{

Store (G2L5, Local1)

}

Else

{

If (LEqual (Local0, 0x04))

{

Store (G2L4, Local1)

}

Else

{

If (LEqual (Local0, 0x03))

{

Store (G2L3, Local1)

}

Else

{

If (LEqual (Local0, 0x02))

{

Store (G2L2, Local1)

}

Else

{

If (LEqual (Local0, One))

{

Store (G2L1, Local1)

}

Else

{

If (LEqual (Local0, Zero))

{

Store (G2L0, Local1)

}

Else

{

Continue

}

CGP1 (Local0, Local1)

}

Method (CAGS, 1, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

If (LEqual (And (ShiftRight (GPEM, Multiply (Local0, 0x02)),

0x03), Zero))

{

OperationRegion (GPPX, SystemMemory, GADR (Local0, GPEO), 0x04)

Field (GPPX, AnyAcc, NoLock, Preserve)

{

STSX, 32

}

Store (STSX, Local3)

ShiftLeft (One, Local1, Local2)

Or (STSX, Local2, STSX)

}

Method (ISME, 1, NotSerialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Return (And (ShiftRight (DerefOf (Index (GPES, Local0)), Local1),

One))

}

Method (DIPI, 1, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

, 9,

RDIS, 1,

, 15,

RCFG, 2,

Offset (0x04)

}

If (LNotEqual (RCFG, 0x02))

{

Store (DerefOf (Index (RXEV, Local0)), Local3)

And (Local3, Not (ShiftLeft (0x03, Multiply (Local1, 0x02))

), Local3)

Or (Local3, ShiftLeft (RCFG, Multiply (Local1, 0x02)), Index (

RXEV, Local0))

Store (0x02, RCFG)

Store (One, RDIS)

}

Method (UIPI, 1, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

, 9,

RDIS, 1,

, 15,

RCFG, 2,

Offset (0x04)

}

Store (And (ShiftRight (DerefOf (Index (RXEV, Local0)), Multiply (Local1,

0x02)), 0x03), Local3)

If (LNotEqual (Local3, 0x02))

{

Store (Zero, RDIS)

Store (Local3, RCFG)

}

Scope (\)

{

Method (THEN, 0, Serialized)

{

OperationRegion (THBA, SystemMemory, 0xFE200000, 0x10)

Field (THBA, DWordAcc, NoLock, Preserve)

{

DO00, 32

}

Return (LNotEqual (DO00, 0xFFFFFFFF))

}

Method (THDA, 2, Serialized)

{

Store (0xFE200000, Local0)

Add (Local0, Multiply (0x40, Multiply (0x80, Subtract (Arg0, 0x20)

)), Local0)

Add (Local0, Multiply (0x40, Arg1), Local0)

Return (Local0)

}

Method (STRD, 3, Serialized)

{

If (LGreater (Add (Arg1, Arg2), SizeOf (Arg0)))

{

Return (Zero)

}

ToBuffer (Arg0, Local3)

Store (Zero, Local0)

Store (Zero, Local1)

While (LLess (Local1, Arg2))

{

Store (DerefOf (Index (Local3, Add (Arg1, Local1))), Local2)

Add (Local0, ShiftLeft (Local2, Multiply (0x08, Local1)), Local0)

Increment (Local1)

}

Return (Local0)

}

Method (THDS, 1, Serialized)

{

If (LNot (THEN ()))

{

Return (Zero)

}

Store (SizeOf (Arg0), Local0)

Store (THDA (0x20, 0x16), Local1)

OperationRegion (THBA, SystemMemory, Local1, 0x40)

Field (THBA, QWordAcc, NoLock, Preserve)

{

QO00, 64

}

Field (THBA, DWordAcc, NoLock, Preserve)

{

DO00, 32,

Offset (0x10),

DO10, 32,

Offset (0x30),

DO30, 32

}

Field (THBA, WordAcc, NoLock, Preserve)

{

WO00, 16

}

Field (THBA, ByteAcc, NoLock, Preserve)

{

BO00, 8

}

Store (0x01000242, DO10)

Store (Local0, WO00)

Store (Zero, Local6)

Store (Local0, Local7)

While (LGreaterEqual (Local7, 0x08))

{

Store (STRD (Arg0, Local6, 0x08), QO00)

Add (Local6, 0x08, Local6)

Subtract (Local7, 0x08, Local7)

}

If (LGreaterEqual (Local7, 0x04))

{

Store (STRD (Arg0, Local6, 0x04), DO00)

Add (Local6, 0x04, Local6)

Subtract (Local7, 0x04, Local7)

}

If (LGreaterEqual (Local7, 0x02))

{

Store (STRD (Arg0, Local6, 0x02), WO00)

Add (Local6, 0x02, Local6)

Subtract (Local7, 0x02, Local7)

}

If (LGreaterEqual (Local7, One))

{

Store (STRD (Arg0, Local6, One), BO00)

Add (Local6, One, Local6)

Subtract (Local7, One, Local7)

}

Store (Zero, DO30)

}

Method (THDH, 1, Serialized)

{

THDS (ToHexString (Arg0))

}

Method (THDD, 1, Serialized)

{

THDS (ToDecimalString (Arg0))

}

Name (SPTH, One)

Name (SPTL, 0x02)

Method (PCHV, 0, NotSerialized)

{

If (LEqual (PCHS, One))

{

Return (SPTH)

}

If (LEqual (PCHS, 0x02))

{

Return (SPTL)

}

Return (Zero)

}

Scope (_GPE)

{

Method (_L6D, 0, Serialized) // _Lxx: Level-Triggered GPE

{

\_SB.PCI0.XHC.GPEH ()

\_SB.PCI0.HDEF.GPEH ()

\_SB.PCI0.GLAN.GPEH ()

\_SB.PCI0.XDCI.GPEH ()

}

Scope (_SB.PCI0)

{

Device (PRRE)

{

Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID

Name (_UID, "PCHRESV") // _UID: Unique ID

Name (_STA, 0x03) // _STA: Status

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Name (BUF0, ResourceTemplate ()

{

Memory32Fixed (ReadWrite,

0xFD000000, // Address Base

0x00AC0000, // Address Length

)

Memory32Fixed (ReadWrite,

0xFDAD0000, // Address Base

0x00010000, // Address Length

)

Memory32Fixed (ReadWrite,

0xFDB00000, // Address Base

0x00500000, // Address Length

)

Memory32Fixed (ReadWrite,

0xFE000000, // Address Base

0x00020000, // Address Length

)

Memory32Fixed (ReadWrite,

0xFE036000, // Address Base

0x00006000, // Address Length

)

Memory32Fixed (ReadWrite,

0xFE03D000, // Address Base

0x003C3000, // Address Length

)

})

Return (BUF0)

}

Device (IOTR)

{

Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID

Name (_UID, "IoTraps") // _UID: Unique ID

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

Name (BUF0, ResourceTemplate ()

{

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x01, // Alignment

0xFF, // Length

_Y25)

})

Name (BUF1, ResourceTemplate ()

{

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x01, // Alignment

0xFF, // Length

_Y26)

})

Name (BUF2, ResourceTemplate ()

{

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x01, // Alignment

0xFF, // Length

_Y27)

})

Name (BUF3, ResourceTemplate ()

{

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x01, // Alignment

0xFF, // Length

_Y28)

})

CreateWordField (BUF0, \_SB.PCI0.IOTR._CRS._Y25._MIN, AMI0) // _MIN: Minimum Base Address

CreateWordField (BUF0, \_SB.PCI0.IOTR._CRS._Y25._MAX, AMA0) // _MAX: Maximum Base Address

CreateWordField (BUF1, \_SB.PCI0.IOTR._CRS._Y26._MIN, AMI1) // _MIN: Minimum Base Address

CreateWordField (BUF1, \_SB.PCI0.IOTR._CRS._Y26._MAX, AMA1) // _MAX: Maximum Base Address

CreateWordField (BUF2, \_SB.PCI0.IOTR._CRS._Y27._MIN, AMI2) // _MIN: Minimum Base Address

CreateWordField (BUF2, \_SB.PCI0.IOTR._CRS._Y27._MAX, AMA2) // _MAX: Maximum Base Address

CreateWordField (BUF3, \_SB.PCI0.IOTR._CRS._Y28._MIN, AMI3) // _MIN: Minimum Base Address

CreateWordField (BUF3, \_SB.PCI0.IOTR._CRS._Y28._MAX, AMA3) // _MAX: Maximum Base Address

Store (ITA0, AMI0)

Store (ITA0, AMA0)

Store (ITA1, AMI1)

Store (ITA1, AMA1)

Store (ITA2, AMI2)

Store (ITA2, AMA2)

Store (ITA3, AMI3)

Store (ITA3, AMA3)

If (LEqual (ITS0, One))

{

ConcatenateResTemplate (Local0, BUF0, Local0)

}

If (LEqual (ITS1, One))

{

ConcatenateResTemplate (Local0, BUF1, Local0)

}

If (LEqual (ITS2, One))

{

ConcatenateResTemplate (Local0, BUF2, Local0)

}

If (LEqual (ITS3, One))

{

ConcatenateResTemplate (Local0, BUF3, Local0)

}

Return (Local0)

}

Scope (_SB.PCI0.LPCB)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

OperationRegion (LPC, PCI_Config, Zero, 0x0100)

Field (LPC, AnyAcc, NoLock, Preserve)

{

Offset (0x02),

CDID, 16,

Offset (0x08),

CRID, 8,

Offset (0x80),

IOD0, 8,

IOD1, 8,

Offset (0xA0),

, 9,

PRBL, 1,

Offset (0xAC),

Offset (0xAD),

Offset (0xAE),

XUSB, 1,

Offset (0xB8),

, 22,

GR0B, 2,

Offset (0xBC),

, 2,

GR19, 2,

Offset (0xC0),

Offset (0xDC),

, 2,

ESPI, 1

}

Scope (_SB.PCI0)

{

Device (PPMC)

{

Name (_ADR, 0x001F0002) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

OperationRegion (PMCB, PCI_Config, Zero, 0x0100)

Field (PMCB, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x40),

Offset (0x41),

ACBA, 8,

Offset (0x48),

, 12,

PWBA, 20

}

Device (SBUS)

{

Name (_ADR, 0x001F0004) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

OperationRegion (SMBP, PCI_Config, Zero, 0xC0)

Field (SMBP, DWordAcc, NoLock, Preserve)

{

Offset (0x20),

, 5,

SBAR, 11,

Offset (0x40),

, 2,

I2CE, 1

}

OperationRegion (SMBI, SystemIO, ShiftLeft (SBAR, 0x05), 0x10)

Field (SMBI, ByteAcc, NoLock, Preserve)

{

HSTS, 8,

Offset (0x02),

HCON, 8,

HCOM, 8,

TXSA, 8,

DAT0, 8,

DAT1, 8,

HBDR, 8,

PECR, 8,

RXSA, 8,

SDAT, 16

}

Method (SSXB, 2, Serialized)

{

If (STRT ())

{

Return (Zero)

}

Store (Zero, I2CE)

Store (0xBF, HSTS)

Store (Arg0, TXSA)

Store (Arg1, HCOM)

Store (0x48, HCON)

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (One)

}

Return (Zero)

}

Method (SRXB, 1, Serialized)

{

If (STRT ())

{

Return (0xFFFF)

}

Store (Zero, I2CE)

Store (0xBF, HSTS)

Store (Or (Arg0, One), TXSA)

Store (0x44, HCON)

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (DAT0)

}

Return (0xFFFF)

}

Method (SWRB, 3, Serialized)

{

If (STRT ())

{

Return (Zero)

}

Store (Zero, I2CE)

Store (0xBF, HSTS)

Store (Arg0, TXSA)

Store (Arg1, HCOM)

Store (Arg2, DAT0)

Store (0x48, HCON)

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (One)

}

Return (Zero)

}

Method (SRDB, 2, Serialized)

{

If (STRT ())

{

Return (0xFFFF)

}

Store (Zero, I2CE)

Store (0xBF, HSTS)

Store (Or (Arg0, One), TXSA)

Store (Arg1, HCOM)

Store (0x48, HCON)

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (DAT0)

}

Return (0xFFFF)

}

Method (SWRW, 3, Serialized)

{

If (STRT ())

{

Return (Zero)

}

Store (Zero, I2CE)

Store (0xBF, HSTS)

Store (Arg0, TXSA)

Store (Arg1, HCOM)

And (Arg2, 0xFF, DAT1)

And (ShiftRight (Arg2, 0x08), 0xFF, DAT0)

Store (0x4C, HCON)

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (One)

}

Return (Zero)

}

Method (SRDW, 2, Serialized)

{

If (STRT ())

{

Return (0xFFFF)

}

Store (Zero, I2CE)

Store (0xBF, HSTS)

Store (Or (Arg0, One), TXSA)

Store (Arg1, HCOM)

Store (0x4C, HCON)

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (Or (ShiftLeft (DAT0, 0x08), DAT1))

}

Return (0xFFFFFFFF)

}

Method (SBLW, 4, Serialized)

{

If (STRT ())

{

Return (Zero)

}

Store (Arg3, I2CE)

Store (0xBF, HSTS)

Store (Arg0, TXSA)

Store (Arg1, HCOM)

Store (SizeOf (Arg2), DAT0)

Store (Zero, Local1)

Store (DerefOf (Index (Arg2, Zero)), HBDR)

Store (0x54, HCON)

While (LGreater (SizeOf (Arg2), Local1))

{

Store (0x0FA0, Local0)

While (LAnd (LNot (And (HSTS, 0x80)), Local0))

{

Decrement (Local0)

Stall (0x32)

}

If (LNot (Local0))

{

KILL ()

Return (Zero)

}

Store (0x80, HSTS)

Increment (Local1)

If (LGreater (SizeOf (Arg2), Local1))

{

Store (DerefOf (Index (Arg2, Local1)), HBDR)

}

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (One)

}

Return (Zero)

}

Method (SBLR, 3, Serialized)

{

Name (TBUF, Buffer (0x0100) {})

If (STRT ())

{

Return (Zero)

}

Store (Arg2, I2CE)

Store (0xBF, HSTS)

Store (Or (Arg0, One), TXSA)

Store (Arg1, HCOM)

Store (0x54, HCON)

Store (0x0FA0, Local0)

While (LAnd (LNot (And (HSTS, 0x80)), Local0))

{

Decrement (Local0)

Stall (0x32)

}

If (LNot (Local0))

{

KILL ()

Return (Zero)

}

Store (DAT0, Index (TBUF, Zero))

Store (0x80, HSTS)

Store (One, Local1)

While (LLess (Local1, DerefOf (Index (TBUF, Zero))))

{

Store (0x0FA0, Local0)

While (LAnd (LNot (And (HSTS, 0x80)), Local0))

{

Decrement (Local0)

Stall (0x32)

}

If (LNot (Local0))

{

KILL ()

Return (Zero)

}

Store (HBDR, Index (TBUF, Local1))

Store (0x80, HSTS)

Increment (Local1)

}

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (TBUF)

}

Return (Zero)

}

Method (STRT, 0, Serialized)

{

Store (0xC8, Local0)

While (Local0)

{

If (And (HSTS, 0x40))

{

Decrement (Local0)

Sleep (One)

If (LEqual (Local0, Zero))

{

Return (One)

}

Else

{

Store (Zero, Local0)

}

Store (0x0FA0, Local0)

While (Local0)

{

If (And (HSTS, One))

{

Decrement (Local0)

Stall (0x32)

If (LEqual (Local0, Zero))

{

KILL ()

}

Else

{

Return (Zero)

}

Return (One)

}

Method (COMP, 0, Serialized)

{

Store (0x0FA0, Local0)

While (Local0)

{

If (And (HSTS, 0x02))

{

Return (One)

}

Else

{

Decrement (Local0)

Stall (0x32)

If (LEqual (Local0, Zero))

{

KILL ()

}

Return (Zero)

}

Method (KILL, 0, Serialized)

{

Or (HCON, 0x02, HCON)

Or (HSTS, 0xFF, HSTS)

}

Scope (_SB)

{

Device (LNKA)

{

Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID

Name (_UID, One) // _UID: Unique ID

Method (_DIS, 0, Serialized) // _DIS: Disable Device

{

Or (PARC, 0x80, PARC)

}

Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings

{

Return (PRSA)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Name (RTLA, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLA, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PARC, 0x0F), IRQ0)

Return (RTLA)

}

Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PARC)

}

Method (_STA, 0, Serialized) // _STA: Status

{

If (And (PARC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

Device (LNKB)

{

Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID

Name (_UID, 0x02) // _UID: Unique ID

Method (_DIS, 0, Serialized) // _DIS: Disable Device

{

Or (PBRC, 0x80, PBRC)

}

Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings

{

Return (PRSB)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Name (RTLB, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLB, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PBRC, 0x0F), IRQ0)

Return (RTLB)

}

Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PBRC)

}

Method (_STA, 0, Serialized) // _STA: Status

{

If (And (PBRC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

Device (LNKC)

{

Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID

Name (_UID, 0x03) // _UID: Unique ID

Method (_DIS, 0, Serialized) // _DIS: Disable Device

{

Or (PCRC, 0x80, PCRC)

}

Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings

{

Return (PRSC)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Name (RTLC, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLC, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PCRC, 0x0F), IRQ0)

Return (RTLC)

}

Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PCRC)

}

Method (_STA, 0, Serialized) // _STA: Status

{

If (And (PCRC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

Device (LNKD)

{

Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID

Name (_UID, 0x04) // _UID: Unique ID

Method (_DIS, 0, Serialized) // _DIS: Disable Device

{

Or (PDRC, 0x80, PDRC)

}

Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings

{

Return (PRSD)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Name (RTLD, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLD, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PDRC, 0x0F), IRQ0)

Return (RTLD)

}

Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PDRC)

}

Method (_STA, 0, Serialized) // _STA: Status

{

If (And (PDRC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

Device (LNKE)

{

Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID

Name (_UID, 0x05) // _UID: Unique ID

Method (_DIS, 0, Serialized) // _DIS: Disable Device

{

Or (PERC, 0x80, PERC)

}

Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings

{

Return (PRSE)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Name (RTLE, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLE, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PERC, 0x0F), IRQ0)

Return (RTLE)

}

Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PERC)

}

Method (_STA, 0, Serialized) // _STA: Status

{

If (And (PERC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

Device (LNKF)

{

Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID

Name (_UID, 0x06) // _UID: Unique ID

Method (_DIS, 0, Serialized) // _DIS: Disable Device

{

Or (PFRC, 0x80, PFRC)

}

Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings

{

Return (PRSF)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Name (RTLF, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLF, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PFRC, 0x0F), IRQ0)

Return (RTLF)

}

Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PFRC)

}

Method (_STA, 0, Serialized) // _STA: Status

{

If (And (PFRC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

Device (LNKG)

{

Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID

Name (_UID, 0x07) // _UID: Unique ID

Method (_DIS, 0, Serialized) // _DIS: Disable Device

{

Or (PGRC, 0x80, PGRC)

}

Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings

{

Return (PRSG)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Name (RTLG, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLG, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PGRC, 0x0F), IRQ0)

Return (RTLG)

}

Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PGRC)

}

Method (_STA, 0, Serialized) // _STA: Status

{

If (And (PGRC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

Device (LNKH)

{

Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID

Name (_UID, 0x08) // _UID: Unique ID

Method (_DIS, 0, Serialized) // _DIS: Disable Device

{

Or (PHRC, 0x80, PHRC)

}

Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings

{

Return (PRSH)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Name (RTLH, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLH, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PHRC, 0x0F), IRQ0)

Return (RTLH)

}

Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PHRC)

}

Method (_STA, 0, Serialized) // _STA: Status

{

If (And (PHRC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

Scope (\)

{

Method (PCRR, 2, Serialized)

{

Add (ShiftLeft (Arg0, 0x10), Arg1, Local0)

Add (SBRG, Local0, Local0)

OperationRegion (PCR0, SystemMemory, Local0, 0x04)

Field (PCR0, DWordAcc, Lock, Preserve)

{

DAT0, 32

}

Return (DAT0)

}

Method (PCRW, 3, Serialized)

{

Add (ShiftLeft (Arg0, 0x10), Arg1, Local0)

Add (SBRG, Local0, Local0)

OperationRegion (PCR0, SystemMemory, Local0, 0x04)

Field (PCR0, DWordAcc, Lock, Preserve)

{

DAT0, 32

}

Store (Arg2, DAT0)

OperationRegion (PCR1, SystemMemory, Add (SBRG, 0x00C73418), 0x04)

Field (PCR1, DWordAcc, Lock, Preserve)

{

DAT1, 32

}

Store (DAT1, Local1)

}

Method (PCRO, 3, Serialized)

{

Store (PCRR (Arg0, Arg1), Local0)

Store (Or (Local0, Arg2), Local1)

PCRW (Arg0, Arg1, Local1)

}

Method (PCRA, 3, Serialized)

{

Store (PCRR (Arg0, Arg1), Local0)

Store (And (Local0, Arg2), Local1)

PCRW (Arg0, Arg1, Local1)

}

Method (PCAO, 4, Serialized)

{

Store (PCRR (Arg0, Arg1), Local0)

Store (Or (And (Local0, Arg2), Arg3), Local1)

PCRW (Arg0, Arg1, Local1)

}

Name (PMBV, Zero)

Method (PMBS, 0, NotSerialized)

{

If (LEqual (PMBV, Zero))

{

Store (ShiftLeft (\_SB.PCI0.PPMC.ACBA, 0x08), PMBV)

}

Return (PMBV)

}

Name (PWRV, Zero)

Method (PWRM, 0, NotSerialized)

{

If (LEqual (PWRV, Zero))

{

Store (ShiftLeft (\_SB.PCI0.PPMC.PWBA, 0x0C), PWRV)

}

Return (PWRV)

}

Name (TCBV, Zero)

Method (TCBS, 0, NotSerialized)

{

If (LEqual (TCBV, Zero))

{

Store (PCRR (0xEF, 0x2778), Local0)

And (Local0, 0xFFE0, TCBV)

}

Return (TCBV)

}

OperationRegion (PMIO, SystemIO, PMBS (), 0x80)

Field (PMIO, ByteAcc, NoLock, Preserve)

{

Offset (0x01),

PBSS, 1,

Offset (0x40),

, 17,

GPEC, 1

}

OperationRegion (PMLP, SystemIO, Add (PMBS (), 0x80), 0x20)

Field (PMLP, ByteAcc, NoLock, Preserve)

{

Offset (0x10),

Offset (0x11),

GE08, 1,

, 8,

GE17, 1,

, 17,

GE35, 1,

, 9,

GE45, 1,

Offset (0x16),

GE48, 1,

, 2,

GE51, 1,

Offset (0x20)

}

Field (PMLP, ByteAcc, NoLock, WriteAsZeros)

{

Offset (0x01),

GS08, 1,

, 8,

GS17, 1,

, 17,

GS35, 1,

, 9,

GS45, 1,

Offset (0x06),

GS48, 1,

, 2,

GS51, 1,

, 2,

GS54, 1,

GS55, 1,

Offset (0x10)

}

OperationRegion (TCBA, SystemIO, TCBS (), 0x10)

Field (TCBA, ByteAcc, NoLock, Preserve)

{

Offset (0x04),

, 9,

CPSC, 1

}

OperationRegion (PWMR, SystemMemory, PWRM (), 0x0800)

Field (PWMR, AnyAcc, NoLock, Preserve)

{

Offset (0xE0),

Offset (0xE2),

DWLE, 1,

HWLE, 1

}

OperationRegion (PMST, SystemMemory, PWRV, 0x80)

Field (PMST, DWordAcc, NoLock, Preserve)

{

Offset (0x18),

, 25,

USBP, 1,

Offset (0x1C),

Offset (0x1F),

PMFS, 1,

Offset (0x20),

MPMC, 32,

, 20,

UWAB, 1

}

Scope (_SB.PCI0)

{

Name (LTRN, Zero)

Name (OBFN, Zero)

Name (LMSL, Zero)

Name (LNSL, Zero)

Device (GLAN)

{

Name (_ADR, 0x001F0006) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

OperationRegion (GLBA, PCI_Config, Zero, 0x0100)

Field (GLBA, AnyAcc, NoLock, Preserve)

{

DVID, 16,

Offset (0xCC),

Offset (0xCD),

PMEE, 1,

, 6,

PMES, 1

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x6D, 0x04))

}

Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake

{

Store (Arg0, PMEE)

}

Method (GPEH, 0, NotSerialized)

{

If (LEqual (DVID, 0xFFFF))

{

Return (Zero)

}

If (LAnd (PMEE, PMES))

{

Store (One, PMES)

Notify (GLAN, 0x02)

}

Scope (_SB.PCI0)

{

Device (XHC)

{

Name (_ADR, 0x00140000) // _ADR: Address

OperationRegion (XPRT, PCI_Config, Zero, 0x0100)

Field (XPRT, AnyAcc, NoLock, Preserve)

{

DVID, 16,

Offset (0x74),

D0D3, 2,

Offset (0x75),

PMEE, 1,

, 6,

PMES, 1,

Offset (0xA8),

, 13,

MW13, 1,

MW14, 1,

Offset (0xAC),

Offset (0xB0),

, 13,

MB13, 1,

MB14, 1,

Offset (0xB4),

Offset (0xD0),

PR2, 32,

PR2M, 32,

PR3, 32,

PR3M, 32

}

Name (XFLT, Zero)

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xB7, 0x0C, 0x34, 0xAC, 0x01, 0xE9, 0xBF, 0x45,

/* 0008 */ 0xB7, 0xE6, 0x2B, 0x34, 0xEC, 0x93, 0x1E, 0x23

}))

{

If (LEqual (Arg1, 0x03))

{

Store (Arg1, XFLT)

}

Return (Zero)

}

Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State

{

Return (0x03)

}

Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State

{

Return (0x03)

}

Method (_S3W, 0, NotSerialized) // _S3W: S3 Device Wake State

{

Return (0x03)

}

Method (_S4W, 0, NotSerialized) // _S4W: S4 Device Wake State

{

Return (0x03)

}

Method (_S0W, 0, NotSerialized) // _S0W: S0 Device Wake State

{

If (LEqual (XFLT, Zero))

{

Return (Zero)

}

Else

{

Return (0x03)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x6D, 0x04))

}

Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake

{

Store (Arg0, PMEE)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

If (CondRefOf (\_SB.PCI0.XHC.RHUB.INIR))

{

^RHUB.INIR ()

}

Method (GPEH, 0, NotSerialized)

{

If (LEqual (DVID, 0xFFFF))

{

Return (Zero)

}

Store (PMES, Local0)

Store (One, PMES)

If (LAnd (PMEE, Local0))

{

Notify (XHC, 0x02)

}

OperationRegion (XHCP, SystemMemory, Add (GPCB (), 0x000A0000), 0x0100)

Field (XHCP, AnyAcc, Lock, Preserve)

{

Offset (0x04),

PDBM, 16,

Offset (0x10),

MEMB, 64

}

Method (USRA, 0, Serialized)

{

If (LEqual (PCHV (), SPTH))

{

Return (0x0F)

}

Else

{

Return (0x0B)

}

Method (SSPA, 0, Serialized)

{

If (LEqual (PCHV (), SPTH))

{

Return (0x11)

}

Else

{

Return (0x0D)

}

Name (XRST, Zero)

Method (_PS0, 0, Serialized) // _PS0: Power State 0

{

If (LEqual (DVID, 0xFFFF))

{

Return (Zero)

}

Store (MEMB, Local2)

Store (PDBM, Local1)

And (PDBM, 0xFFFFFFFFFFFFFFF9, PDBM)

Store (D0D3, Local3)

Store (Zero, D0D3)

Store (XWMB, MEMB)

Or (Local1, 0x02, PDBM)

OperationRegion (MC11, SystemMemory, XWMB, 0x9000)

Field (MC11, DWordAcc, Lock, Preserve)

{

Offset (0x81C4),

, 2,

UPSW, 2

}

Store (Zero, UPSW)

And (PDBM, 0xFFFFFFFFFFFFFFFD, PDBM)

Store (Local2, MEMB)

Store (Local1, PDBM)

If (CondRefOf (\_SB.PCI0.XHC.PS0X))

{

PS0X

}

If (LAnd (UWAB, LOr (LEqual (D0D3, Zero), LEqual (^^XDCI.D0I3, Zero))))

{

Store (One, MPMC)

While (PMFS)

{

Sleep (0x0A)

}

Method (_PS3, 0, Serialized) // _PS3: Power State 3

{

If (LEqual (DVID, 0xFFFF))

{

Return (Zero)

}

Store (MEMB, Local2)

Store (PDBM, Local1)

And (PDBM, 0xFFFFFFFFFFFFFFF9, PDBM)

Store (Zero, D0D3)

Store (XWMB, MEMB)

Or (Local1, 0x02, PDBM)

OperationRegion (MC11, SystemMemory, XWMB, 0x9000)

Field (MC11, DWordAcc, Lock, Preserve)

{

Offset (0x81C4),

, 2,

UPSW, 2

}

Store (0x03, UPSW)

And (PDBM, 0xFFFFFFFFFFFFFFFD, PDBM)

Store (0x03, D0D3)

Store (Local2, MEMB)

Store (Local1, PDBM)

If (CondRefOf (\_SB.PCI0.XHC.PS3X))

{

PS3X

}

If (LAnd (UWAB, LAnd (LEqual (D0D3, 0x03), LOr (LEqual (^^XDCI.D0I3,

0x03), LEqual (^^XDCI.DVID, 0xFFFF)))))

{

Store (0x03, MPMC)

While (PMFS)

{

Sleep (0x0A)

}

Method (CUID, 1, Serialized)

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xA9, 0x12, 0x95, 0x7C, 0x05, 0x17, 0xB4, 0x4C,

/* 0008 */ 0xAF, 0x7D, 0x50, 0x6A, 0x24, 0x23, 0xAB, 0x71

}))

{

Return (One)

}

Return (Zero)

}

Device (RHUB)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PS0, 0, Serialized) // _PS0: Power State 0

{

If (LEqual (DVID, 0xFFFF))

{

Return (Zero)

}

If (CondRefOf (\_SB.PCI0.XHC.RHUB.PS0X))

{

PS0X

}

Method (_PS2, 0, Serialized) // _PS2: Power State 2

{

If (LEqual (DVID, 0xFFFF))

{

Return (Zero)

}

If (CondRefOf (\_SB.PCI0.XHC.RHUB.PS2X))

{

PS2X

}

Method (_PS3, 0, Serialized) // _PS3: Power State 3

{

If (LEqual (DVID, 0xFFFF))

{

Return (Zero)

}

If (CondRefOf (\_SB.PCI0.XHC.RHUB.PS3X))

{

PS3X

}

Device (HS01)

{

Name (_ADR, One) // _ADR: Address

}

Device (HS02)

{

Name (_ADR, 0x02) // _ADR: Address

}

Device (HS03)

{

Name (_ADR, 0x03) // _ADR: Address

}

Device (HS04)

{

Name (_ADR, 0x04) // _ADR: Address

}

Device (HS05)

{

Name (_ADR, 0x05) // _ADR: Address

}

Device (HS06)

{

Name (_ADR, 0x06) // _ADR: Address

}

Device (HS07)

{

Name (_ADR, 0x07) // _ADR: Address

}

Device (HS08)

{

Name (_ADR, 0x08) // _ADR: Address

}

Device (HS09)

{

Name (_ADR, 0x09) // _ADR: Address

}

Device (HS10)

{

Name (_ADR, 0x0A) // _ADR: Address

}

Device (USR1)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (USRA (), Zero))

}

Device (USR2)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (USRA (), One))

}

Device (SS01)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (SSPA (), Zero))

}

Device (SS02)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (SSPA (), One))

}

Device (SS03)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (SSPA (), 0x02))

}

Device (SS04)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (SSPA (), 0x03))

}

Device (SS05)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (SSPA (), 0x04))

}

Device (SS06)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (SSPA (), 0x05))

}

If (LEqual (PCHV (), SPTH))

{

Scope (_SB.PCI0.XHC.RHUB)

{

Device (HS11)

{

Name (_ADR, 0x0B) // _ADR: Address

}

Device (HS12)

{

Name (_ADR, 0x0C) // _ADR: Address

}

Device (HS13)

{

Name (_ADR, 0x0D) // _ADR: Address

}

Device (HS14)

{

Name (_ADR, 0x0E) // _ADR: Address

}

Device (SS07)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (SSPA (), 0x06))

}

Device (SS08)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (SSPA (), 0x07))

}

Device (SS09)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (SSPA (), 0x08))

}

Device (SS10)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (SSPA (), 0x09))

}

Scope (_SB.PCI0)

{

Device (XDCI)

{

Name (_ADR, 0x00140001) // _ADR: Address

OperationRegion (OTGD, PCI_Config, Zero, 0x0100)

Field (OTGD, DWordAcc, NoLock, Preserve)

{

DVID, 16,

Offset (0x10),

XDCB, 64,

Offset (0x74),

D0I3, 2,

Offset (0x84),

Offset (0x85),

PMEE, 1,

, 6,

PMES, 1

}

Method (XDBA, 0, NotSerialized)

{

Return (And (XDCB, 0xFFFFFFFFFFFFFF00))

}

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD5, 0x85, 0x2B, 0x73, 0xA7, 0xB7, 0x1B, 0x4A,

/* 0008 */ 0x9B, 0xA0, 0x4B, 0xBD, 0x00, 0xFF, 0xD5, 0x11

}))

{

If (LEqual (Arg1, One))

{

While (One)

{

Store (Arg2, _T_0)

If (LEqual (_T_0, Zero))

{

Return (Buffer (One)

{

0x73

})

}

Else

{

If (LEqual (_T_0, One))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x04))

{

OperationRegion (XDBW, SystemMemory, XDBA (), 0x00110000)

Field (XDBW, WordAcc, NoLock, Preserve)

{

Offset (0x10F810),

Offset (0x10F811),

U2CP, 2,

U3CP, 2,

Offset (0x10F818),

PUPS, 2,

, 1,

PURC, 1,

Offset (0x10F81A),

Offset (0x10F81C),

, 3,

UXPE, 2,

Offset (0x10F81E)

}

Store (DerefOf (Index (Arg3, Zero)), Local1)

If (LEqual (Local1, Zero))

{

Store (Zero, UXPE)

Store (Zero, PURC)

Store (Zero, Local0)

While (LLess (Local0, 0x0A))

{

Stall (0x64)

Increment (Local0)

}

Store (Zero, PUPS)

Store (Zero, Local0)

While (LLess (Local0, 0x07D0))

{

Stall (0x64)

If (LAnd (LEqual (U2CP, Zero), LEqual (U3CP, Zero)))

{

Break

}

Increment (Local0)

}

If (LNotEqual (U2CP, Zero)) {}

If (LNotEqual (U3CP, Zero)) {}

Return (Zero)

}

If (LEqual (Local1, 0x03))

{

If (LNotEqual (U2CP, Zero)) {}

If (LNotEqual (U3CP, Zero)) {}

Store (0x03, PUPS)

Store (Zero, Local0)

While (LLess (Local0, 0x07D0))

{

Stall (0x64)

If (LAnd (LEqual (U2CP, 0x03), LEqual (U3CP, 0x03)))

{

Break

}

Increment (Local0)

}

If (LNotEqual (U2CP, 0x03)) {}

If (LNotEqual (U3CP, 0x03)) {}

Store (One, PURC)

Store (0x03, UXPE)

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x05))

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x06))

{

OperationRegion (XDBD, SystemMemory, XDBA (), 0x00110000)

Field (XDBD, DWordAcc, NoLock, Preserve)

{

Offset (0xC704),

, 30,

CSFR, 1,

Offset (0xC708)

}

OperationRegion (XDW2, SystemMemory, XDBA (), 0x00110000)

Field (XDW2, WordAcc, NoLock, Preserve)

{

Offset (0x10F820),

, 13,

OTHC, 1

}

If (LEqual (OTHC, Zero))

{

Store (One, CSFR)

Store (Zero, Local0)

While (LLess (Local0, 0x64))

{

If (LEqual (CSFR, Zero))

{

Break

}

Sleep (One)

}

Return (Zero)

}

Break

}

Return (Zero)

}

Name (_DDN, "SPT XHCI controller") // _DDN: DOS Device Name

Name (_STR, Unicode ("SPT XHCI controller")) // _STR: Description String

Method (_S0W, 0, NotSerialized) // _S0W: S0 Device Wake State

{

Return (0x03)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LNotEqual (DVID, 0xFFFFFFFF))

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x6D, 0x04))

}

Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake

{

Store (Arg0, PMEE)

}

Method (GPEH, 0, NotSerialized)

{

If (LEqual (DVID, 0xFFFF))

{

Return (Zero)

}

Store (PMES, Local0)

Store (One, PMES)

If (LAnd (PMEE, Local0))

{

Notify (XDCI, 0x02)

}

Scope (_SB.PCI0)

{

Device (HDEF)

{

Name (_ADR, 0x001F0003) // _ADR: Address

OperationRegion (HDAR, PCI_Config, Zero, 0x0100)

Field (HDAR, WordAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x48),

, 6,

MBCG, 1,

Offset (0x54),

Offset (0x55),

PMEE, 1,

, 6,

PMES, 1

}

Name (_S0W, 0x03) // _S0W: S0 Device Wake State

Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake

{

Store (Arg0, PMEE)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x6D, 0x04))

}

Method (GPEH, 0, NotSerialized)

{

If (LEqual (VDID, 0xFFFFFFFF))

{

Return (Zero)

}

If (LAnd (PMEE, PMES))

{

ADBG ("HDEF GPEH")

Store (One, PMES)

Notify (HDEF, 0x02)

}

Name (NBUF, ResourceTemplate ()

{

QWordMemory (ResourceConsumer, PosDecode, MinNotFixed, MaxNotFixed, NonCacheable, ReadOnly,

0x0000000000000001, // Granularity

0x0000000000000000, // Range Minimum

0x0000000000000000, // Range Maximum

0x0000000000000000, // Translation Offset

0x0000000000000000, // Length

,, _Y29, AddressRangeACPI, TypeStatic)

})

Method (AUWA, 0, Serialized)

{

If (LEqual (PCHS, One))

{

If (LEqual (^^LPCB.CRID, Zero))

{

Return (One)

}

Else

{

If (LEqual (^^LPCB.CRID, Zero))

{

Return (One)

}

If (LEqual (^^LPCB.CRID, One))

{

Return (One)

}

If (LEqual (^^LPCB.CRID, 0x09))

{

Return (One)

}

Return (Zero)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

ADBG ("HDEF _INI")

CreateQWordField (NBUF, \_SB.PCI0.HDEF._Y29._MIN, NBAS) // _MIN: Minimum Base Address

CreateQWordField (NBUF, \_SB.PCI0.HDEF._Y29._MAX, NMAS) // _MAX: Maximum Base Address

CreateQWordField (NBUF, \_SB.PCI0.HDEF._Y29._LEN, NLEN) // _LEN: Length

Store (NHLA, NBAS)

Add (NHLA, Subtract (NHLL, One), NMAS)

Store (NHLL, NLEN)

If (LEqual (AUWA (), One))

{

Store (Zero, MBCG)

}

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

ADBG ("HDEF _DSM")

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x6E, 0x88, 0x9F, 0xA6, 0xEB, 0x6C, 0x94, 0x45,

/* 0008 */ 0xA4, 0x1F, 0x7B, 0x5D, 0xCE, 0x24, 0xC5, 0x53

}))

{

While (One)

{

Store (Arg2, _T_0)

If (LEqual (_T_0, Zero))

{

Return (Buffer (One)

{

0x0F

})

}

Else

{

If (LEqual (_T_0, One))

{

ADBG ("_DSM Fun 1 NHLT")

Return (NBUF)

}

Else

{

If (LEqual (_T_0, 0x02))

{

ADBG ("_DSM Fun 2 FMSK")

Return (ADFM)

}

Else

{

If (LEqual (_T_0, 0x03))

{

ADBG ("_DSM Fun 3 PPMS")

Return (Zero)

}

Else

{

ADBG ("_DSM Fun NOK")

Return (Buffer (One)

{

0x00

})

}

Break

}

ADBG ("_DSM UUID NOK")

}

Device (SAT0)

{

Name (_ADR, 0x00170000) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (CondRefOf (\_SB.PCI0.SAT0.SDSM))

{

Return (SDSM)

Arg0

Arg1

Arg2

Arg3

}

Return (Zero)

}

Device (PRT0)

{

Name (_ADR, 0xFFFF) // _ADR: Address

}

Device (PRT1)

{

Name (_ADR, 0x0001FFFF) // _ADR: Address

}

Device (PRT2)

{

Name (_ADR, 0x0002FFFF) // _ADR: Address

}

Device (PRT3)

{

Name (_ADR, 0x0003FFFF) // _ADR: Address

}

Device (PRT4)

{

Name (_ADR, 0x0004FFFF) // _ADR: Address

}

Device (PRT5)

{

Name (_ADR, 0x0005FFFF) // _ADR: Address

}

Method (RDCA, 5, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

OperationRegion (RPAL, SystemMemory, Add (GPCB (), Add (0x000B8100, Arg1)), 0x04)

Field (RPAL, DWordAcc, Lock, Preserve)

{

RPCD, 32

}

OperationRegion (EPAC, SystemMemory, Add (GPCB (), 0x000B8308), 0x08)

Field (EPAC, DWordAcc, Lock, Preserve)

{

CAIR, 32,

CADR, 32

}

OperationRegion (NCRG, SystemMemory, Add (GPCB (), 0x000B8FC0), 0x04)

Field (NCRG, DWordAcc, Lock, Preserve)

{

CRGC, 32

}

If (LGreater (Arg0, 0x02))

{

Return (Zero)

}

Else

{

Store (Arg0, CRGC)

}

While (One)

{

Store (ToInteger (Arg4), _T_0)

If (LEqual (_T_0, Zero))

{

Return (RPCD)

}

Else

{

If (LEqual (_T_0, 0x02))

{

Store (Arg1, CAIR)

Return (CADR)

}

Else

{

If (LEqual (_T_0, One))

{

And (Arg2, RPCD, Local0)

Or (Arg3, Local0, Local0)

Store (Local0, RPCD)

}

Else

{

If (LEqual (_T_0, 0x03))

{

Store (Arg1, CAIR)

And (Arg2, CADR, Local0)

Or (Arg3, Local0, Local0)

Store (Local0, CADR)

}

Else

{

Return (Zero)

}

Break

}

Method (RPD0, 1, Serialized)

{

RDCA (Arg0, 0xA4, 0xFFFFFFFC, Zero, One)

}

Method (RPD3, 1, Serialized)

{

RDCA (Arg0, 0xA4, 0xFFFFFFFC, 0x03, One)

}

Device (NVM1)

{

Name (_ADR, 0x00C1FFFF) // _ADR: Address

Name (PRBI, Zero)

Name (PRBD, Zero)

Name (PCMD, Zero)

Name (NCRN, Zero)

Name (NITV, Zero)

Name (NPMV, Zero)

Name (NPCV, Zero)

Name (NL1V, Zero)

Name (ND2V, Zero)

Name (ND1V, Zero)

Name (NLRV, Zero)

Name (NLDV, Zero)

Name (NEAV, Zero)

Name (NEBV, Zero)

Name (NECV, Zero)

Name (NRAV, Zero)

Name (NMBV, Zero)

Name (NMVV, Zero)

Name (NPBV, Zero)

Name (NPVV, Zero)

Method (EPD0, 0, Serialized)

{

RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, Zero, 0x03)

}

Method (EPD3, 0, Serialized)

{

RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, 0x03, 0x03)

}

Method (CNRS, 0, Serialized)

{

If (LEqual (NITV, Zero))

{

Return (Zero)

}

RDCA (NCRN, 0x10, Zero, Zero, 0x03)

RDCA (NCRN, 0x14, Zero, Zero, 0x03)

RDCA (NCRN, 0x18, Zero, Zero, 0x03)

RDCA (NCRN, 0x1C, Zero, Zero, 0x03)

RDCA (NCRN, 0x20, Zero, Zero, 0x03)

RDCA (NCRN, 0x24, Zero, Zero, 0x03)

RDCA (NCRN, 0x04, 0xFFFFFFF8, PCMD, 0x03)

RDCA (NCRN, PRBI, Zero, PRBD, 0x03)

If (LNotEqual (NL1V, Zero))

{

RDCA (NCRN, Add (NL1V, 0x0C), 0xFFFFFF00, ND2V, 0x03)

RDCA (NCRN, Add (NL1V, 0x08), 0x0F, And (ND1V, 0xFFFFFFF0

), 0x03)

RDCA (NCRN, Add (NL1V, 0x08), 0xFFFFFFFF, ND1V, 0x03)

}

If (LNotEqual (NLRV, Zero))

{

RDCA (NCRN, Add (NLRV, 0x04), 0xFFFFFFFF, NLDV, 0x03)

}

RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFEBF, And (NEAV, 0xFFFC

), 0x03)

RDCA (NCRN, Add (NPCV, 0x28), 0xFFFFFBFF, NECV, 0x03)

RDCA (NCRN, Add (NPCV, 0x08), 0xFFFFFF1F, NEBV, 0x03)

RDCA (NCRN, 0x68, 0xFFFFFBFF, NRAV, One)

If (LEqual (And (NEAV, 0x40), 0x40))

{

RDCA (NCRN, 0x50, 0xFFFFFFDF, 0x20, One)

While (LEqual (And (RDCA (NCRN, 0x52, Zero, Zero, Zero), 0x2000

), Zero))

{

Stall (0x0A)

}

RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFFFC, And (NEAV, 0x03

), 0x03)

If (LNotEqual (NMVV, Zero))

{

RDCA (NCRN, NMBV, Zero, NMVV, 0x03)

}

If (LNotEqual (NPVV, Zero))

{

RDCA (NCRN, NPBV, Zero, NPVV, 0x03)

}

Method (_PS3, 0, Serialized) // _PS3: Power State 3

{

If (LEqual (NITV, Zero))

{

Return (Zero)

}

Store (RDCA (NCRN, 0x04, Zero, Zero, 0x02), PCMD)

If (LEqual (NITV, One))

{

Store (0x24, PRBI)

Store (RDCA (NCRN, 0x24, Zero, Zero, 0x02), PRBD)

}

Else

{

If (LEqual (NITV, 0x02))

{

Store (0x10, PRBI)

Store (RDCA (NCRN, 0x10, Zero, Zero, 0x02), PRBD)

}

EPD3 ()

RPD3 (NCRN)

}

Method (_PS0, 0, Serialized) // _PS0: Power State 0

{

If (LEqual (NITV, Zero))

{

Return (Zero)

}

RPD0 (NCRN)

EPD0 ()

Store (RDCA (NCRN, Add (NPMV, 0x04), Zero, Zero, 0x02),

Local0)

If (LEqual (And (Local0, 0x08), Zero))

{

CNRS ()

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (NIT1, NITV)

Store (NPM1, NPMV)

Store (NPC1, NPCV)

Store (NL11, NL1V)

Store (ND21, ND2V)

Store (ND11, ND1V)

Store (NLR1, NLRV)

Store (NLD1, NLDV)

Store (NEA1, NEAV)

Store (NEB1, NEBV)

Store (NEC1, NECV)

Store (NRA1, NRAV)

Store (NMB1, NMBV)

Store (NMV1, NMVV)

Store (NPB1, NPBV)

Store (NPV1, NPVV)

Store (Zero, NCRN)

}

Device (NVM2)

{

Name (_ADR, 0x00C2FFFF) // _ADR: Address

Name (PRBI, Zero)

Name (PRBD, Zero)

Name (PCMD, Zero)

Name (NCRN, Zero)

Name (NITV, Zero)

Name (NPMV, Zero)

Name (NPCV, Zero)

Name (NL1V, Zero)

Name (ND2V, Zero)

Name (ND1V, Zero)

Name (NLRV, Zero)

Name (NLDV, Zero)

Name (NEAV, Zero)

Name (NEBV, Zero)

Name (NECV, Zero)

Name (NRAV, Zero)

Name (NMBV, Zero)

Name (NMVV, Zero)

Name (NPBV, Zero)

Name (NPVV, Zero)

Method (EPD0, 0, Serialized)

{

RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, Zero, 0x03)

}

Method (EPD3, 0, Serialized)

{

RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, 0x03, 0x03)

}

Method (CNRS, 0, Serialized)

{

If (LEqual (NITV, Zero))

{

Return (Zero)

}

RDCA (NCRN, 0x10, Zero, Zero, 0x03)

RDCA (NCRN, 0x14, Zero, Zero, 0x03)

RDCA (NCRN, 0x18, Zero, Zero, 0x03)

RDCA (NCRN, 0x1C, Zero, Zero, 0x03)

RDCA (NCRN, 0x20, Zero, Zero, 0x03)

RDCA (NCRN, 0x24, Zero, Zero, 0x03)

RDCA (NCRN, 0x04, 0xFFFFFFF8, PCMD, 0x03)

RDCA (NCRN, PRBI, Zero, PRBD, 0x03)

If (LNotEqual (NL1V, Zero))

{

RDCA (NCRN, Add (NL1V, 0x0C), 0xFFFFFF00, ND2V, 0x03)

RDCA (NCRN, Add (NL1V, 0x08), 0x0F, And (ND1V, 0xFFFFFFF0

), 0x03)

RDCA (NCRN, Add (NL1V, 0x08), 0xFFFFFFFF, ND1V, 0x03)

}

If (LNotEqual (NLRV, Zero))

{

RDCA (NCRN, Add (NLRV, 0x04), 0xFFFFFFFF, NLDV, 0x03)

}

RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFEBF, And (NEAV, 0xFFFC

), 0x03)

RDCA (NCRN, Add (NPCV, 0x28), 0xFFFFFBFF, NECV, 0x03)

RDCA (NCRN, Add (NPCV, 0x08), 0xFFFFFF1F, NEBV, 0x03)

RDCA (NCRN, 0x68, 0xFFFFFBFF, NRAV, One)

If (LEqual (And (NEAV, 0x40), 0x40))

{

RDCA (NCRN, 0x50, 0xFFFFFFDF, 0x20, One)

While (LEqual (And (RDCA (NCRN, 0x52, Zero, Zero, Zero), 0x2000

), Zero))

{

Stall (0x0A)

}

RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFFFC, And (NEAV, 0x03

), 0x03)

If (LNotEqual (NMVV, Zero))

{

RDCA (NCRN, NMBV, Zero, NMVV, 0x03)

}

If (LNotEqual (NPVV, Zero))

{

RDCA (NCRN, NPBV, Zero, NPVV, 0x03)

}

Method (_PS3, 0, Serialized) // _PS3: Power State 3

{

If (LEqual (NITV, Zero))

{

Return (Zero)

}

Store (RDCA (NCRN, 0x04, Zero, Zero, 0x02), PCMD)

If (LEqual (NITV, One))

{

Store (0x24, PRBI)

Store (RDCA (NCRN, 0x24, Zero, Zero, 0x02), PRBD)

}

Else

{

If (LEqual (NITV, 0x02))

{

Store (0x10, PRBI)

Store (RDCA (NCRN, 0x10, Zero, Zero, 0x02), PRBD)

}

EPD3 ()

RPD3 (NCRN)

}

Method (_PS0, 0, Serialized) // _PS0: Power State 0

{

If (LEqual (NITV, Zero))

{

Return (Zero)

}

RPD0 (NCRN)

EPD0 ()

Store (RDCA (NCRN, Add (NPMV, 0x04), Zero, Zero, 0x02),

Local0)

If (LEqual (And (Local0, 0x08), Zero))

{

CNRS ()

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (NIT2, NITV)

Store (NPM2, NPMV)

Store (NPC2, NPCV)

Store (NL12, NL1V)

Store (ND22, ND2V)

Store (ND12, ND1V)

Store (NLR2, NLRV)

Store (NLD2, NLDV)

Store (NEA2, NEAV)

Store (NEB2, NEBV)

Store (NEC2, NECV)

Store (NRA2, NRAV)

Store (NMB2, NMBV)

Store (NMV2, NMVV)

Store (NPB2, NPBV)

Store (NPV2, NPVV)

Store (One, NCRN)

}

Device (NVM3)

{

Name (_ADR, 0x00C3FFFF) // _ADR: Address

Name (PRBI, Zero)

Name (PRBD, Zero)

Name (PCMD, Zero)

Name (NCRN, Zero)

Name (NITV, Zero)

Name (NPMV, Zero)

Name (NPCV, Zero)

Name (NL1V, Zero)

Name (ND2V, Zero)

Name (ND1V, Zero)

Name (NLRV, Zero)

Name (NLDV, Zero)

Name (NEAV, Zero)

Name (NEBV, Zero)

Name (NECV, Zero)

Name (NRAV, Zero)

Name (NMBV, Zero)

Name (NMVV, Zero)

Name (NPBV, Zero)

Name (NPVV, Zero)

Method (EPD0, 0, Serialized)

{

RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, Zero, 0x03)

}

Method (EPD3, 0, Serialized)

{

RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, 0x03, 0x03)

}

Method (CNRS, 0, Serialized)

{

If (LEqual (NITV, Zero))

{

Return (Zero)

}

RDCA (NCRN, 0x10, Zero, Zero, 0x03)

RDCA (NCRN, 0x14, Zero, Zero, 0x03)

RDCA (NCRN, 0x18, Zero, Zero, 0x03)

RDCA (NCRN, 0x1C, Zero, Zero, 0x03)

RDCA (NCRN, 0x20, Zero, Zero, 0x03)

RDCA (NCRN, 0x24, Zero, Zero, 0x03)

RDCA (NCRN, 0x04, 0xFFFFFFF8, PCMD, 0x03)

RDCA (NCRN, PRBI, Zero, PRBD, 0x03)

If (LNotEqual (NL1V, Zero))

{

RDCA (NCRN, Add (NL1V, 0x0C), 0xFFFFFF00, ND2V, 0x03)

RDCA (NCRN, Add (NL1V, 0x08), 0x0F, And (ND1V, 0xFFFFFFF0

), 0x03)

RDCA (NCRN, Add (NL1V, 0x08), 0xFFFFFFFF, ND1V, 0x03)

}

If (LNotEqual (NLRV, Zero))

{

RDCA (NCRN, Add (NLRV, 0x04), 0xFFFFFFFF, NLDV, 0x03)

}

RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFEBF, And (NEAV, 0xFFFC

), 0x03)

RDCA (NCRN, Add (NPCV, 0x28), 0xFFFFFBFF, NECV, 0x03)

RDCA (NCRN, Add (NPCV, 0x08), 0xFFFFFF1F, NEBV, 0x03)

RDCA (NCRN, 0x68, 0xFFFFFBFF, NRAV, One)

If (LEqual (And (NEAV, 0x40), 0x40))

{

RDCA (NCRN, 0x50, 0xFFFFFFDF, 0x20, One)

While (LEqual (And (RDCA (NCRN, 0x52, Zero, Zero, Zero), 0x2000

), Zero))

{

Stall (0x0A)

}

RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFFFC, And (NEAV, 0x03

), 0x03)

If (LNotEqual (NMVV, Zero))

{

RDCA (NCRN, NMBV, Zero, NMVV, 0x03)

}

If (LNotEqual (NPVV, Zero))

{

RDCA (NCRN, NPBV, Zero, NPVV, 0x03)

}

Method (_PS3, 0, Serialized) // _PS3: Power State 3

{

If (LEqual (NITV, Zero))

{

Return (Zero)

}

Store (RDCA (NCRN, 0x04, Zero, Zero, 0x02), PCMD)

If (LEqual (NITV, One))

{

Store (0x24, PRBI)

Store (RDCA (NCRN, 0x24, Zero, Zero, 0x02), PRBD)

}

Else

{

If (LEqual (NITV, 0x02))

{

Store (0x10, PRBI)

Store (RDCA (NCRN, 0x10, Zero, Zero, 0x02), PRBD)

}

EPD3 ()

RPD3 (NCRN)

}

Method (_PS0, 0, Serialized) // _PS0: Power State 0

{

If (LEqual (NITV, Zero))

{

Return (Zero)

}

RPD0 (NCRN)

EPD0 ()

Store (RDCA (NCRN, Add (NPMV, 0x04), Zero, Zero, 0x02),

Local0)

If (LEqual (And (Local0, 0x08), Zero))

{

CNRS ()

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (NIT3, NITV)

Store (NPM3, NPMV)

Store (NPC3, NPCV)

Store (NL13, NL1V)

Store (ND23, ND2V)

Store (ND13, ND1V)

Store (NLR3, NLRV)

Store (NLD3, NLDV)

Store (NEA3, NEAV)

Store (NEB3, NEBV)

Store (NEC3, NECV)

Store (NRA3, NRAV)

Store (NMB3, NMBV)

Store (NMV3, NMVV)

Store (NPB3, NPBV)

Store (NPV3, NPVV)

Store (0x02, NCRN)

}

Device (CIO2)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (CIOE, One))

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Name (_HID, "INT343E") // _HID: Hardware ID

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Name (CBUF, ResourceTemplate ()

{

Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, _Y2A)

{

0x00000010,

}

Memory32Fixed (ReadWrite,

0xFE400000, // Address Base

0x00010000, // Address Length

)

})

CreateDWordField (CBUF, \_SB.PCI0.CIO2._CRS._Y2A._INT, CIOV) // _INT: Interrupts

Store (CIOI, CIOV)

Return (CBUF)

}

Device (TERM)

{

Name (_HID, "INT343D") // _HID: Hardware ID

Name (_UID, One) // _UID: Unique ID

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Name (RBUF, ResourceTemplate ()

{

Memory32Fixed (ReadWrite,

0xFE03C000, // Address Base

0x00001000, // Address Length

)

Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, _Y2B)

{

0x00000012,

}

})

CreateDWordField (RBUF, \_SB.PCI0.TERM._CRS._Y2B._INT, IRQN) // _INT: Interrupts

Store (TIRQ, IRQN)

Return (RBUF)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (TAEN, Zero))

{

Return (Zero)

}

If (LEqual (TIRQ, Zero))

{

Return (Zero)

}

Return (0x0F)

}

Scope (_SB.PCI0)

{

Method (LPD3, 1, Serialized)

{

OperationRegion (ICB1, SystemMemory, Add (Arg0, 0x84), 0x04)

Field (ICB1, DWordAcc, NoLock, Preserve)

{

TEMP, 32

}

Or (TEMP, 0x03, TEMP)

Store (TEMP, Local0)

}

Method (LHRV, 1, Serialized)

{

OperationRegion (ICB1, SystemMemory, Add (Arg0, 0x08), 0x04)

Field (ICB1, DWordAcc, NoLock, Preserve)

{

HRV, 8

}

Return (HRV)

}

Method (LPD0, 1, Serialized)

{

OperationRegion (ICB1, SystemMemory, Add (Arg0, 0x84), 0x04)

Field (ICB1, DWordAcc, NoLock, Preserve)

{

TEMP, 32

}

And (TEMP, 0xFFFFFFFC, TEMP)

Store (TEMP, Local0)

}

Method (GETD, 1, Serialized)

{

OperationRegion (ICB1, SystemMemory, Add (Arg0, 0x84), 0x04)

Field (ICB1, DWordAcc, NoLock, Preserve)

{

TEMP, 32

}

Return (And (TEMP, 0x03))

}

Method (LCRS, 3, Serialized)

{

Name (RBUF, ResourceTemplate ()

{

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00001000, // Address Length

_Y2C)

Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, _Y2D)

{

0x00000014,

}

})

CreateDWordField (RBUF, \_SB.PCI0.LCRS._Y2C._BAS, BVAL) // _BAS: Base Address

CreateDWordField (RBUF, \_SB.PCI0.LCRS._Y2C._LEN, BLEN) // _LEN: Length

CreateDWordField (RBUF, \_SB.PCI0.LCRS._Y2D._INT, IRQN) // _INT: Interrupts

Store (Arg1, BVAL)

Store (Arg2, IRQN)

If (LEqual (Arg0, 0x04))

{

Store (0x08, BLEN)

}

Return (RBUF)

}

Method (LSTA, 1, Serialized)

{

If (LOr (LEqual (Arg0, Zero), LEqual (Arg0, 0x03)))

{

Return (Zero)

}

If (LLess (OSYS, 0x07DC))

{

Return (Zero)

}

Return (0x0F)

}

Method (GIRQ, 1, Serialized)

{

Return (Add (0x18, Mod (Arg0, 0x60)))

}

Scope (_SB.PCI0)

{

Device (SIRC)

{

Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID

Name (_STA, 0x03) // _STA: Status

Name (_UID, 0x05) // _UID: Unique ID

Method (ADDB, 3, Serialized)

{

Name (BUFF, ResourceTemplate ()

{

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00001000, // Address Length

_Y2E)

})

CreateDWordField (BUFF, \_SB.PCI0.SIRC.ADDB._Y2E._BAS, ADDR) // _BAS: Base Address

CreateDWordField (BUFF, \_SB.PCI0.SIRC.ADDB._Y2E._LEN, LENG) // _LEN: Length

Store (ResourceTemplate ()

{

}, Local0)

If (LOr (LOr (LEqual (Arg0, One), LEqual (Arg0, 0x03)), LEqual (

Arg0, 0x04)))

{

Store (Arg2, ADDR)

ConcatenateResTemplate (Local0, BUFF, Local0)

}

If (LEqual (Arg0, 0x03))

{

Store (Arg1, ADDR)

ConcatenateResTemplate (Local0, BUFF, Local0)

}

If (LEqual (Arg0, 0x04))

{

Store (Add (0x08, Arg1), ADDR)

Store (0x0FF8, LENG)

ConcatenateResTemplate (Local0, BUFF, Local0)

}

Return (Local0)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

ConcatenateResTemplate (Local0, ADDB (SMD0, SB00, SB10), Local0)

ConcatenateResTemplate (Local0, ADDB (SMD1, SB01, SB11), Local0)

ConcatenateResTemplate (Local0, ADDB (SMD2, SB02, SB12), Local0)

ConcatenateResTemplate (Local0, ADDB (SMD3, SB03, SB13), Local0)

ConcatenateResTemplate (Local0, ADDB (SMD4, SB04, SB14), Local0)

ConcatenateResTemplate (Local0, ADDB (SMD5, SB05, SB15), Local0)

ConcatenateResTemplate (Local0, ADDB (SMD6, SB06, SB16), Local0)

ConcatenateResTemplate (Local0, ADDB (SMD7, SB07, SB17), Local0)

ConcatenateResTemplate (Local0, ADDB (SMD8, SB08, SB18), Local0)

ConcatenateResTemplate (Local0, ADDB (SMD9, SB09, SB19), Local0)

ConcatenateResTemplate (Local0, ADDB (SMDA, SB0A, SB1A), Local0)

If (LEqual (^^GPI0._STA (), Zero))

{

ConcatenateResTemplate (Local0, ^^GPI0._CRS (), Local0)

}

Return (Local0)

}

Device (GPI0)

{

Method (_HID, 0, NotSerialized) // _HID: Hardware ID

{

If (LEqual (PCHV (), SPTH))

{

Return ("INT345D")

}

Return ("INT344B")

}

Name (LINK, "\\_SB.PCI0.GPI0")

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Name (RBUF, ResourceTemplate ()

{

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00010000, // Address Length

_Y2F)

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00010000, // Address Length

_Y30)

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00010000, // Address Length

_Y31)

Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, _Y32)

{

0x0000000E,

}

})

CreateDWordField (RBUF, \_SB.PCI0.GPI0._CRS._Y2F._BAS, COM0) // _BAS: Base Address

CreateDWordField (RBUF, \_SB.PCI0.GPI0._CRS._Y30._BAS, COM1) // _BAS: Base Address

CreateDWordField (RBUF, \_SB.PCI0.GPI0._CRS._Y31._BAS, COM3) // _BAS: Base Address

CreateDWordField (RBUF, \_SB.PCI0.GPI0._CRS._Y32._INT, IRQN) // _INT: Interrupts

Store (Add (SBRG, 0x00AF0000), COM0)

Store (Add (SBRG, 0x00AE0000), COM1)

Store (Add (SBRG, 0x00AC0000), COM3)

Store (SGIR, IRQN)

Return (RBUF)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (SBRG, Zero))

{

Return (Zero)

}

If (LEqual (GPEN, Zero))

{

Return (Zero)

}

Return (0x0F)

}

Scope (_SB.PCI0)

{

Device (I2C0)

{

Name (LINK, "\\_SB.PCI0.I2C0")

}

If (LNotEqual (SMD0, 0x02))

{

Scope (_SB.PCI0.I2C0)

{

Name (_HID, "INT3442") // _HID: Hardware ID

Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision

{

Return (LHRV (SB10))

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Return (LCRS (SMD0, SB00, SIR0))

}

Method (_PSC, 0, NotSerialized) // _PSC: Power State Current

{

GETD (SB10)

}

Method (_PS0, 0, NotSerialized) // _PS0: Power State 0

{

LPD0 (SB10)

}

Method (_PS3, 0, NotSerialized) // _PS3: Power State 3

{

LPD3 (SB10)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (LSTA (SMD0))

}

If (LEqual (SMD0, 0x02))

{

Scope (_SB.PCI0.I2C0)

{

Name (_ADR, 0x00150000) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

Scope (_SB.PCI0)

{

Device (I2C1)

{

Name (LINK, "\\_SB.PCI0.I2C1")

}

If (LNotEqual (SMD1, 0x02))

{

Scope (_SB.PCI0.I2C1)

{

Name (_HID, "INT3443") // _HID: Hardware ID

Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision

{

Return (LHRV (SB11))

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Return (LCRS (SMD1, SB01, SIR1))

}

Method (_PSC, 0, NotSerialized) // _PSC: Power State Current

{

GETD (SB11)

}

Method (_PS0, 0, NotSerialized) // _PS0: Power State 0

{

LPD0 (SB11)

}

Method (_PS3, 0, NotSerialized) // _PS3: Power State 3

{

LPD3 (SB11)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (LSTA (SMD1))

}

If (LEqual (SMD1, 0x02))

{

Scope (_SB.PCI0.I2C1)

{

Name (_ADR, 0x00150001) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

Scope (_SB.PCI0)

{

Device (I2C2)

{

Name (LINK, "\\_SB.PCI0.I2C2")

}

If (LNotEqual (SMD2, 0x02))

{

Scope (_SB.PCI0.I2C2)

{

Name (_HID, "INT3444") // _HID: Hardware ID

Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision

{

Return (LHRV (SB12))

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Return (LCRS (SMD2, SB02, SIR2))

}

Method (_PSC, 0, NotSerialized) // _PSC: Power State Current

{

GETD (SB12)

}

Method (_PS0, 0, NotSerialized) // _PS0: Power State 0

{

LPD0 (SB12)

}

Method (_PS3, 0, NotSerialized) // _PS3: Power State 3

{

LPD3 (SB12)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (LSTA (SMD2))

}

If (LEqual (SMD2, 0x02))

{

Scope (_SB.PCI0.I2C2)

{

Name (_ADR, 0x00150002) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

Scope (_SB.PCI0)

{

Device (I2C3)

{

Name (LINK, "\\_SB.PCI0.I2C3")

}

If (LNotEqual (SMD3, 0x02))

{

Scope (_SB.PCI0.I2C3)

{

Name (_HID, "INT3445") // _HID: Hardware ID

Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision

{

Return (LHRV (SB13))

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Return (LCRS (SMD3, SB03, SIR3))

}

Method (_PSC, 0, NotSerialized) // _PSC: Power State Current

{

GETD (SB13)

}

Method (_PS0, 0, NotSerialized) // _PS0: Power State 0

{

LPD0 (SB13)

}

Method (_PS3, 0, NotSerialized) // _PS3: Power State 3

{

LPD3 (SB13)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (LSTA (SMD3))

}

If (LEqual (SMD3, 0x02))

{

Scope (_SB.PCI0.I2C3)

{

Name (_ADR, 0x00150003) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

Scope (_SB.PCI0)

{

Device (I2C4)

{

Name (LINK, "\\_SB.PCI0.I2C4")

}

If (LNotEqual (SMD4, 0x02))

{

Scope (_SB.PCI0.I2C4)

{

Name (_HID, "INT3446") // _HID: Hardware ID

Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision

{

Return (LHRV (SB14))

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Return (LCRS (SMD4, SB04, SIR4))

}

Method (_PSC, 0, NotSerialized) // _PSC: Power State Current

{

GETD (SB14)

}

Method (_PS0, 0, NotSerialized) // _PS0: Power State 0

{

LPD0 (SB14)

}

Method (_PS3, 0, NotSerialized) // _PS3: Power State 3

{

LPD3 (SB14)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (LSTA (SMD4))

}

If (LEqual (SMD4, 0x02))

{

Scope (_SB.PCI0.I2C4)

{

Name (_ADR, 0x00190002) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

Scope (_SB.PCI0)

{

Device (I2C5)

{

Name (LINK, "\\_SB.PCI0.I2C5")

}

If (LNotEqual (SMD5, 0x02))

{

Scope (_SB.PCI0.I2C5)

{

Name (_HID, "INT3447") // _HID: Hardware ID

Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision

{

Return (LHRV (SB15))

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Return (LCRS (SMD5, SB05, SIR5))

}

Method (_PSC, 0, NotSerialized) // _PSC: Power State Current

{

GETD (SB15)

}

Method (_PS0, 0, NotSerialized) // _PS0: Power State 0

{

LPD0 (SB15)

}

Method (_PS3, 0, NotSerialized) // _PS3: Power State 3

{

LPD3 (SB15)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (LSTA (SMD5))

}

If (LEqual (SMD5, 0x02))

{

Scope (_SB.PCI0.I2C5)

{

Name (_ADR, 0x00190001) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

Scope (_SB.PCI0)

{

Device (SPI0)

{

}

If (LNotEqual (SMD6, 0x02))

{

Scope (_SB.PCI0.SPI0)

{

Name (_HID, "INT3440") // _HID: Hardware ID

Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision

{

Return (LHRV (SB16))

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Return (LCRS (SMD6, SB06, SIR6))

}

Method (_PSC, 0, NotSerialized) // _PSC: Power State Current

{

GETD (SB16)

}

Method (_PS0, 0, NotSerialized) // _PS0: Power State 0

{

LPD0 (SB16)

}

Method (_PS3, 0, NotSerialized) // _PS3: Power State 3

{

LPD3 (SB16)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (LSTA (SMD6))

}

If (LEqual (SMD6, 0x02))

{

Scope (_SB.PCI0.SPI0)

{

Name (_ADR, 0x001E0002) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

Scope (_SB.PCI0)

{

Device (SPI1)

{

}

If (LNotEqual (SMD7, 0x02))

{

Scope (_SB.PCI0.SPI1)

{

Name (_HID, "INT3441") // _HID: Hardware ID

Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision

{

Return (LHRV (SB17))

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Return (LCRS (SMD7, SB07, SIR7))

}

Method (_PSC, 0, NotSerialized) // _PSC: Power State Current

{

GETD (SB17)

}

Method (_PS0, 0, NotSerialized) // _PS0: Power State 0

{

LPD0 (SB17)

}

Method (_PS3, 0, NotSerialized) // _PS3: Power State 3

{

LPD3 (SB17)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (LSTA (SMD7))

}

If (LEqual (SMD7, 0x02))

{

Scope (_SB.PCI0.SPI1)

{

Name (_ADR, 0x001E0003) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

Scope (_SB.PCI0)

{

Device (UA00)

{

}

If (LNotEqual (SMD8, 0x02))

{

Scope (_SB.PCI0.UA00)

{

Method (_HID, 0, NotSerialized) // _HID: Hardware ID

{

If (LNotEqual (SMD9, 0x04))

{

Return ("INT3448")

}

Else

{

Return (0x020CD041)

}

Name (_UID, "SerialIoUart0") // _UID: Unique ID

Name (_DDN, "SerialIoUart0") // _DDN: DOS Device Name

Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision

{

Return (LHRV (SB18))

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Return (LCRS (SMD8, SB08, SIR8))

}

Method (_PSC, 0, NotSerialized) // _PSC: Power State Current

{

GETD (SB18)

}

Method (_PS0, 0, NotSerialized) // _PS0: Power State 0

{

If (LNotEqual (SMD8, 0x04))

{

LPD0 (SB18)

}

Method (_PS3, 0, NotSerialized) // _PS3: Power State 3

{

If (LNotEqual (SMD8, 0x04))

{

LPD3 (SB18)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (LSTA (SMD8))

}

If (LEqual (SMD8, 0x02))

{

Scope (_SB.PCI0.UA00)

{

Name (_ADR, 0x001E0000) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

Scope (_SB.PCI0)

{

Device (UA01)

{

}

If (LNotEqual (SMD9, 0x02))

{

Scope (_SB.PCI0.UA01)

{

Method (_HID, 0, NotSerialized) // _HID: Hardware ID

{

If (LNotEqual (SMD9, 0x04))

{

Return ("INT3449")

}

Else

{

Return (0x020CD041)

}

Name (_UID, "SerialIoUart1") // _UID: Unique ID

Name (_DDN, "SerialIoUart1") // _DDN: DOS Device Name

Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision

{

Return (LHRV (SB19))

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Return (LCRS (SMD9, SB09, SIR9))

}

Method (_PSC, 0, NotSerialized) // _PSC: Power State Current

{

GETD (SB19)

}

Method (_PS0, 0, NotSerialized) // _PS0: Power State 0

{

If (LNotEqual (SMD9, 0x04))

{

LPD0 (SB19)

}

Method (_PS3, 0, NotSerialized) // _PS3: Power State 3

{

If (LNotEqual (SMD9, 0x04))

{

LPD3 (SB19)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (LSTA (SMD9))

}

If (LEqual (SMD9, 0x02))

{

Scope (_SB.PCI0.UA01)

{

Name (_ADR, 0x001E0001) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

Scope (_SB.PCI0)

{

Device (UA02)

{

}

If (LNotEqual (SMDA, 0x02))

{

Scope (_SB.PCI0.UA02)

{

Method (_HID, 0, NotSerialized) // _HID: Hardware ID

{

If (LNotEqual (SMDA, 0x04))

{

Return ("INT344A")

}

Else

{

Return (0x020CD041)

}

Name (_UID, "SerialIoUart2") // _UID: Unique ID

Name (_DDN, "SerialIoUart2") // _DDN: DOS Device Name

Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision

{

Return (LHRV (SB1A))

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Return (LCRS (SMDA, SB0A, SIRA))

}

Method (_PSC, 0, NotSerialized) // _PSC: Power State Current

{

GETD (SB1A)

}

Method (_PS0, 0, NotSerialized) // _PS0: Power State 0

{

If (LNotEqual (SMDA, 0x04))

{

LPD0 (SB1A)

}

Method (_PS3, 0, NotSerialized) // _PS3: Power State 3

{

If (LNotEqual (SMDA, 0x04))

{

LPD3 (SB1A)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (LSTA (SMDA))

}

If (LEqual (SMDA, 0x02))

{

Scope (_SB.PCI0.UA02)

{

Name (_ADR, 0x00190000) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

Scope (_SB.PCI0)

{

Name (HIDG, Buffer (0x10)

{

/* 0000 */ 0xF7, 0xF6, 0xDF, 0x3C, 0x67, 0x42, 0x55, 0x45,

/* 0008 */ 0xAD, 0x05, 0xB3, 0x0A, 0x3D, 0x89, 0x38, 0xDE

})

Name (TP7G, Buffer (0x10)

{

/* 0000 */ 0x82, 0xEB, 0x87, 0xEF, 0x51, 0xF9, 0xDA, 0x46,

/* 0008 */ 0x84, 0xEC, 0x14, 0x87, 0x1A, 0xC6, 0xF8, 0x4B

})

Method (HIDD, 5, Serialized)

{

If (LEqual (Arg0, HIDG))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, One))

{

Return (Buffer (One)

{

0x03

})

}

If (LEqual (Arg2, One))

{

Return (Arg4)

}

Return (Buffer (One)

{

0x00

})

}

Method (TP7D, 6, Serialized)

{

If (LEqual (Arg0, TP7G))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, One))

{

Return (Buffer (One)

{

0x03

})

}

If (LEqual (Arg2, One))

{

Return (ConcatenateResTemplate (Arg4, Arg5))

}

Return (Buffer (One)

{

0x00

})

}

Scope (_SB.PCI0.I2C0)

{

Device (TPD0)

{

Name (HID2, Zero)

Name (SBFB, ResourceTemplate ()

{

I2cSerialBus (0x0020, ControllerInitiated, 0x00061A80,

AddressingMode7Bit, "\\_SB.PCI0.I2C0",

0x00, ResourceConsumer, _Y33,

)

})

Name (SBFI, ResourceTemplate ()

{

Interrupt (ResourceConsumer, Level, ActiveLow, ExclusiveAndWake, ,, _Y34)

{

0x00000000,

}

})

Name (SBFG, ResourceTemplate ()

{

GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0000

}

})

CreateWordField (SBFB, \_SB.PCI0.I2C0.TPD0._Y33._ADR, BADR) // _ADR: Address

CreateDWordField (SBFB, \_SB.PCI0.I2C0.TPD0._Y33._SPE, SPED) // _SPE: Speed

CreateWordField (SBFG, 0x17, INT1)

CreateDWordField (SBFI, \_SB.PCI0.I2C0.TPD0._Y34._INT, INT2) // _INT: Interrupts

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

If (LLess (OSYS, 0x07DC))

{

SRXO (GPDI, One)

}

Store (GNUM (GPDI), INT1)

Store (INUM (GPDI), INT2)

If (LEqual (SDM0, Zero))

{

SHPO (GPDI, One)

}

If (LEqual (SDS0, One))

{

Store ("SYNA2393", _HID)

Store (0x20, HID2)

Return (Zero)

}

If (LEqual (SDS0, 0x02))

{

Store ("06CB2846", _HID)

Store (0x20, HID2)

Return (Zero)

}

If (LEqual (SDS0, 0x05))

{

Store ("CUST0001", _HID)

Store (TPDH, HID2)

Store (TPDB, BADR)

If (LEqual (TPDS, Zero))

{

Store (0x000186A0, SPED)

}

If (LEqual (TPDS, One))

{

Store (0x00061A80, SPED)

}

If (LEqual (TPDS, 0x02))

{

Store (0x000F4240, SPED)

}

Return (Zero)

}

Name (_HID, "XXXX0000") // _HID: Hardware ID

Name (_CID, "PNP0C50") // _CID: Compatible ID

Name (_S0W, 0x03) // _S0W: S0 Device Wake State

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, HIDG))

{

Return (HIDD (Arg0, Arg1, Arg2, Arg3, HID2))

}

If (LEqual (Arg0, TP7G))

{

Return (TP7D (Arg0, Arg1, Arg2, Arg3, SBFB, SBFG))

}

Return (Buffer (One)

{

0x00

})

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LOr (LEqual (SDS0, 0x05), LOr (LEqual (SDS0, One), LEqual (

SDS0, 0x02))))

{

Return (0x0F)

}

Return (Zero)

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

If (LLess (OSYS, 0x07DC))

{

Return (SBFI)

}

If (LEqual (SDM0, Zero))

{

Return (ConcatenateResTemplate (SBFB, SBFG))

}

Return (ConcatenateResTemplate (SBFB, SBFI))

}

Device (HDAC)

{

Name (_HID, "INT0000") // _HID: Hardware ID

Name (_CID, "INT0000") // _CID: Compatible ID

Name (_DDN, "Intel(R) Smart Sound Technology Audio Codec") // _DDN: DOS Device Name

Name (_UID, One) // _UID: Unique ID

Name (CADR, Zero)

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

If (LEqual (I2SC, One))

{

Store ("INT3439", _HID)

Store ("INT3439", _CID)

Store (0x1A, CADR)

Return (Zero)

}

If (LEqual (I2SC, 0x02))

{

Store ("INT343A", _HID)

Store ("INT343A", _CID)

Store (0x1C, CADR)

Return (Zero)

}

If (LEqual (I2SC, 0x03))

{

Store ("INT343B", _HID)

Store ("INT343B", _CID)

Store (0x34, CADR)

Return (Zero)

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Name (SBFB, ResourceTemplate ()

{

I2cSerialBus (0x0000, ControllerInitiated, 0x00061A80,

AddressingMode7Bit, "\\_SB.PCI0.I2C0",

0x00, ResourceConsumer, _Y35,

)

})

Name (SBFI, ResourceTemplate ()

{

Interrupt (ResourceConsumer, Level, ActiveLow, ExclusiveAndWake, ,, _Y36)

{

0x00000000,

}

})

CreateWordField (SBFB, \_SB.PCI0.I2C0.HDAC._CRS._Y35._ADR, ADR) // _ADR: Address

Store (CADR, ADR)

CreateDWordField (SBFI, \_SB.PCI0.I2C0.HDAC._CRS._Y36._INT, AINT) // _INT: Interrupts

Store (INUM (0x02040016), AINT)

If (LEqual (BID, 0x20))

{

Return (SBFB)

}

Return (ConcatenateResTemplate (SBFB, SBFI))

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LNotEqual (I2SC, Zero))

{

Return (0x0F)

}

Return (Zero)

}

Scope (_SB.PCI0.I2C1)

{

Device (TPL1)

{

Name (HID2, Zero)

Name (SBFB, ResourceTemplate ()

{

I2cSerialBus (0x004C, ControllerInitiated, 0x00061A80,

AddressingMode7Bit, "\\_SB.PCI0.I2C1",

0x00, ResourceConsumer, _Y37,

)

})

Name (SBFG, ResourceTemplate ()

{

GpioInt (Level, ActiveLow, Exclusive, PullDefault, 0x0000,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0000

}

})

Name (SBFI, ResourceTemplate ()

{

Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, _Y38)

{

0x00000000,

}

})

CreateWordField (SBFB, \_SB.PCI0.I2C1.TPL1._Y37._ADR, BADR) // _ADR: Address

CreateDWordField (SBFB, \_SB.PCI0.I2C1.TPL1._Y37._SPE, SPED) // _SPE: Speed

CreateDWordField (SBFI, \_SB.PCI0.I2C1.TPL1._Y38._INT, INT2) // _INT: Interrupts

CreateWordField (SBFG, 0x17, INT1)

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

If (LLess (OSYS, 0x07DC))

{

SRXO (GPLI, One)

}

Store (GNUM (GPLI), INT1)

Store (INUM (GPLI), INT2)

If (LEqual (SDM1, Zero))

{

SHPO (GPLI, One)

}

If (LEqual (SDS1, One))

{

Store ("ATML3432", _HID)

Store (Zero, HID2)

Store (0x4C, BADR)

Store (0x00061A80, SPED)

Return (Zero)

}

If (LEqual (SDS1, 0x02))

{

Store ("ATML2952", _HID)

Store (Zero, HID2)

Store (0x4A, BADR)

Store (0x00061A80, SPED)

Return (Zero)

}

If (LEqual (SDS1, 0x03))

{

Store ("ELAN2097", _HID)

Store (One, HID2)

Store (0x10, BADR)

Store (0x00061A80, SPED)

Return (Zero)

}

If (LEqual (SDS1, 0x04))

{

Store ("NTRG0001", _HID)

Store (One, HID2)

Store (0x07, BADR)

Store (0x00061A80, SPED)

Return (Zero)

}

If (LEqual (SDS1, 0x05))

{

Store ("NTRG0002", _HID)

Store (One, HID2)

Store (0x64, BADR)

Store (0x00061A80, SPED)

Return (Zero)

}

If (LEqual (SDS1, 0x06))

{

Store ("CUST0000", _HID)

Store (TPLH, HID2)

Store (TPLB, BADR)

If (LEqual (TPLS, Zero))

{

Store (0x000186A0, SPED)

}

If (LEqual (TPLS, One))

{

Store (0x00061A80, SPED)

}

If (LEqual (TPLS, 0x02))

{

Store (0x000F4240, SPED)

}

Return (Zero)

}

Name (_HID, "XXXX0000") // _HID: Hardware ID

Name (_CID, "PNP0C50") // _CID: Compatible ID

Name (_S0W, 0x04) // _S0W: S0 Device Wake State

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, HIDG))

{

Return (HIDD (Arg0, Arg1, Arg2, Arg3, HID2))

}

If (LEqual (Arg0, TP7G))

{

Return (TP7D (Arg0, Arg1, Arg2, Arg3, SBFB, SBFG))

}

Return (Buffer (One)

{

0x00

})

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LNotEqual (SDS1, Zero))

{

Return (0x0F)

}

Return (Zero)

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

If (LLess (OSYS, 0x07DC))

{

Return (SBFI)

}

If (LEqual (SDM1, Zero))

{

Return (ConcatenateResTemplate (SBFB, SBFG))

}

Return (ConcatenateResTemplate (SBFB, SBFI))

}

Device (IMP3)

{

Name (_ADR, Zero) // _ADR: Address

Name (_HID, "IMPJ0003") // _HID: Hardware ID

Name (_CID, "IMPJ0003") // _CID: Compatible ID

Name (_UID, One) // _UID: Unique ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (BID, 0x20))

{

Return (0x0F)

}

Return (Zero)

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Name (SBUF, ResourceTemplate ()

{

I2cSerialBus (0x006E, ControllerInitiated, 0x00061A80,

AddressingMode7Bit, "\\_SB.PCI0.I2C1",

0x00, ResourceConsumer, ,

)

})

Return (SBUF)

}

Scope (_SB.PCI0.SPI1)

{

Device (FPNT)

{

Method (_HID, 0, NotSerialized) // _HID: Hardware ID

{

If (LEqual (SDS7, One))

{

Return ("FPC1011")

}

If (LEqual (SDS7, 0x02))

{

Return ("FPC1020")

}

If (LEqual (SDS7, 0x03))

{

Return ("VFSI6101")

}

If (LEqual (SDS7, 0x04))

{

Return ("VFSI7500")

}

If (LEqual (SDS7, 0x05))

{

Return ("EGIS0300")

}

If (LEqual (SDS7, 0x06))

{

Return ("FPC1021")

}

Return ("FPNT_DIS")

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

SHPO (GFPI, One)

SHPO (GFPS, One)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LNotEqual (SDS7, Zero))

{

Return (0x0F)

}

Return (Zero)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

Name (BBUF, ResourceTemplate ()

{

SpiSerialBus (0x0000, PolarityLow, FourWireMode, 0x08,

ControllerInitiated, 0x00989680, ClockPolarityLow,

ClockPhaseFirst, "\\_SB.PCI0.SPI1",

0x00, ResourceConsumer, _Y39,

)

GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0008

}

})

Name (IBUF, ResourceTemplate ()

{

Interrupt (ResourceConsumer, Level, ActiveLow, ExclusiveAndWake, ,, _Y3A)

{

0x00000000,

}

})

Name (GBUF, ResourceTemplate ()

{

GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, _Y3B,

)

{ // Pin list

0x0000

}

})

Name (UBUF, ResourceTemplate ()

{

GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionInputOnly,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0000

}

})

CreateDWordField (BBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y39._SPE, SPEX) // _SPE: Speed

CreateByteField (BBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y39._PHA, PHAX) // _PHA: Clock Phase

CreateWordField (BBUF, 0x3B, SPIN)

CreateWordField (GBUF, 0x17, GPIN)

CreateDWordField (IBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y3A._INT, IPIN) // _INT: Interrupts

CreateBitField (IBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y3A._LL, ILVL) // _LL_: Low Level

CreateBitField (IBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y3A._HE, ITRG) // _HE_: High-Edge

CreateField (GBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y3B._POL, 0x02, GLVL) // _POL: Polarity

CreateBitField (GBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y3B._MOD, GTRG) // _MOD: Mode

CreateBitField (BBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y39._DPL, SCSP) // _DPL: Device Selection Polarity

CreateWordField (UBUF, 0x17, UPIN)

Store (GNUM (GFPS), SPIN)

Store (GNUM (GFPI), GPIN)

Store (INUM (GFPI), IPIN)

Store (GNUM (GFPI), UPIN)

If (LOr (LEqual (SDS7, 0x02), LEqual (SDS7, 0x06)))

{

Store (Zero, ILVL)

Store (One, ITRG)

Store (Zero, GLVL)

Store (One, GTRG)

}

If (LEqual (SDS7, 0x04))

{

Store (Zero, ILVL)

Store (One, ITRG)

}

While (One)

{

Store (SDS7, _T_0)

If (LEqual (_T_0, One))

{

Store (0x00989680, SPEX)

Store (Zero, PHAX)

}

Else

{

If (LEqual (_T_0, 0x02))

{

Store (0x002DC6C0, SPEX)

Store (Zero, PHAX)

}

Else

{

If (LEqual (_T_0, 0x03))

{

Store (0x007A1200, SPEX)

Store (One, PHAX)

}

Else

{

If (LEqual (_T_0, 0x04))

{

Store (0x007A1200, SPEX)

Store (Zero, PHAX)

}

Else

{

If (LEqual (_T_0, 0x05))

{

Store (0x00F42400, SPEX)

Store (Zero, PHAX)

}

Else

{

If (LEqual (_T_0, 0x06))

{

Store (0x002DC6C0, SPEX)

Store (Zero, PHAX)

}

Else

{

}

Break

}

If (LEqual (SDS7, One))

{

Return (BBUF)

}

If (LAnd (LEqual (SDS7, 0x04), LEqual (SDM7, Zero)))

{

Return (ConcatenateResTemplate (BBUF, ConcatenateResTemplate (UBUF, GBUF)))

}

If (LAnd (LEqual (SDS7, 0x04), LNotEqual (SDM7, Zero)))

{

Return (ConcatenateResTemplate (BBUF, ConcatenateResTemplate (UBUF, IBUF)))

}

If (LEqual (SDM7, Zero))

{

Return (ConcatenateResTemplate (BBUF, GBUF))

}

Return (ConcatenateResTemplate (BBUF, IBUF))

}

Scope (_SB.PCI0.UA00)

{

Device (BTH0)

{

Method (_HID, 0, NotSerialized) // _HID: Hardware ID

{

If (LEqual (SDS8, One))

{

Return ("INT33E1")

}

If (LEqual (SDS8, 0x02))

{

Return ("BCM2E40")

}

Return ("INT33E1")

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

SHPO (GBTI, One)

SHPO (GBTW, One)

SHPO (GBTK, One)

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Name (SBFG, ResourceTemplate ()

{

UartSerialBus (0x0001C200, DataBitsEight, StopBitsOne,

0xC0, LittleEndian, ParityTypeNone, FlowControlHardware,

0x0020, 0x0020, "\\_SB.PCI0.UA00",

0x00, ResourceConsumer, ,

)

GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0000

}

GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0000

}

GpioInt (Edge, ActiveLow, Exclusive, PullDefault, 0x0000,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0000

}

})

CreateWordField (SBFG, 0x8C, INT3)

CreateWordField (SBFG, 0x3C, WAK3)

CreateWordField (SBFG, 0x64, KIL3)

Store (GNUM (GBTI), INT3)

Store (GNUM (GBTW), WAK3)

Store (GNUM (GBTK), KIL3)

Name (SBFI, ResourceTemplate ()

{

UartSerialBus (0x0001C200, DataBitsEight, StopBitsOne,

0xC0, LittleEndian, ParityTypeNone, FlowControlHardware,

0x0020, 0x0020, "\\_SB.PCI0.UA00",

0x00, ResourceConsumer, ,

)

GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0000

}

GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0000

}

Interrupt (ResourceConsumer, Edge, ActiveLow, Exclusive, ,, _Y3C)

{

0x00000000,

}

})

CreateDWordField (SBFI, \_SB.PCI0.UA00.BTH0._CRS._Y3C._INT, INT4) // _INT: Interrupts

CreateWordField (SBFI, 0x3C, WAK4)

CreateWordField (SBFI, 0x64, KIL4)

Store (INUM (GBTI), INT4)

Store (GNUM (GBTW), WAK4)

Store (GNUM (GBTK), KIL4)

If (LEqual (SDM8, Zero))

{

Return (SBFG)

}

Else

{

Return (SBFI)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LNotEqual (SDS8, Zero))

{

Return (0x0F)

}

Return (Zero)

}

Name (_S0W, 0x02) // _S0W: S0 Device Wake State

}

Scope (_SB.PCI0)

{

Device (GNSS)

{

Name (_HID, "INT33A2") // _HID: Hardware ID

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Name (BUF1, ResourceTemplate ()

{

UartSerialBus (0x0001C200, DataBitsEight, StopBitsOne,

0xC0, LittleEndian, ParityTypeNone, FlowControlHardware,

0x0040, 0x0040, "\\_SB.PCI0.UA01",

0x00, ResourceConsumer, ,

)

})

Name (BUF2, ResourceTemplate ()

{

GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0000

}

})

CreateWordField (BUF2, 0x17, RPIN)

Store (GNUM (GGNR), RPIN)

If (LEqual (GNSC, One))

{

Return (ConcatenateResTemplate (BUF1, BUF2))

}

Else

{

Return (BUF2)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (GNSC, Zero))

{

Return (Zero)

}

Return (0x0F)

}

Scope (_SB.PCI0)

{

Device (GEXP)

{

Name (_ADR, One) // _ADR: Address

Name (_STA, 0x0B) // _STA: Status

Method (SGEP, 3, Serialized)

{

CSER (GEXN, Arg0, Arg1, Arg2, Zero)

}

Method (SGED, 3, Serialized)

{

CSER (GEXN, Arg0, Arg1, Arg2, One)

}

Method (GEPS, 2, Serialized)

{

Return (CSER (GEXN, Arg0, Arg1, Zero, 0x02))

}

Method (SGEI, 3, Serialized)

{

CSER (GEXN, Arg0, Arg1, Arg2, 0x03)

}

Method (INVC, 0, NotSerialized)

{

Store (Zero, Local0)

While (LLess (Local0, 0x10))

{

If (LEqual (R3DC (Zero, Local0, Zero), 0x02))

{

W3DC (Zero, Local0, Zero, One)

}

If (LEqual (R3DC (One, Local0, Zero), 0x02))

{

W3DC (One, Local0, Zero, One)

}

Add (Local0, One, Local0)

}

Name (PPR, 0x08)

Name (INR, Package (0x03)

{

Zero,

One,

0x02

})

Name (OUTR, Package (0x03)

{

0x04,

0x05,

0x06

})

Name (CFGR, Package (0x03)

{

0x0C,

0x0D,

0x0E

})

Name (POLR, Package (0x03)

{

0x08,

0x09,

0x0A

})

Name (EXPA, 0x22)

Name (UCCH, One)

Name (END, 0x0200)

Name (READ, 0x0100)

Name (CACH, Package (0x02)

{

Package (0x10)

{

Package (0x02)

{

Zero,

Zero

Package (0x02)

{

Zero,

Zero

Package (0x02)

{

Zero,

Zero

Package (0x02)

{

0x03,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

0x03,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

0x03,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

0x03,

Zero

}

Package (0x10)

{

Package (0x02)

{

Zero,

Zero

Package (0x02)

{

Zero,

Zero

Package (0x02)

{

Zero,

Zero

Package (0x02)

{

0x03,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

0x03,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

0x03,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

0x03,

Zero

}

})

Method (W3DC, 4, NotSerialized)

{

Store (Arg3, Index (DerefOf (Index (DerefOf (Index (CACH, Arg0)),

Arg1)), Arg2))

}

Method (R3DC, 3, NotSerialized)

{

Return (DerefOf (Index (DerefOf (Index (DerefOf (Index (CACH, Arg0)),

Arg1)), Arg2)))

}

Method (WREG, 4, Serialized)

{

OperationRegion (BAR0, SystemMemory, Arg0, 0x0208)

Field (BAR0, DWordAcc, NoLock, Preserve)

{

ICON, 32,

TAR, 32,

Offset (0x10),

DATA, 32,

HCNT, 32,

LCNT, 32,

Offset (0x2C),

, 5,

ABRT, 1,

Offset (0x40),

RBCK, 32,

Offset (0x54),

CLR, 32,

Offset (0x6C),

ENB, 1,

Offset (0x70),

ACTV, 1,

TFNF, 1,

, 1,

RFNE, 1,

Offset (0x7C),

HOLD, 32,

Offset (0x9C),

ENSB, 1,

Offset (0x204),

RST, 32

}

Store (Add (Timer, 0xC350), Local1)

Store (0x07, RST)

Store (Zero, ENB)

Store (RBCK, Local0)

Store (CLR, Local0)

Store (0x001C001C, HOLD)

Store (0x0210, HCNT)

Store (0x0280, LCNT)

Store (Add (EXPA, Arg1), TAR)

Store (0x65, ICON)

Store (One, ENB)

While (LNotEqual (ENSB, One))

{

If (LGreater (Timer, Local1))

{

Return (Zero)

}

Store (Arg2, DATA)

Store (Add (END, Arg3), DATA)

While (LNotEqual (ACTV, Zero))

{

If (LGreater (Timer, Local1))

{

Return (Zero)

}

Store (Zero, ENB)

While (LNotEqual (ENSB, Zero))

{

If (LGreater (Timer, Local1))

{

Return (Zero)

}

W3DC (Arg1, Arg2, One, Arg3)

If (LEqual (R3DC (Arg1, Arg2, Zero), One))

{

W3DC (Arg1, Arg2, Zero, 0x02)

}

Return (Zero)

}

Method (RREG, 3, Serialized)

{

If (LEqual (UCCH, One))

{

If (LEqual (R3DC (Arg1, Arg2, Zero), 0x02))

{

Return (R3DC (Arg1, Arg2, One))

}

OperationRegion (BAR0, SystemMemory, Arg0, 0x0208)

Field (BAR0, DWordAcc, NoLock, Preserve)

{

ICON, 32,

TAR, 32,

Offset (0x10),

DATA, 32,

HCNT, 32,

LCNT, 32,

Offset (0x2C),

, 5,

ABRT, 1,

Offset (0x40),

RBCK, 32,

Offset (0x54),

CLR, 32,

Offset (0x6C),

ENB, 1,

Offset (0x70),

ACTV, 1,

TFNF, 1,

, 1,

RFNE, 1,

Offset (0x7C),

HOLD, 32,

Offset (0x9C),

ENSB, 1,

Offset (0x204),

RST, 32

}

Store (Add (Timer, 0xC350), Local1)

Store (0x07, RST)

Store (Zero, ENB)

Store (RBCK, Local0)

Store (CLR, Local0)

Store (0x001C001C, HOLD)

Store (0x0210, HCNT)

Store (0x0280, LCNT)

Store (Add (EXPA, Arg1), TAR)

Store (0x65, ICON)

Store (One, ENB)

While (LNotEqual (ENSB, One))

{

If (LGreater (Timer, Local1))

{

Return (Zero)

}

Store (Arg2, DATA)

Store (Add (END, READ), DATA)

While (LNotEqual (ACTV, Zero))

{

If (LGreater (Timer, Local1))

{

Return (Zero)

}

Store (DATA, Local0)

Store (Zero, ENB)

While (LNotEqual (ENSB, Zero))

{

If (LGreater (Timer, Local1))

{

Return (Zero)

}

Return (Local0)

}

Method (PS0, 1, Serialized)

{

OperationRegion (BAR1, SystemMemory, Arg0, 0x88)

Field (BAR1, DWordAcc, NoLock, Preserve)

{

Offset (0x84),

D0D3, 2

}

Store (Zero, D0D3)

Store (D0D3, Local0)

}

Method (PS3, 1, Serialized)

{

OperationRegion (BAR1, SystemMemory, Arg0, 0x88)

Field (BAR1, DWordAcc, NoLock, Preserve)

{

Offset (0x84),

D0D3, 2

}

Store (0x03, D0D3)

Store (D0D3, Local0)

}

Method (CSER, 5, Serialized)

{

Name (SB1X, Zero)

Name (SB0X, Zero)

Name (SMDX, Zero)

Name (PINN, Zero)

Name (REGN, Zero)

Name (REGA, Zero)

Name (OLDV, Zero)

Name (NEWV, Zero)

Name (RETV, Zero)

If (LGreater (Arg0, 0x05))

{

Return (Zero)

}

If (LEqual (Arg0, Zero))

{

Store (SB10, SB1X)

Store (SB00, SB0X)

Store (SMD0, SMDX)

}

If (LEqual (Arg0, One))

{

Store (SB11, SB1X)

Store (SB01, SB0X)

Store (SMD1, SMDX)

}

If (LEqual (Arg0, 0x02))

{

Store (SB12, SB1X)

Store (SB02, SB0X)

Store (SMD2, SMDX)

}

If (LEqual (Arg0, 0x03))

{

Store (SB13, SB1X)

Store (SB03, SB0X)

Store (SMD3, SMDX)

}

If (LEqual (Arg0, 0x04))

{

Store (SB14, SB1X)

Store (SB04, SB0X)

Store (SMD4, SMDX)

}

If (LEqual (Arg0, 0x05))

{

Store (SB15, SB1X)

Store (SB05, SB0X)

Store (SMD5, SMDX)

}

If (LGreater (Arg0, 0x05))

{

Return (Zero)

}

If (LGreater (Arg1, One))

{

Return (Zero)

}

If (LGreater (Arg2, 0x17))

{

Return (Zero)

}

If (LGreater (Arg3, One))

{

Return (Zero)

}

If (LGreater (Arg4, 0x02))

{

Return (Zero)

}

If (LNotEqual (SMDX, 0x03))

{

Return (Zero)

}

If (LEqual (Arg4, Zero))

{

Store (OUTR, Local0)

}

If (LEqual (Arg4, One))

{

Store (CFGR, Local0)

}

If (LEqual (Arg4, 0x02))

{

Store (INR, Local0)

}

If (LEqual (Arg4, 0x03))

{

Store (POLR, Local0)

}

PS0 (SB1X)

Divide (Arg2, PPR, PINN, REGN)

Store (DerefOf (Index (Local0, REGN)), REGA)

Store (RREG (SB0X, Arg1, REGA), OLDV)

If (LEqual (Arg4, 0x02))

{

Store (And (One, ShiftRight (OLDV, PINN)), RETV)

}

Else

{

And (OLDV, Not (ShiftLeft (One, PINN)), NEWV)

Or (ShiftLeft (Arg3, PINN), NEWV, NEWV)

If (LNotEqual (NEWV, OLDV))

{

WREG (SB0X, Arg1, REGA, NEWV)

}

PS3 (SB1X)

Return (RETV)

}

Method (PKG1, 1, Serialized)

{

Name (PKG, Package (0x01)

{

Zero

})

Store (Arg0, Index (PKG, Zero))

Return (PKG)

}

Method (PKG3, 3, Serialized)

{

Name (PKG, Package (0x03)

{

Zero,

Zero

})

Store (Arg0, Index (PKG, Zero))

Store (Arg1, Index (PKG, One))

Store (Arg2, Index (PKG, 0x02))

Return (PKG)

}

If (USTP)

{

Scope (_SB.PCI0.I2C1)

{

Method (SSCN, 0, NotSerialized)

{

Return (PKG3 (SSHI, SSLI, SSDI))

}

Method (FMCN, 0, NotSerialized)

{

Return (PKG3 (FMHI, FMLI, FMDI))

}

Method (FPCN, 0, NotSerialized)

{

Return (PKG3 (FPHI, FPLI, FPDI))

}

Method (M0D3, 0, NotSerialized)

{

Return (PKG1 (M0CI))

}

Method (M1D3, 0, NotSerialized)

{

Return (PKG1 (M1CI))

}

Scope (_SB.PCI0.SPI1)

{

Method (M0D3, 0, NotSerialized)

{

Return (PKG1 (M0CS))

}

Method (M1D3, 0, NotSerialized)

{

Return (PKG1 (M1CS))

}

Scope (_SB.PCI0.UA01)

{

Method (M0D3, 0, NotSerialized)

{

Return (PKG1 (M0CU))

}

Method (M1D3, 0, NotSerialized)

{

Return (PKG1 (M1CU))

}

If (LEqual (PCHV (), SPTL))

{

Scope (_SB.PCI0)

{

Device (PEMC)

{

Name (_ADR, 0x001E0004) // _ADR: Address

OperationRegion (SCSR, PCI_Config, Zero, 0x0100)

Field (SCSR, WordAcc, NoLock, Preserve)

{

Offset (0x84),

PSTA, 32,

Offset (0xA2),

, 2,

PGEN, 1

}

Method (_PS0, 0, Serialized) // _PS0: Power State 0

{

Store (Zero, PGEN)

PCRA (0xC0, 0x0600, 0x7FFFFFBA)

Sleep (0x02)

PCRO (0xC0, 0x0600, 0x80000045)

And (PSTA, 0xFFFFFFFC, PSTA)

Store (PSTA, Local0)

}

Method (_PS3, 0, Serialized) // _PS3: Power State 3

{

Store (One, PGEN)

Or (PSTA, 0x03, PSTA)

Store (PSTA, Local0)

}

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

ADBG (Concatenate ("EMH4=", ToDecimalString (EMH4)))

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xA5, 0x3E, 0xC1, 0xF6, 0xCD, 0x65, 0x1F, 0x46,

/* 0008 */ 0xAB, 0x7A, 0x29, 0xF7, 0xE8, 0xD5, 0xBD, 0x61

}))

{

If (LEqual (Arg1, Zero))

{

While (One)

{

Store (Arg2, _T_0)

If (LEqual (_T_0, Zero))

{

If (LEqual (EMH4, One))

{

Return (Buffer (One)

{

0x61

})

}

Return (Buffer (One)

{

0x21

})

}

Else

{

If (LEqual (_T_0, 0x05))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

Return (Buffer (One)

{

0x05

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Device (CARD)

{

Name (_ADR, 0x08) // _ADR: Address

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (Zero)

}

Device (PSDC)

{

Name (_ADR, 0x001E0006) // _ADR: Address

OperationRegion (SCSR, PCI_Config, Zero, 0x0100)

Field (SCSR, WordAcc, NoLock, Preserve)

{

Offset (0x84),

PSTA, 32,

Offset (0xA2),

, 2,

PGEN, 1

}

Method (_PS0, 0, Serialized) // _PS0: Power State 0

{

Store (Zero, PGEN)

PCRA (0xC0, 0x0600, 0xFFFFFE7A)

Sleep (0x02)

PCRO (0xC0, 0x0600, 0x0185)

And (PSTA, 0xFFFFFFFC, PSTA)

Store (PSTA, Local0)

}

Method (_PS3, 0, Serialized) // _PS3: Power State 3

{

Store (One, PGEN)

Or (PSTA, 0x03, PSTA)

Store (PSTA, Local0)

}

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xA5, 0x3E, 0xC1, 0xF6, 0xCD, 0x65, 0x1F, 0x46,

/* 0008 */ 0xAB, 0x7A, 0x29, 0xF7, 0xE8, 0xD5, 0xBD, 0x61

}))

{

If (LEqual (Arg1, Zero))

{

While (One)

{

Store (Arg2, _T_0)

If (LEqual (_T_0, Zero))

{

Return (Buffer (One)

{

0x19

})

}

Else

{

If (LEqual (_T_0, 0x03))

{

Sleep (0x64)

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_0, 0x04))

{

Sleep (0x64)

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Device (CARD)

{

Name (_ADR, 0x08) // _ADR: Address

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (One)

}

Scope (_SB.PCI0)

{

Device (ISHD)

{

Name (_ADR, 0x00130000) // _ADR: Address

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Scope (_SB.PCI0)

{

Device (HECI)

{

Name (_ADR, 0x00160000) // _ADR: Address

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Name (ECUP, One)

Mutex (EHLD, 0x00)

Method (TBTD, 1, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

ADBG ("TBTD")

While (One)

{

Store (Arg0, _T_0)

If (LNotEqual (Match (Package (0x08)

{

One,

0x02,

0x03,

0x04,

0x05,

0x06,

0x07,

0x08

}, MEQ, _T_0, MTR, Zero, Zero), Ones))

{

Store (0x1C, Local0)

}

Else

{

If (LNotEqual (Match (Package (0x08)

{

0x09,

0x0A,

0x0B,

0x0C,

0x0D,

0x0E,

0x0F,

0x10

}, MEQ, _T_0, MTR, Zero, Zero), Ones))

{

Store (0x1D, Local0)

}

Else

{

If (LNotEqual (Match (Package (0x04)

{

0x11,

0x12,

0x13,

0x14

}, MEQ, _T_0, MTR, Zero, Zero), Ones))

{

Store (0x1B, Local0)

}

Else

{

If (LNotEqual (Match (Package (0x03)

{

0x15,

0x16,

0x17

}, MEQ, _T_0, MTR, Zero, Zero), Ones))

{

Store (One, Local0)

}

Break

}

ADBG ("Device no")

ADBG (Local0)

Return (Local0)

}

Method (TBTF, 1, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

ADBG ("TBTF")

While (One)

{

Store (Arg0, _T_0)

If (LEqual (_T_0, One))

{

Store (And (RPA1, 0x0F), Local0)

}

Else

{

If (LEqual (_T_0, 0x02))

{

Store (And (RPA2, 0x0F), Local0)

}

Else

{

If (LEqual (_T_0, 0x03))

{

Store (And (RPA3, 0x0F), Local0)

}

Else

{

If (LEqual (_T_0, 0x04))

{

Store (And (RPA4, 0x0F), Local0)

}

Else

{

If (LEqual (_T_0, 0x05))

{

Store (And (RPA5, 0x0F), Local0)

}

Else

{

If (LEqual (_T_0, 0x06))

{

Store (And (RPA6, 0x0F), Local0)

}

Else

{

If (LEqual (_T_0, 0x07))

{

Store (And (RPA7, 0x0F), Local0)

}

Else

{

If (LEqual (_T_0, 0x08))

{

Store (And (RPA8, 0x0F), Local0)

}

Else

{

If (LEqual (_T_0, 0x09))

{

Store (And (RPA9, 0x0F), Local0)

}

Else

{

If (LEqual (_T_0, 0x0A))

{

Store (And (RPAA, 0x0F), Local0)

}

Else

{

If (LEqual (_T_0, 0x0B))

{

Store (And (RPAB, 0x0F), Local0)

}

Else

{

If (LEqual (_T_0, 0x0C))

{

Store (And (RPAC, 0x0F), Local0)

}

Else

{

If (LEqual (_T_0, 0x0D))

{

Store (And (RPAD, 0x0F), Local0)

}

Else

{

If (LEqual (_T_0, 0x0E))

{

Store (And (RPAE, 0x0F), Local0)

}

Else

{

If (LEqual (_T_0, 0x0F))

{

Store (And (RPAF, 0x0F), Local0)

}

Else

{

If (LEqual (_T_0, 0x10))

{

Store (And (RPAG, 0x0F), Local0)

}

Else

{

If (LEqual (_T_0, 0x11))

{

Store (And (RPAH, 0x0F), Local0)

}

Else

{

If (LEqual (_T_0, 0x12))

{

Store (And (RPAI, 0x0F), Local0)

}

Else

{

If (LEqual (_T_0, 0x13))

{

Store (And (RPAJ, 0x0F), Local0)

}

Else

{

If (LEqual (_T_0, 0x14))

{

Store (And (RPAK, 0x0F), Local0)

}

Else

{

If (LEqual (_T_0, 0x15))

{

Store (Zero, Local0)

}

Else

{

If (LEqual (_T_0, 0x16))

{

Store (One, Local0)

}

Else

{

If (LEqual (_T_0, 0x17))

{

Store (0x02, Local0)

}

Break

}

ADBG ("Function no")

ADBG (Local0)

Return (Local0)

}

Method (MMRP, 0, NotSerialized)

{

Store (\_SB.PCI0.GPCB (), Local0)

Add (Local0, ShiftLeft (TBTD (TBSE), 0x0F), Local0)

Add (Local0, ShiftLeft (TBTF (TBSE), 0x0C), Local0)

Return (Local0)

}

Method (MMTB, 0, Serialized)

{

ADBG ("MMTB")

Store (\_SB.PCI0.GPCB (), Local0)

Add (Local0, ShiftLeft (TBTD (TBSE), 0x0F), Local0)

Add (Local0, ShiftLeft (TBTF (TBSE), 0x0C), Local0)

OperationRegion (MMMM, SystemMemory, Local0, 0x1A)

Field (MMMM, AnyAcc, NoLock, Preserve)

{

Offset (0x19),

SBUS, 8

}

Store (SBUS, Local2)

Store (\_SB.PCI0.GPCB (), Local0)

Multiply (Local2, 0x00100000, Local2)

Add (Local2, Local0, Local0)

ADBG ("TBT-US-ADR")

ADBG (Local0)

Return (Local0)

}

Method (FFTB, 0, NotSerialized)

{

ADBG ("FFTB")

Add (MMTB (), 0x0548, Local0)

OperationRegion (PXVD, SystemMemory, Local0, 0x08)

Field (PXVD, DWordAcc, NoLock, Preserve)

{

TB2P, 32,

P2TB, 32

}

Store (TB2P, Local1)

If (LEqual (Local1, 0xFFFFFFFF))

{

ADBG ("FFTb 1")

Return (One)

}

Else

{

ADBG ("FFTb 0")

Return (Zero)

}

Method (SXTB, 0, NotSerialized)

{

ADBG ("SXTB")

Add (MMTB (), 0x0548, Local0)

OperationRegion (PXVD, SystemMemory, Local0, 0x08)

Field (PXVD, DWordAcc, NoLock, Preserve)

{

TB2P, 32,

P2TB, 32

}

Store (0x02, Local2)

Add (One, ShiftLeft (Local2, One, Local2), Local3)

Store (Local2, TB2P)

}

Scope (\)

{

Device (CHUB)

{

Name (_HID, EisaId ("INT339B")) // _HID: Hardware ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (CHEN, One))

{

Return (0x0F)

}

Return (Zero)

}

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Zero, ToInteger (Arg1)))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

If (LEqual (_T_0, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_1)

If (LEqual (_T_1, Zero)) {}

Break

}

Break

}

Return (Zero)

}

Return (Zero)

}

Return (Zero)

}

Scope (_SB)

{

OperationRegion (ITSS, SystemMemory, 0xFDC43100, 0x0208)

Field (ITSS, ByteAcc, NoLock, Preserve)

{

PARC, 8,

PBRC, 8,

PCRC, 8,

PDRC, 8,

PERC, 8,

PFRC, 8,

PGRC, 8,

PHRC, 8,

Offset (0x200),

, 1,

SCGE, 1

}

Mutex (MUTX, 0x00)

Mutex (OSUM, 0x00)

Event (WFEV)

OperationRegion (PRT0, SystemIO, 0x80, 0x04)

Field (PRT0, DWordAcc, Lock, Preserve)

{

P80H, 32

}

Method (P8XH, 2, Serialized)

{

If (LEqual (Arg0, Zero))

{

Store (Or (And (P80D, 0xFFFFFF00), Arg1), P80D)

}

If (LEqual (Arg0, One))

{

Store (Or (And (P80D, 0xFFFF00FF), ShiftLeft (Arg1, 0x08)

), P80D)

}

If (LEqual (Arg0, 0x02))

{

Store (Or (And (P80D, 0xFF00FFFF), ShiftLeft (Arg1, 0x10)

), P80D)

}

If (LEqual (Arg0, 0x03))

{

Store (Or (And (P80D, 0x00FFFFFF), ShiftLeft (Arg1, 0x18)

), P80D)

}

Store (P80D, P80H)

}

Method (ADBG, 1, Serialized)

{

If (CondRefOf (MDBG))

{

Return (MDBG)

Arg0

}

Return (Zero)

}

OperationRegion (SPRT, SystemIO, 0xB2, 0x02)

Field (SPRT, ByteAcc, Lock, Preserve)

{

SSMP, 8

}

Name (WAKP, Package (0x02)

{

Zero,

Zero

})

Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model

{

Store (Arg0, GPIC)

Store (Arg0, PICM)

}

Method (RPTS, 1, NotSerialized)

{

Store (Zero, P80D)

P8XH (Zero, Arg0)

ADBG (Concatenate ("_PTS=", ToHexString (Arg0)))

If (LEqual (TBTS, One))

{

If (LAnd (LEqual (FFTB (), One), LEqual (AICS, One)))

{

SXTB ()

}

Reset (WFEV)

}

If (LEqual (Arg0, 0x03))

{

If (CondRefOf (\_PR.DTSE))

{

If (LAnd (\_PR.DTSE, LGreater (TCNT, One)))

{

TRAP (0x02, 0x1E)

}

If (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04)))

{

If (LAnd (CondRefOf (\_SB.PCI0.LPCB.H_EC.PB10), ECON))

{

If (\_SB.PCI0.LPCB.H_EC.ECAV)

{

If (\_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.PB10)))

{

Or (PB1E, 0x80, PB1E)

}

Else

{

And (PB1E, 0x7F, PB1E)

}

If (CondRefOf (\_SB.TPM.PTS))

{

\_SB.TPM.PTS (Arg0)

}

If (LOr (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04)), LEqual (

Arg0, 0x05)))

{

If (LEqual (PFLV, 0x02))

{

\_SB.SGOV (0x02010003, One)

}

Method (RWAK, 1, Serialized)

{

P8XH (One, 0xAB)

ADBG ("_WAK")

\_SB.PCI0.GEXP.INVC ()

If (LEqual (S0ID, One))

{

Store (One, \_SB.SCGE)

}

If (NEXP)

{

If (And (OSCC, 0x02))

{

\_SB.PCI0.NHPG ()

}

If (And (OSCC, 0x04))

{

\_SB.PCI0.NPME ()

}

If (LEqual (Arg0, 0x03))

{

If (LEqual (Zero, ACTT))

{

If (LEqual (ECON, One))

{

\_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.CFAN))

}

If (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04)))

{

If (LAnd (CondRefOf (\_SB.PCI0.LPCB.H_EC.PB10), ECON))

{

If (And (PB1E, 0x80))

{

\_SB.PCI0.LPCB.H_EC.ECWT (One, RefOf (\_SB.PCI0.LPCB.H_EC.PB10))

}

If (And (GBSX, 0x40))

{

\_SB.PCI0.GFX0.IUEH (0x06)

}

If (And (GBSX, 0x80))

{

\_SB.PCI0.GFX0.IUEH (0x07)

}

If (CondRefOf (\_PR.DTSE))

{

If (LAnd (\_PR.DTSE, LGreater (TCNT, One)))

{

TRAP (0x02, 0x14)

}

If (LEqual (TBTS, One))

{

Acquire (OSUM, 0xFFFF)

\_GPE.TINI ()

Release (OSUM)

}

If (LNotEqual (\_SB.PCI0.RP01.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP01, Zero)

}

If (LNotEqual (\_SB.PCI0.RP02.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP02, Zero)

}

If (LNotEqual (\_SB.PCI0.RP03.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP03, Zero)

}

If (LNotEqual (\_SB.PCI0.RP04.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP04, Zero)

}

If (LNotEqual (\_SB.PCI0.RP05.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP05, Zero)

}

If (LNotEqual (\_SB.PCI0.RP06.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP06, Zero)

}

If (LNotEqual (\_SB.PCI0.RP07.VDID, 0xFFFFFFFF))

{

If (LEqual (DSTS, Zero))

{

Notify (\_SB.PCI0.RP07, Zero)

}

If (LNotEqual (\_SB.PCI0.RP08.VDID, 0xFFFFFFFF))

{

If (LEqual (DSTS, Zero))

{

Notify (\_SB.PCI0.RP08, Zero)

}

If (LNotEqual (\_SB.PCI0.RP09.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP09, Zero)

}

If (LNotEqual (\_SB.PCI0.RP10.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP10, Zero)

}

If (LNotEqual (\_SB.PCI0.RP11.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP11, Zero)

}

If (LNotEqual (\_SB.PCI0.RP12.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP12, Zero)

}

If (LNotEqual (\_SB.PCI0.RP13.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP13, Zero)

}

If (LNotEqual (\_SB.PCI0.RP14.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP14, Zero)

}

If (LNotEqual (\_SB.PCI0.RP15.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP15, Zero)

}

If (LNotEqual (\_SB.PCI0.RP16.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP16, Zero)

}

If (LNotEqual (\_SB.PCI0.RP17.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP17, Zero)

}

If (LNotEqual (\_SB.PCI0.RP18.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP18, Zero)

}

If (LNotEqual (\_SB.PCI0.RP19.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP19, Zero)

}

If (LNotEqual (\_SB.PCI0.RP20.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP20, Zero)

}

If (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04)))

{

If (LEqual (\_SB.PWRB.PBST, One))

{

If (PBSS)

{

Notify (\_SB.PWRB, 0x02)

Store (One, PBSS)

}

If (LEqual (TBTS, One))

{

Signal (WFEV)

}

Return (Package (0x02)

{

Zero,

Zero

})

}

Method (GETB, 3, Serialized)

{

Multiply (Arg0, 0x08, Local0)

Multiply (Arg1, 0x08, Local1)

CreateField (Arg2, Local0, Local1, TBF3)

Return (TBF3)

}

Method (PNOT, 0, Serialized)

{

If (LGreater (TCNT, One))

{

If (And (PDC0, 0x08))

{

Notify (\_PR.CPU0, 0x80)

}

If (And (PDC1, 0x08))

{

Notify (\_PR.CPU1, 0x80)

}

If (And (PDC2, 0x08))

{

Notify (\_PR.CPU2, 0x80)

}

If (And (PDC3, 0x08))

{

Notify (\_PR.CPU3, 0x80)

}

If (And (PDC4, 0x08))

{

Notify (\_PR.CPU4, 0x80)

}

If (And (PDC5, 0x08))

{

Notify (\_PR.CPU5, 0x80)

}

If (And (PDC6, 0x08))

{

Notify (\_PR.CPU6, 0x80)

}

If (And (PDC7, 0x08))

{

Notify (\_PR.CPU7, 0x80)

}

Else

{

Notify (\_PR.CPU0, 0x80)

}

If (LGreater (TCNT, One))

{

If (LAnd (And (PDC0, 0x08), And (PDC0, 0x10)))

{

Notify (\_PR.CPU0, 0x81)

}

If (LAnd (And (PDC1, 0x08), And (PDC1, 0x10)))

{

Notify (\_PR.CPU1, 0x81)

}

If (LAnd (And (PDC2, 0x08), And (PDC2, 0x10)))

{

Notify (\_PR.CPU2, 0x81)

}

If (LAnd (And (PDC3, 0x08), And (PDC3, 0x10)))

{

Notify (\_PR.CPU3, 0x81)

}

If (LAnd (And (PDC4, 0x08), And (PDC4, 0x10)))

{

Notify (\_PR.CPU4, 0x81)

}

If (LAnd (And (PDC5, 0x08), And (PDC5, 0x10)))

{

Notify (\_PR.CPU5, 0x81)

}

If (LAnd (And (PDC6, 0x08), And (PDC6, 0x10)))

{

Notify (\_PR.CPU6, 0x81)

}

If (LAnd (And (PDC7, 0x08), And (PDC7, 0x10)))

{

Notify (\_PR.CPU7, 0x81)

}

Else

{

Notify (\_PR.CPU0, 0x81)

}

If (LEqual (ECON, One))

{

Store (\_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.B1CC)), B1SC)

Store (\_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.B1ST)), B1SS)

Store (\_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.B2CC)), B2SC)

Store (\_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.B2ST)), B2SS)

Notify (\_SB.PCI0.LPCB.H_EC.BAT0, 0x81)

Notify (\_SB.PCI0.LPCB.H_EC.BAT1, 0x81)

Notify (\_SB.PCI0.LPCB.H_EC.BAT2, 0x81)

}

If (LEqual (DPTF, One))

{

Notify (\_SB.IETM, 0x86)

If (LEqual (CHGE, One))

{

Notify (\_SB.PCI0.LPCB.H_EC.CHRG, 0x80)

}

OperationRegion (MBAR, SystemMemory, Add (\_SB.PCI0.GMHB (), 0x5000), 0x1000)

Field (MBAR, ByteAcc, NoLock, Preserve)

{

Offset (0x938),

PWRU, 4,

Offset (0x9A0),

PPL1, 15,

PL1E, 1,

CLP1, 1

}

Name (CLMP, Zero)

Name (PLEN, Zero)

Name (PLSV, 0x8000)

Name (CSEM, Zero)

Method (SPL1, 0, Serialized)

{

Name (PPUU, Zero)

If (LEqual (CSEM, One))

{

Return (Zero)

}

Store (One, CSEM)

Store (PPL1, PLSV)

Store (PL1E, PLEN)

Store (CLP1, CLMP)

If (LEqual (PWRU, Zero))

{

Store (One, PPUU)

}

Else

{

ShiftLeft (Decrement (PWRU), 0x02, PPUU)

}

Multiply (PLVL, PPUU, Local0)

Divide (Local0, 0x03E8, , Local1)

Store (Local1, PPL1)

Store (One, PL1E)

Store (One, CLP1)

}

Method (RPL1, 0, Serialized)

{

Store (PLSV, PPL1)

Store (PLEN, PL1E)

Store (CLMP, CLP1)

Store (Zero, CSEM)

}

Name (UAMS, Zero)

Name (GLCK, Zero)

Method (GUAM, 1, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LGreater (OSYS, 0x07D0))

{

Add (PWRV, 0xFC, Local0)

ADBG ("Loc 0")

ADBG (Local0)

OperationRegion (ACTC, SystemMemory, Local0, 0x04)

Field (ACTC, DWordAcc, NoLock, Preserve)

{

, 1,

ACTD, 1

}

While (One)

{

Store (ToInteger (Arg0), _T_0)

If (LEqual (_T_0, Zero))

{

If (LEqual (GLCK, One))

{

Store (Zero, GLCK)

P8XH (Zero, 0xC5)

P8XH (One, 0xAB)

ADBG ("Exit CS")

If (LEqual (ECNO, One))

{

ADBG ("EC Notify")

Store (Acquire (EHLD, 0xFFFF), Local0)

If (LEqual (Local0, Zero))

{

\_SB.PCI0.LPCB.H_EC.ECMD (0x2D)

If (LEqual (ECLP, One))

{

Store (One, ECUP)

}

Release (EHLD)

}

If (LEqual (ECDB, One))

{

ADBG ("EC Debug")

\_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.DLED))

}

If (LGreaterEqual (OSYS, 0x07DF))

{

Store (Zero, ACTD)

}

If (PSCP)

{

If (CondRefOf (\_PR.CPU0._PPC))

{

Store (Zero, \_PR.CPPC)

PNOT ()

}

If (PLCS)

{

RPL1 ()

}

Else

{

If (LEqual (_T_0, One))

{

If (LEqual (GLCK, Zero))

{

Store (One, GLCK)

P8XH (Zero, 0xC5)

P8XH (One, Zero)

ADBG ("Enter CS")

If (LEqual (ECNO, One))

{

ADBG ("EC Notify")

If (LEqual (ECDB, One))

{

ADBG ("EC Debug")

\_SB.PCI0.LPCB.H_EC.ECWT (One, RefOf (\_SB.PCI0.LPCB.H_EC.DLED))

}

\_SB.PCI0.LPCB.H_EC.ECMD (0x2C)

If (LEqual (ECLP, One))

{

Store (Zero, ECUP)

}

If (LGreaterEqual (OSYS, 0x07DF))

{

Store (One, ACTD)

}

If (PSCP)

{

If (LAnd (CondRefOf (\_PR.CPU0._PSS), CondRefOf (\_PR.CPU0._PPC)))

{

If (And (PDC0, 0x0400))

{

Subtract (SizeOf (\_PR.CPU0.TPSS), One, \_PR.CPPC)

}

Else

{

Subtract (SizeOf (\_PR.CPU0.LPSS), One, \_PR.CPPC)

}

PNOT ()

}

If (PLCS)

{

SPL1 ()

}

Else

{

If (LEqual (_T_0, 0x02))

{

If (LEqual (ECNO, One))

{

ADBG ("EC Notify")

Store (Acquire (EHLD, 0xFFFF), Local0)

If (LEqual (Local0, Zero))

{

\_SB.PCI0.LPCB.H_EC.ECMD (0x2D)

If (LEqual (ECLP, One))

{

Store (One, ECUP)

}

Release (EHLD)

}

If (LEqual (ECDB, One))

{

ADBG ("EC Debug")

\_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.DLED))

}

Else

{

Return (Zero)

}

Break

}

Store (LAnd (Arg0, LNot (PWRS)), UAMS)

P_CS ()

}

Method (P_CS, 0, Serialized)

{

If (CondRefOf (\_SB.PCI0.PAUD.PUAM))

{

\_SB.PCI0.PAUD.PUAM ()

}

If (LEqual (OSYS, 0x07DC))

{

If (CondRefOf (\_SB.PCI0.XHC.DUAM))

{

\_SB.PCI0.XHC.DUAM ()

}

Scope (\)

{

OperationRegion (IO_H, SystemIO, 0x1000, 0x04)

Field (IO_H, ByteAcc, NoLock, Preserve)

{

TRPH, 8

}

Method (TRAP, 2, Serialized)

{

Store (Arg1, SMIF)

If (LEqual (Arg0, 0x02))

{

Store (Arg1, \_PR.DTSF)

Store (Zero, \_PR.TRPD)

Return (\_PR.DTSF)

}

If (LEqual (Arg0, 0x03))

{

Store (Zero, TRPH)

}

If (LEqual (Arg0, 0x04))

{

Store (Zero, \_PR.TRPF)

}

Return (SMIF)

}

Scope (_SB.PCI0)

{

Method (PTMA, 0, NotSerialized)

{

Return (\_PR.BGMA)

}

Method (PTMS, 0, NotSerialized)

{

Return (\_PR.BGMS)

}

Method (PTIA, 0, NotSerialized)

{

Return (\_PR.BGIA)

}

Method (_INI, 0, Serialized) // _INI: Initialize

{

Store (0x07D0, OSYS)

If (CondRefOf (\_OSI, Local0))

{

If (_OSI ("Linux"))

{

Store (0x03E8, OSYS)

}

If (_OSI ("Windows 2001"))

{

Store (0x07D1, OSYS)

}

If (_OSI ("Windows 2001 SP1"))

{

Store (0x07D1, OSYS)

}

If (_OSI ("Windows 2001 SP2"))

{

Store (0x07D2, OSYS)

}

If (_OSI ("Windows 2001.1"))

{

Store (0x07D3, OSYS)

}

If (_OSI ("Windows 2006"))

{

Store (0x07D6, OSYS)

}

If (_OSI ("Windows 2009"))

{

Store (0x07D9, OSYS)

}

If (_OSI ("Windows 2012"))

{

Store (0x07DC, OSYS)

}

If (_OSI ("Windows 2013"))

{

Store (0x07DD, OSYS)

}

If (_OSI ("Windows 2015"))

{

Store (0x07DF, OSYS)

}

If (CondRefOf (\_PR.DTSE))

{

If (LGreaterEqual (\_PR.DTSE, One))

{

Store (One, \_PR.DSAE)

}

If (LEqual (TBTS, One))

{

Acquire (OSUM, 0xFFFF)

P8XH (Zero, 0x51)

\_GPE.TINI ()

Release (OSUM)

Signal (WFEV)

}

Method (NHPG, 0, Serialized)

{

Store (Zero, ^RP01.HPEX)

Store (Zero, ^RP02.HPEX)

Store (Zero, ^RP03.HPEX)

Store (Zero, ^RP04.HPEX)

Store (Zero, ^RP05.HPEX)

Store (Zero, ^RP06.HPEX)

Store (Zero, ^RP07.HPEX)

Store (Zero, ^RP08.HPEX)

Store (Zero, ^RP09.HPEX)

Store (Zero, ^RP10.HPEX)

Store (Zero, ^RP11.HPEX)

Store (Zero, ^RP12.HPEX)

Store (Zero, ^RP13.HPEX)

Store (Zero, ^RP14.HPEX)

Store (Zero, ^RP15.HPEX)

Store (Zero, ^RP16.HPEX)

Store (Zero, ^RP17.HPEX)

Store (Zero, ^RP18.HPEX)

Store (Zero, ^RP19.HPEX)

Store (Zero, ^RP20.HPEX)

Store (One, ^RP01.HPSX)

Store (One, ^RP02.HPSX)

Store (One, ^RP03.HPSX)

Store (One, ^RP04.HPSX)

Store (One, ^RP05.HPSX)

Store (One, ^RP06.HPSX)

Store (One, ^RP07.HPSX)

Store (One, ^RP08.HPSX)

Store (One, ^RP09.HPSX)

Store (One, ^RP10.HPSX)

Store (One, ^RP11.HPSX)

Store (One, ^RP12.HPSX)

Store (One, ^RP13.HPSX)

Store (One, ^RP14.HPSX)

Store (One, ^RP15.HPSX)

Store (One, ^RP16.HPSX)

Store (One, ^RP17.HPSX)

Store (One, ^RP18.HPSX)

Store (One, ^RP19.HPSX)

Store (One, ^RP20.HPSX)

}

Method (NPME, 0, Serialized)

{

Store (Zero, ^RP01.PMEX)

Store (Zero, ^RP02.PMEX)

Store (Zero, ^RP03.PMEX)

Store (Zero, ^RP04.PMEX)

Store (Zero, ^RP05.PMEX)

Store (Zero, ^RP06.PMEX)

Store (Zero, ^RP07.PMEX)

Store (Zero, ^RP08.PMEX)

Store (Zero, ^RP09.PMEX)

Store (Zero, ^RP10.PMEX)

Store (Zero, ^RP11.PMEX)

Store (Zero, ^RP12.PMEX)

Store (Zero, ^RP13.PMEX)

Store (Zero, ^RP14.PMEX)

Store (Zero, ^RP15.PMEX)

Store (Zero, ^RP16.PMEX)

Store (Zero, ^RP17.PMEX)

Store (Zero, ^RP18.PMEX)

Store (Zero, ^RP19.PMEX)

Store (Zero, ^RP20.PMEX)

Store (One, ^RP01.PMSX)

Store (One, ^RP02.PMSX)

Store (One, ^RP03.PMSX)

Store (One, ^RP04.PMSX)

Store (One, ^RP05.PMSX)

Store (One, ^RP06.PMSX)

Store (One, ^RP07.PMSX)

Store (One, ^RP08.PMSX)

Store (One, ^RP09.PMSX)

Store (One, ^RP10.PMSX)

Store (One, ^RP11.PMSX)

Store (One, ^RP12.PMSX)

Store (One, ^RP13.PMSX)

Store (One, ^RP14.PMSX)

Store (One, ^RP15.PMSX)

Store (One, ^RP16.PMSX)

Store (One, ^RP17.PMSX)

Store (One, ^RP18.PMSX)

Store (One, ^RP19.PMSX)

Store (One, ^RP20.PMSX)

}

Scope (\)

{

Name (PICM, Zero)

Name (PRWP, Package (0x02)

{

Zero,

Zero

})

Method (GPRW, 2, NotSerialized)

{

Store (Arg0, Index (PRWP, Zero))

Store (ShiftLeft (SS1, One), Local0)

Or (Local0, ShiftLeft (SS2, 0x02), Local0)

Or (Local0, ShiftLeft (SS3, 0x03), Local0)

Or (Local0, ShiftLeft (SS4, 0x04), Local0)

If (And (ShiftLeft (One, Arg1), Local0))

{

Store (Arg1, Index (PRWP, One))

}

Else

{

ShiftRight (Local0, One, Local0)

FindSetLeftBit (Local0, Index (PRWP, One))

}

Return (PRWP)

}

Scope (_SB)

{

Name (OSCI, Zero)

Name (OSCO, Zero)

Name (OSCP, Zero)

Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities

{

CreateDWordField (Arg3, Zero, STS0)

CreateDWordField (Arg3, 0x04, CAP0)

If (LEqual (S0ID, One))

{

Store (One, SCGE)

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x6E, 0xB0, 0x11, 0x08, 0x27, 0x4A, 0xF9, 0x44,

/* 0008 */ 0x8D, 0x60, 0x3C, 0xBB, 0xC2, 0x2E, 0x7B, 0x48

}))

{

If (LEqual (Arg1, One))

{

Store (CAP0, OSCP)

If (And (CAP0, 0x04))

{

Store (0x04, OSCO)

If (LNotEqual (And (SGMD, 0x0F), 0x02))

{

If (LEqual (RTD3, Zero))

{

And (CAP0, 0x3B, CAP0)

Or (STS0, 0x10, STS0)

}

Else

{

And (STS0, 0xFFFFFF00, STS0)

Or (STS0, 0x0A, STS0)

}

Else

{

And (STS0, 0xFFFFFF00, STS0)

Or (STS0, 0x06, STS0)

}

Return (Arg3)

}

Device (EPC)

{

Name (_HID, EisaId ("INT0E0C")) // _HID: Hardware ID

Name (_STR, Unicode ("Enclave Page Cache 1.0")) // _STR: Description String

Name (_MLS, Package (0x01) // _MLS: Multiple Language String

{

Package (0x02)

{

"en",

Unicode ("Enclave Page Cache 1.0")

}

})

Name (RBUF, ResourceTemplate ()

{

QWordMemory (ResourceConsumer, PosDecode, MinNotFixed, MaxNotFixed, NonCacheable, ReadWrite,

0x0000000000000000, // Granularity

0x0000000000000000, // Range Minimum

0x0000000000000000, // Range Maximum

0x0000000000000000, // Translation Offset

0x0000000000000001, // Length

,, _Y3D, AddressRangeMemory, TypeStatic)

})

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

CreateQWordField (RBUF, \_SB.EPC._Y3D._MIN, EMIN) // _MIN: Minimum Base Address

CreateQWordField (RBUF, \_SB.EPC._Y3D._MAX, EMAX) // _MAX: Maximum Base Address

CreateQWordField (RBUF, \_SB.EPC._Y3D._LEN, ELEN) // _LEN: Length

Store (\_PR.EMNA, EMIN)

Store (\_PR.ELNG, ELEN)

Subtract (Add (\_PR.EMNA, \_PR.ELNG), One, EMAX)

Return (RBUF)

}

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

Name (BUFX, Package (0x09)

{

0x80000000,

0x80000000

})

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x0C, 0xAC, 0x0F, 0xC6, 0x9E, 0xFD, 0x73, 0x42,

/* 0008 */ 0x9A, 0x3F, 0x93, 0x8F, 0x23, 0x27, 0x03, 0x5E

}))

{

If (LEqual (Zero, ToInteger (Arg1)))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Return (Buffer (One)

{

0x02

})

}

Else

{

If (LEqual (_T_0, One))

{

Store (SEC0, Index (BUFX, Zero))

Store (SEC1, Index (BUFX, One))

Store (SEC2, Index (BUFX, 0x02))

Store (SEC3, Index (BUFX, 0x03))

Store (SEC4, Index (BUFX, 0x04))

Store (SEC5, Index (BUFX, 0x05))

Store (SEC6, Index (BUFX, 0x06))

Store (SEC7, Index (BUFX, 0x07))

Store (SEC8, Index (BUFX, 0x08))

Return (BUFX)

}

Break

}

Return (Zero)

}

Return (Zero)

}

Return (Zero)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LNotEqual (\_PR.EPCS, Zero))

{

Return (0x0F)

}

Return (Zero)

}

Scope (_SB)

{

Device (BTKL)

{

Name (_HID, "INT3420") // _HID: Hardware ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (Zero)

}

Method (_PS0, 0, Serialized) // _PS0: Power State 0

{

}

Method (_PS3, 0, Serialized) // _PS3: Power State 3

{

}

Method (PSTS, 0, NotSerialized)

{

}

Scope (_SB)

{

Device (SLPB)

{

Name (_HID, EisaId ("PNP0C0E")) // _HID: Hardware ID

Name (_STA, 0x0B) // _STA: Status

}

Name (TDMA, 0x80000000)

Scope (_GPE)

{

Method (OSUP, 1, Serialized)

{

ADBG ("OSUP")

Add (Arg0, 0x0548, Local0)

OperationRegion (PXVD, SystemMemory, Local0, 0x08)

Field (PXVD, DWordAcc, NoLock, Preserve)

{

TB2P, 32,

P2TB, 32

}

Store (0x64, Local1)

Store (0x0D, P2TB)

While (LGreater (Local1, Zero))

{

Store (Subtract (Local1, One), Local1)

Store (TB2P, Local2)

If (LEqual (Local2, 0xFFFFFFFF))

{

ADBG ("Dev gone")

Return (0x02)

}

If (And (Local2, One))

{

ADBG ("Cmd acknowledged")

Break

}

Sleep (0x32)

}

Store (Zero, P2TB)

ADBG ("End-of-OSUP")

Return (One)

}

Method (PGWA, 0, Serialized)

{

ADBG ("PGWA")

If (LGreaterEqual (TBSE, 0x15))

{

Store (\_SB.PCI0.GPCB (), Local0)

Add (Local0, ShiftLeft (TBTD (TBSE), 0x0F), Local0)

Add (Local0, ShiftLeft (TBTF (TBSE), 0x0C), Local0)

ADBG (Local0)

OperationRegion (ABCD, SystemMemory, Local0, 0x1000)

Field (ABCD, AnyAcc, NoLock, Preserve)

{

Offset (0x84),

PWRS, 2,

Offset (0xB0),

, 4,

LNKD, 1,

Offset (0x11A),

, 1,

VCNP, 1,

Offset (0x508),

TREN, 1

}

If (LNotEqual (PWRS, Zero))

{

ADBG ("Force D0")

Store (Zero, PWRS)

Store (Zero, \_PR.POWS)

Sleep (0x10)

}

If (LNotEqual (LNKD, Zero))

{

ADBG ("Link Enable")

Store (Zero, LNKD)

Store (One, TREN)

Store (Zero, Local6)

Store (0x64, Local7)

While (LLess (Local6, Local7))

{

If (LEqual (VCNP, Zero))

{

Break

}

Sleep (0x10)

Add (Local6, 0x10, Local6)

}

Method (TBFF, 0, Serialized)

{

ADBG ("TBFF")

Store (MMTB (), Local0)

OperationRegion (PXVD, SystemMemory, Local0, 0x04)

Field (PXVD, DWordAcc, NoLock, Preserve)

{

VEDI, 32

}

Store (VEDI, Local1)

If (LEqual (Local1, 0xFFFFFFFF))

{

Return (OSUP (Local0))

}

Else

{

ADBG ("Dev Present")

Return (Zero)

}

Method (TSUB, 0, Serialized)

{

ADBG ("TSUB")

Store (\_SB.PCI0.GPCB (), Local0)

Add (Local0, ShiftLeft (TBTD (TBSE), 0x0F), Local0)

Add (Local0, ShiftLeft (TBTF (TBSE), 0x0C), Local0)

ADBG ("ADR")

ADBG (Local0)

OperationRegion (MMMM, SystemMemory, Local0, 0x1A)

Field (MMMM, AnyAcc, NoLock, Preserve)

{

Offset (0x19),

SBUS, 8

}

ADBG ("Sec Bus")

ADBG (SBUS)

Return (SBUS)

}

Method (WSUB, 0, NotSerialized)

{

ADBG ("WSUB")

Store (Zero, Local0)

Store (Zero, Local1)

While (One)

{

Store (TSUB (), Local1)

If (Local1)

{

ADBG ("WSUB-Finished")

Break

}

Else

{

Add (Local0, One, Local0)

If (LGreater (Local0, 0x03E8))

{

Sleep (0x03E8)

ADBG ("WSUB-Deadlock")

}

Else

{

Sleep (0x10)

}

Method (WWAK, 0, NotSerialized)

{

ADBG ("WWAK")

Wait (WFEV, 0xFFFF)

Signal (WFEV)

}

Method (NTFY, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

ADBG ("NTFY")

If (LEqual (NOHP, One))

{

While (One)

{

Store (ToInteger (TBSE), _T_0)

If (LEqual (_T_0, One))

{

ADBG ("Notify RP01")

Notify (\_SB.PCI0.RP01, Zero)

}

Else

{

If (LEqual (_T_0, 0x02))

{

ADBG ("Notify RP02")

Notify (\_SB.PCI0.RP02, Zero)

}

Else

{

If (LEqual (_T_0, 0x03))

{

ADBG ("Notify RP03")

Notify (\_SB.PCI0.RP03, Zero)

}

Else

{

If (LEqual (_T_0, 0x04))

{

ADBG ("Notify RP04")

Notify (\_SB.PCI0.RP04, Zero)

}

Else

{

If (LEqual (_T_0, 0x05))

{

ADBG ("Notify RP05")

Notify (\_SB.PCI0.RP05, Zero)

}

Else

{

If (LEqual (_T_0, 0x06))

{

ADBG ("Notify RP06")

Notify (\_SB.PCI0.RP06, Zero)

}

Else

{

If (LEqual (_T_0, 0x07))

{

ADBG ("Notify RP07")

Notify (\_SB.PCI0.RP07, Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

ADBG ("Notify RP08")

Notify (\_SB.PCI0.RP08, Zero)

}

Else

{

If (LEqual (_T_0, 0x09))

{

ADBG ("Notify RP09")

Notify (\_SB.PCI0.RP09, Zero)

}

Else

{

If (LEqual (_T_0, 0x0A))

{

ADBG ("Notify RP10")

Notify (\_SB.PCI0.RP10, Zero)

}

Else

{

If (LEqual (_T_0, 0x0B))

{

ADBG ("Notify RP11")

Notify (\_SB.PCI0.RP11, Zero)

}

Else

{

If (LEqual (_T_0, 0x0C))

{

ADBG ("Notify RP12")

Notify (\_SB.PCI0.RP12, Zero)

}

Else

{

If (LEqual (_T_0, 0x0D))

{

ADBG ("Notify RP13")

Notify (\_SB.PCI0.RP13, Zero)

}

Else

{

If (LEqual (_T_0, 0x0E))

{

ADBG ("Notify RP14")

Notify (\_SB.PCI0.RP14, Zero)

}

Else

{

If (LEqual (_T_0, 0x0F))

{

ADBG ("Notify RP15")

Notify (\_SB.PCI0.RP15, Zero)

}

Else

{

If (LEqual (_T_0, 0x10))

{

ADBG ("Notify RP16")

Notify (\_SB.PCI0.RP16, Zero)

}

Else

{

If (LEqual (_T_0, 0x11))

{

ADBG ("Notify RP17")

Notify (\_SB.PCI0.RP17, Zero)

}

Else

{

If (LEqual (_T_0, 0x12))

{

ADBG ("Notify RP18")

Notify (\_SB.PCI0.RP18, Zero)

}

Else

{

If (LEqual (_T_0, 0x13))

{

ADBG ("Notify RP19")

Notify (\_SB.PCI0.RP19, Zero)

}

Else

{

If (LEqual (_T_0, 0x14))

{

ADBG ("Notify RP20")

Notify (\_SB.PCI0.RP20, Zero)

}

Else

{

If (LEqual (_T_0, 0x15))

{

ADBG ("Notify PEG0")

Notify (\_SB.PCI0.PEG0, Zero)

}

Else

{

If (LEqual (_T_0, 0x16))

{

ADBG ("Notify PEG1")

Notify (\_SB.PCI0.PEG1, Zero)

}

Else

{

If (LEqual (_T_0, 0x17))

{

ADBG ("Notify PEG2")

Notify (\_SB.PCI0.PEG2, Zero)

}

Break

}

Method (TFPS, 0, NotSerialized)

{

ADBG ("TFPS")

Store (\_SB.CGRD (FPAT, FPEN, FPGN, Zero), Local0)

If (Local0)

{

ADBG ("ExtFrcPwr1")

}

Else

{

ADBG ("ExtFrcPwr0")

}

Return (Local0)

}

Method (CNCT, 0, NotSerialized)

{

ADBG ("CNCT")

ADBG ("Read")

ADBG ("ACPI_GPE_STS")

Store (CPAD, Local7)

Store (CPAB, Local6)

While (LGreater (Local6, 0x08))

{

Add (Local7, One, Local7)

Subtract (Local6, 0x08, Local6)

}

OperationRegion (GPE0, SystemIO, Local7, One)

Field (GPE0, ByteAcc, Lock, Preserve)

{

TEMP, 8

}

Store (TEMP, Local0)

ShiftRight (Local0, Local6, Local0)

And (Local0, One, Local0)

Return (Local0)

}

Method (CLNE, 0, NotSerialized)

{

ADBG ("CLNE")

ADBG ("Clear")

ADBG ("ACPI_GPE_STS")

Store (CPAD, Local7)

Store (CPAB, Local6)

While (LGreater (Local6, 0x08))

{

Add (Local7, One, Local7)

Subtract (Local6, 0x08, Local6)

}

OperationRegion (GPE0, SystemIO, Local7, One)

Field (GPE0, ByteAcc, Lock, Preserve)

{

TEMP, 8

}

ShiftLeft (One, Local6, Local6)

Or (TEMP, Local6, TEMP)

}

Method (DRPM, 0, NotSerialized)

{

ADBG ("DRPM")

Store (\_SB.STDC (\_SB.PCI0.GPCB (), Zero, TBTD (TBSE), TBTF (TBSE), 0x05), Local7)

Store (MMRP (), Local6)

Add (Local7, Local6, Local0)

OperationRegion (MMMS, SystemMemory, Local0, 0x02)

Field (MMMS, WordAcc, NoLock, Preserve)

{

MSIC, 1

}

Store (Zero, MSIC)

}

Method (DMSI, 0, NotSerialized)

{

ADBG ("DMSI")

Add (MMTB (), 0x0548, Local0)

OperationRegion (PXVD, SystemMemory, Local0, 0x08)

Field (PXVD, DWordAcc, NoLock, Preserve)

{

TB2P, 32,

P2TB, 32

}

OperationRegion (SPRT, SystemIO, 0xB2, 0x02)

Field (SPRT, ByteAcc, Lock, Preserve)

{

SSMP, 8

}

Store (TB2P, Local1)

If (LEqual (Local1, 0x25))

{

Store (0x17, TBSF)

Store (0xF7, SSMP)

ADBG ("0x25->P2TB")

Store (0x25, P2TB)

Store (0x64, Local2)

While (LGreater (Local2, Zero))

{

Store (Subtract (Local2, One), Local2)

Store (TB2P, Local1)

If (LEqual (Local1, 0xFFFFFFFF))

{

ADBG ("DMSiF")

Return (Zero)

}

If (LEqual (Local1, 0x24))

{

Break

}

Sleep (0x32)

}

Store (Zero, P2TB)

ADBG ("DMSi 1")

Return (One)

}

ADBG ("DMSi 0")

Return (Zero)

}

Method (RSMI, 0, NotSerialized)

{

ADBG ("RSMI")

Store (TFPS (), Local0)

Add (MMTB (), Zero, Local1)

OperationRegion (PXVD, SystemMemory, Local1, 0x0550)

Field (PXVD, DWordAcc, NoLock, Preserve)

{

VIDI, 32,

Offset (0x548),

TB2P, 32,

P2TB, 32

}

Store (TB2P, Local2)

If (LNotEqual (Local2, 0xFFFFFFFF))

{

ADBG ("RSMi 1")

Return (One)

}

If (LNot (CNCT ()))

{

ADBG ("RSMi 2")

Return (0x02)

}

DRPM ()

If (Local0)

{

\_SB.TBFP (Zero)

}

Else

{

\_SB.TBFP (One)

}

Store (Zero, Local3)

While (LOr (FFTB (), CNCT ()))

{

Sleep (0x05)

CLNE ()

Add (Local3, One, Local3)

If (LGreater (Local3, 0x14))

{

Sleep (0x03E8)

ADBG ("RSMi PCIe down")

}

If (LGreater (Local3, 0x19))

{

ADBG ("RSMi Oops")

If (Local0)

{

\_SB.TBFP (One)

}

Else

{

\_SB.TBFP (Zero)

}

Return (Zero)

}

If (Local0)

{

\_SB.TBFP (One)

}

Else

{

\_SB.TBFP (Zero)

}

ADBG ("RSMi 0")

Return (Zero)

}

Method (GNIS, 0, NotSerialized)

{

ADBG ("GNIS")

If (LEqual (GP5F, Zero))

{

ADBG ("GNIS_Dis=0")

Return (Zero)

}

Add (MMTB (), 0x0544, Local0)

OperationRegion (PXVD, SystemMemory, Local0, 0x08)

Field (PXVD, DWordAcc, NoLock, Preserve)

{

HPFI, 1,

Offset (0x04),

TB2P, 32

}

Store (TB2P, Local1)

ADBG (Concatenate ("TB2P=", ToHexString (Local1)))

If (LEqual (Local1, 0xFFFFFFFF))

{

ADBG ("GNIS=0")

Return (Zero)

}

Store (HPFI, Local2)

ADBG (Concatenate ("HPFI=", ToHexString (Local2)))

If (LEqual (Local2, One))

{

Store (Zero, HPFI)

ADBG ("GNIS=0")

Return (Zero)

}

ADBG ("GNIS=1")

Return (One)

}

Method (XTBT, 0, NotSerialized)

{

ADBG ("XTBT")

If (LEqual (CF2T, One))

{

ADBG ("Clear")

ADBG ("GPI_GPE_STS")

\_SB.CAGS (CPGN)

}

WWAK ()

WSUB ()

If (LEqual (TNAT, One))

{

Store (RSMI (), Local0)

If (LNot (Local0))

{

Return (Zero)

}

If (DMSI ())

{

Return (Zero)

}

If (GNIS ())

{

Return (Zero)

}

OperationRegion (SPRT, SystemIO, 0xB2, 0x02)

Field (SPRT, ByteAcc, Lock, Preserve)

{

SSMP, 8

}

ADBG ("TBT-HP-Handler")

ADBG ("PEG WorkAround")

PGWA ()

Acquire (OSUM, 0xFFFF)

Store (TBFF (), Local1)

If (LEqual (Local1, One))

{

Sleep (0x10)

Release (OSUM)

ADBG ("OS_Up_Received")

Return (Zero)

}

If (LEqual (Local1, 0x02))

{

NTFY ()

Sleep (0x10)

Release (OSUM)

P8XH (Zero, 0x7D)

ADBG ("Disconnect")

Return (Zero)

}

If (LEqual (SOHP, One))

{

ADBG ("TBT SW SMI")

Store (TBSW, SSMP)

}

NTFY ()

Sleep (0x10)

Release (OSUM)

ADBG ("End-of-XTBT")

}

Method (TINI, 0, NotSerialized)

{

ADBG ("TINI")

Store (MMRP (), Local0)

OperationRegion (RP_X, SystemMemory, Local0, 0x20)

Field (RP_X, DWordAcc, NoLock, Preserve)

{

REG0, 32,

REG1, 32,

REG2, 32,

REG3, 32,

REG4, 32,

REG5, 32,

REG6, 32,

REG7, 32

}

Store (REG6, Local1)

Store (0x00F0F000, REG6)

Store (MMTB (), Local2)

OSUP (Local2)

Store (Local1, REG6)

ADBG ("End-of-TINI")

}

Scope (_SB)

{

Method (THDR, 0, Serialized)

{

ADBG ("THDR")

\_GPE.XTBT ()

}

Scope (_SB)

{

Method (CGWR, 4, Serialized)

{

If (LEqual (Arg0, Zero))

{

If (CondRefOf (\_SB.SGOV))

{

SGOV (Arg2, Arg3)

}

Else

{

If (LEqual (Arg0, One))

{

If (CondRefOf (\_SB.PCI0.GEXP.SGEP))

{

^PCI0.GEXP.SGEP (Arg1, Arg2, Arg3)

}

Method (CGRD, 4, Serialized)

{

If (LEqual (Arg0, Zero))

{

If (LEqual (Arg3, Zero))

{

If (CondRefOf (\_SB.GGOV))

{

Store (GGOV (Arg2), Local0)

}

Else

{

If (LEqual (Arg3, One))

{

If (CondRefOf (\_SB.GGIV))

{

Store (GGIV (Arg2), Local0)

}

Else

{

If (LEqual (Arg0, One))

{

If (CondRefOf (\_SB.PCI0.GEXP.GEPS))

{

Store (^PCI0.GEXP.GEPS (Arg1, Arg2), Local0)

}

Return (Local0)

}

Scope (_SB)

{

Method (TBFP, 1, NotSerialized)

{

If (Arg0)

{

CGWR (FPAT, FPEN, FPGN, FPLV)

}

Else

{

CGWR (FPAT, FPEN, FPGN, LNot (FPLV))

}

Device (WMTF)

{

Name (_HID, "PNP0C14") // _HID: Hardware ID

Name (_UID, "TBFP") // _UID: Unique ID

Name (_WDG, Buffer (0x14)

{

/* 0000 */ 0x48, 0xFD, 0xCC, 0x86, 0x5E, 0x20, 0x77, 0x4A,

/* 0008 */ 0x9C, 0x48, 0x20, 0x21, 0xCB, 0xED, 0xE3, 0x41,

/* 0010 */ 0x54, 0x46, 0x01, 0x02

})

Method (WMTF, 3, NotSerialized)

{

CreateByteField (Arg2, Zero, FP)

If (FP)

{

TBFP (One)

}

Else

{

TBFP (Zero)

}

Scope (_SB)

{

Method (PERB, 5, Serialized)

{

ADBG ("PERB")

Store (Arg0, Local7)

Or (Local7, ShiftLeft (Arg1, 0x14), Local7)

Or (Local7, ShiftLeft (Arg2, 0x0F), Local7)

Or (Local7, ShiftLeft (Arg3, 0x0C), Local7)

Or (Local7, Arg4, Local7)

OperationRegion (PCI0, SystemMemory, Local7, One)

Field (PCI0, ByteAcc, NoLock, Preserve)

{

TEMP, 8

}

Return (TEMP)

}

Method (PEWB, 6, Serialized)

{

ADBG ("PEWB")

Store (Arg0, Local7)

Or (Local7, ShiftLeft (Arg1, 0x14), Local7)

Or (Local7, ShiftLeft (Arg2, 0x0F), Local7)

Or (Local7, ShiftLeft (Arg3, 0x0C), Local7)

Or (Local7, Arg4, Local7)

OperationRegion (PCI0, SystemMemory, Local7, One)

Field (PCI0, ByteAcc, NoLock, Preserve)

{

TEMP, 8

}

Store (Arg5, TEMP)

}

Method (PERW, 5, Serialized)

{

ADBG ("PERW")

Store (Arg0, Local7)

Or (Local7, ShiftLeft (Arg1, 0x14), Local7)

Or (Local7, ShiftLeft (Arg2, 0x0F), Local7)

Or (Local7, ShiftLeft (Arg3, 0x0C), Local7)

Or (Local7, Arg4, Local7)

OperationRegion (PCI0, SystemMemory, Local7, 0x02)

Field (PCI0, ByteAcc, NoLock, Preserve)

{

TEMP, 16

}

Return (TEMP)

}

Method (PEWW, 6, Serialized)

{

ADBG ("PEWW")

Store (Arg0, Local7)

Or (Local7, ShiftLeft (Arg1, 0x14), Local7)

Or (Local7, ShiftLeft (Arg2, 0x0F), Local7)

Or (Local7, ShiftLeft (Arg3, 0x0C), Local7)

Or (Local7, Arg4, Local7)

OperationRegion (PCI0, SystemMemory, Local7, 0x02)

Field (PCI0, ByteAcc, NoLock, Preserve)

{

TEMP, 16

}

Store (Arg5, TEMP)

}

Method (PERD, 5, Serialized)

{

ADBG ("PERD")

Store (Arg0, Local7)

Or (Local7, ShiftLeft (Arg1, 0x14), Local7)

Or (Local7, ShiftLeft (Arg2, 0x0F), Local7)

Or (Local7, ShiftLeft (Arg3, 0x0C), Local7)

Or (Local7, Arg4, Local7)

OperationRegion (PCI0, SystemMemory, Local7, 0x04)

Field (PCI0, ByteAcc, NoLock, Preserve)

{

TEMP, 32

}

Return (TEMP)

}

Method (PEWD, 6, Serialized)

{

ADBG ("PEWD")

Store (Arg0, Local7)

Or (Local7, ShiftLeft (Arg1, 0x14), Local7)

Or (Local7, ShiftLeft (Arg2, 0x0F), Local7)

Or (Local7, ShiftLeft (Arg3, 0x0C), Local7)

Or (Local7, Arg4, Local7)

OperationRegion (PCI0, SystemMemory, Local7, 0x04)

Field (PCI0, ByteAcc, NoLock, Preserve)

{

TEMP, 32

}

Store (Arg5, TEMP)

}

Method (STDC, 5, Serialized)

{

ADBG ("STDC")

Store (PERW (Arg0, Arg1, Arg2, Arg3, Zero), Local7)

If (LEqual (Local7, 0xFFFF))

{

ADBG ("Referenced device is not present")

Return (Zero)

}

Store (PERW (Arg0, Arg1, Arg2, Arg3, 0x06), Local0)

If (LEqual (And (Local0, 0x10), Zero))

{

ADBG ("No Capabilities linked list is available")

Return (Zero)

}

Store (PERB (Arg0, Arg1, Arg2, Arg3, 0x34), Local2)

While (One)

{

And (Local2, 0xFC, Local2)

If (LEqual (Local2, Zero))

{

ADBG ("Capability ID is not found")

Return (Zero)

}

Store (PERB (Arg0, Arg1, Arg2, Arg3, Local2), Local1)

If (LEqual (Arg4, Local1))

{

ADBG ("Capability ID is found")

ADBG ("Capability Offset : ")

ADBG (Local2)

Return (Local2)

}

Store (PERB (Arg0, Arg1, Arg2, Arg3, Add (Local2, One)),

Local2)

}

OperationRegion (_SB.PCI0.LPCB.LPCR, PCI_Config, 0x80, 0x04)

Field (\_SB.PCI0.LPCB.LPCR, ByteAcc, NoLock, Preserve)

{

CARN, 3,

, 1,

CBDR, 3,

Offset (0x01),

LTDR, 2,

, 2,

FDDR, 1,

Offset (0x02),

CALE, 1,

CBLE, 1,

LTLE, 1,

FDLE, 1,

Offset (0x03),

GLLE, 1,

GHLE, 1,

KCLE, 1,

MCLE, 1,

C1LE, 1,

C2LE, 1,

Offset (0x04)

}

Method (UXDV, 1, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

Store (0xFF, Local0)

While (One)

{

Store (Add (Arg0, Zero), _T_0)

If (LEqual (_T_0, 0x03F8))

{

Store (Zero, Local0)

}

Else

{

If (LEqual (_T_0, 0x02F8))

{

Store (One, Local0)

}

Else

{

If (LEqual (_T_0, 0x0220))

{

Store (0x02, Local0)

}

Else

{

If (LEqual (_T_0, 0x0228))

{

Store (0x03, Local0)

}

Else

{

If (LEqual (_T_0, 0x0238))

{

Store (0x04, Local0)

}

Else

{

If (LEqual (_T_0, 0x02E8))

{

Store (0x05, Local0)

}

Else

{

If (LEqual (_T_0, 0x0338))

{

Store (0x06, Local0)

}

Else

{

If (LEqual (_T_0, 0x03E8))

{

Store (0x07, Local0)

}

Break

}

Return (Local0)

}

Method (RRIO, 4, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

While (One)

{

Store (Add (Arg0, Zero), _T_0)

If (LEqual (_T_0, Zero))

{

Store (Zero, CALE)

Store (UXDV (Arg2), Local0)

If (LNotEqual (Local0, 0xFF))

{

Store (Local0, CARN)

}

If (Arg1)

{

Store (One, CALE)

}

Else

{

If (LEqual (_T_0, One))

{

Store (Zero, CBLE)

Store (UXDV (Arg2), Local0)

If (LNotEqual (Local0, 0xFF))

{

Store (Local0, CBDR)

}

If (Arg1)

{

Store (One, CBLE)

}

Else

{

If (LEqual (_T_0, 0x02))

{

Store (Zero, LTLE)

If (LEqual (Arg2, 0x0378))

{

Store (Zero, LTDR)

}

If (LEqual (Arg2, 0x0278))

{

Store (One, LTDR)

}

If (LEqual (Arg2, 0x03BC))

{

Store (0x02, LTDR)

}

If (Arg1)

{

Store (One, LTLE)

}

Else

{

If (LEqual (_T_0, 0x03))

{

Store (Zero, FDLE)

If (LEqual (Arg2, 0x03F0))

{

Store (Zero, FDDR)

}

If (LEqual (Arg2, 0x0370))

{

Store (One, FDDR)

}

If (Arg1)

{

Store (One, FDLE)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (Arg2, 0x0200))

{

If (Arg1)

{

Store (One, GLLE)

}

Else

{

Store (Zero, GLLE)

}

If (LEqual (Arg2, 0x0208))

{

If (Arg1)

{

Store (One, GHLE)

}

Else

{

Store (Zero, GHLE)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (Arg2, 0x0200))

{

If (Arg1)

{

Store (One, GLLE)

}

Else

{

Store (Zero, GLLE)

}

If (LEqual (Arg2, 0x0208))

{

If (Arg1)

{

Store (One, GHLE)

}

Else

{

Store (Zero, GHLE)

}

Else

{

If (LEqual (_T_0, 0x0A))

{

If (LOr (LEqual (Arg2, 0x60), LEqual (Arg2, 0x64)))

{

If (Arg1)

{

Store (One, KCLE)

}

Else

{

Store (Zero, KCLE)

}

Else

{

If (LEqual (_T_0, 0x0B))

{

If (LOr (LEqual (Arg2, 0x62), LEqual (Arg2, 0x66)))

{

If (Arg1)

{

Store (One, MCLE)

}

Else

{

Store (Zero, MCLE)

}

Else

{

If (LEqual (_T_0, 0x0C))

{

If (LEqual (Arg2, 0x2E))

{

If (Arg1)

{

Store (One, C1LE)

}

Else

{

Store (Zero, C1LE)

}

If (LEqual (Arg2, 0x4E))

{

If (Arg1)

{

Store (One, C2LE)

}

Else

{

Store (Zero, C2LE)

}

Else

{

If (LEqual (_T_0, 0x0D))

{

If (LEqual (Arg2, 0x2E))

{

If (Arg1)

{

Store (One, C1LE)

}

Else

{

Store (Zero, C1LE)

}

If (LEqual (Arg2, 0x4E))

{

If (Arg1)

{

Store (One, C2LE)

}

Else

{

Store (Zero, C2LE)

}

Break

}

Method (RDMA, 3, NotSerialized)

{

}

Scope (_GPE)

{

Method (_L69, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

If (LNotEqual (\_SB.PCI0.RP01.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP01.HPME ()

Notify (\_SB.PCI0.RP01, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP02.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP02.HPME ()

Notify (\_SB.PCI0.RP02, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP03.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP03.HPME ()

Notify (\_SB.PCI0.RP03, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP04.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP04.HPME ()

Notify (\_SB.PCI0.RP04, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP05.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP05.HPME ()

Notify (\_SB.PCI0.RP05, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP06.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP06.HPME ()

Notify (\_SB.PCI0.RP06, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP07.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP07.HPME ()

Notify (\_SB.PCI0.RP07, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP08.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP08.HPME ()

Notify (\_SB.PCI0.RP08, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP09.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP09.HPME ()

Notify (\_SB.PCI0.RP09, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP10.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP10.HPME ()

Notify (\_SB.PCI0.RP10, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP11.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP11.HPME ()

Notify (\_SB.PCI0.RP11, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP12.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP12.HPME ()

Notify (\_SB.PCI0.RP12, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP13.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP13.HPME ()

Notify (\_SB.PCI0.RP13, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP14.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP14.HPME ()

Notify (\_SB.PCI0.RP14, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP15.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP15.HPME ()

Notify (\_SB.PCI0.RP15, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP16.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP16.HPME ()

Notify (\_SB.PCI0.RP16, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP17.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP17.HPME ()

Notify (\_SB.PCI0.RP17, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP18.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP18.HPME ()

Notify (\_SB.PCI0.RP18, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP19.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP19.HPME ()

Notify (\_SB.PCI0.RP19, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP20.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP20.HPME ()

Notify (\_SB.PCI0.RP20, 0x02)

}

If (LEqual (D1F0, One))

{

\_SB.PCI0.PEG0.HPME ()

Notify (\_SB.PCI0.PEG0, 0x02)

Notify (\_SB.PCI0.PEG0.PEGP, 0x02)

}

If (LEqual (D1F1, One))

{

\_SB.PCI0.PEG1.HPME ()

Notify (\_SB.PCI0.PEG1, 0x02)

}

If (LEqual (D1F2, One))

{

\_SB.PCI0.PEG2.HPME ()

Notify (\_SB.PCI0.PEG2, 0x02)

}

Method (_L61, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

Add (L01C, One, L01C)

P8XH (One, L01C)

If (LAnd (LNotEqual (\_SB.PCI0.RP01.VDID, 0xFFFFFFFF), \_SB.PCI0.RP01.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, One)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP01.PDCX)

{

Store (One, \_SB.PCI0.RP01.PDCX)

Store (One, \_SB.PCI0.RP01.HPSX)

If (LNot (\_SB.PCI0.RP01.PDSX))

{

Store (Zero, \_SB.PCI0.RP01.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, One)))

{

Notify (\_SB.PCI0.RP01, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP01.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP02.VDID, 0xFFFFFFFF), \_SB.PCI0.RP02.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x02)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP02.PDCX)

{

Store (One, \_SB.PCI0.RP02.PDCX)

Store (One, \_SB.PCI0.RP02.HPSX)

If (LNot (\_SB.PCI0.RP02.PDSX))

{

Store (Zero, \_SB.PCI0.RP02.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x02)))

{

Notify (\_SB.PCI0.RP02, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP02.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP03.VDID, 0xFFFFFFFF), \_SB.PCI0.RP03.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x03)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP03.PDCX)

{

Store (One, \_SB.PCI0.RP03.PDCX)

Store (One, \_SB.PCI0.RP03.HPSX)

If (LNot (\_SB.PCI0.RP03.PDSX))

{

Store (Zero, \_SB.PCI0.RP03.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x03)))

{

Notify (\_SB.PCI0.RP03, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP03.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP04.VDID, 0xFFFFFFFF), \_SB.PCI0.RP04.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x04)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP04.PDCX)

{

Store (One, \_SB.PCI0.RP04.PDCX)

Store (One, \_SB.PCI0.RP04.HPSX)

If (LNot (\_SB.PCI0.RP04.PDSX))

{

Store (Zero, \_SB.PCI0.RP04.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x04)))

{

Notify (\_SB.PCI0.RP04, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP04.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP05.VDID, 0xFFFFFFFF), \_SB.PCI0.RP05.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x05)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP05.PDCX)

{

Store (One, \_SB.PCI0.RP05.PDCX)

Store (One, \_SB.PCI0.RP05.HPSX)

If (LNot (\_SB.PCI0.RP05.PDSX))

{

Store (Zero, \_SB.PCI0.RP05.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x05)))

{

Notify (\_SB.PCI0.RP05, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP05.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP06.VDID, 0xFFFFFFFF), \_SB.PCI0.RP06.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x06)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP06.PDCX)

{

Store (One, \_SB.PCI0.RP06.PDCX)

Store (One, \_SB.PCI0.RP06.HPSX)

If (LNot (\_SB.PCI0.RP06.PDSX))

{

Store (Zero, \_SB.PCI0.RP06.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x06)))

{

Notify (\_SB.PCI0.RP06, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP06.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP07.VDID, 0xFFFFFFFF), \_SB.PCI0.RP07.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x07)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP07.PDCX)

{

Store (One, \_SB.PCI0.RP07.PDCX)

Store (One, \_SB.PCI0.RP07.HPSX)

If (LNot (\_SB.PCI0.RP07.PDSX))

{

Store (Zero, \_SB.PCI0.RP07.L0SE)

}

If (LEqual (PFLV, 0x02))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x07)))

{

Notify (\_SB.PCI0.RP07, Zero)

}

Else

{

If (ECON)

{

If (LEqual (\_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.DOCK)), Zero))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x07)))

{

Notify (\_SB.PCI0.RP07, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP07.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP08.VDID, 0xFFFFFFFF), \_SB.PCI0.RP08.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x08)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP08.PDCX)

{

Store (One, \_SB.PCI0.RP08.PDCX)

Store (One, \_SB.PCI0.RP08.HPSX)

If (LNot (\_SB.PCI0.RP08.PDSX))

{

Store (Zero, \_SB.PCI0.RP08.L0SE)

}

If (LEqual (PFLV, 0x02))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x08)))

{

Notify (\_SB.PCI0.RP08, Zero)

}

Else

{

If (ECON)

{

If (LEqual (\_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.DOCK)), Zero))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x08)))

{

Notify (\_SB.PCI0.RP08, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP08.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP09.VDID, 0xFFFFFFFF), \_SB.PCI0.RP09.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x09)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP09.PDCX)

{

Store (One, \_SB.PCI0.RP09.PDCX)

Store (One, \_SB.PCI0.RP09.HPSX)

If (LNot (\_SB.PCI0.RP09.PDSX))

{

Store (Zero, \_SB.PCI0.RP09.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x09)))

{

Notify (\_SB.PCI0.RP09, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP09.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP10.VDID, 0xFFFFFFFF), \_SB.PCI0.RP10.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0A)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP10.PDCX)

{

Store (One, \_SB.PCI0.RP10.PDCX)

Store (One, \_SB.PCI0.RP10.HPSX)

If (LNot (\_SB.PCI0.RP10.PDSX))

{

Store (Zero, \_SB.PCI0.RP10.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0A)))

{

Notify (\_SB.PCI0.RP10, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP10.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP11.VDID, 0xFFFFFFFF), \_SB.PCI0.RP11.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0B)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP11.PDCX)

{

Store (One, \_SB.PCI0.RP11.PDCX)

Store (One, \_SB.PCI0.RP11.HPSX)

If (LNot (\_SB.PCI0.RP11.PDSX))

{

Store (Zero, \_SB.PCI0.RP11.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0B)))

{

Notify (\_SB.PCI0.RP11, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP11.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP12.VDID, 0xFFFFFFFF), \_SB.PCI0.RP12.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0C)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP12.PDCX)

{

Store (One, \_SB.PCI0.RP12.PDCX)

Store (One, \_SB.PCI0.RP12.HPSX)

If (LNot (\_SB.PCI0.RP12.PDSX))

{

Store (Zero, \_SB.PCI0.RP12.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0C)))

{

Notify (\_SB.PCI0.RP12, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP12.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP13.VDID, 0xFFFFFFFF), \_SB.PCI0.RP13.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0D)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP13.PDCX)

{

Store (One, \_SB.PCI0.RP13.PDCX)

Store (One, \_SB.PCI0.RP13.HPSX)

If (LNot (\_SB.PCI0.RP13.PDSX))

{

Store (Zero, \_SB.PCI0.RP13.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0D)))

{

Notify (\_SB.PCI0.RP13, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP13.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP14.VDID, 0xFFFFFFFF), \_SB.PCI0.RP14.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0E)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP14.PDCX)

{

Store (One, \_SB.PCI0.RP14.PDCX)

Store (One, \_SB.PCI0.RP14.HPSX)

If (LNot (\_SB.PCI0.RP14.PDSX))

{

Store (Zero, \_SB.PCI0.RP14.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0E)))

{

Notify (\_SB.PCI0.RP14, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP14.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP15.VDID, 0xFFFFFFFF), \_SB.PCI0.RP15.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0F)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP15.PDCX)

{

Store (One, \_SB.PCI0.RP15.PDCX)

Store (One, \_SB.PCI0.RP15.HPSX)

If (LNot (\_SB.PCI0.RP15.PDSX))

{

Store (Zero, \_SB.PCI0.RP15.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0F)))

{

Notify (\_SB.PCI0.RP15, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP15.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP16.VDID, 0xFFFFFFFF), \_SB.PCI0.RP16.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x10)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP16.PDCX)

{

Store (One, \_SB.PCI0.RP16.PDCX)

Store (One, \_SB.PCI0.RP16.HPSX)

If (LNot (\_SB.PCI0.RP16.PDSX))

{

Store (Zero, \_SB.PCI0.RP16.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x10)))

{

Notify (\_SB.PCI0.RP16, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP16.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP17.VDID, 0xFFFFFFFF), \_SB.PCI0.RP17.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x11)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP17.PDCX)

{

Store (One, \_SB.PCI0.RP17.PDCX)

Store (One, \_SB.PCI0.RP17.HPSX)

If (LNot (\_SB.PCI0.RP17.PDSX))

{

Store (Zero, \_SB.PCI0.RP17.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x11)))

{

Notify (\_SB.PCI0.RP17, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP17.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP18.VDID, 0xFFFFFFFF), \_SB.PCI0.RP18.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x12)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP18.PDCX)

{

Store (One, \_SB.PCI0.RP18.PDCX)

Store (One, \_SB.PCI0.RP18.HPSX)

If (LNot (\_SB.PCI0.RP18.PDSX))

{

Store (Zero, \_SB.PCI0.RP18.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x12)))

{

Notify (\_SB.PCI0.RP18, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP18.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP19.VDID, 0xFFFFFFFF), \_SB.PCI0.RP19.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x13)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP19.PDCX)

{

Store (One, \_SB.PCI0.RP19.PDCX)

Store (One, \_SB.PCI0.RP19.HPSX)

If (LNot (\_SB.PCI0.RP19.PDSX))

{

Store (Zero, \_SB.PCI0.RP19.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x13)))

{

Notify (\_SB.PCI0.RP19, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP19.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP20.VDID, 0xFFFFFFFF), \_SB.PCI0.RP20.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x14)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP20.PDCX)

{

Store (One, \_SB.PCI0.RP20.PDCX)

Store (One, \_SB.PCI0.RP20.HPSX)

If (LNot (\_SB.PCI0.RP20.PDSX))

{

Store (Zero, \_SB.PCI0.RP20.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x14)))

{

Notify (\_SB.PCI0.RP20, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP20.HPSX)

}

Method (_L62, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

Store (Zero, GPEC)

If (CondRefOf (\_PR.DTSE))

{

If (LGreaterEqual (\_PR.DTSE, One))

{

Notify (\_TZ.TZ00, 0x80)

Notify (\_TZ.TZ01, 0x80)

}

If (CondRefOf (\_GPE.HLVT))

{

HLVT

}

Method (_L66, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

If (LAnd (\_SB.PCI0.GFX0.GSSE, LNot (GSMI)))

{

\_SB.PCI0.GFX0.GSCI ()

}

Method (_L67, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

Store (0x20, \_SB.PCI0.SBUS.HSTS)

}

Name (PRES, One)

Method (_L6F, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

\_SB.UGPS ()

If (LEqual (RTD3, One))

{

If (CondRefOf (\_GPE.AL6F))

{

AL6F

}

If (LEqual (SGGP, One))

{

If (CondRefOf (\_GPE.P0L6))

{

P0L6

\_SB.CAGS (P0WK)

}

If (LEqual (P1GP, One))

{

If (CondRefOf (\_GPE.P1L6))

{

P1L6

\_SB.CAGS (P1WK)

}

If (LEqual (P2GP, One))

{

If (CondRefOf (\_GPE.P2L6))

{

P2L6

\_SB.CAGS (P2WK)

}

If (LEqual (TBTS, One))

{

If (\_SB.ISME (CPGN))

{

\_SB.THDR ()

}

\_SB.CGLS ()

}

If (LEqual (CAMT, Zero))

{

Scope (_SB)

{

Device (ICAM)

{

Name (_HID, "INT33A3") // _HID: Hardware ID

Name (IDFU, Zero)

Name (IPWR, Zero)

Method (_STA, 0, Serialized) // _STA: Status

{

If (LEqual (IVDF, One))

{

Return (0x0F)

}

Return (Zero)

}

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xF7, 0x0F, 0xCF, 0xF5, 0x60, 0x5D, 0x42, 0x48,

/* 0008 */ 0x82, 0xC0, 0xFA, 0x1A, 0x61, 0xD8, 0x73, 0xF2

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

If (LEqual (ToInteger (Arg1), Zero))

{

Return (Buffer (One)

{

0x07

})

}

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_0, One))

{

If (LEqual (DerefOf (Index (Arg3, Zero)), Zero))

{

If (LEqual (BID, 0x20))

{

SGOV (0x02040000, Zero)

Store (Zero, IDFU)

}

If (LOr (LOr (LOr (LEqual (BID, 0x04), LEqual (BID, 0x14)),

LEqual (BID, 0x0B)), LEqual (BID, 0x1B)))

{

If (CondRefOf (\_SB.PCI0.GEXP.SGEP))

{

^^PCI0.GEXP.SGEP (Zero, 0x12, Zero)

Store (Zero, IDFU)

}

Else

{

If (LEqual (BID, 0x20))

{

SGOV (0x02040000, One)

Store (One, IDFU)

}

If (LOr (LOr (LOr (LEqual (BID, 0x04), LEqual (BID, 0x14)),

LEqual (BID, 0x0B)), LEqual (BID, 0x1B)))

{

If (CondRefOf (\_SB.PCI0.GEXP.SGEP))

{

^^PCI0.GEXP.SGEP (Zero, 0x12, One)

Store (One, IDFU)

}

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x02))

{

If (LEqual (DerefOf (Index (Arg3, Zero)), Zero))

{

If (LEqual (BID, 0x20))

{

SGOV (0x02010002, Zero)

Store (One, IPWR)

}

If (LOr (LOr (LOr (LEqual (BID, 0x04), LEqual (BID, 0x14)),

LEqual (BID, 0x0B)), LEqual (BID, 0x1B)))

{

If (CondRefOf (\_SB.PCI0.GEXP.SGEP))

{

^^PCI0.GEXP.SGEP (Zero, 0x11, Zero)

Store (One, IPWR)

}

Else

{

If (LEqual (BID, 0x20))

{

SGOV (0x02010002, One)

Store (Zero, IPWR)

}

If (LOr (LOr (LOr (LEqual (BID, 0x04), LEqual (BID, 0x14)),

LEqual (BID, 0x0B)), LEqual (BID, 0x1B)))

{

If (CondRefOf (\_SB.PCI0.GEXP.SGEP))

{

^^PCI0.GEXP.SGEP (Zero, 0x11, One)

Store (Zero, IPWR)

}

Return (Zero)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (PCHV (), SPTL))

{

If (LNotEqual (SDWE, Zero))

{

Scope (_SB.PCI0.PSDC)

{

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

If (LLess (OSYS, 0x07DC))

{

Return (ResourceTemplate ()

{

})

}

Name (RBUF, ResourceTemplate ()

{

GpioInt (Edge, ActiveHigh, SharedAndWake, PullNone, 0x2710,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0000

}

GpioIo (Shared, PullDefault, 0x0000, 0x0000, IoRestrictionInputOnly,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0000

}

})

CreateWordField (RBUF, 0x17, SDIP)

CreateWordField (RBUF, 0x3F, SDGP)

If (LEqual (SDWE, One))

{

Store (GNUM (0x02010011), SDIP)

Store (GNUM (0x02010011), SDGP)

}

If (LEqual (SDWE, 0x02))

{

Store (GNUM (0x02060005), SDIP)

Store (GNUM (0x02060005), SDGP)

}

Return (RBUF)

}

If (CondRefOf (\_SB.PCI0.RP01.PXSX))

{

Scope (_SB.PCI0.RP01.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP02.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP03.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP04.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

If (CondRefOf (\_SB.PCI0.RP05.PXSX))

{

Scope (_SB.PCI0.RP05.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP06.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP07.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP08.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

If (CondRefOf (\_SB.PCI0.RP09.PXSX))

{

Scope (_SB.PCI0.RP09.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP10.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP11.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP12.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP13.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP14.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP15.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP16.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP17.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP18.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP19.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP20.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0)

{

Method (WHIT, 0, NotSerialized)

{

Return (Package (0x01)

{

Package (0x05)

{

"DockOemId",

"DockSkuId",

Zero,

0x02,

0x02

}

})

}

Method (SELF, 0, NotSerialized)

{

Return (Package (0x02)

{

"PcOemId",

"PcSkuId"

})

}

Scope (_SB.PCI0.GFX0)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)))

{

Return (Package (0x01)

{

PEPD

})

}

Else

{

Return (Package (0x00) {})

}

Scope (_SB.PCI0.SAT0)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LNotEqual (And (PEPC, 0x03), Zero)))

{

Return (Package (0x01)

{

PEPD

})

}

Else

{

Return (Package (0x00) {})

}

If (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)))

{

Scope (_SB.PCI0.I2C0)

{

Name (_DEP, Package (0x01) // _DEP: Dependencies

{

PEPD

})

}

Scope (_SB.PCI0.I2C1)

{

Name (_DEP, Package (0x01) // _DEP: Dependencies

{

PEPD

})

}

Scope (_SB.PCI0.I2C2)

{

Name (_DEP, Package (0x01) // _DEP: Dependencies

{

PEPD

})

}

Scope (_SB.PCI0.I2C3)

{

Name (_DEP, Package (0x01) // _DEP: Dependencies

{

PEPD

})

}

Scope (_SB.PCI0.I2C4)

{

Name (_DEP, Package (0x01) // _DEP: Dependencies

{

PEPD

})

}

Scope (_SB.PCI0.I2C5)

{

Name (_DEP, Package (0x01) // _DEP: Dependencies

{

PEPD

})

}

Scope (_SB.PCI0.SPI0)

{

Name (_DEP, Package (0x01) // _DEP: Dependencies

{

PEPD

})

}

Scope (_SB.PCI0.SPI1)

{

Name (_DEP, Package (0x01) // _DEP: Dependencies

{

PEPD

})

}

Scope (_SB.PCI0.UA00)

{

Name (_DEP, Package (0x01) // _DEP: Dependencies

{

PEPD

})

}

Scope (_SB.PCI0.UA01)

{

Name (_DEP, Package (0x01) // _DEP: Dependencies

{

PEPD

})

}

Scope (_SB.PCI0.UA02)

{

Name (_DEP, Package (0x01) // _DEP: Dependencies

{

PEPD

})

}

Scope (_SB.PCI0.XHC)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)))

{

Return (Package (0x01)

{

PEPD

})

}

Else

{

Return (Package (0x00) {})

}

If (CondRefOf (\_SB.PCI0.RP01.PXSX))

{

Scope (_SB.PCI0.RP01.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP02.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP03.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP04.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

If (CondRefOf (\_SB.PCI0.RP05.PXSX))

{

Scope (_SB.PCI0.RP05.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP06.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP07.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP08.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

If (CondRefOf (\_SB.PCI0.RP09.PXSX))

{

Scope (_SB.PCI0.RP09.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP10.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP11.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP12.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP13.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP14.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP15.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP16.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP17.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP18.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP19.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP20.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_PR.CPU0)

{

Method (XDEP, 0, NotSerialized)

{

ADBG ("CPU0 DEP Call")

If (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)))

{

ADBG ("CPU0 DEP")

Return (Package (0x01)

{

\_SB.PEPD

})

}

Else

{

ADBG ("CPU0 DEP NULL")

Return (Package (0x00) {})

}

Scope (_PR.CPU1)

{

Method (XDEP, 0, NotSerialized)

{

ADBG ("CPU1 DEP Call")

If (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)))

{

ADBG ("CPU1 DEP")

Return (Package (0x01)

{

\_SB.PEPD

})

}

Else

{

ADBG ("CPU1 DEP NULL")

Return (Package (0x00) {})

}

Scope (_PR.CPU2)

{

Method (XDEP, 0, NotSerialized)

{

ADBG ("CPU2 DEP Call")

If (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)))

{

ADBG ("CPU2 DEP")

Return (Package (0x01)

{

\_SB.PEPD

})

}

Else

{

ADBG ("CPU2 DEP NULL")

Return (Package (0x00) {})

}

Scope (_PR.CPU3)

{

Method (XDEP, 0, NotSerialized)

{

ADBG ("CPU3 DEP Call")

If (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)))

{

ADBG ("CPU3 DEP")

Return (Package (0x01)

{

\_SB.PEPD

})

}

Else

{

ADBG ("CPU3 DEP NULL")

Return (Package (0x00) {})

}

Scope (_PR.CPU4)

{

Method (XDEP, 0, NotSerialized)

{

ADBG ("CPU4 DEP Call")

If (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)))

{

ADBG ("CPU4 DEP")

Return (Package (0x01)

{

\_SB.PEPD

})

}

Else

{

ADBG ("CPU4 DEP NULL")

Return (Package (0x00) {})

}

Scope (_PR.CPU5)

{

Method (XDEP, 0, NotSerialized)

{

ADBG ("CPU5 DEP Call")

If (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)))

{

ADBG ("CPU5 DEP")

Return (Package (0x01)

{

\_SB.PEPD

})

}

Else

{

ADBG ("CPU5 DEP NULL")

Return (Package (0x00) {})

}

Scope (_PR.CPU6)

{

Method (XDEP, 0, NotSerialized)

{

ADBG ("CPU6 DEP Call")

If (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)))

{

ADBG ("CPU6 DEP")

Return (Package (0x01)

{

\_SB.PEPD

})

}

Else

{

ADBG ("CPU6 DEP NULL")

Return (Package (0x00) {})

}

Scope (_PR.CPU7)

{

Method (XDEP, 0, NotSerialized)

{

ADBG ("CPU7 DEP Call")

If (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)))

{

ADBG ("CPU7 DEP")

Return (Package (0x01)

{

\_SB.PEPD

})

}

Else

{

ADBG ("CPU7 DEP NULL")

Return (Package (0x00) {})

}

Scope (_SB)

{

Device (PEPD)

{

Name (_HID, "INT33A1") // _HID: Hardware ID

Name (_CID, EisaId ("PNP0D80")) // _CID: Compatible ID

Name (_UID, One) // _UID: Unique ID

Name (DEVY, Package (0x29)

{

Package (0x03)

{

"\\_PR.CPU0",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

Zero

}

Package (0x03)

{

"\\_PR.CPU1",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

Zero

}

Package (0x03)

{

"\\_PR.CPU2",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

Zero

}

Package (0x03)

{

"\\_PR.CPU3",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

Zero

}

Package (0x03)

{

"\\_SB.PCI0.GFX0",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.SAT0",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.UA00",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.UA01",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.I2C0",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.I2C1",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.XHC",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"INTELAUDIO\\FUNC_01&VEN_10EC*",

One,

Package (0x03)

{

Zero,

Package (0x02)

{

Zero,

Zero

Package (0x02)

{

One,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.PEMC",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.PSDC",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.I2C2",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.I2C3",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.I2C4",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.I2C5",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.UA02",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.SPI0",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.SPI1",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.RP01.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP02.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP03.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP04.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP05.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP06.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP07.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP08.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP09.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP10.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP11.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP12.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP13.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP14.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP15.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP16.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP17.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP18.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP19.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP20.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

})

Name (BCCD, Package (0x19)

{

Package (0x02)

{

"\\_SB.PCI0.SAT0",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x3E80

}

Package (0x02)

{

"\\_SB.PCI0.SAT0.PRT0",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x3E80

}

Package (0x02)

{

"\\_SB.PCI0.SAT0.PRT1",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x3E80

}

Package (0x02)

{

"\\_SB.PCI0.SAT0.PRT2",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x3E80

}

Package (0x02)

{

"\\_SB.PCI0.SAT0.PRT3",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x3E80

}

Package (0x02)

{

"\\_SB.PCI0.RP01.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP02.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP03.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP04.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP05.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP06.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP07.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP08.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP09.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP10.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP11.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP12.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP13.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP14.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP15.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP16.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP17.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP18.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP19.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP20.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

})

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LOr (LGreaterEqual (OSYS, 0x07DF), LAnd (LGreaterEqual (OSYS,

0x07DC), LEqual (S0ID, One))))

{

Return (0x0F)

}

Return (Zero)

}

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

ADBG (Concatenate ("PEPC = ", ToHexString (PEPC)))

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xA0, 0x40, 0xEB, 0xC4, 0xD2, 0x6C, 0xE2, 0x11,

/* 0008 */ 0xBC, 0xFD, 0x08, 0x00, 0x20, 0x0C, 0x9A, 0x66

}))

{

If (LEqual (Arg2, Zero))

{

Return (Buffer (One)

{

0x7F

})

}

If (LEqual (Arg2, One))

{

If (LEqual (S0ID, Zero))

{

Return (Package (0x00) {})

}

If (LEqual (And (PEPC, 0x03), One))

{

If (And (SPST, 0x0F))

{

Store (One, Index (DerefOf (Index (DEVY, 0x05)), One))

}

If (CondRefOf (\_SB.PCI0.RP01.PXSX))

{

If (LOr (^^PCI0.RP01.PXSX.PAHC (), ^^PCI0.RP01.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x15)), One))

}

If (LOr (^^PCI0.RP02.PXSX.PAHC (), ^^PCI0.RP02.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x16)), One))

}

If (LOr (^^PCI0.RP03.PXSX.PAHC (), ^^PCI0.RP03.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x17)), One))

}

If (LOr (^^PCI0.RP04.PXSX.PAHC (), ^^PCI0.RP04.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x18)), One))

}

If (CondRefOf (\_SB.PCI0.RP05.PXSX))

{

If (LOr (^^PCI0.RP05.PXSX.PAHC (), ^^PCI0.RP05.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x19)), One))

}

If (LOr (^^PCI0.RP06.PXSX.PAHC (), ^^PCI0.RP06.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x1A)), One))

}

If (LOr (^^PCI0.RP07.PXSX.PAHC (), ^^PCI0.RP07.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x1B)), One))

}

If (LOr (^^PCI0.RP08.PXSX.PAHC (), ^^PCI0.RP08.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x1C)), One))

}

If (CondRefOf (\_SB.PCI0.RP09.PXSX))

{

If (LOr (^^PCI0.RP09.PXSX.PAHC (), ^^PCI0.RP09.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x1D)), One))

}

If (LOr (^^PCI0.RP10.PXSX.PAHC (), ^^PCI0.RP10.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x1E)), One))

}

If (LOr (^^PCI0.RP11.PXSX.PAHC (), ^^PCI0.RP11.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x1F)), One))

}

If (LOr (^^PCI0.RP12.PXSX.PAHC (), ^^PCI0.RP12.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x20)), One))

}

If (LOr (^^PCI0.RP13.PXSX.PAHC (), ^^PCI0.RP13.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x21)), One))

}

If (LOr (^^PCI0.RP14.PXSX.PAHC (), ^^PCI0.RP14.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x22)), One))

}

If (LOr (^^PCI0.RP15.PXSX.PAHC (), ^^PCI0.RP15.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x23)), One))

}

If (LOr (^^PCI0.RP16.PXSX.PAHC (), ^^PCI0.RP16.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x24)), One))

}

If (LOr (^^PCI0.RP17.PXSX.PAHC (), ^^PCI0.RP17.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x25)), One))

}

If (LOr (^^PCI0.RP18.PXSX.PAHC (), ^^PCI0.RP18.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x26)), One))

}

If (LOr (^^PCI0.RP19.PXSX.PAHC (), ^^PCI0.RP19.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x27)), One))

}

If (LOr (^^PCI0.RP20.PXSX.PAHC (), ^^PCI0.RP20.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x28)), One))

}

If (LEqual (And (PEPC, 0x04), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x06)), One))

}

If (LEqual (And (PEPC, 0x08), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x07)), One))

}

If (LEqual (And (PEPC, 0x10), Zero)) {}

If (LEqual (And (PEPC, 0x20), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x08)), One))

}

If (LEqual (And (PEPC, 0x40), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x09)), One))

}

If (LEqual (And (PEPC, 0x80), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x0A)), One))

}

If (LEqual (And (PEPC, 0x0100), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x0B)), One))

}

If (LEqual (And (PEPC, 0x0200), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x04)), One))

}

If (LEqual (And (PEPC, 0x0400), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, Zero)), One))

Store (Zero, Index (DerefOf (Index (DEVY, One)), One))

Store (Zero, Index (DerefOf (Index (DEVY, 0x02)), One))

Store (Zero, Index (DerefOf (Index (DEVY, 0x03)), One))

}

If (LEqual (And (PEPC, 0x0800), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x0C)), One))

}

If (LEqual (And (PEPC, 0x1000), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x0D)), One))

}

If (LEqual (And (PEPC, 0x2000), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x0E)), One))

}

If (LEqual (And (PEPC, 0x4000), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x0F)), One))

}

If (LEqual (And (PEPC, 0x8000), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x10)), One))

}

If (LEqual (And (PEPC, 0x00010000), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x11)), One))

}

If (LEqual (And (PEPC, 0x00020000), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x12)), One))

}

If (LEqual (And (PEPC, 0x00040000), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x13)), One))

}

If (LEqual (And (PEPC, 0x00080000), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x14)), One))

}

If (LGreaterEqual (OSYS, 0x07DF))

{

If (CondRefOf (\_SB.PCI0.RP01.PXSX))

{

If (^^PCI0.RP01.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x15)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x15)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x15)), One))

}

If (^^PCI0.RP02.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x16)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x16)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x16)), One))

}

If (^^PCI0.RP03.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x17)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x17)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x17)), One))

}

If (^^PCI0.RP04.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x18)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x18)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x18)), One))

}

If (CondRefOf (\_SB.PCI0.RP05.PXSX))

{

If (^^PCI0.RP05.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x19)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x19)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x19)), One))

}

If (^^PCI0.RP06.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1A)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1A)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x1A)), One))

}

If (^^PCI0.RP07.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1B)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1B)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x1B)), One))

}

If (^^PCI0.RP08.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1C)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1C)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x1C)), One))

}

If (CondRefOf (\_SB.PCI0.RP09.PXSX))

{

If (^^PCI0.RP09.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1D)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1D)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x1D)), One))

}

If (^^PCI0.RP10.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1E)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1E)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x1E)), One))

}

If (^^PCI0.RP11.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1F)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1F)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x1F)), One))

}

If (^^PCI0.RP12.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x20)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x20)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x20)), One))

}

If (^^PCI0.RP13.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x21)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x21)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x21)), One))

}

If (^^PCI0.RP14.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x22)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x22)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x22)), One))

}

If (^^PCI0.RP15.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x23)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x23)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x23)), One))

}

If (^^PCI0.RP16.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x24)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x24)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x24)), One))

}

If (^^PCI0.RP17.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x25)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x25)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x25)), One))

}

If (^^PCI0.RP18.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x26)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x26)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x26)), One))

}

If (^^PCI0.RP19.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x27)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x27)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x27)), One))

}

If (^^PCI0.RP20.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x28)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x28)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x28)), One))

}

Return (DEVY)

}

If (LEqual (Arg2, 0x02))

{

Return (BCCD)

}

If (LEqual (Arg2, 0x03)) {}

If (LEqual (Arg2, 0x04)) {}

If (LEqual (Arg2, 0x05))

{

If (LEqual (S0ID, One))

{

GUAM (One)

}

If (LEqual (Arg2, 0x06))

{

If (LEqual (S0ID, One))

{

GUAM (Zero)

}

Return (One)

}

Scope (_SB.PCI0)

{

Method (IICB, 2, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

While (One)

{

Store (Arg1, _T_0)

If (LEqual (_T_0, Zero))

{

Name (IIC0, ResourceTemplate ()

{

I2cSerialBus (0x0000, ControllerInitiated, 0x00061A80,

AddressingMode7Bit, "\\_SB.PCI0.I2C0",

0x00, ResourceConsumer, _Y3E,

)

})

CreateWordField (IIC0, \_SB.PCI0.IICB._Y3E._ADR, DAD0) // _ADR: Address

Store (Arg0, DAD0)

Return (IIC0)

}

Else

{

If (LEqual (_T_0, One))

{

Name (IIC1, ResourceTemplate ()

{

I2cSerialBus (0x0000, ControllerInitiated, 0x00061A80,

AddressingMode7Bit, "\\_SB.PCI0.I2C1",

0x00, ResourceConsumer, _Y3F,

)

})

CreateWordField (IIC1, \_SB.PCI0.IICB._Y3F._ADR, DAD1) // _ADR: Address

Store (Arg0, DAD1)

Return (IIC1)

}

Else

{

If (LEqual (_T_0, 0x02))

{

Name (IIC2, ResourceTemplate ()

{

I2cSerialBus (0x0000, ControllerInitiated, 0x00061A80,

AddressingMode7Bit, "\\_SB.PCI0.I2C2",

0x00, ResourceConsumer, _Y40,

)

})

CreateWordField (IIC2, \_SB.PCI0.IICB._Y40._ADR, DAD2) // _ADR: Address

Store (Arg0, DAD2)

Return (IIC2)

}

Else

{

If (LEqual (_T_0, 0x03))

{

Name (IIC3, ResourceTemplate ()

{

I2cSerialBus (0x0000, ControllerInitiated, 0x00061A80,

AddressingMode7Bit, "\\_SB.PCI0.I2C3",

0x00, ResourceConsumer, _Y41,

)

})

CreateWordField (IIC3, \_SB.PCI0.IICB._Y41._ADR, DAD3) // _ADR: Address

Store (Arg0, DAD3)

Return (IIC3)

}

Else

{

If (LEqual (_T_0, 0x04))

{

Name (IIC4, ResourceTemplate ()

{

I2cSerialBus (0x0000, ControllerInitiated, 0x00061A80,

AddressingMode7Bit, "\\_SB.PCI0.I2C4",

0x00, ResourceConsumer, _Y42,

)

})

CreateWordField (IIC4, \_SB.PCI0.IICB._Y42._ADR, DAD4) // _ADR: Address

Store (Arg0, DAD4)

Return (IIC4)

}

Else

{

Name (IIC5, ResourceTemplate ()

{

I2cSerialBus (0x0000, ControllerInitiated, 0x00061A80,

AddressingMode7Bit, "\\_SB.PCI0.I2C5",

0x00, ResourceConsumer, _Y43,

)

})

CreateWordField (IIC5, \_SB.PCI0.IICB._Y43._ADR, DAD5) // _ADR: Address

Store (Arg0, DAD5)

Return (IIC5)

}

Break

}

Method (PINR, 2, Serialized)

{

Name (GPIR, ResourceTemplate ()

{

GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0xFFFF

}

})

CreateWordField (GPIR, 0x17, PINF)

Store (Add (Multiply (0x18, Arg1), Arg0), PINF)

Return (GPIR)

}

Method (DSMI, 4, Serialized)

{

ShiftLeft (Arg3, 0x18, Local3)

ShiftLeft (Arg2, 0x10, Local2)

ShiftLeft (Arg1, 0x08, Local1)

Or (Local1, Arg0, Local0)

Or (Local0, Local2, Local0)

Or (Local0, Local3, Local0)

Return (Local0)

}

Method (GPPI, 4, Serialized)

{

ShiftLeft (Arg3, 0x18, Local3)

ShiftLeft (Arg2, 0x10, Local2)

ShiftLeft (Arg1, 0x08, Local1)

Or (Local1, Arg0, Local0)

Or (Local0, Local2, Local0)

Or (Local0, Local3, Local0)

Return (Local0)

}

Method (GRID, 1, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

Name (BUF, Buffer (0x09) {})

While (One)

{

Store (Arg0, _T_0)

If (LEqual (_T_0, Zero))

{

Store (L0H0, Index (BUF, Zero))

Store (L0H1, Index (BUF, One))

Store (L0H2, Index (BUF, 0x02))

Store (L0H3, Index (BUF, 0x03))

Store (L0H4, Index (BUF, 0x04))

Store (L0H5, Index (BUF, 0x05))

Store (L0H6, Index (BUF, 0x06))

Store (L0H7, Index (BUF, 0x07))

Store (L0H8, Index (BUF, 0x08))

}

Else

{

If (LEqual (_T_0, One))

{

Store (L1H0, Index (BUF, Zero))

Store (L1H1, Index (BUF, One))

Store (L1H2, Index (BUF, 0x02))

Store (L1H3, Index (BUF, 0x03))

Store (L1H4, Index (BUF, 0x04))

Store (L1H5, Index (BUF, 0x05))

Store (L1H6, Index (BUF, 0x06))

Store (L1H7, Index (BUF, 0x07))

Store (L1H8, Index (BUF, 0x08))

}

Else

{

If (LEqual (_T_0, 0x02))

{

Store (L2H0, Index (BUF, Zero))

Store (L2H1, Index (BUF, One))

Store (L2H2, Index (BUF, 0x02))

Store (L2H3, Index (BUF, 0x03))

Store (L2H4, Index (BUF, 0x04))

Store (L2H5, Index (BUF, 0x05))

Store (L2H6, Index (BUF, 0x06))

Store (L2H7, Index (BUF, 0x07))

Store (L2H8, Index (BUF, 0x08))

}

Else

{

Store (L3H0, Index (BUF, Zero))

Store (L3H1, Index (BUF, One))

Store (L3H2, Index (BUF, 0x02))

Store (L3H3, Index (BUF, 0x03))

Store (L3H4, Index (BUF, 0x04))

Store (L3H5, Index (BUF, 0x05))

Store (L3H6, Index (BUF, 0x06))

Store (L3H7, Index (BUF, 0x07))

Store (L3H8, Index (BUF, 0x08))

}

Break

}

Return (ToString (BUF, Ones))

}

Method (HCID, 1, Serialized)

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

While (One)

{

Store (Arg0, _T_0)

If (LEqual (_T_0, Zero))

{

Store (L0SM, Local0)

}

Else

{

If (LEqual (_T_0, One))

{

Store (L1SM, Local0)

}

Else

{

If (LEqual (_T_0, 0x02))

{

Store (L2SM, Local0)

}

Else

{

Store (L3SM, Local0)

}

Break

}

While (One)

{

Store (Local0, _T_1)

If (LEqual (_T_1, Zero))

{

Return ("INT3471")

}

Else

{

If (LEqual (_T_1, One))

{

Return ("INT33BE")

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return ("INT3476")

}

Else

{

If (LEqual (_T_1, 0x03))

{

Return ("INT3477")

}

Else

{

If (LEqual (_T_1, 0x04))

{

Return ("INT3474")

}

Else

{

If (LEqual (_T_1, 0x05))

{

Return ("INT3473")

}

Else

{

If (LEqual (_T_1, 0x06))

{

Return ("INT3475")

}

Else

{

If (LEqual (_T_1, 0x07))

{

Return ("INT3478")

}

Else

{

If (LEqual (_T_1, 0x08))

{

Return ("INT3479")

}

Else

{

If (LEqual (_T_1, 0x09))

{

Return ("INT347A")

}

Else

{

If (LEqual (_T_1, 0x0A))

{

Return ("INT347B")

}

Else

{

Return (GRID (Arg0))

}

Break

}

Method (CDEP, 1, Serialized)

{

Name (_T_3, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_2, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Zero))

{

If (LEqual (C0TP, One))

{

While (One)

{

Store (L0BS, _T_0)

If (LEqual (_T_0, Zero))

{

Return (Package (0x02)

{

DSC0,

I2C0

})

}

Else

{

If (LEqual (_T_0, One))

{

Return (Package (0x02)

{

DSC0,

I2C1

})

}

Else

{

If (LEqual (_T_0, 0x02))

{

Return (Package (0x02)

{

DSC0,

I2C2

})

}

Else

{

If (LEqual (_T_0, 0x03))

{

Return (Package (0x02)

{

DSC0,

I2C3

})

}

Else

{

If (LEqual (_T_0, 0x04))

{

Return (Package (0x02)

{

DSC0,

I2C4

})

}

Else

{

If (LEqual (_T_0, 0x05))

{

Return (Package (0x02)

{

DSC0,

I2C5

})

}

Else

{

Return (Package (0x01)

{

DSC0

})

}

Break

}

If (LGreater (C0TP, One))

{

Return (Package (0x01)

{

CLP0

})

}

If (LEqual (Arg0, One))

{

If (LEqual (C1TP, One))

{

While (One)

{

Store (L1BS, _T_1)

If (LEqual (_T_1, Zero))

{

Return (Package (0x02)

{

DSC1,

I2C0

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (Package (0x02)

{

DSC1,

I2C1

})

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (Package (0x02)

{

DSC1,

I2C2

})

}

Else

{

If (LEqual (_T_1, 0x03))

{

Return (Package (0x02)

{

DSC1,

I2C3

})

}

Else

{

If (LEqual (_T_1, 0x04))

{

Return (Package (0x02)

{

DSC1,

I2C4

})

}

Else

{

If (LEqual (_T_1, 0x05))

{

Return (Package (0x02)

{

DSC1,

I2C5

})

}

Else

{

Return (Package (0x01)

{

DSC1

})

}

Break

}

If (LGreater (C1TP, One))

{

Return (Package (0x01)

{

CLP1

})

}

If (LEqual (Arg0, 0x02))

{

If (LEqual (C2TP, One))

{

While (One)

{

Store (L2BS, _T_2)

If (LEqual (_T_2, Zero))

{

Return (Package (0x02)

{

DSC2,

I2C0

})

}

Else

{

If (LEqual (_T_2, One))

{

Return (Package (0x02)

{

DSC2,

I2C1

})

}

Else

{

If (LEqual (_T_2, 0x02))

{

Return (Package (0x02)

{

DSC2,

I2C2

})

}

Else

{

If (LEqual (_T_2, 0x03))

{

Return (Package (0x02)

{

DSC2,

I2C3

})

}

Else

{

If (LEqual (_T_2, 0x04))

{

Return (Package (0x02)

{

DSC2,

I2C4

})

}

Else

{

If (LEqual (_T_2, 0x05))

{

Return (Package (0x02)

{

DSC2,

I2C5

})

}

Else

{

Return (Package (0x01)

{

DSC2

})

}

Break

}

If (LGreater (C2TP, One))

{

Return (Package (0x01)

{

CLP2

})

}

If (LEqual (Arg0, 0x03))

{

If (LEqual (C3TP, One))

{

While (One)

{

Store (L3BS, _T_3)

If (LEqual (_T_3, Zero))

{

Return (Package (0x02)

{

DSC3,

I2C0

})

}

Else

{

If (LEqual (_T_3, One))

{

Return (Package (0x02)

{

DSC3,

I2C1

})

}

Else

{

If (LEqual (_T_3, 0x02))

{

Return (Package (0x02)

{

DSC3,

I2C2

})

}

Else

{

If (LEqual (_T_3, 0x03))

{

Return (Package (0x02)

{

DSC3,

I2C3

})

}

Else

{

If (LEqual (_T_3, 0x04))

{

Return (Package (0x02)

{

DSC3,

I2C4

})

}

Else

{

If (LEqual (_T_3, 0x05))

{

Return (Package (0x02)

{

DSC3,

I2C5

})

}

Else

{

Return (Package (0x01)

{

DSC3

})

}

Break

}

If (LGreater (C3TP, One))

{

Return (Package (0x01)

{

CLP3

})

}

Return (Package (0x01)

{

PCI0

})

}

Device (DSC0)

{

Name (_ADR, Zero) // _ADR: Address

Name (_HID, "INT3472") // _HID: Hardware ID

Name (_CID, "INT3472") // _CID: Compatible ID

Name (_DDN, "PMIC-CRDG") // _DDN: DOS Device Name

Name (_UID, Zero) // _UID: Unique ID

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

If (LGreater (C0GP, Zero))

{

Store (PINR (C0P0, C0G0), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C0GP, One))

{

Store (PINR (C0P1, C0G1), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C0GP, 0x02))

{

Store (PINR (C0P2, C0G2), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C0GP, 0x03))

{

Store (PINR (C0P3, C0G3), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

Return (Local0)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (CL00)

{

If (LEqual (C0TP, One))

{

Return (0x0F)

}

Return (Zero)

}

Method (CLDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x20)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

Store (C0TP, Index (PAR, One))

Store (C0CV, Index (PAR, 0x03))

Return (PAR)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x40, 0x46, 0x23, 0x79, 0x10, 0x9E, 0xEA, 0x4F,

/* 0008 */ 0xA5, 0xC1, 0xB5, 0xAA, 0x8B, 0x19, 0x75, 0x6F

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x3F

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (C0GP)

}

If (LEqual (Arg2, 0x02))

{

Return (GPPI (C0F0, Add (Multiply (0x18, C0G0), C0P0),

C0I0, C0A0))

}

If (LEqual (Arg2, 0x03))

{

Return (GPPI (C0F1, Add (Multiply (0x18, C0G1), C0P1),

C0I1, C0A1))

}

If (LEqual (Arg2, 0x04))

{

Return (GPPI (C0F2, Add (Multiply (0x18, C0G2), C0P2),

C0I2, C0A2))

}

If (LEqual (Arg2, 0x05))

{

Return (GPPI (C0F3, Add (Multiply (0x18, C0G3), C0P3),

C0I3, C0A3))

}

Return (Buffer (One)

{

0x00

})

}

Device (DSC1)

{

Name (_ADR, Zero) // _ADR: Address

Name (_HID, "INT3472") // _HID: Hardware ID

Name (_CID, "INT3472") // _CID: Compatible ID

Name (_DDN, "PMIC-CRDG") // _DDN: DOS Device Name

Name (_UID, One) // _UID: Unique ID

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

If (LGreater (C1GP, Zero))

{

Store (PINR (C1P0, C1G0), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C1GP, One))

{

Store (PINR (C1P1, C1G1), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C1GP, 0x02))

{

Store (PINR (C1P2, C1G2), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C1GP, 0x03))

{

Store (PINR (C1P3, C1G3), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

Return (Local0)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (CL01)

{

If (LEqual (C1TP, One))

{

Return (0x0F)

}

Return (Zero)

}

Method (CLDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x20)

{

/* 0000 */ 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

Store (C1TP, Index (PAR, One))

Store (C1CV, Index (PAR, 0x03))

Return (PAR)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x40, 0x46, 0x23, 0x79, 0x10, 0x9E, 0xEA, 0x4F,

/* 0008 */ 0xA5, 0xC1, 0xB5, 0xAA, 0x8B, 0x19, 0x75, 0x6F

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x3F

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (C1GP)

}

If (LEqual (Arg2, 0x02))

{

Return (GPPI (C1F0, Add (Multiply (0x18, C1G0), C1P0),

C1I0, C1A0))

}

If (LEqual (Arg2, 0x03))

{

Return (GPPI (C1F1, Add (Multiply (0x18, C1G1), C1P1),

C1I1, C1A1))

}

If (LEqual (Arg2, 0x04))

{

Return (GPPI (C1F2, Add (Multiply (0x18, C1G2), C1P2),

C1I2, C1A2))

}

If (LEqual (Arg2, 0x05))

{

Return (GPPI (C1F3, Add (Multiply (0x18, C1G3), C1P3),

C1I3, C1A3))

}

Device (DSC2)

{

Name (_ADR, Zero) // _ADR: Address

Name (_HID, "INT3472") // _HID: Hardware ID

Name (_CID, "INT3472") // _CID: Compatible ID

Name (_DDN, "PMIC-CRDG") // _DDN: DOS Device Name

Name (_UID, 0x02) // _UID: Unique ID

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

If (LGreater (C2GP, Zero))

{

Store (PINR (C2P0, C2G0), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C2GP, One))

{

Store (PINR (C2P1, C2G1), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C2GP, 0x02))

{

Store (PINR (C2P2, C2G2), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C2GP, 0x03))

{

Store (PINR (C2P3, C2G3), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

Return (Local0)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (CL02)

{

If (LEqual (C2TP, One))

{

Return (0x0F)

}

Return (Zero)

}

Method (CLDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x20)

{

/* 0000 */ 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

Store (C2TP, Index (PAR, One))

Store (C2CV, Index (PAR, 0x03))

Return (PAR)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x40, 0x46, 0x23, 0x79, 0x10, 0x9E, 0xEA, 0x4F,

/* 0008 */ 0xA5, 0xC1, 0xB5, 0xAA, 0x8B, 0x19, 0x75, 0x6F

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x3F

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (C2GP)

}

If (LEqual (Arg2, 0x02))

{

Return (GPPI (C2F0, Add (Multiply (0x18, C2G0), C2P0),

C2I0, C2A0))

}

If (LEqual (Arg2, 0x03))

{

Return (GPPI (C2F1, Add (Multiply (0x18, C2G1), C2P1),

C2I1, C2A1))

}

If (LEqual (Arg2, 0x04))

{

Return (GPPI (C2F2, Add (Multiply (0x18, C2G2), C2P2),

C2I2, C2A2))

}

If (LEqual (Arg2, 0x05))

{

Return (GPPI (C2F3, Add (Multiply (0x18, C2G3), C2P3),

C2I3, C2A3))

}

Device (DSC3)

{

Name (_ADR, Zero) // _ADR: Address

Name (_HID, "INT3472") // _HID: Hardware ID

Name (_CID, "INT3472") // _CID: Compatible ID

Name (_DDN, "PMIC-CRDG") // _DDN: DOS Device Name

Name (_UID, 0x03) // _UID: Unique ID

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

If (LGreater (C3GP, Zero))

{

Store (PINR (C3P0, C3G0), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C3GP, One))

{

Store (PINR (C3P1, C3G1), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C3GP, 0x02))

{

Store (PINR (C3P2, C3G2), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C3GP, 0x03))

{

Store (PINR (C3P3, C3G3), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

Return (Local0)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (CL03)

{

If (LEqual (C3TP, One))

{

Return (0x0F)

}

Return (Zero)

}

Method (CLDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x20)

{

/* 0000 */ 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

Store (C3TP, Index (PAR, One))

Store (C3CV, Index (PAR, 0x03))

Return (PAR)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x40, 0x46, 0x23, 0x79, 0x10, 0x9E, 0xEA, 0x4F,

/* 0008 */ 0xA5, 0xC1, 0xB5, 0xAA, 0x8B, 0x19, 0x75, 0x6F

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x3F

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (C3GP)

}

If (LEqual (Arg2, 0x02))

{

Return (GPPI (C3F0, Add (Multiply (0x18, C3G0), C3P0),

C3I0, C3A0))

}

If (LEqual (Arg2, 0x03))

{

Return (GPPI (C3F1, Add (Multiply (0x18, C3G1), C3P1),

C3I1, C3A1))

}

If (LEqual (Arg2, 0x04))

{

Return (GPPI (C3F2, Add (Multiply (0x18, C3G2), C3P2),

C3I2, C3A2))

}

If (LEqual (Arg2, 0x05))

{

Return (GPPI (C3F3, Add (Multiply (0x18, C3G3), C3P3),

C3I3, C3A3))

}

Device (CLP0)

{

Name (_ADR, Zero) // _ADR: Address

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (CL00)

{

If (LEqual (C0IB, 0x02))

{

Return (Package (0x01)

{

I2C2

})

}

If (LEqual (C0IB, 0x03))

{

Return (Package (0x01)

{

I2C3

})

}

Return (Package (0x01)

{

PCI0

})

}

Name (_UID, Zero) // _UID: Unique ID

Name (_HID, "INT3472") // _HID: Hardware ID

Name (_CID, "INT3472") // _CID: Compatible ID

Name (_DDN, "PMIC-CRDG") // _DDN: DOS Device Name

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

ConcatenateResTemplate (Local0, IICB (C0IA, C0IB), Local0)

Return (Local0)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (CL00)

{

If (LGreater (C0TP, One))

{

Return (0x0F)

}

Return (Zero)

}

Method (CLDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x20)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

Store (C0TP, Index (PAR, One))

Store (C0CV, Index (PAR, 0x03))

Return (PAR)

}

Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device

{

Name (PLDB, Package (0x01)

{

Buffer (0x14)

{

/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x29, 0x0D, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,

/* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF

}

})

CreateByteField (DerefOf (Index (PLDB, Zero)), 0x08, BPOS)

Store (C0PL, BPOS)

Return (PLDB)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x49, 0x75, 0x25, 0x26, 0x71, 0x92, 0xA4, 0x4C,

/* 0008 */ 0xBB, 0x43, 0xC4, 0x89, 0x9D, 0x5A, 0x48, 0x81

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (One)

}

If (LEqual (Arg2, 0x02))

{

Return (DSMI (0x0B, C0IA, Zero, C0IB))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xC8, 0xC5, 0x15, 0x58, 0x7D, 0xC4, 0x7B, 0x47,

/* 0008 */ 0x9A, 0x8D, 0x76, 0x17, 0x31, 0x76, 0x41, 0x4B

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (DSMB, Buffer (0x34) {})

CreateDWordField (DSMB, Zero, I2CC)

CreateDWordField (DSMB, 0x04, DEV0)

Store (One, I2CC)

Store (DSMI (0x0B, C0IA, Zero, C0IB), DEV0)

Return (DSMB)

}

Return (Buffer (One)

{

0x00

})

}

Device (CLP1)

{

Name (_ADR, Zero) // _ADR: Address

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (CL01)

{

If (LEqual (C1IB, 0x02))

{

Return (Package (0x01)

{

I2C2

})

}

If (LEqual (C1IB, 0x03))

{

Return (Package (0x01)

{

I2C3

})

}

Return (Package (0x01)

{

PCI0

})

}

Name (_HID, "INT3472") // _HID: Hardware ID

Name (_CID, "INT3472") // _CID: Compatible ID

Name (_DDN, "PMIC-CRDG") // _DDN: DOS Device Name

Name (_UID, One) // _UID: Unique ID

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

ConcatenateResTemplate (Local0, IICB (C1IA, C1IB), Local0)

Return (Local0)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (CL01)

{

If (LGreater (C1TP, One))

{

Return (0x0F)

}

Return (Zero)

}

Method (CLDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x20)

{

/* 0000 */ 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

Store (C1TP, Index (PAR, One))

Store (C1CV, Index (PAR, 0x03))

Return (PAR)

}

Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device

{

Name (PLDB, Package (0x01)

{

Buffer (0x14)

{

/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x29, 0x0D, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,

/* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF

}

})

CreateByteField (DerefOf (Index (PLDB, Zero)), 0x08, BPOS)

Store (C1PL, BPOS)

Return (PLDB)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x49, 0x75, 0x25, 0x26, 0x71, 0x92, 0xA4, 0x4C,

/* 0008 */ 0xBB, 0x43, 0xC4, 0x89, 0x9D, 0x5A, 0x48, 0x81

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (One)

}

If (LEqual (Arg2, 0x02))

{

Return (DSMI (0x0B, C1IA, Zero, C1IB))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xC8, 0xC5, 0x15, 0x58, 0x7D, 0xC4, 0x7B, 0x47,

/* 0008 */ 0x9A, 0x8D, 0x76, 0x17, 0x31, 0x76, 0x41, 0x4B

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (DSMB, Buffer (0x34) {})

CreateDWordField (DSMB, Zero, I2CC)

CreateDWordField (DSMB, 0x04, DEV0)

Store (One, I2CC)

Store (DSMI (0x0B, C1IA, Zero, C1IB), DEV0)

Return (DSMB)

}

Return (Buffer (One)

{

0x00

})

}

Device (CLP2)

{

Name (_ADR, Zero) // _ADR: Address

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (CL02)

{

If (LEqual (C2IB, 0x02))

{

Return (Package (0x01)

{

I2C2

})

}

If (LEqual (C2IB, 0x03))

{

Return (Package (0x01)

{

I2C3

})

}

Return (Package (0x01)

{

PCI0

})

}

Name (_HID, "INT3472") // _HID: Hardware ID

Name (_CID, "INT3472") // _CID: Compatible ID

Name (_DDN, "PMIC-CRDG") // _DDN: DOS Device Name

Name (_UID, 0x02) // _UID: Unique ID

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

ConcatenateResTemplate (Local0, IICB (C2IA, C2IB), Local0)

Return (Local0)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (CL02)

{

If (LGreater (C2TP, One))

{

Return (0x0F)

}

Return (Zero)

}

Method (CLDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x20)

{

/* 0000 */ 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

Store (C2TP, Index (PAR, One))

Store (C2CV, Index (PAR, 0x03))

Return (PAR)

}

Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device

{

Name (PLDB, Package (0x01)

{

Buffer (0x14)

{

/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x29, 0x0D, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,

/* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF

}

})

CreateByteField (DerefOf (Index (PLDB, Zero)), 0x08, BPOS)

Store (C2PL, BPOS)

Return (PLDB)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x49, 0x75, 0x25, 0x26, 0x71, 0x92, 0xA4, 0x4C,

/* 0008 */ 0xBB, 0x43, 0xC4, 0x89, 0x9D, 0x5A, 0x48, 0x81

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (One)

}

If (LEqual (Arg2, 0x02))

{

Return (DSMI (0x0B, C2IA, Zero, C2IB))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xC8, 0xC5, 0x15, 0x58, 0x7D, 0xC4, 0x7B, 0x47,

/* 0008 */ 0x9A, 0x8D, 0x76, 0x17, 0x31, 0x76, 0x41, 0x4B

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (DSMB, Buffer (0x34) {})

CreateDWordField (DSMB, Zero, I2CC)

CreateDWordField (DSMB, 0x04, DEV0)

Store (One, I2CC)

Store (DSMI (0x0B, C2IA, Zero, C2IB), DEV0)

Return (DSMB)

}

Return (Buffer (One)

{

0x00

})

}

Device (CLP3)

{

Name (_ADR, Zero) // _ADR: Address

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (CL03)

{

If (LEqual (C3IB, 0x02))

{

Return (Package (0x01)

{

I2C2

})

}

If (LEqual (C3IB, 0x03))

{

Return (Package (0x01)

{

I2C3

})

}

Return (Package (0x01)

{

PCI0

})

}

Name (_HID, "INT3472") // _HID: Hardware ID

Name (_CID, "INT3472") // _CID: Compatible ID

Name (_DDN, "PMIC-CRDG") // _DDN: DOS Device Name

Name (_UID, 0x03) // _UID: Unique ID

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

ConcatenateResTemplate (Local0, IICB (C3IA, C3IB), Local0)

Return (Local0)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (CL03)

{

If (LGreater (C3TP, One))

{

Return (0x0F)

}

Return (Zero)

}

Method (CLDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x20)

{

/* 0000 */ 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

Store (C3TP, Index (PAR, One))

Store (C3CV, Index (PAR, 0x03))

Return (PAR)

}

Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device

{

Name (PLDB, Package (0x01)

{

Buffer (0x14)

{

/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x29, 0x0D, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,

/* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF

}

})

CreateByteField (DerefOf (Index (PLDB, Zero)), 0x08, BPOS)

Store (C3PL, BPOS)

Return (PLDB)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x49, 0x75, 0x25, 0x26, 0x71, 0x92, 0xA4, 0x4C,

/* 0008 */ 0xBB, 0x43, 0xC4, 0x89, 0x9D, 0x5A, 0x48, 0x81

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (One)

}

If (LEqual (Arg2, 0x02))

{

Return (DSMI (0x0B, C3IA, Zero, C3IB))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xC8, 0xC5, 0x15, 0x58, 0x7D, 0xC4, 0x7B, 0x47,

/* 0008 */ 0x9A, 0x8D, 0x76, 0x17, 0x31, 0x76, 0x41, 0x4B

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (DSMB, Buffer (0x34) {})

CreateDWordField (DSMB, Zero, I2CC)

CreateDWordField (DSMB, 0x04, DEV0)

Store (One, I2CC)

Store (DSMI (0x0B, C3IA, Zero, C3IB), DEV0)

Return (DSMB)

}

Return (Buffer (One)

{

0x00

})

}

Device (LNK0)

{

Name (_ADR, Zero) // _ADR: Address

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (L0EN)

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (L0EN)

{

Return (CDEP (L0CL))

}

Else

{

Return (Package (0x01)

{

PCI0

})

}

Name (_UID, Zero) // _UID: Unique ID

Method (_HID, 0, NotSerialized) // _HID: Hardware ID

{

Return (HCID (Zero))

}

Method (_CID, 0, NotSerialized) // _CID: Compatible ID

{

Return (HCID (Zero))

}

Method (_DDN, 0, NotSerialized) // _DDN: DOS Device Name

{

Name (BUF, Buffer (0x10) {})

Store (L0M0, Index (BUF, Zero))

Store (L0M1, Index (BUF, One))

Store (L0M2, Index (BUF, 0x02))

Store (L0M3, Index (BUF, 0x03))

Store (L0M4, Index (BUF, 0x04))

Store (L0M5, Index (BUF, 0x05))

Store (L0M6, Index (BUF, 0x06))

Store (L0M7, Index (BUF, 0x07))

Store (L0M8, Index (BUF, 0x08))

Store (L0M9, Index (BUF, 0x09))

Store (L0MA, Index (BUF, 0x0A))

Store (L0MB, Index (BUF, 0x0B))

Store (L0MC, Index (BUF, 0x0C))

Store (L0MD, Index (BUF, 0x0D))

Store (L0ME, Index (BUF, 0x0E))

Store (L0MF, Index (BUF, 0x0F))

Return (ToString (BUF, Ones))

}

Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device

{

Name (PLDB, Package (0x01)

{

Buffer (0x14)

{

/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x69, 0x0E, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,

/* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF

}

})

CreateByteField (DerefOf (Index (PLDB, Zero)), 0x08, BPOS)

Store (L0PL, BPOS)

Return (PLDB)

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

If (LGreater (L0DI, Zero))

{

Store (IICB (L0A0, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L0DI, One))

{

Store (IICB (L0A1, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L0DI, 0x02))

{

Store (IICB (L0A2, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L0DI, 0x03))

{

Store (IICB (L0A3, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L0DI, 0x04))

{

Store (IICB (L0A4, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L0DI, 0x05))

{

Store (IICB (L0A5, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L0DI, 0x06))

{

Store (IICB (L0A6, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L0DI, 0x07))

{

Store (IICB (L0A7, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L0DI, 0x08))

{

Store (IICB (L0A8, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L0DI, 0x09))

{

Store (IICB (L0A9, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L0DI, 0x0A))

{

Store (IICB (L0AA, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L0DI, 0x0B))

{

Store (IICB (L0AB, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

Return (Local0)

}

Method (SSDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x6C)

{

/* 0000 */ 0x00, 0x00, 0x69, 0x56, 0x39, 0x8A, 0xF7, 0x11,

/* 0008 */ 0xA9, 0x4E, 0x9C, 0x7D, 0x20, 0xEE, 0x0A, 0xB5,

/* 0010 */ 0xCA, 0x40, 0xA3, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0050 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,

/* 0058 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0060 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0068 */ 0x00, 0x00, 0x00, 0x00

})

Store (L0DV, Index (PAR, Zero))

Store (L0CV, Index (PAR, One))

Store (CDIV, Index (PAR, 0x18))

Store (L0LU, Index (PAR, 0x1C))

Store (L0NL, Index (PAR, 0x1D))

Store (L0EE, Index (PAR, 0x4E))

Store (L0VC, Index (PAR, 0x4F))

Store (L0FS, Index (PAR, 0x52))

Store (L0DG, Index (PAR, 0x54))

CreateDWordField (PAR, 0x56, DAT)

Store (L0CK, DAT)

Store (L0CL, Index (PAR, 0x5A))

Return (PAR)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x8F, 0xCE, 0x2A, 0x82, 0x14, 0x28, 0x74, 0x41,

/* 0008 */ 0xA5, 0x6B, 0x5F, 0x02, 0x9F, 0xE0, 0x79, 0xEE

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (BUF, Buffer (0x10) {})

Store (L0M0, Index (BUF, Zero))

Store (L0M1, Index (BUF, One))

Store (L0M2, Index (BUF, 0x02))

Store (L0M3, Index (BUF, 0x03))

Store (L0M4, Index (BUF, 0x04))

Store (L0M5, Index (BUF, 0x05))

Store (L0M6, Index (BUF, 0x06))

Store (L0M7, Index (BUF, 0x07))

Store (L0M8, Index (BUF, 0x08))

Store (L0M9, Index (BUF, 0x09))

Store (L0MA, Index (BUF, 0x0A))

Store (L0MB, Index (BUF, 0x0B))

Store (L0MC, Index (BUF, 0x0C))

Store (L0MD, Index (BUF, 0x0D))

Store (L0ME, Index (BUF, 0x0E))

Store (L0MF, Index (BUF, 0x0F))

Return (ToString (BUF, Ones))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xC8, 0xC5, 0x15, 0x58, 0x7D, 0xC4, 0x7B, 0x47,

/* 0008 */ 0x9A, 0x8D, 0x76, 0x17, 0x31, 0x76, 0x41, 0x4B

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (DSMB, Buffer (0x34) {})

CreateDWordField (DSMB, Zero, I2CC)

CreateDWordField (DSMB, 0x04, DEV0)

CreateDWordField (DSMB, 0x08, DEV1)

CreateDWordField (DSMB, 0x0C, DEV2)

CreateDWordField (DSMB, 0x10, DEV3)

CreateDWordField (DSMB, 0x14, DEV4)

CreateDWordField (DSMB, 0x18, DEV5)

CreateDWordField (DSMB, 0x1C, DEV6)

CreateDWordField (DSMB, 0x20, DEV7)

CreateDWordField (DSMB, 0x24, DEV8)

CreateDWordField (DSMB, 0x28, DEV9)

CreateDWordField (DSMB, 0x2C, DEVA)

CreateDWordField (DSMB, 0x30, DEVB)

Store (L0DI, I2CC)

Store (DSMI (L0D0, L0A0, Zero, L0BS), DEV0)

Store (DSMI (L0D1, L0A1, Zero, L0BS), DEV1)

Store (DSMI (L0D2, L0A2, Zero, L0BS), DEV2)

Store (DSMI (L0D3, L0A3, Zero, L0BS), DEV3)

Store (DSMI (L0D4, L0A4, Zero, L0BS), DEV4)

Store (DSMI (L0D5, L0A5, Zero, L0BS), DEV5)

Store (DSMI (L0D6, L0A6, Zero, L0BS), DEV6)

Store (DSMI (L0D7, L0A7, Zero, L0BS), DEV7)

Store (DSMI (L0D8, L0A8, Zero, L0BS), DEV8)

Store (DSMI (L0D9, L0A9, Zero, L0BS), DEV9)

Store (DSMI (L0DA, L0AA, Zero, L0BS), DEVA)

Store (DSMI (L0DB, L0AB, Zero, L0BS), DEVB)

Return (DSMB)

}

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x49, 0x75, 0x25, 0x26, 0x71, 0x92, 0xA4, 0x4C,

/* 0008 */ 0xBB, 0x43, 0xC4, 0x89, 0x9D, 0x5A, 0x48, 0x81

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (0x02)

{

0xFF, 0x1F

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (L0DI)

}

If (LEqual (Arg2, 0x02))

{

If (LGreater (L0DI, Zero))

{

Return (DSMI (L0D0, L0A0, Zero, L0BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x03))

{

If (LGreater (L0DI, One))

{

Return (DSMI (L0D1, L0A1, Zero, L0BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x04))

{

If (LGreater (L0DI, 0x02))

{

Return (DSMI (L0D2, L0A2, Zero, L0BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x05))

{

If (LGreater (L0DI, 0x03))

{

Return (DSMI (L0D3, L0A3, Zero, L0BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x06))

{

If (LGreater (L0DI, 0x04))

{

Return (DSMI (L0D4, L0A4, Zero, L0BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x07))

{

If (LGreater (L0DI, 0x05))

{

Return (DSMI (L0D5, L0A5, Zero, L0BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x08))

{

If (LGreater (L0DI, 0x06))

{

Return (DSMI (L0D6, L0A6, Zero, L0BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x08))

{

If (LGreater (L0DI, 0x07))

{

Return (DSMI (L0D7, L0A7, Zero, L0BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x09))

{

If (LGreater (L0DI, 0x08))

{

Return (DSMI (L0D8, L0A8, Zero, L0BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0A))

{

If (LGreater (L0DI, 0x09))

{

Return (DSMI (L0D9, L0A9, Zero, L0BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0B))

{

If (LGreater (L0DI, 0x0A))

{

Return (DSMI (L0DA, L0AA, Zero, L0BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0C))

{

If (LGreater (L0DI, 0x0B))

{

Return (DSMI (L0DB, L0AB, Zero, L0BS))

}

Else

{

Return (Zero)

}

Return (Zero)

}

Device (LNK1)

{

Name (_ADR, Zero) // _ADR: Address

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (L1EN)

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (L1EN)

{

Return (CDEP (L1CL))

}

Else

{

Return (Package (0x01)

{

PCI0

})

}

Name (_UID, One) // _UID: Unique ID

Method (_HID, 0, NotSerialized) // _HID: Hardware ID

{

Return (HCID (One))

}

Method (_CID, 0, NotSerialized) // _CID: Compatible ID

{

Return (HCID (One))

}

Method (_DDN, 0, NotSerialized) // _DDN: DOS Device Name

{

Name (BUF, Buffer (0x10) {})

Store (L1M0, Index (BUF, Zero))

Store (L1M1, Index (BUF, One))

Store (L1M2, Index (BUF, 0x02))

Store (L1M3, Index (BUF, 0x03))

Store (L1M4, Index (BUF, 0x04))

Store (L1M5, Index (BUF, 0x05))

Store (L1M6, Index (BUF, 0x06))

Store (L1M7, Index (BUF, 0x07))

Store (L1M8, Index (BUF, 0x08))

Store (L1M9, Index (BUF, 0x09))

Store (L1MA, Index (BUF, 0x0A))

Store (L1MB, Index (BUF, 0x0B))

Store (L1MC, Index (BUF, 0x0C))

Store (L1MD, Index (BUF, 0x0D))

Store (L1ME, Index (BUF, 0x0E))

Store (L1MF, Index (BUF, 0x0F))

Return (ToString (BUF, Ones))

}

Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device

{

Name (PLDB, Package (0x01)

{

Buffer (0x14)

{

/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x69, 0x0E, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,

/* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF

}

})

CreateByteField (DerefOf (Index (PLDB, Zero)), 0x08, BPOS)

Store (L1PL, BPOS)

Return (PLDB)

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

If (LGreater (L1DI, Zero))

{

Store (IICB (L1A0, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L1DI, One))

{

Store (IICB (L1A1, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L1DI, 0x02))

{

Store (IICB (L1A2, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L1DI, 0x03))

{

Store (IICB (L1A3, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L1DI, 0x04))

{

Store (IICB (L1A4, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L1DI, 0x05))

{

Store (IICB (L1A5, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L1DI, 0x06))

{

Store (IICB (L1A6, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L1DI, 0x07))

{

Store (IICB (L1A7, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L1DI, 0x08))

{

Store (IICB (L1A8, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L1DI, 0x09))

{

Store (IICB (L1A9, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L1DI, 0x0A))

{

Store (IICB (L1AA, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L1DI, 0x0B))

{

Store (IICB (L1AB, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

Return (Local0)

}

Method (SSDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x6C)

{

/* 0000 */ 0x00, 0x00, 0x69, 0x56, 0x39, 0x8A, 0xF7, 0x11,

/* 0008 */ 0xA9, 0x4E, 0x9C, 0x7D, 0x20, 0xEE, 0x0A, 0xB5,

/* 0010 */ 0xCA, 0x40, 0xA3, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0050 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,

/* 0058 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0060 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0068 */ 0x00, 0x00, 0x00, 0x00

})

Store (L1DV, Index (PAR, Zero))

Store (L1CV, Index (PAR, One))

Store (CDIV, Index (PAR, 0x18))

Store (L1LU, Index (PAR, 0x1C))

Store (L1NL, Index (PAR, 0x1D))

Store (L1EE, Index (PAR, 0x4E))

Store (L1VC, Index (PAR, 0x4F))

Store (L1FS, Index (PAR, 0x52))

Store (L1DG, Index (PAR, 0x54))

CreateDWordField (PAR, 0x56, DAT)

Store (L1CK, DAT)

Store (L1CL, Index (PAR, 0x5A))

Return (PAR)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x8F, 0xCE, 0x2A, 0x82, 0x14, 0x28, 0x74, 0x41,

/* 0008 */ 0xA5, 0x6B, 0x5F, 0x02, 0x9F, 0xE0, 0x79, 0xEE

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (BUF, Buffer (0x10) {})

Store (L1M0, Index (BUF, Zero))

Store (L1M1, Index (BUF, One))

Store (L1M2, Index (BUF, 0x02))

Store (L1M3, Index (BUF, 0x03))

Store (L1M4, Index (BUF, 0x04))

Store (L1M5, Index (BUF, 0x05))

Store (L1M6, Index (BUF, 0x06))

Store (L1M7, Index (BUF, 0x07))

Store (L1M8, Index (BUF, 0x08))

Store (L1M9, Index (BUF, 0x09))

Store (L1MA, Index (BUF, 0x0A))

Store (L1MB, Index (BUF, 0x0B))

Store (L1MC, Index (BUF, 0x0C))

Store (L1MD, Index (BUF, 0x0D))

Store (L1ME, Index (BUF, 0x0E))

Store (L1MF, Index (BUF, 0x0F))

Return (ToString (BUF, Ones))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xC8, 0xC5, 0x15, 0x58, 0x7D, 0xC4, 0x7B, 0x47,

/* 0008 */ 0x9A, 0x8D, 0x76, 0x17, 0x31, 0x76, 0x41, 0x4B

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (DSMB, Buffer (0x34) {})

CreateDWordField (DSMB, Zero, I2CC)

CreateDWordField (DSMB, 0x04, DEV0)

CreateDWordField (DSMB, 0x08, DEV1)

CreateDWordField (DSMB, 0x0C, DEV2)

CreateDWordField (DSMB, 0x10, DEV3)

CreateDWordField (DSMB, 0x14, DEV4)

CreateDWordField (DSMB, 0x18, DEV5)

CreateDWordField (DSMB, 0x1C, DEV6)

CreateDWordField (DSMB, 0x20, DEV7)

CreateDWordField (DSMB, 0x24, DEV8)

CreateDWordField (DSMB, 0x28, DEV9)

CreateDWordField (DSMB, 0x2C, DEVA)

CreateDWordField (DSMB, 0x30, DEVB)

Store (L1DI, I2CC)

Store (DSMI (L1D0, L1A0, Zero, L1BS), DEV0)

Store (DSMI (L1D1, L1A1, Zero, L1BS), DEV1)

Store (DSMI (L1D2, L1A2, Zero, L1BS), DEV2)

Store (DSMI (L1D3, L1A3, Zero, L1BS), DEV3)

Store (DSMI (L1D4, L1A4, Zero, L1BS), DEV4)

Store (DSMI (L1D5, L1A5, Zero, L1BS), DEV5)

Store (DSMI (L1D6, L1A6, Zero, L1BS), DEV6)

Store (DSMI (L1D7, L1A7, Zero, L1BS), DEV7)

Store (DSMI (L1D8, L1A8, Zero, L1BS), DEV8)

Store (DSMI (L1D9, L1A9, Zero, L1BS), DEV9)

Store (DSMI (L1DA, L1AA, Zero, L1BS), DEVA)

Store (DSMI (L1DB, L1AB, Zero, L1BS), DEVB)

Return (DSMB)

}

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x49, 0x75, 0x25, 0x26, 0x71, 0x92, 0xA4, 0x4C,

/* 0008 */ 0xBB, 0x43, 0xC4, 0x89, 0x9D, 0x5A, 0x48, 0x81

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (0x02)

{

0xFF, 0x1F

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (L1DI)

}

If (LEqual (Arg2, 0x02))

{

If (LGreater (L1DI, Zero))

{

Return (DSMI (L1D0, L1A0, Zero, L1BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x03))

{

If (LGreater (L1DI, One))

{

Return (DSMI (L1D1, L1A1, Zero, L1BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x04))

{

If (LGreater (L1DI, 0x02))

{

Return (DSMI (L1D2, L1A2, Zero, L1BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x05))

{

If (LGreater (L1DI, 0x03))

{

Return (DSMI (L1D3, L1A3, Zero, L1BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x06))

{

If (LGreater (L1DI, 0x04))

{

Return (DSMI (L1D4, L1A4, Zero, L1BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x07))

{

If (LGreater (L1DI, 0x05))

{

Return (DSMI (L1D5, L1A5, Zero, L1BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x08))

{

If (LGreater (L1DI, 0x06))

{

Return (DSMI (L1D6, L1A6, Zero, L1BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x08))

{

If (LGreater (L1DI, 0x07))

{

Return (DSMI (L1D7, L1A7, Zero, L1BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x09))

{

If (LGreater (L1DI, 0x08))

{

Return (DSMI (L1D8, L1A8, Zero, L1BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0A))

{

If (LGreater (L1DI, 0x09))

{

Return (DSMI (L1D9, L1A9, Zero, L1BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0B))

{

If (LGreater (L1DI, 0x0A))

{

Return (DSMI (L1DA, L1AA, Zero, L1BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0C))

{

If (LGreater (L1DI, 0x0B))

{

Return (DSMI (L1DB, L1AB, Zero, L1BS))

}

Else

{

Return (Zero)

}

Return (Zero)

}

Device (LNK2)

{

Name (_ADR, Zero) // _ADR: Address

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (L2EN)

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (L2EN)

{

Return (CDEP (L2CL))

}

Else

{

Return (Package (0x01)

{

PCI0

})

}

Name (_UID, 0x02) // _UID: Unique ID

Method (_HID, 0, NotSerialized) // _HID: Hardware ID

{

Return (HCID (0x02))

}

Method (_CID, 0, NotSerialized) // _CID: Compatible ID

{

Return (HCID (0x02))

}

Method (_DDN, 0, NotSerialized) // _DDN: DOS Device Name

{

Name (BUF, Buffer (0x10) {})

Store (L2M0, Index (BUF, Zero))

Store (L2M1, Index (BUF, One))

Store (L2M2, Index (BUF, 0x02))

Store (L2M3, Index (BUF, 0x03))

Store (L2M4, Index (BUF, 0x04))

Store (L2M5, Index (BUF, 0x05))

Store (L2M6, Index (BUF, 0x06))

Store (L2M7, Index (BUF, 0x07))

Store (L2M8, Index (BUF, 0x08))

Store (L2M9, Index (BUF, 0x09))

Store (L2MA, Index (BUF, 0x0A))

Store (L2MB, Index (BUF, 0x0B))

Store (L2MC, Index (BUF, 0x0C))

Store (L2MD, Index (BUF, 0x0D))

Store (L2ME, Index (BUF, 0x0E))

Store (L2MF, Index (BUF, 0x0F))

Return (ToString (BUF, Ones))

}

Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device

{

Name (PLDB, Package (0x01)

{

Buffer (0x14)

{

/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x69, 0x0E, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,

/* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF

}

})

CreateByteField (DerefOf (Index (PLDB, Zero)), 0x08, BPOS)

Store (L2PL, BPOS)

Return (PLDB)

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

If (LGreater (L2DI, Zero))

{

Store (IICB (L2A0, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L2DI, One))

{

Store (IICB (L2A1, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L2DI, 0x02))

{

Store (IICB (L2A2, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L2DI, 0x03))

{

Store (IICB (L2A3, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L2DI, 0x04))

{

Store (IICB (L2A4, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L2DI, 0x05))

{

Store (IICB (L2A5, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L2DI, 0x06))

{

Store (IICB (L2A6, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L2DI, 0x07))

{

Store (IICB (L2A7, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L2DI, 0x08))

{

Store (IICB (L2A8, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L2DI, 0x09))

{

Store (IICB (L2A9, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L2DI, 0x0A))

{

Store (IICB (L2AA, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L2DI, 0x0B))

{

Store (IICB (L2AB, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

Return (Local0)

}

Method (SSDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x6C)

{

/* 0000 */ 0x00, 0x00, 0x69, 0x56, 0x39, 0x8A, 0xF7, 0x11,

/* 0008 */ 0xA9, 0x4E, 0x9C, 0x7D, 0x20, 0xEE, 0x0A, 0xB5,

/* 0010 */ 0xCA, 0x40, 0xA3, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0050 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,

/* 0058 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0060 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0068 */ 0x00, 0x00, 0x00, 0x00

})

Store (L2DV, Index (PAR, Zero))

Store (L2CV, Index (PAR, One))

Store (CDIV, Index (PAR, 0x18))

Store (L2LU, Index (PAR, 0x1C))

Store (L2NL, Index (PAR, 0x1D))

Store (L2EE, Index (PAR, 0x4E))

Store (L2VC, Index (PAR, 0x4F))

Store (L2FS, Index (PAR, 0x52))

Store (L2DG, Index (PAR, 0x54))

CreateDWordField (PAR, 0x56, DAT)

Store (L2CK, DAT)

Store (L2CL, Index (PAR, 0x5A))

Return (PAR)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x8F, 0xCE, 0x2A, 0x82, 0x14, 0x28, 0x74, 0x41,

/* 0008 */ 0xA5, 0x6B, 0x5F, 0x02, 0x9F, 0xE0, 0x79, 0xEE

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (BUF, Buffer (0x10) {})

Store (L2M0, Index (BUF, Zero))

Store (L2M1, Index (BUF, One))

Store (L2M2, Index (BUF, 0x02))

Store (L2M3, Index (BUF, 0x03))

Store (L2M4, Index (BUF, 0x04))

Store (L2M5, Index (BUF, 0x05))

Store (L2M6, Index (BUF, 0x06))

Store (L2M7, Index (BUF, 0x07))

Store (L2M8, Index (BUF, 0x08))

Store (L2M9, Index (BUF, 0x09))

Store (L2MA, Index (BUF, 0x0A))

Store (L2MB, Index (BUF, 0x0B))

Store (L2MC, Index (BUF, 0x0C))

Store (L2MD, Index (BUF, 0x0D))

Store (L2ME, Index (BUF, 0x0E))

Store (L2MF, Index (BUF, 0x0F))

Return (ToString (BUF, Ones))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xC8, 0xC5, 0x15, 0x58, 0x7D, 0xC4, 0x7B, 0x47,

/* 0008 */ 0x9A, 0x8D, 0x76, 0x17, 0x31, 0x76, 0x41, 0x4B

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (DSMB, Buffer (0x34) {})

CreateDWordField (DSMB, Zero, I2CC)

CreateDWordField (DSMB, 0x04, DEV0)

CreateDWordField (DSMB, 0x08, DEV1)

CreateDWordField (DSMB, 0x0C, DEV2)

CreateDWordField (DSMB, 0x10, DEV3)

CreateDWordField (DSMB, 0x14, DEV4)

CreateDWordField (DSMB, 0x18, DEV5)

CreateDWordField (DSMB, 0x1C, DEV6)

CreateDWordField (DSMB, 0x20, DEV7)

CreateDWordField (DSMB, 0x24, DEV8)

CreateDWordField (DSMB, 0x28, DEV9)

CreateDWordField (DSMB, 0x2C, DEVA)

CreateDWordField (DSMB, 0x30, DEVB)

Store (L2DI, I2CC)

Store (DSMI (L2D0, L2A0, Zero, L2BS), DEV0)

Store (DSMI (L2D1, L2A1, Zero, L2BS), DEV1)

Store (DSMI (L2D2, L2A2, Zero, L2BS), DEV2)

Store (DSMI (L2D3, L2A3, Zero, L2BS), DEV3)

Store (DSMI (L2D4, L2A4, Zero, L2BS), DEV4)

Store (DSMI (L2D5, L2A5, Zero, L2BS), DEV5)

Store (DSMI (L2D6, L2A6, Zero, L2BS), DEV6)

Store (DSMI (L2D7, L2A7, Zero, L2BS), DEV7)

Store (DSMI (L2D8, L2A8, Zero, L2BS), DEV8)

Store (DSMI (L2D9, L2A9, Zero, L2BS), DEV9)

Store (DSMI (L2DA, L2AA, Zero, L2BS), DEVA)

Store (DSMI (L2DB, L2AB, Zero, L2BS), DEVB)

Return (DSMB)

}

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x49, 0x75, 0x25, 0x26, 0x71, 0x92, 0xA4, 0x4C,

/* 0008 */ 0xBB, 0x43, 0xC4, 0x89, 0x9D, 0x5A, 0x48, 0x81

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (0x02)

{

0xFF, 0x1F

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (L2DI)

}

If (LEqual (Arg2, 0x02))

{

If (LGreater (L2DI, Zero))

{

Return (DSMI (L2D0, L2A0, Zero, L2BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x03))

{

If (LGreater (L2DI, One))

{

Return (DSMI (L2D1, L2A1, Zero, L2BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x04))

{

If (LGreater (L2DI, 0x02))

{

Return (DSMI (L2D2, L2A2, Zero, L2BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x05))

{

If (LGreater (L2DI, 0x03))

{

Return (DSMI (L2D3, L2A3, Zero, L2BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x06))

{

If (LGreater (L2DI, 0x04))

{

Return (DSMI (L2D4, L2A4, Zero, L2BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x07))

{

If (LGreater (L2DI, 0x05))

{

Return (DSMI (L2D5, L2A5, Zero, L2BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x08))

{

If (LGreater (L2DI, 0x06))

{

Return (DSMI (L2D6, L2A6, Zero, L2BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x08))

{

If (LGreater (L2DI, 0x07))

{

Return (DSMI (L2D7, L2A7, Zero, L2BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x09))

{

If (LGreater (L2DI, 0x08))

{

Return (DSMI (L2D8, L2A8, Zero, L2BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0A))

{

If (LGreater (L2DI, 0x09))

{

Return (DSMI (L2D9, L2A9, Zero, L2BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0B))

{

If (LGreater (L2DI, 0x0A))

{

Return (DSMI (L2DA, L2AA, Zero, L2BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0C))

{

If (LGreater (L2DI, 0x0B))

{

Return (DSMI (L2DB, L2AB, Zero, L2BS))

}

Else

{

Return (Zero)

}

Return (Zero)

}

Device (LNK3)

{

Name (_ADR, Zero) // _ADR: Address

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (L3EN)

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (L3EN)

{

Return (CDEP (L3CL))

}

Else

{

Return (Package (0x01)

{

PCI0

})

}

Name (_UID, 0x03) // _UID: Unique ID

Method (_HID, 0, NotSerialized) // _HID: Hardware ID

{

Return (HCID (0x03))

}

Method (_CID, 0, NotSerialized) // _CID: Compatible ID

{

Return (HCID (0x03))

}

Method (_DDN, 0, NotSerialized) // _DDN: DOS Device Name

{

Name (BUF, Buffer (0x10) {})

Store (L3M0, Index (BUF, Zero))

Store (L3M1, Index (BUF, One))

Store (L3M2, Index (BUF, 0x02))

Store (L3M3, Index (BUF, 0x03))

Store (L3M4, Index (BUF, 0x04))

Store (L3M5, Index (BUF, 0x05))

Store (L3M6, Index (BUF, 0x06))

Store (L3M7, Index (BUF, 0x07))

Store (L3M8, Index (BUF, 0x08))

Store (L3M9, Index (BUF, 0x09))

Store (L3MA, Index (BUF, 0x0A))

Store (L3MB, Index (BUF, 0x0B))

Store (L3MC, Index (BUF, 0x0C))

Store (L3MD, Index (BUF, 0x0D))

Store (L3ME, Index (BUF, 0x0E))

Store (L3MF, Index (BUF, 0x0F))

Return (ToString (BUF, Ones))

}

Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device

{

Name (PLDB, Package (0x01)

{

Buffer (0x14)

{

/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x69, 0x0E, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,

/* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF

}

})

CreateByteField (DerefOf (Index (PLDB, Zero)), 0x08, BPOS)

Store (L3PL, BPOS)

Return (PLDB)

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

If (LGreater (L3DI, Zero))

{

Store (IICB (L3A0, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L3DI, One))

{

Store (IICB (L3A1, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L3DI, 0x02))

{

Store (IICB (L3A2, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L3DI, 0x03))

{

Store (IICB (L3A3, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L3DI, 0x04))

{

Store (IICB (L3A4, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L3DI, 0x05))

{

Store (IICB (L3A5, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L3DI, 0x06))

{

Store (IICB (L3A6, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L3DI, 0x07))

{

Store (IICB (L3A7, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L3DI, 0x08))

{

Store (IICB (L3A8, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L3DI, 0x09))

{

Store (IICB (L3A9, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L3DI, 0x0A))

{

Store (IICB (L3AA, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L3DI, 0x0B))

{

Store (IICB (L3AB, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

Return (Local0)

}

Method (SSDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x6C)

{

/* 0000 */ 0x00, 0x00, 0x69, 0x56, 0x39, 0x8A, 0xF7, 0x11,

/* 0008 */ 0xA9, 0x4E, 0x9C, 0x7D, 0x20, 0xEE, 0x0A, 0xB5,

/* 0010 */ 0xCA, 0x40, 0xA3, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0050 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,

/* 0058 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0060 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0068 */ 0x00, 0x00, 0x00, 0x00

})

Store (L3DV, Index (PAR, Zero))

Store (L3CV, Index (PAR, One))

Store (CDIV, Index (PAR, 0x18))

Store (L3LU, Index (PAR, 0x1C))

Store (L3NL, Index (PAR, 0x1D))

Store (L3EE, Index (PAR, 0x4E))

Store (L3VC, Index (PAR, 0x4F))

Store (L3FS, Index (PAR, 0x52))

Store (L3DG, Index (PAR, 0x54))

CreateDWordField (PAR, 0x56, DAT)

Store (L3CK, DAT)

Store (L3CL, Index (PAR, 0x5A))

Return (PAR)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x8F, 0xCE, 0x2A, 0x82, 0x14, 0x28, 0x74, 0x41,

/* 0008 */ 0xA5, 0x6B, 0x5F, 0x02, 0x9F, 0xE0, 0x79, 0xEE

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (BUF, Buffer (0x10) {})

Store (L3M0, Index (BUF, Zero))

Store (L3M1, Index (BUF, One))

Store (L3M2, Index (BUF, 0x02))

Store (L3M3, Index (BUF, 0x03))

Store (L3M4, Index (BUF, 0x04))

Store (L3M5, Index (BUF, 0x05))

Store (L3M6, Index (BUF, 0x06))

Store (L3M7, Index (BUF, 0x07))

Store (L3M8, Index (BUF, 0x08))

Store (L3M9, Index (BUF, 0x09))

Store (L3MA, Index (BUF, 0x0A))

Store (L3MB, Index (BUF, 0x0B))

Store (L3MC, Index (BUF, 0x0C))

Store (L3MD, Index (BUF, 0x0D))

Store (L3ME, Index (BUF, 0x0E))

Store (L3MF, Index (BUF, 0x0F))

Return (ToString (BUF, Ones))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xC8, 0xC5, 0x15, 0x58, 0x7D, 0xC4, 0x7B, 0x47,

/* 0008 */ 0x9A, 0x8D, 0x76, 0x17, 0x31, 0x76, 0x41, 0x4B

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (DSMB, Buffer (0x34) {})

CreateDWordField (DSMB, Zero, I2CC)

CreateDWordField (DSMB, 0x04, DEV0)

CreateDWordField (DSMB, 0x08, DEV1)

CreateDWordField (DSMB, 0x0C, DEV2)

CreateDWordField (DSMB, 0x10, DEV3)

CreateDWordField (DSMB, 0x14, DEV4)

CreateDWordField (DSMB, 0x18, DEV5)

CreateDWordField (DSMB, 0x1C, DEV6)

CreateDWordField (DSMB, 0x20, DEV7)

CreateDWordField (DSMB, 0x24, DEV8)

CreateDWordField (DSMB, 0x28, DEV9)

CreateDWordField (DSMB, 0x2C, DEVA)

CreateDWordField (DSMB, 0x30, DEVB)

Store (L3DI, I2CC)

Store (DSMI (L3D0, L3A0, Zero, L3BS), DEV0)

Store (DSMI (L3D1, L3A1, Zero, L3BS), DEV1)

Store (DSMI (L3D2, L3A2, Zero, L3BS), DEV2)

Store (DSMI (L3D3, L3A3, Zero, L3BS), DEV3)

Store (DSMI (L3D4, L3A4, Zero, L3BS), DEV4)

Store (DSMI (L3D5, L3A5, Zero, L3BS), DEV5)

Store (DSMI (L3D6, L3A6, Zero, L3BS), DEV6)

Store (DSMI (L3D7, L3A7, Zero, L3BS), DEV7)

Store (DSMI (L3D8, L3A8, Zero, L3BS), DEV8)

Store (DSMI (L3D9, L3A9, Zero, L3BS), DEV9)

Store (DSMI (L3DA, L3AA, Zero, L3BS), DEVA)

Store (DSMI (L3DB, L3AB, Zero, L3BS), DEVB)

Return (DSMB)

}

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x49, 0x75, 0x25, 0x26, 0x71, 0x92, 0xA4, 0x4C,

/* 0008 */ 0xBB, 0x43, 0xC4, 0x89, 0x9D, 0x5A, 0x48, 0x81

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (0x02)

{

0xFF, 0x1F

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (L3DI)

}

If (LEqual (Arg2, 0x02))

{

If (LGreater (L3DI, Zero))

{

Return (DSMI (L3D0, L3A0, Zero, L3BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x03))

{

If (LGreater (L3DI, One))

{

Return (DSMI (L3D1, L3A1, Zero, L3BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x04))

{

If (LGreater (L3DI, 0x02))

{

Return (DSMI (L3D2, L3A2, Zero, L3BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x05))

{

If (LGreater (L3DI, 0x03))

{

Return (DSMI (L3D3, L3A3, Zero, L3BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x06))

{

If (LGreater (L3DI, 0x04))

{

Return (DSMI (L3D4, L3A4, Zero, L3BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x07))

{

If (LGreater (L3DI, 0x05))

{

Return (DSMI (L3D5, L3A5, Zero, L3BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x08))

{

If (LGreater (L3DI, 0x06))

{

Return (DSMI (L3D6, L3A6, Zero, L3BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x08))

{

If (LGreater (L3DI, 0x07))

{

Return (DSMI (L3D7, L3A7, Zero, L3BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x09))

{

If (LGreater (L3DI, 0x08))

{

Return (DSMI (L3D8, L3A8, Zero, L3BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0A))

{

If (LGreater (L3DI, 0x09))

{

Return (DSMI (L3D9, L3A9, Zero, L3BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0B))

{

If (LGreater (L3DI, 0x0A))

{

Return (DSMI (L3DA, L3AA, Zero, L3BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0C))

{

If (LGreater (L3DI, 0x0B))

{

Return (DSMI (L3DB, L3AB, Zero, L3BS))

}

Else

{

Return (Zero)

}

Return (Zero)

}

Scope (_SB)

{

Device (WCT0)

{

Name (_HID, EisaId ("IWC0001")) // _HID: Hardware ID

Name (_UID, Zero) // _UID: Unique ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (WIFC, One))

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Method (PCMD, 1, NotSerialized)

{

Store (Arg0, ^^PCI0.LPCB.H_EC.IWCW)

^^PCI0.LPCB.H_EC.ECMD (0xE1)

}

Method (ITPW, 1, NotSerialized)

{

Store (Arg0, ^^PCI0.LPCB.H_EC.IWCW)

^^PCI0.LPCB.H_EC.ECMD (0xE1)

}

Method (ITPR, 0, NotSerialized)

{

Return (^^PCI0.LPCB.H_EC.IWCR)

}

Scope (_SB.PCI0.LPCB)

{

Device (FWHD)

{

Name (_HID, EisaId ("INT0800")) // _HID: Hardware ID

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

Memory32Fixed (ReadOnly,

0xFF000000, // Address Base

0x01000000, // Address Length

)

})

}

Device (HPET)

{

Name (_HID, EisaId ("PNP0103")) // _HID: Hardware ID

Name (_UID, Zero) // _UID: Unique ID

Name (BUF0, ResourceTemplate ()

{

Memory32Fixed (ReadWrite,

0xFED00000, // Address Base

0x00000400, // Address Length

_Y44)

})

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (HPTE)

{

Return (0x0F)

}

Return (Zero)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

If (HPTE)

{

CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET._Y44._BAS, HPT0) // _BAS: Base Address

Store (HPTB, HPT0)

}

Return (BUF0)

}

Device (IPIC)

{

Name (_HID, EisaId ("PNP0000")) // _HID: Hardware ID

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

IO (Decode16,

0x0020, // Range Minimum

0x0020, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x0024, // Range Minimum

0x0024, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x0028, // Range Minimum

0x0028, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x002C, // Range Minimum

0x002C, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x0030, // Range Minimum

0x0030, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x0034, // Range Minimum

0x0034, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x0038, // Range Minimum

0x0038, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x003C, // Range Minimum

0x003C, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00A0, // Range Minimum

0x00A0, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00A4, // Range Minimum

0x00A4, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00A8, // Range Minimum

0x00A8, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00AC, // Range Minimum

0x00AC, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00B0, // Range Minimum

0x00B0, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00B4, // Range Minimum

0x00B4, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00B8, // Range Minimum

0x00B8, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00BC, // Range Minimum

0x00BC, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x04D0, // Range Minimum

0x04D0, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IRQNoFlags ()

{2}

})

}

Device (MATH)

{

Name (_HID, EisaId ("PNP0C04")) // _HID: Hardware ID

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

IO (Decode16,

0x00F0, // Range Minimum

0x00F0, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IRQNoFlags ()

{13}

})

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (PCHV (), SPTH))

{

Return (0x1F)

}

Else

{

Return (Zero)

}

Device (LDRC)

{

Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID

Name (_UID, 0x02) // _UID: Unique ID

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

IO (Decode16,

0x002E, // Range Minimum

0x002E, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x004E, // Range Minimum

0x004E, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x0061, // Range Minimum

0x0061, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0x0063, // Range Minimum

0x0063, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0x0065, // Range Minimum

0x0065, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0x0067, // Range Minimum

0x0067, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0x0070, // Range Minimum

0x0070, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0x0080, // Range Minimum

0x0080, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0x0092, // Range Minimum

0x0092, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0x00B2, // Range Minimum

0x00B2, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x0680, // Range Minimum

0x0680, // Range Maximum

0x01, // Alignment

0x20, // Length

)

IO (Decode16,

0xFFFF, // Range Minimum

0xFFFF, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0xFFFF, // Range Minimum

0xFFFF, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0xFFFF, // Range Minimum

0xFFFF, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0x1800, // Range Minimum

0x1800, // Range Maximum

0x01, // Alignment

0xFF, // Length

)

IO (Decode16,

0x164E, // Range Minimum

0x164E, // Range Maximum

0x01, // Alignment

0x02, // Length

)

})

}

Device (LDR2)

{

Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID

Name (_UID, "LDR2") // _UID: Unique ID

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

IO (Decode16,

0x0800, // Range Minimum

0x0800, // Range Maximum

0x01, // Alignment

0x80, // Length

)

})

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (PCHV (), SPTH))

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Device (RTC)

{

Name (_HID, EisaId ("PNP0B00")) // _HID: Hardware ID

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

IO (Decode16,

0x0070, // Range Minimum

0x0070, // Range Maximum

0x01, // Alignment

0x08, // Length

)

IRQNoFlags ()

{8}

})

}

Device (TIMR)

{

Name (_HID, EisaId ("PNP0100")) // _HID: Hardware ID

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

IO (Decode16,

0x0040, // Range Minimum

0x0040, // Range Maximum

0x01, // Alignment

0x04, // Length

)

IO (Decode16,

0x0050, // Range Minimum

0x0050, // Range Maximum

0x10, // Alignment

0x04, // Length

)

IRQNoFlags ()

{0}

})

}

Device (CWDT)

{

Name (_HID, EisaId ("INT3F0D")) // _HID: Hardware ID

Name (_CID, EisaId ("PNP0C02")) // _CID: Compatible ID

Name (BUF0, ResourceTemplate ()

{

IO (Decode16,

0x1854, // Range Minimum

0x1854, // Range Maximum

0x04, // Alignment

0x04, // Length

)

})

Method (_STA, 0, Serialized) // _STA: Status

{

Return (0x0F)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Return (BUF0)

}

Device (ALSD)

{

Name (_HID, "ACPI0008") // _HID: Hardware ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (ALSE, 0x02))

{

Return (0x0B)

}

Return (Zero)

}

Method (_ALI, 0, NotSerialized) // _ALI: Ambient Light Illuminance

{

Return (Or (ShiftLeft (LHIH, 0x08), LLOW))

}

Name (_ALR, Package (0x05) // _ALR: Ambient Light Response

{

Package (0x02)

{

0x46,

Zero

Package (0x02)

{

0x49,

0x0A

Package (0x02)

{

0x55,

0x50

Package (0x02)

{

0x64,

0x012C

Package (0x02)

{

0x96,

0x03E8

}

})

}

Scope (_SB)

{

Device (PWRB)

{

Name (_HID, EisaId ("PNP0C0C")) // _HID: Hardware ID

Name (PBST, One)

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (0x0F)

}

Scope (_SB.PCI0.LPCB)

{

Device (H_EC)

{

Name (_HID, EisaId ("PNP0C09")) // _HID: Hardware ID

Name (_UID, One) // _UID: Unique ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Store (0x03, ^^^GFX0.CLID)

Return (Zero)

}

Name (B1CC, Zero)

Name (B1ST, Zero)

Name (B2CC, Zero)

Name (B2ST, Zero)

Name (CFAN, Zero)

Name (CMDR, Zero)

Name (DOCK, Zero)

Name (EJET, Zero)

Name (MCAP, Zero)

Name (PLMX, Zero)

Name (PECH, Zero)

Name (PECL, Zero)

Name (PENV, Zero)

Name (PINV, Zero)

Name (PPSH, Zero)

Name (PPSL, Zero)

Name (PSTP, Zero)

Name (RPWR, Zero)

Name (LIDS, Zero)

Name (LSTE, Zero)

Name (SLPC, Zero)

Name (VPWR, Zero)

Name (WTMS, Zero)

Name (AWT2, Zero)

Name (AWT1, Zero)

Name (AWT0, Zero)

Name (DLED, Zero)

Name (IBT1, Zero)

Name (ECAV, Zero)

Name (SPT2, Zero)

Name (PB10, Zero)

Name (IWCW, Zero)

Name (IWCR, Zero)

Method (ECMD, 1, Serialized)

{

If (ECON)

{

While (CMDR)

{

Stall (0x14)

}

Store (Arg0, CMDR)

}

Method (ECRD, 1, Serialized)

{

Return (DerefOf (Arg0))

}

Method (ECWT, 2, Serialized)

{

Store (Arg0, Arg1)

}

Device (BAT0)

{

Name (_HID, EisaId ("PNP0C0A")) // _HID: Hardware ID

Name (_UID, Zero) // _UID: Unique ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (Zero)

}

Scope (\)

{

Field (GNVS, AnyAcc, Lock, Preserve)

{

Offset (0x1E),

BNUM, 8,

Offset (0x20),

B1SC, 8,

Offset (0x23),

B1SS, 8

}

Device (BAT1)

{

Name (_HID, EisaId ("PNP0C0A")) // _HID: Hardware ID

Name (_UID, One) // _UID: Unique ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (Zero)

}

Scope (\)

{

Field (GNVS, AnyAcc, Lock, Preserve)

{

Offset (0x21),

B2SC, 8,

Offset (0x24),

B2SS, 8

}

Device (BAT2)

{

Name (_HID, EisaId ("PNP0C0A")) // _HID: Hardware ID

Name (_UID, 0x02) // _UID: Unique ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (Zero)

}

Device (_SB.PCI0.DOCK)

{

Name (_HID, "ABCD0000") // _HID: Hardware ID

Name (_CID, EisaId ("PNP0C15")) // _CID: Compatible ID

Name (_UID, 0x02) // _UID: Unique ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (Zero)

}

Scope (_SB)

{

Method (PWPR, 0, Serialized)

{

}

Method (PWRR, 0, Serialized)

{

}

Device (LID0)

{

Name (_HID, EisaId ("PNP0C0D")) // _HID: Hardware ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (Zero)

}

Device (_SB.TPM)

{

Method (_HID, 0, NotSerialized) // _HID: Hardware ID

{

If (TCMF)

{

Return (0x01013469)

}

Else

{

If (LEqual (TTDP, Zero))

{

Return (0x310CD041)

}

Else

{

Return ("MSFT0101")

}

Method (_STR, 0, NotSerialized) // _STR: Description String

{

If (LEqual (TTDP, Zero))

{

Return (Unicode ("TPM 1.2 Device"))

}

Else

{

Return (Unicode ("TPM 2.0 Device"))

}

Name (_UID, One) // _UID: Unique ID

Name (CRST, ResourceTemplate ()

{

Memory32Fixed (ReadOnly,

0x00000000, // Address Base

0x00001000, // Address Length

_Y45)

Memory32Fixed (ReadOnly,

0xFED70000, // Address Base

0x00001000, // Address Length

_Y46)

})

Name (CRSD, ResourceTemplate ()

{

Memory32Fixed (ReadOnly,

0xFED40000, // Address Base

0x00001000, // Address Length

_Y47)

})

Name (CRSI, ResourceTemplate ()

{

Memory32Fixed (ReadOnly,

0xFED40000, // Address Base

0x00001000, // Address Length

_Y48)

})

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

If (LEqual (AMDT, One))

{

CreateDWordField (CRST, \_SB.TPM._Y45._BAS, MTFB) // _BAS: Base Address

CreateDWordField (CRST, \_SB.TPM._Y45._LEN, LTFB) // _LEN: Length

Store (TPMB, MTFB)

Store (0x1000, LTFB)

CreateDWordField (CRST, \_SB.TPM._Y46._BAS, MTFC) // _BAS: Base Address

CreateDWordField (CRST, \_SB.TPM._Y46._LEN, LTFC) // _LEN: Length

Store (TPMC, MTFC)

Store (0x1000, LTFC)

Return (CRST)

}

Else

{

If (LEqual (DTPT, One))

{

CreateDWordField (CRSD, \_SB.TPM._Y47._BAS, MTFE) // _BAS: Base Address

CreateDWordField (CRSD, \_SB.TPM._Y47._LEN, LTFE) // _LEN: Length

Store (0xFED40000, MTFE)

Store (0x0880, LTFE)

Return (CRSD)

}

Else

{

If (LEqual (TTPF, One))

{

CreateDWordField (CRSI, \_SB.TPM._Y48._BAS, MTFD) // _BAS: Base Address

CreateDWordField (CRSI, \_SB.TPM._Y48._LEN, LTFD) // _LEN: Length

Store (0xFED40000, MTFD)

Store (0x5000, LTFD)

Return (CRSI)

}

Else

{

If (LEqual (TTPF, Zero))

{

CreateDWordField (CRSI, \_SB.TPM._Y48._BAS, MTFF) // _BAS: Base Address

Store (TPMM, MTFF)

Return (CRSI)

}

OperationRegion (TMMB, SystemMemory, 0xFED40000, 0x5000)

Field (TMMB, ByteAcc, Lock, Preserve)

{

Offset (0x04),

LCST, 32,

Offset (0x40),

CREQ, 32,

CSTS, 32,

Offset (0x4C),

SCMD, 32

}

OperationRegion (CRBD, SystemMemory, TPMM, 0x48)

Field (CRBD, AnyAcc, NoLock, Preserve)

{

Offset (0x04),

HERR, 32,

Offset (0x40),

HCMD, 32,

HSTS, 32

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (TTDP, Zero))

{

If (TPMF)

{

Return (0x0F)

}

Return (Zero)

}

Else

{

If (LEqual (TTDP, One))

{

If (TPMF)

{

Return (0x0F)

}

Return (Zero)

}

Method (STRT, 3, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

OperationRegion (TPMR, SystemMemory, FTPM, 0x1000)

Field (TPMR, AnyAcc, NoLock, Preserve)

{

Offset (0x04),

FERR, 32,

Offset (0x0C),

BEGN, 32

}

Name (TIMR, Zero)

While (One)

{

Store (ToInteger (Arg1), _T_0)

If (LEqual (_T_0, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

If (LEqual (_T_0, One))

{

Store (Zero, TIMR)

If (LEqual (AMDT, One))

{

While (LAnd (LEqual (BEGN, One), LLess (TIMR, 0x0200)))

{

If (LEqual (BEGN, One))

{

Sleep (One)

Increment (TIMR)

}

Return (Zero)

}

Else

{

If (LEqual (Or (And (HSTS, 0x02), And (HSTS, One

)), 0x03))

{

Store (One, HCMD)

}

Else

{

Store (One, FERR)

Store (Zero, BEGN)

}

Return (Zero)

}

Break

}

Return (One)

}

Method (CRYF, 3, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

While (One)

{

Store (ToInteger (Arg1), _T_0)

If (LEqual (_T_0, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

If (LEqual (_T_0, One))

{

Name (TPMV, Package (0x02)

{

One,

Package (0x02)

{

One,

0x20

}

})

If (LEqual (_STA (), Zero))

{

Return (Package (0x01)

{

Zero

})

}

Return (TPMV)

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Scope (_SB.TPM)

{

OperationRegion (TSMI, SystemIO, SMIA, 0x02)

Field (TSMI, WordAcc, NoLock, Preserve)

{

SMI, 16

}

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xA6, 0xFA, 0xDD, 0x3D, 0x1B, 0x36, 0xB4, 0x4E,

/* 0008 */ 0xA4, 0x24, 0x8D, 0x10, 0x08, 0x9D, 0x16, 0x53

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Return (Buffer (0x02)

{

0xFF, 0x01

})

}

Else

{

If (LEqual (_T_0, One))

{

Return ("1.2")

}

Else

{

If (LEqual (_T_0, 0x02))

{

ToInteger (DerefOf (Index (Arg3, Zero)), TMF2)

Store (OFST, TMF1)

Or (0x1200, TMF1, TMF1)

Store (TMF1, SMI)

Store (SMI, TMF1)

ShiftRight (TMF1, 0x08, TMF1)

If (LEqual (TMF1, 0xFF))

{

Return (0x02)

}

ShiftLeft (TMF2, 0x08, TMF2)

Or (OFST, TMF2, TMF2)

Store (TMF2, SMI)

Store (SMI, TMF1)

ShiftRight (TMF1, 0x08, TMF1)

If (LEqual (TMF1, 0xFF))

{

Return (0x02)

}

If (LEqual (TMF1, 0xFF))

{

Return (One)

}

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x03))

{

Name (PPI1, Package (0x02)

{

Zero,

Zero

})

Store (OFST, TMF1)

Or (0x1100, TMF1, TMF1)

Store (TMF1, SMI)

Store (SMI, TMF1)

ShiftRight (TMF1, 0x08, TMF1)

If (LEqual (TMF1, 0xFF))

{

Return (One)

}

Store (TMF1, Index (PPI1, One))

Return (PPI1)

}

Else

{

If (LEqual (_T_0, 0x04))

{

Return (TRST)

}

Else

{

If (LEqual (_T_0, 0x05))

{

Name (PPI2, Package (0x03)

{

Zero,

Zero

})

Store (OFST, TMF1)

Or (0x2100, TMF1, TMF1)

Store (TMF1, SMI)

Store (SMI, TMF1)

ShiftRight (TMF1, 0x08, TMF1)

If (LEqual (TMF1, 0xFF))

{

Return (0x02)

}

Store (TMF1, Index (PPI2, One))

Store (OFST, TMF1)

Or (0x3100, TMF1, TMF1)

Store (TMF1, SMI)

Store (SMI, TMF1)

ShiftRight (TMF1, 0x08, TMF1)

If (LEqual (TMF1, 0xFF))

{

Return (0x02)

}

If (LEqual (TMF1, 0xF0))

{

Store (OFST, TMF1)

Or (0x5100, TMF1, TMF1)

Store (TMF1, SMI)

Store (SMI, TMF1)

ShiftRight (TMF1, 0x08, TMF1)

If (LEqual (TMF1, 0xFF))

{

Store (0xFFFFFFF0, Index (PPI2, 0x02))

Return (PPI2)

}

Else

{

If (LEqual (TMF1, 0xF1))

{

Store (OFST, TMF1)

Or (0x5100, TMF1, TMF1)

Store (TMF1, SMI)

Store (SMI, TMF1)

ShiftRight (TMF1, 0x08, TMF1)

If (LEqual (TMF1, 0xFF))

{

Store (0xFFFFFFF1, Index (PPI2, 0x02))

Return (PPI2)

}

Else

{

Store (TMF1, Index (PPI2, 0x02))

}

Return (PPI2)

}

Else

{

If (LEqual (_T_0, 0x06))

{

Return (0x03)

}

Else

{

If (LEqual (_T_0, 0x07))

{

ToInteger (DerefOf (Index (Arg3, Zero)), TMF2)

Store (OFST, TMF1)

Or (0x1200, TMF1, TMF1)

Store (TMF1, SMI)

Store (SMI, TMF1)

ShiftRight (TMF1, 0x08, TMF1)

If (LEqual (TMF1, 0xFF))

{

Return (0x02)

}

ShiftLeft (TMF2, 0x08, TMF2)

Or (OFST, TMF2, TMF2)

Store (TMF2, SMI)

Store (SMI, TMF1)

ShiftRight (TMF1, 0x08, TMF1)

If (LEqual (TMF1, 0xFF))

{

Return (0x02)

}

If (LEqual (TMF1, 0xF1))

{

Return (One)

}

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

ToInteger (DerefOf (Index (Arg3, Zero)), TMF2)

Store (OFST, TMF1)

Or (0x4300, TMF1, TMF1)

Store (TMF1, SMI)

Store (SMI, TMF1)

ShiftLeft (TMF2, 0x08, TMF2)

Or (OFST, TMF2, TMF2)

Store (TMF2, SMI)

Store (SMI, TMF1)

ShiftRight (TMF1, 0x08, TMF1)

Return (TMF1)

}

Else

{

}

Break

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xED, 0x54, 0x60, 0x37, 0x13, 0xCC, 0x75, 0x46,

/* 0008 */ 0x90, 0x1C, 0x47, 0x56, 0xD7, 0xF2, 0xD4, 0x5D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_1)

If (LEqual (_T_1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

If (LEqual (_T_1, One))

{

Store (OFST, TMF1)

Or (0x2200, TMF1, TMF1)

Store (TMF1, SMI)

Store (SMI, TMF1)

ShiftRight (TMF1, 0x08, TMF1)

If (LEqual (TMF1, 0xFF))

{

Return (0x02)

}

ToInteger (DerefOf (Index (Arg3, Zero)), TMF1)

ShiftLeft (TMF1, 0x08, TMF1)

Or (OFST, TMF1, TMF1)

Store (TMF1, SMI)

Store (SMI, TMF1)

ShiftRight (TMF1, 0x08, TMF1)

If (LEqual (TMF1, 0xFF))

{

Return (0x02)

}

Return (Zero)

}

Else

{

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Scope (_SB)

{

Device (WMIO)

{

Mutex (WMIX, 0x01)

Name (_HID, "PNP0C14") // _HID: Hardware ID

Name (_UID, "MFBI") // _UID: Unique ID

Name (BUF4, Buffer (0x04)

{

0x00, 0x00, 0x00, 0x00

})

CreateByteField (BUF4, Zero, BF00)

CreateByteField (BUF4, One, BF01)

CreateByteField (BUF4, 0x02, BF02)

CreateByteField (BUF4, 0x03, BF03)

Name (_WDG, Buffer (0x14)

{

/* 0000 */ 0xCE, 0x93, 0x05, 0xA8, 0x77, 0x23, 0xDA, 0x11,

/* 0008 */ 0xB0, 0x12, 0xB6, 0x22, 0x20, 0x12, 0x07, 0x27,

/* 0010 */ 0x4D, 0x49, 0x01, 0x02

})

OperationRegion (CMOS, SystemIO, 0x72, 0x02)

Field (CMOS, ByteAcc, NoLock, Preserve)

{

CMIN, 8,

CMDA, 8

}

IndexField (CMIN, CMDA, ByteAcc, NoLock, Preserve)

{

Offset (0xD9),

Offset (0xDB),

WDFH, 8

}

Method (WMMI, 3, NotSerialized)

{

If (LEqual (Arg1, 0x70))

{

Store (Arg2, BUF4)

If (LEqual (BF00, One))

{

Store (Zero, BUF4)

Store (0xDB, CMIN)

Store (CMDA, BF00)

If (And (BF00, One))

{

Store (One, BF00)

Return (BUF4)

}

Else

{

Store (Zero, BF00)

Return (BUF4)

}

Store (UWSI, BF02)

Return (BUF4)

}

Return (0xFFFFFFFF)

}

If (LEqual (Arg1, 0xFB))

{

Store (Arg2, BUF4)

If (LEqual (BF00, Zero))

{

Store (Zero, BUF4)

Store (One, BF02)

Return (BUF4)

}

If (LEqual (BF00, One))

{

Store (Zero, BUF4)

Store (SMIP, BF00)

Return (BUF4)

}

If (LEqual (BF00, 0x02))

{

Store (Zero, BUF4)

Store (FESI, BF00)

Store (FDSI, BF01)

Store (FSSI, BF02)

Return (BUF4)

}

If (LEqual (BF00, 0x03))

{

Store (0xD9, CMIN)

Store (CMDA, BF00)

If (And (BF00, One))

{

Store (One, BF00)

Return (BUF4)

}

Else

{

Store (Zero, BF00)

Return (BUF4)

}

Return (0xFFFFFFFF)

}

Scope (_SB.PCI0)

{

Name (SLIC, Buffer (One)

{

0x00

})

Device (WMI1)

{

Name (_HID, "PNP0C14") // _HID: Hardware ID

Name (_UID, "MXM2") // _UID: Unique ID

Name (_WDG, Buffer (0x14)

{

/* 0000 */ 0x3C, 0x5C, 0xCB, 0xF6, 0xAE, 0x9C, 0xBD, 0x4E,

/* 0008 */ 0xB5, 0x77, 0x93, 0x1E, 0xA3, 0x2A, 0x2C, 0xC0,

/* 0010 */ 0x4D, 0x58, 0x01, 0x02

})

Method (WMMX, 3, NotSerialized)

{

CreateDWordField (Arg2, Zero, FUNC)

If (LEqual (FUNC, 0x41494C53))

{

Return (SLIC)

}

Return (Zero)

}

Fixed ACPI Description Table

View File FACP.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [FACP]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]

[004h 0004 4] Table Length : 000000F4

[008h 0008 1] Revision : 04

[009h 0009 1] Checksum : E0

[00Ah 0010 6] Oem ID : "Apple "

[010h 0016 8] Oem Table ID : "A M I "

[018h 0024 4] Oem Revision : 01072009

[01Ch 0028 4] Asl Compiler ID : "AMI "

[020h 0032 4] Asl Compiler Revision : 00010013

[024h 0036 4] FACS Address : 88B07F80

[028h 0040 4] DSDT Address : 882F3000

[02Ch 0044 1] Model : 00

[02Dh 0045 1] PM Profile : 01 [Desktop]

[02Eh 0046 2] SCI Interrupt : 0009

[030h 0048 4] SMI Command Port : 000000B2

[034h 0052 1] ACPI Enable Value : A0

[035h 0053 1] ACPI Disable Value : A1

[036h 0054 1] S4BIOS Command : 00

[037h 0055 1] P-State Control : 00

[038h 0056 4] PM1A Event Block Address : 00001800

[03Ch 0060 4] PM1B Event Block Address : 00000000

[040h 0064 4] PM1A Control Block Address : 00001804

[044h 0068 4] PM1B Control Block Address : 00000000

[048h 0072 4] PM2 Control Block Address : 00001850

[04Ch 0076 4] PM Timer Block Address : 00001808

[050h 0080 4] GPE0 Block Address : 00001880

[054h 0084 4] GPE1 Block Address : 00000000

[058h 0088 1] PM1 Event Block Length : 04

[059h 0089 1] PM1 Control Block Length : 02

[05Ah 0090 1] PM2 Control Block Length : 01

[05Bh 0091 1] PM Timer Block Length : 04

[05Ch 0092 1] GPE0 Block Length : 20

[05Dh 0093 1] GPE1 Block Length : 00

[05Eh 0094 1] GPE1 Base Offset : 10

[05Fh 0095 1] _CST Support : 85

[060h 0096 2] C2 Latency : 0065

[062h 0098 2] C3 Latency : 00FA

[064h 0100 2] CPU Cache Size : 0400

[066h 0102 2] Cache Flush Stride : 0010

[068h 0104 1] Duty Cycle Offset : 00

[069h 0105 1] Duty Cycle Width : 00

[06Ah 0106 1] RTC Day Alarm Index : 0D

[06Bh 0107 1] RTC Month Alarm Index : 00

[06Ch 0108 1] RTC Century Index : 32

[06Dh 0109 2] Boot Flags (decoded below) : 0003

Legacy Devices Supported (V2) : 1

8042 Present on ports 60/64 (V2) : 1

VGA Not Present (V4) : 0

MSI Not Supported (V4) : 0

PCIe ASPM Not Supported (V4) : 0

CMOS RTC Not Present (V5) : 0

[06Fh 0111 1] Reserved : 00

[070h 0112 4] Flags (decoded below) : 000386A5

WBINVD instruction is operational (V1) : 1

WBINVD flushes all caches (V1) : 0

All CPUs support C1 (V1) : 1

C2 works on MP system (V1) : 0

Control Method Power Button (V1) : 0

Control Method Sleep Button (V1) : 1

RTC wake not in fixed reg space (V1) : 0

RTC can wake system from S4 (V1) : 1

32-bit PM Timer (V1) : 0

Docking Supported (V1) : 1

Reset Register Supported (V2) : 1

Sealed Case (V3) : 0

Headless - No Video (V3) : 0

Use native instr after SLP_TYPx (V3) : 0

PCIEXP_WAK Bits Supported (V4) : 0

Use Platform Timer (V4) : 1

RTC_STS valid on S4 wake (V4) : 1

Remote Power-on capable (V4) : 1

Use APIC Cluster Model (V4) : 0

Use APIC Physical Destination Mode (V4) : 0

Hardware Reduced (V5) : 0

Low Power S0 Idle (V5) : 0

[074h 0116 12] Reset Register : [Generic Address Structure]

[074h 0116 1] Space ID : 01 [SystemIO]

[075h 0117 1] Bit Width : 08

[076h 0118 1] Bit Offset : 00

[077h 0119 1] Encoded Access Width : 01 [Byte Access:8]

[078h 0120 8] Address : 0000000000000CF9

[080h 0128 1] Value to cause reset : 06

[081h 0129 3] Reserved : 000000

[084h 0132 8] FACS Address : 0000000088B07F80

[08Ch 0140 8] DSDT Address : 00000000882F3000

[094h 0148 12] PM1A Event Block : [Generic Address Structure]

[094h 0148 1] Space ID : 01 [SystemIO]

[095h 0149 1] Bit Width : 20

[096h 0150 1] Bit Offset : 00

[097h 0151 1] Encoded Access Width : 03 [DWord Access:32]

[098h 0152 8] Address : 0000000000001800

[0A0h 0160 12] PM1B Event Block : [Generic Address Structure]

[0A0h 0160 1] Space ID : 01 [SystemIO]

[0A1h 0161 1] Bit Width : 00

[0A2h 0162 1] Bit Offset : 00

[0A3h 0163 1] Encoded Access Width : 00 [Undefined/Legacy]

[0A4h 0164 8] Address : 0000000000000000

[0ACh 0172 12] PM1A Control Block : [Generic Address Structure]

[0ACh 0172 1] Space ID : 01 [SystemIO]

[0ADh 0173 1] Bit Width : 10

[0AEh 0174 1] Bit Offset : 00

[0AFh 0175 1] Encoded Access Width : 02 [Word Access:16]

[0B0h 0176 8] Address : 0000000000001804

[0B8h 0184 12] PM1B Control Block : [Generic Address Structure]

[0B8h 0184 1] Space ID : 01 [SystemIO]

[0B9h 0185 1] Bit Width : 00

[0BAh 0186 1] Bit Offset : 00

[0BBh 0187 1] Encoded Access Width : 00 [Undefined/Legacy]

[0BCh 0188 8] Address : 0000000000000000

[0C4h 0196 12] PM2 Control Block : [Generic Address Structure]

[0C4h 0196 1] Space ID : 01 [SystemIO]

[0C5h 0197 1] Bit Width : 08

[0C6h 0198 1] Bit Offset : 00

[0C7h 0199 1] Encoded Access Width : 00 [Undefined/Legacy]

[0C8h 0200 8] Address : 0000000000001850

[0D0h 0208 12] PM Timer Block : [Generic Address Structure]

[0D0h 0208 1] Space ID : 01 [SystemIO]

[0D1h 0209 1] Bit Width : 20

[0D2h 0210 1] Bit Offset : 00

[0D3h 0211 1] Encoded Access Width : 03 [DWord Access:32]

[0D4h 0212 8] Address : 0000000000001808

[0DCh 0220 12] GPE0 Block : [Generic Address Structure]

[0DCh 0220 1] Space ID : 01 [SystemIO]

[0DDh 0221 1] Bit Width : 80

[0DEh 0222 1] Bit Offset : 00

[0DFh 0223 1] Encoded Access Width : 04 [QWord Access:64]

[0E0h 0224 8] Address : 0000000000001880

[0E8h 0232 12] GPE1 Block : [Generic Address Structure]

[0E8h 0232 1] Space ID : 01 [SystemIO]

[0E9h 0233 1] Bit Width : 00

[0EAh 0234 1] Bit Offset : 00

[0EBh 0235 1] Encoded Access Width : 04 [QWord Access:64]

[0ECh 0236 8] Address : 0000000000000000

Raw Table Data: Length 244 (0xF4)

0000: 46 41 43 50 F4 00 00 00 04 E0 41 70 70 6C 65 20 FACP......Apple

0010: 41 20 4D 20 49 20 00 00 09 20 07 01 41 4D 49 20 A M I ... ..AMI

0020: 13 00 01 00 80 7F B0 88 00 30 2F 88 00 01 09 00 .........0/.....

0030: B2 00 00 00 A0 A1 00 00 00 18 00 00 00 00 00 00 ................

0040: 04 18 00 00 00 00 00 00 50 18 00 00 08 18 00 00 ........P.......

0050: 80 18 00 00 00 00 00 00 04 02 01 04 20 00 10 85 ............ ...

0060: 65 00 FA 00 00 04 10 00 00 00 0D 00 32 03 00 00 e...........2...

0070: A5 86 03 00 01 08 00 01 F9 0C 00 00 00 00 00 00 ................

0080: 06 00 00 00 80 7F B0 88 00 00 00 00 00 30 2F 88 .............0/.

0090: 00 00 00 00 01 20 00 03 00 18 00 00 00 00 00 00 ..... ..........

00A0: 01 00 00 00 00 00 00 00 00 00 00 00 01 10 00 02 ................

00B0: 04 18 00 00 00 00 00 00 01 00 00 00 00 00 00 00 ................

00C0: 00 00 00 00 01 08 00 00 50 18 00 00 00 00 00 00 ........P.......

00D0: 01 20 00 03 08 18 00 00 00 00 00 00 01 80 00 04 . ..............

00E0: 80 18 00 00 00 00 00 00 01 00 00 04 00 00 00 00 ................

00F0: 00 00 00 00 ....

Firmware ACPI Control Structure

View File FACS.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [FACS]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "FACS"

[004h 0004 4] Length : 00000040

[008h 0008 4] Hardware Signature : BFB36809

[00Ch 0012 4] 32 Firmware Waking Vector : 00000000

[010h 0016 4] Global Lock : 00000000

[014h 0020 4] Flags (decoded below) : 00000000

S4BIOS Support Present : 0

64-bit Wake Supported (V2) : 0

[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000

[020h 0032 1] Version : 02

[021h 0033 3] Reserved : 000000

[024h 0036 4] OspmFlags (decoded below) : 00000000

64-bit Wake Env Required (V2) : 0

Raw Table Data: Length 64 (0x40)

0000: 46 41 43 53 40 00 00 00 09 68 B3 BF 00 00 00 00 FACS@....h......

0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

0020: 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

Unknown table description.

View File FIDT.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [FIDT]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "FIDT"

[004h 0004 4] Table Length : 0000009C

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : EB

[00Ah 0010 6] Oem ID : "ALASKA"

[010h 0016 8] Oem Table ID : "A M I "

[018h 0024 4] Oem Revision : 01072009

[01Ch 0028 4] Asl Compiler ID : "AMI "

[020h 0032 4] Asl Compiler Revision : 00010013

**** Unknown ACPI table type [FIDT]

Raw Table Data: Length 156 (0x9C)

0000: 46 49 44 54 9C 00 00 00 01 EB 41 4C 41 53 4B 41 FIDT......ALASKA

0010: 41 20 4D 20 49 20 00 00 09 20 07 01 41 4D 49 20 A M I ... ..AMI

0020: 13 00 01 00 24 46 49 44 04 78 00 31 41 53 4F 48 ....$FID.x.1ASOH

0030: 30 32 34 00 DF FC 99 3E A2 51 03 54 47 F6 16 1E 024....>.Q.TG...

0040: 47 CC 52 8B 30 35 00 31 31 00 30 30 00 32 34 00 G.R.05.11.00.24.

0050: 00 00 00 00 00 00 00 FF FF 41 4C 41 53 4B 41 41 .........ALASKAA

0060: 20 4D 20 49 20 00 00 00 00 00 00 00 00 00 00 00 M I ...........

0070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

0080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

0090: 00 00 00 00 00 00 00 00 00 00 00 00 ............

Firmware Performance Data Table

View File FPDT.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [FPDT]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "FPDT" [Firmware Performance Data Table]

[004h 0004 4] Table Length : 00000044

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : 2C

[00Ah 0010 6] Oem ID : "ALASKA"

[010h 0016 8] Oem Table ID : "A M I "

[018h 0024 4] Oem Revision : 01072009

[01Ch 0028 4] Asl Compiler ID : "AMI "

[020h 0032 4] Asl Compiler Revision : 00010013

[024h 0036 2] Subtable Type : 0001

[026h 0038 1] Length : 10

[027h 0039 1] Revision : 01

[028h 0040 4] Reserved : 00000000

[02Ch 0044 8] S3PT Address : 000000008925A130

[034h 0052 2] Subtable Type : 0000

[036h 0054 1] Length : 10

[037h 0055 1] Revision : 01

[038h 0056 4] Reserved : 00000000

[03Ch 0060 8] Reset End : 000000008925A150

**** ACPI table terminates in the middle of a data structure!

Raw Table Data: Length 68 (0x44)

0000: 46 50 44 54 44 00 00 00 01 2C 41 4C 41 53 4B 41 FPDTD....,ALASKA

0010: 41 20 4D 20 49 20 00 00 09 20 07 01 41 4D 49 20 A M I ... ..AMI

0020: 13 00 01 00 01 00 10 01 00 00 00 00 30 A1 25 89 ............0.%.

0030: 00 00 00 00 00 00 10 01 00 00 00 00 50 A1 25 89 ............P.%.

0040: 00 00 00 00 ....

High Precision Event Timer Table

View File HPET.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [HPET]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]

[004h 0004 4] Table Length : 00000038

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : AB

[00Ah 0010 6] Oem ID : "ALASKA"

[010h 0016 8] Oem Table ID : "A M I"

[018h 0024 4] Oem Revision : 01072009

[01Ch 0028 4] Asl Compiler ID : "AMI."

[020h 0032 4] Asl Compiler Revision : 0005000B

[024h 0036 4] Hardware Block ID : 8086A701

[028h 0040 12] Timer Block Register : [Generic Address Structure]

[028h 0040 1] Space ID : 00 [SystemMemory]

[029h 0041 1] Bit Width : 40

[02Ah 0042 1] Bit Offset : 00

[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy]

[02Ch 0044 8] Address : 00000000FED00000

[034h 0052 1] Sequence Number : 00

[035h 0053 2] Minimum Clock Ticks : 37EE

[037h 0055 1] Flags (decoded below) : 00

4K Page Protect : 0

64K Page Protect : 0

Raw Table Data: Length 56 (0x38)

0000: 48 50 45 54 38 00 00 00 01 AB 41 4C 41 53 4B 41 HPET8.....ALASKA

0010: 41 20 4D 20 49 00 00 00 09 20 07 01 41 4D 49 2E A M I.... ..AMI.

0020: 0B 00 05 00 01 A7 86 80 00 40 00 00 00 00 D0 FE .........@......

0030: 00 00 00 00 00 EE 37 00 ......7.

Low Power Idle Table

View File LPIT.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [LPIT]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "LPIT"

[004h 0004 4] Table Length : 00000094

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : 20

[00Ah 0010 6] Oem ID : "INTEL "

[010h 0016 8] Oem Table ID : "SKL"

[018h 0024 4] Oem Revision : 00000000

[01Ch 0028 4] Asl Compiler ID : "MSFT"

[020h 0032 4] Asl Compiler Revision : 0000005F

**** Unknown ACPI table type [LPIT]

Raw Table Data: Length 148 (0x94)

0000: 4C 50 49 54 94 00 00 00 01 20 49 4E 54 45 4C 20 LPIT..... INTEL

0010: 53 4B 4C 00 00 00 00 00 00 00 00 00 4D 53 46 54 SKL.........MSFT

0020: 5F 00 00 00 00 00 00 00 38 00 00 00 00 00 00 00 _.......8.......

0030: 00 00 00 00 7F 01 02 00 60 00 00 00 00 00 00 00 ........`.......

0040: 30 75 00 00 B8 0B 00 00 7F 40 00 00 32 06 00 00 0u.......@..2...

0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

0060: 38 00 00 00 01 00 00 00 00 00 00 00 7F 01 02 00 8...............

0070: 60 00 00 00 00 00 00 00 30 75 00 00 B8 0B 00 00 `.......0u......

0080: 7F 40 00 00 32 06 00 00 00 00 00 00 00 00 00 00 .@..2...........

0090: 00 00 00 00 ....

PCI Express memory mapped configuration space base address Description Table

View File MCFG.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [MCFG]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]

[004h 0004 4] Table Length : 0000003C

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : 01

[00Ah 0010 6] Oem ID : "ALASKA"

[010h 0016 8] Oem Table ID : "A M I"

[018h 0024 4] Oem Revision : 01072009

[01Ch 0028 4] Asl Compiler ID : "MSFT"

[020h 0032 4] Asl Compiler Revision : 00000097

[024h 0036 8] Reserved : 0000000000000000

[02Ch 0044 8] Base Address : 00000000E0000000

[034h 0052 2] Segment Group Number : 0000

[036h 0054 1] Start Bus Number : 00

[037h 0055 1] End Bus Number : FF

[038h 0056 4] Reserved : 00000000

Raw Table Data: Length 60 (0x3C)

0000: 4D 43 46 47 3C 00 00 00 01 01 41 4C 41 53 4B 41 MCFG<.....ALASKA

0010: 41 20 4D 20 49 00 00 00 09 20 07 01 4D 53 46 54 A M I.... ..MSFT

0020: 97 00 00 00 00 00 00 00 00 00 00 00 00 00 00 E0 ................

0030: 00 00 00 00 00 00 00 FF 00 00 00 00 ............

Root System Description Table

View File RSDT.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [XSDT]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "XSDT" [Extended System Description Table]

[004h 0004 4] Table Length : 000000D4

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : 2C

[00Ah 0010 6] Oem ID : "ALASKA"

[010h 0016 8] Oem Table ID : "A M I "

[018h 0024 4] Oem Revision : 01072009

[01Ch 0028 4] Asl Compiler ID : "AMI "

[020h 0032 4] Asl Compiler Revision : 00010013

[024h 0036 8] ACPI Table Address 0 : 000000008831A000

[02Ch 0044 8] ACPI Table Address 1 : 0000000088AE5CB8

[034h 0052 8] ACPI Table Address 2 : 0000000088AE5D40

[03Ch 0060 8] ACPI Table Address 3 : 0000000088AE5D88

[044h 0068 8] ACPI Table Address 4 : 0000000088AE5E28

[04Ch 0076 8] ACPI Table Address 5 : 0000000088AE5E68

[054h 0084 8] ACPI Table Address 6 : 00000000882F1000

[05Ch 0092 8] ACPI Table Address 7 : 0000000088AE6210

[064h 0100 8] ACPI Table Address 8 : 00000000882EF000

[06Ch 0108 8] ACPI Table Address 9 : 00000000882EB000

[074h 0116 8] ACPI Table Address 10 : 0000000083449000

[07Ch 0124 8] ACPI Table Address 11 : 0000000088AE9CE8

[084h 0132 8] ACPI Table Address 12 : 0000000088AE9D20

[08Ch 0140 8] ACPI Table Address 13 : 0000000083447000

[094h 0148 8] ACPI Table Address 14 : 0000000083440000

[09Ch 0156 8] ACPI Table Address 15 : 0000000088AEF748

[0A4h 0164 8] ACPI Table Address 16 : 000000008343E000

[0ACh 0172 8] ACPI Table Address 17 : 0000000088AF0630

[0B4h 0180 8] ACPI Table Address 18 : 00000000882EA000

[0BCh 0188 8] ACPI Table Address 19 : 000000008343D000

[0C4h 0196 8] ACPI Table Address 20 : 000000008267D000

[0CCh 0204 8] ACPI Table Address 21 : 000000008267C000

Raw Table Data: Length 212 (0xD4)

0000: 58 53 44 54 D4 00 00 00 01 2C 41 4C 41 53 4B 41 XSDT.....,ALASKA

0010: 41 20 4D 20 49 20 00 00 09 20 07 01 41 4D 49 20 A M I ... ..AMI

0020: 13 00 01 00 00 A0 31 88 00 00 00 00 B8 5C AE 88 ......1......\..

0030: 00 00 00 00 40 5D AE 88 00 00 00 00 88 5D AE 88 ....@].......]..

0040: 00 00 00 00 28 5E AE 88 00 00 00 00 68 5E AE 88 ....(^......h^..

0050: 00 00 00 00 00 10 2F 88 00 00 00 00 10 62 AE 88 ....../......b..

0060: 00 00 00 00 00 F0 2E 88 00 00 00 00 00 B0 2E 88 ................

0070: 00 00 00 00 00 90 44 83 00 00 00 00 E8 9C AE 88 ......D.........

0080: 00 00 00 00 20 9D AE 88 00 00 00 00 00 70 44 83 .... ........pD.

0090: 00 00 00 00 00 00 44 83 00 00 00 00 48 F7 AE 88 ......D.....H...

00A0: 00 00 00 00 00 E0 43 83 00 00 00 00 30 06 AF 88 ......C.....0...

00B0: 00 00 00 00 00 A0 2E 88 00 00 00 00 00 D0 43 83 ..............C.

00C0: 00 00 00 00 00 D0 67 82 00 00 00 00 00 C0 67 82 ......g.......g.

00D0: 00 00 00 00 ....

Secondary System Description Table

View File SSDT-1.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* Original Table Header:

* Signature "SSDT"

* Length 0x00000248 (584)

* Revision 0x02

* Checksum 0xF8

* OEM ID "INTEL "

* OEM Table ID "sensrhub"

* OEM Revision 0x00000000 (0)

* Compiler ID "INTL"

* Compiler Version 0x20120913 (538052883)

DefinitionBlock ("/Volumes/OS X El Capitan/Users/dima/Downloads/DarwinDumper_v2.9.9.2/DarwinDumperReports/006_2016-05-16_00-24-11_iMac14,2/DarwinDumper_2.9.9.2_AMI_X64_3526_Cap_dima/ACPI Tables/AML/SSDT-1.aml", "SSDT", 2, "INTEL ", "sensrhub", 0x00000000)

{

* iASL Warning: There were 2 external control methods found during

* disassembly, but additional ACPI tables to resolve these externals

* were not specified. This resulting disassembler output file may not

* compile because the disassembler did not know how many arguments

* to assign to these methods. To specify the tables needed to resolve

* external control method references, use the one of the following

* example iASL invocations:

* iasl -e <ssdt1.aml,ssdt2.aml...> -d <dsdt.aml>

* iasl -e <dsdt.aml,ssdt2.aml...> -d <ssdt1.aml>

External (_SB_.GGOV, MethodObj) // Warning: Unresolved Method, guessing 4 arguments (may be incorrect, see warning above)

External (_SB_.SGOV, MethodObj) // Warning: Unresolved Method, guessing 2 arguments (may be incorrect, see warning above)

External (_SB_.PCI0.I2C0.DFUD)

External (BID_)

External (SDS0)

External (USBH)

Scope (\)

{

Device (SHAD)

{

Name (_HID, EisaId ("INT33D0")) // _HID: Hardware ID

Name (_CID, EisaId ("PNP0C02")) // _CID: Compatible ID

Method (_STA, 0, Serialized) // _STA: Status

{

If (LOr (And (SDS0, One), And (USBH, One)))

{

Return (0x0F)

}

Return (Zero)

}

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

Name (PGCE, Zero)

Name (PGCD, Zero)

Name (PGCG, 0x2E)

Name (DFUE, Zero)

Name (DFUD, Zero)

Name (OLDV, Zero)

Name (PGCV, Zero)

Name (DFUV, Zero)

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD5, 0x68, 0xC8, 0x03, 0x3F, 0x56, 0xA8, 0x42,

/* 0008 */ 0x9F, 0x57, 0x9A, 0x18, 0xD9, 0x49, 0xB7, 0xCB

}))

{

If (LEqual (BID, 0x20))

{

Store (0x3A, PGCG)

}

If (LEqual (One, ToInteger (Arg1)))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Return (Buffer (One)

{

0x0F

})

}

Else

{

If (LEqual (_T_0, One))

{

Store (DerefOf (Index (Arg3, Zero)), PGCE)

Store (DerefOf (Index (Arg3, One)), PGCD)

Store (\_SB.GGOV (0x02010016, OLDV, \_SB.SGOV (0x02010016, PGCE), If (LGreater (PGCD,

Zero))

{

Sleep (PGCD)

\_SB.GGOV (0x02010016, OLDV, If (LEqual (\_SB.GGOV (0x02010016, One, Sleep (0x96),

If (LEqual (\_SB.GGOV (0x02010014, One, Else

{

Notify (\_SB.PCI0.I2C0.DFUD, One)

}, Return (Zero)), Else

{

If (LEqual (_T_0, 0x02))

{

Store (DerefOf (Index (Arg3, Zero)), DFUE)

Store (DerefOf (Index (Arg3, One)), DFUD)

Store (\_SB.GGOV (0x02010014, OLDV, \_SB.GGOV (0x02010014, DFUE, If (LGreater (DFUD,

Zero))

{

Sleep (DFUD)

\_SB.GGOV (0x02010014, OLDV, Return (Zero), Else

{

If (LEqual (_T_0, 0x03))

{

Store (\_SB.GGOV (0x02010014, DFUV, Store (\_SB.GGOV (0x02010016, PGCV, Return (Package (

0x02)

{

PGCV,

DFUV

}), Break), Return (Zero)), Return (Zero)), Return (Zero))

}

})

})))

}

})) {}))) {})

}))

}

Secondary System Description Table

View File SSDT-10.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* Original Table Header:

* Signature "SSDT"

* Length 0x000001A2 (418)

* Revision 0x01

* Checksum 0x48

* OEM ID "PmRefA"

* OEM Table ID "CpuCst"

* OEM Revision 0x00003000 (12288)

* Compiler ID "INTL"

* Compiler Version 0x20120320 (538051360)

DefinitionBlock ("/Volumes/OS X El Capitan/Users/dima/Downloads/DarwinDumper_v2.9.9.2/DarwinDumperReports/006_2016-05-16_00-24-11_iMac14,2/DarwinDumper_2.9.9.2_AMI_X64_3526_Cap_dima/ACPI Tables/AML/SSDT-10.aml", "SSDT", 1, "PmRefA", "CpuCst", 0x00003000)

{

External (_PR_.CPU0, DeviceObj)

External (_PR_.CPU1, DeviceObj)

External (_PR_.CPU2, DeviceObj)

External (_PR_.CPU3, DeviceObj)

External (_PR_.CPU4, DeviceObj)

External (_PR_.CPU5, DeviceObj)

External (_PR_.CPU6, DeviceObj)

External (_PR_.CPU7, DeviceObj)

Scope (\_PR.CPU0)

{

Name (CST, Package (0x04)

{

0x03,

Package (0x04)

{

ResourceTemplate ()

{

0x01, // Bit Width

0x02, // Bit Offset

0x0000000000000000, // Address

0x01, // Access Size

)

One,

0x0001,

0x000003E8

Package (0x04)

{

ResourceTemplate ()

{

0x01, // Bit Width

0x02, // Bit Offset

0x0000000000000020, // Address

0x03, // Access Size

)

0x03,

0x00FA,

0x000001F4

Package (0x04)

{

ResourceTemplate ()

{

0x01, // Bit Width

0x02, // Bit Offset

0x0000000000000020, // Address

0x03, // Access Size

)

0x06,

0x00FD,

0x0000015E

}

})

Method (_CST, 0, NotSerialized) // _CST: C-States

{

Return (CST)

}

Scope (\_PR.CPU1)

{

Method (_CST, 0, NotSerialized) // _CST: C-States

{

Return (\_PR.CPU0.CST)

}

Scope (\_PR.CPU2)

{

Method (_CST, 0, NotSerialized) // _CST: C-States

{

Return (\_PR.CPU0.CST)

}

Scope (\_PR.CPU3)

{

Method (_CST, 0, NotSerialized) // _CST: C-States

{

Return (\_PR.CPU0.CST)

}

Scope (\_PR.CPU4)

{

Method (_CST, 0, NotSerialized) // _CST: C-States

{

Return (\_PR.CPU0.CST)

}

Scope (\_PR.CPU5)

{

Method (_CST, 0, NotSerialized) // _CST: C-States

{

Return (\_PR.CPU0.CST)

}

Scope (\_PR.CPU6)

{

Method (_CST, 0, NotSerialized) // _CST: C-States

{

Return (\_PR.CPU0.CST)

}

Scope (\_PR.CPU7)

{

Method (_CST, 0, NotSerialized) // _CST: C-States

{

Return (\_PR.CPU0.CST)

}

Secondary System Description Table

View File SSDT-2.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* Original Table Header:

* Signature "SSDT"

* Length 0x00002BAE (11182)

* Revision 0x02

* Checksum 0xF4

* OEM ID "INTEL "

* OEM Table ID "PtidDevc"

* OEM Revision 0x00001000 (4096)

* Compiler ID "INTL"

* Compiler Version 0x20120913 (538052883)

DefinitionBlock ("/Volumes/OS X El Capitan/Users/dima/Downloads/DarwinDumper_v2.9.9.2/DarwinDumperReports/006_2016-05-16_00-24-11_iMac14,2/DarwinDumper_2.9.9.2_AMI_X64_3526_Cap_dima/ACPI Tables/AML/SSDT-2.aml", "SSDT", 2, "INTEL ", "PtidDevc", 0x00001000)

{

* iASL Warning: There were 2 external control methods found during

* disassembly, but additional ACPI tables to resolve these externals

* were not specified. This resulting disassembler output file may not

* compile because the disassembler did not know how many arguments

* to assign to these methods. To specify the tables needed to resolve

* external control method references, use the one of the following

* example iASL invocations:

* iasl -e <ssdt1.aml,ssdt2.aml...> -d <dsdt.aml>

* iasl -e <dsdt.aml,ssdt2.aml...> -d <ssdt1.aml>

External (_SB_.PCI0.LPCB.H_EC.ECMD, MethodObj) // Warning: Unresolved Method, guessing 1 arguments (may be incorrect, see warning above)

External (_SB_.PCI0.LPCB.H_EC.ECWT, MethodObj) // Warning: Unresolved Method, guessing 6 arguments (may be incorrect, see warning above)

External (_PR_.DTS1)

External (_PR_.DTS2)

External (_PR_.DTS3)

External (_PR_.DTS4)

External (_PR_.PDTS)

External (_SB_.PCI0.LPCB.H_EC.B1CI)

External (_SB_.PCI0.LPCB.H_EC.B1DC)

External (_SB_.PCI0.LPCB.H_EC.B1DI)

External (_SB_.PCI0.LPCB.H_EC.B1FC)

External (_SB_.PCI0.LPCB.H_EC.B1FV)

External (_SB_.PCI0.LPCB.H_EC.B1MH)

External (_SB_.PCI0.LPCB.H_EC.B1ML)

External (_SB_.PCI0.LPCB.H_EC.B1RC)

External (_SB_.PCI0.LPCB.H_EC.B2CI)

External (_SB_.PCI0.LPCB.H_EC.B2DI)

External (_SB_.PCI0.LPCB.H_EC.B2FC)

External (_SB_.PCI0.LPCB.H_EC.B2FV)

External (_SB_.PCI0.LPCB.H_EC.B2MH)

External (_SB_.PCI0.LPCB.H_EC.B2ML)

External (_SB_.PCI0.LPCB.H_EC.B2RC)

External (_SB_.PCI0.LPCB.H_EC.BKAP)

External (_SB_.PCI0.LPCB.H_EC.BPWR)

External (_SB_.PCI0.LPCB.H_EC.CFSP)

External (_SB_.PCI0.LPCB.H_EC.CPAP)

External (_SB_.PCI0.LPCB.H_EC.CPUP)

External (_SB_.PCI0.LPCB.H_EC.ECAV)

External (_SB_.PCI0.LPCB.H_EC.ECRD, IntObj)

External (_SB_.PCI0.LPCB.H_EC.PCAD)

External (_SB_.PCI0.LPCB.H_EC.PDT0)

External (_SB_.PCI0.LPCB.H_EC.PDT1)

External (_SB_.PCI0.LPCB.H_EC.PDT2)

External (_SB_.PCI0.LPCB.H_EC.PDT3)

External (_SB_.PCI0.LPCB.H_EC.PEC0)

External (_SB_.PCI0.LPCB.H_EC.PEC1)

External (_SB_.PCI0.LPCB.H_EC.PEC2)

External (_SB_.PCI0.LPCB.H_EC.PEC3)

External (_SB_.PCI0.LPCB.H_EC.PECC)

External (_SB_.PCI0.LPCB.H_EC.PECD)

External (_SB_.PCI0.LPCB.H_EC.PECH)

External (_SB_.PCI0.LPCB.H_EC.PECI)

External (_SB_.PCI0.LPCB.H_EC.PEHI)

External (_SB_.PCI0.LPCB.H_EC.PENV)

External (_SB_.PCI0.LPCB.H_EC.PEPL)

External (_SB_.PCI0.LPCB.H_EC.PEPM)

External (_SB_.PCI0.LPCB.H_EC.PEWL)

External (_SB_.PCI0.LPCB.H_EC.PLAP)

External (_SB_.PCI0.LPCB.H_EC.PMAX)

External (_SB_.PCI0.LPCB.H_EC.PMDT)

External (_SB_.PCI0.LPCB.H_EC.PPDT)

External (_SB_.PCI0.LPCB.H_EC.PPWR)

External (_SB_.PCI0.LPCB.H_EC.PRC0)

External (_SB_.PCI0.LPCB.H_EC.PRC1)

External (_SB_.PCI0.LPCB.H_EC.PRCL)

External (_SB_.PCI0.LPCB.H_EC.PRCM)

External (_SB_.PCI0.LPCB.H_EC.PRCS)

External (_SB_.PCI0.LPCB.H_EC.PRFC)

External (_SB_.PCI0.LPCB.H_EC.PRIN)

External (_SB_.PCI0.LPCB.H_EC.PRS0)

External (_SB_.PCI0.LPCB.H_EC.PRS1)

External (_SB_.PCI0.LPCB.H_EC.PRS2)

External (_SB_.PCI0.LPCB.H_EC.PRS3)

External (_SB_.PCI0.LPCB.H_EC.PRS4)

External (_SB_.PCI0.LPCB.H_EC.PSTE)

External (_SB_.PCI0.LPCB.H_EC.PWFC)

External (_SB_.PCI0.LPCB.H_EC.PWRL)

External (_SB_.PCI0.LPCB.H_EC.TER1)

External (_SB_.PCI0.LPCB.H_EC.TER2)

External (_SB_.PCI0.LPCB.H_EC.TER3)

External (_SB_.PCI0.LPCB.H_EC.TER4)

External (_SB_.PCI0.LPCB.H_EC.TER5)

External (_SB_.PCI0.LPCB.H_EC.TSR1)

External (_SB_.PCI0.LPCB.H_EC.TSR2)

External (_SB_.PCI0.LPCB.H_EC.TSR3)

External (_SB_.PCI0.LPCB.H_EC.TSR4)

External (_SB_.PCI0.LPCB.H_EC.TSR5)

External (_TZ_.TZ00._TMP, IntObj)

External (_TZ_.TZ01._TMP, IntObj)

External (BID_, IntObj)

External (PAMT, IntObj)

Scope (\_SB)

{

Device (PTID)

{

Name (_HID, EisaId ("INT340E")) // _HID: Hardware ID

Name (_CID, EisaId ("PNP0C02")) // _CID: Compatible ID

Name (IVER, 0x00030000)

Name (_STA, 0x0F) // _STA: Status

Method (TSDL, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

While (One)

{

Store (BID, _T_0)

If (LNotEqual (Match (Package (0x03)

{

0x20,

0x21,

0x09

}, MEQ, _T_0, MTR, Zero, Zero), Ones))

{

Return (TSD2)

}

Else

{

Return (TSD1)

}

Break

}

Name (TSD1, Package (0x28)

{

Zero,

"CPU Core 0 DTS",

Zero,

"CPU Core 1 DTS",

Zero,

"CPU Core 2 DTS",

Zero,

"CPU Core 3 DTS",

Zero,

"CPU Core Package DTS",

0x03,

"DIMM0_hotspot_U4C1",

0x03,

"DIMM1_hotspot_Q4D1",

0x03,

"IMVP_conn_Q7C1",

0x03,

"board_hotspot1_U3G3",

0x03,

"board_hotspot2_Q3G1",

Zero,

"CPU Package Temperature",

0x05,

"PCH DTS Temperature from PCH",

Zero,

"CPU PECI reading",

0x05,

"SA DTS Temperature from PCH",

0x02,

"TZ00 _TMP",

0x02,

"TZ01 _TMP",

0x03,

"SDRAM_hotspot_RT5B1",

0x03,

"NGFF_slot_RT6G1",

0x03,

"IMVP_conn_RT7D1",

0x03,

"board_hotspot3_RT8F1"

})

Name (TSD2, Package (0x26)

{

Zero,

"CPU Core 0 DTS",

Zero,

"CPU Core 1 DTS",

Zero,

"CPU Core 2 DTS",

Zero,

"CPU Core 3 DTS",

Zero,

"CPU Core Package DTS",

0x03,

"A-Skin Hotspot U21",

0x03,

"A-Skin Hotspot U21 IR",

0x03,

"B-Skin Hotspot U1",

0x03,

"B-Skin Hotspot U1 IR",

Zero,

"CPU Package Temperature",

0x05,

"PCH DTS Temperature from PCH",

Zero,

"CPU PECI reading",

0x05,

"SA DTS Temperature from PCH",

0x02,

"TZ00 _TMP",

0x03,

"SoC VR Thermsitor RT11",

0x03,

"Memory Thermistor RT9",

0x03,

"GNSS Board Ambient Thermistor R4",

0x03,

"System VR Thermistor RT10",

0x03,

"A-Skin Skycam Thermistor RT8"

})

Name (PSDL, Package (0x26)

{

0x0B,

"Platform Power (mW)",

0x0B,

"Brick Power cW(100ths)",

0x0B,

"Battery Discharge Power cW(100ths)",

0x0B,

"Platform Average Power (mW)",

0x0B,

"Brick Average Power cW(0.01)",

0x0B,

"Battery Discharge Average Power cW(0.01)",

0x0C,

"Battery 1 Design Capacity (mWh)",

0x0C,

"Battery 1 Remaining Capacity (mWh)",

0x0C,

"Battery 1 Full Charge Capacity (mWh)",

0x0C,

"Battery 1 Full Resolution Voltage (mV)",

0x0C,

"Battery 1 Full Resolution Discharge Current (mA)",

0x0C,

"Battery 1 Full Resolution Charge Current (mA)",

0x0C,

"Battery 2 Remaining Capacity (mWh)",

0x0C,

"Battery 2 Full Charge Capacity (mWh)",

0x0C,

"Battery 2 Full Resolution Voltage (mV)",

0x0C,

"Battery 2 Full Resolution Discharge Current (mA)",

0x0C,

"Battery 2 Full Resolution Charge Current (mA)",

0x0C,

"Battery Pack 1 maximum power (mW)",

0x0C,

"Battery Pack 2 maximum power (mW)"

})

Method (OSDL, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

While (One)

{

Store (BID, _T_0)

If (LNotEqual (Match (Package (0x03)

{

0x20,

0x21,

0x09

}, MEQ, _T_0, MTR, Zero, Zero), Ones))

{

Return (OSD2)

}

Else

{

Return (OSD1)

}

Break

}

Name (OSD1, Package (0x15)

{

0x04,

"CPU Fan Duty Cycle",

"RAW",

0x04,

"CPU Fan #1 Speed",

"RPM",

0x03,

"Skin Temp 0",

"RAW",

0x03,

"Thermistor 1 ",

"RAW",

0x03,

"Thermistor 2 ",

"RAW",

0x03,

"Thermistor 3 ",

"RAW",

0x03,

"Thermistor 4 ",

"RAW"

})

Name (OSD2, Package (0x18)

{

0x04,

"CPU Fan Duty Cycle",

"RAW",

0x04,

"CPU Fan #1 Speed",

"RPM",

0x03,

"Skin Temp 0",

"RAW",

0x03,

"Thermistor 1 ",

"RAW",

0x03,

"Thermistor 2 ",

"RAW",

0x03,

"Thermistor 3 ",

"RAW",

0x03,

"Thermistor 4 ",

"RAW",

0x03,

"Thermistor 5 ",

"RAW"

})

Method (XLAT, 1, Serialized)

{

If (LGreaterEqual (Arg0, 0x03AC))

{

Return (0x0A47)

}

If (LGreaterEqual (Arg0, 0x0394))

{

Return (0x0A79)

}

If (LGreaterEqual (Arg0, 0x0374))

{

Return (0x0AAB)

}

If (LGreaterEqual (Arg0, 0x0354))

{

Return (0x0ADD)

}

If (LGreaterEqual (Arg0, 0x032C))

{

Return (0x0B0F)

}

If (LGreaterEqual (Arg0, 0x0300))

{

Return (0x0B41)

}

If (LGreaterEqual (Arg0, 0x02D0))

{

Return (0x0B73)

}

If (LGreaterEqual (Arg0, 0x029C))

{

Return (0x0BA5)

}

If (LGreaterEqual (Arg0, 0x0264))

{

Return (0x0BD7)

}

If (LGreaterEqual (Arg0, 0x0230))

{

Return (0x0C09)

}

If (LGreaterEqual (Arg0, 0x01FC))

{

Return (0x0C3B)

}

If (LGreaterEqual (Arg0, 0x01C8))

{

Return (0x0C6D)

}

If (LGreaterEqual (Arg0, 0x0194))

{

Return (0x0C9F)

}

If (LGreaterEqual (Arg0, 0x0164))

{

Return (0x0CD1)

}

If (LGreaterEqual (Arg0, 0x0138))

{

Return (0x0D03)

}

If (LGreaterEqual (Arg0, 0x0114))

{

Return (0x0D35)

}

If (LGreaterEqual (Arg0, 0xF0))

{

Return (0x0D67)

}

If (LGreaterEqual (Arg0, 0xD4))

{

Return (0x0D99)

}

If (LGreaterEqual (Arg0, 0xB8))

{

Return (0x0DCB)

}

If (LGreaterEqual (Arg0, 0xA0))

{

Return (0x0DFD)

}

If (LGreaterEqual (Arg0, 0x8C))

{

Return (0x0E2F)

}

If (LGreaterEqual (Arg0, 0x7C))

{

Return (0x0E61)

}

If (LGreaterEqual (Arg0, 0x68))

{

Return (0x0E93)

}

If (LGreaterEqual (Arg0, 0x58))

{

Return (0x0EC5)

}

Return (0x0EC5)

}

Method (XSDS, 1, Serialized)

{

If (LGreaterEqual (Arg0, 0x02F0))

{

Return (0x0A47)

}

If (LGreaterEqual (Arg0, 0x02DC))

{

Return (0x0A79)

}

If (LGreaterEqual (Arg0, 0x02C4))

{

Return (0x0AAB)

}

If (LGreaterEqual (Arg0, 0x02A8))

{

Return (0x0ADD)

}

If (LGreaterEqual (Arg0, 0x0288))

{

Return (0x0B0F)

}

If (LGreaterEqual (Arg0, 0x0264))

{

Return (0x0B41)

}

If (LGreaterEqual (Arg0, 0x0240))

{

Return (0x0B73)

}

If (LGreaterEqual (Arg0, 0x0214))

{

Return (0x0BA5)

}

If (LGreaterEqual (Arg0, 0x01EC))

{

Return (0x0BD7)

}

If (LGreaterEqual (Arg0, 0x01C0))

{

Return (0x0C09)

}

If (LGreaterEqual (Arg0, 0x0194))

{

Return (0x0C3B)

}

If (LGreaterEqual (Arg0, 0x016C))

{

Return (0x0C6D)

}

If (LGreaterEqual (Arg0, 0x0144))

{

Return (0x0C9F)

}

If (LGreaterEqual (Arg0, 0x011C))

{

Return (0x0CD1)

}

If (LGreaterEqual (Arg0, 0xFC))

{

Return (0x0D03)

}

If (LGreaterEqual (Arg0, 0xDC))

{

Return (0x0D35)

}

If (LGreaterEqual (Arg0, 0xC0))

{

Return (0x0D67)

}

If (LGreaterEqual (Arg0, 0xA8))

{

Return (0x0D99)

}

If (LGreaterEqual (Arg0, 0x94))

{

Return (0x0DCB)

}

If (LGreaterEqual (Arg0, 0x80))

{

Return (0x0DFD)

}

If (LGreaterEqual (Arg0, 0x70))

{

Return (0x0E2F)

}

If (LGreaterEqual (Arg0, 0x60))

{

Return (0x0E61)

}

If (LGreaterEqual (Arg0, 0x54))

{

Return (0x0E93)

}

If (LGreaterEqual (Arg0, 0x48))

{

Return (0x0EC5)

}

Return (0x0EC5)

}

Method (TSDD, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

While (One)

{

Store (BID, _T_0)

If (LNotEqual (Match (Package (0x03)

{

0x20,

0x21,

0x09

}, MEQ, _T_0, MTR, Zero, Zero), Ones))

{

Name (TMPX, Package (0x13)

{

0x80000000,

0x80000000

})

Store (Add (Multiply (\_PR.DTS1, 0x0A), 0x0AAC), Index (TMPX,

Zero))

Store (Add (Multiply (\_PR.DTS2, 0x0A), 0x0AAC), Index (TMPX,

One))

Store (Add (Multiply (\_PR.DTS3, 0x0A), 0x0AAC), Index (TMPX,

0x02))

Store (Add (Multiply (\_PR.DTS4, 0x0A), 0x0AAC), Index (TMPX,

0x03))

Store (Add (Multiply (\_PR.PDTS, 0x0A), 0x0AAC), Index (TMPX,

0x04))

If (LEqual (\_SB.PCI0.LPCB.H_EC.ECAV, One))

{

Store (Add (Multiply (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TSR1), 0x0A), Zero, 0x0AAC))

Index (TMPX, 0x05)

Store (Add (Multiply (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TSR2), 0x0A), Zero, 0x0AAC))

Index (TMPX, 0x06)

Store (Add (Multiply (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TSR3), 0x0A), Zero, 0x0AAC))

Index (TMPX, 0x07)

Store (Add (Multiply (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TSR4), 0x0A), Zero, 0x0AAC))

Index (TMPX, 0x08)

Store (Add (Multiply (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PMAX), 0x0A), Zero, 0x0AAC))

Index (TMPX, 0x09)

Store (Add (Multiply (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PPDT), 0x0A), Zero, 0x0AAC))

Index (TMPX, 0x0A)

Store (Add (Multiply (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PECH), 0x0A), Zero, 0x0AAC))

Index (TMPX, 0x0B)

Store (Add (Multiply (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PMDT), 0x0A), Zero, 0x0AAC))

Index (TMPX, 0x0C)

}

Store (\_TZ.TZ00._TMP, Index (TMPX, 0x0D))

If (LEqual (\_SB.PCI0.LPCB.H_EC.ECAV, One))

{

Store (XLAT (ShiftLeft (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TER1), 0x02)))

Index (TMPX, 0x0E)

Store (XLAT (ShiftLeft (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TER2), 0x02)))

Index (TMPX, 0x0F)

Store (XLAT (ShiftLeft (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TER3), 0x02)))

Index (TMPX, 0x10)

Store (XLAT (ShiftLeft (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TER4), 0x02)))

Index (TMPX, 0x11)

Store (XSDS (ShiftLeft (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TER5), 0x02)))

Index (TMPX, 0x12)

}

Return (TMPX)

}

Else

{

Name (TMPV, Package (0x14)

{

0x80000000,

0x80000000

})

Store (Add (Multiply (\_PR.DTS1, 0x0A), 0x0AAC), Index (TMPV,

Zero))

Store (Add (Multiply (\_PR.DTS2, 0x0A), 0x0AAC), Index (TMPV,

One))

Store (Add (Multiply (\_PR.DTS3, 0x0A), 0x0AAC), Index (TMPV,

0x02))

Store (Add (Multiply (\_PR.DTS4, 0x0A), 0x0AAC), Index (TMPV,

0x03))

Store (Add (Multiply (\_PR.PDTS, 0x0A), 0x0AAC), Index (TMPV,

0x04))

If (LEqual (\_SB.PCI0.LPCB.H_EC.ECAV, One))

{

Store (Add (Multiply (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TSR1), 0x0A), Zero, 0x0AAC))

Index (TMPV, 0x05)

Store (Add (Multiply (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TSR2), 0x0A), Zero, 0x0AAC))

Index (TMPV, 0x06)

Store (Add (Multiply (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TSR3), 0x0A), Zero, 0x0AAC))

Index (TMPV, 0x07)

Store (Add (Multiply (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TSR4), 0x0A), Zero, 0x0AAC))

Index (TMPV, 0x08)

Store (Add (Multiply (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TSR5), 0x0A), Zero, 0x0AAC))

Index (TMPV, 0x09)

Store (Add (Multiply (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PMAX), 0x0A), Zero, 0x0AAC))

Index (TMPV, 0x0A)

Store (Add (Multiply (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PPDT), 0x0A), Zero, 0x0AAC))

Index (TMPV, 0x0B)

Store (Add (Multiply (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PECH), 0x0A), Zero, 0x0AAC))

Index (TMPV, 0x0C)

Store (Add (Multiply (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PMDT), 0x0A), Zero, 0x0AAC))

Index (TMPV, 0x0D)

}

Store (\_TZ.TZ00._TMP, Index (TMPV, 0x0E))

Store (\_TZ.TZ01._TMP, Index (TMPV, 0x0F))

If (LEqual (\_SB.PCI0.LPCB.H_EC.ECAV, One))

{

Store (XLAT (ShiftLeft (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TER1), 0x02)))

Index (TMPV, 0x10)

Store (XLAT (ShiftLeft (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TER2), 0x02)))

Index (TMPV, 0x11)

Store (XLAT (ShiftLeft (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TER3), 0x02)))

Index (TMPV, 0x12)

Store (XLAT (ShiftLeft (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TER4), 0x02)))

Index (TMPV, 0x13)

}

Return (TMPV)

}

Break

}

Method (PSDD, 0, Serialized)

{

Name (PWRV, Package (0x13)

{

0x80000000,

0x80000000

})

If (LEqual (\_SB.PCI0.LPCB.H_EC.ECAV, One))

{

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.CPUP))

Index (PWRV, Zero)

Multiply (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.BPWR), 0x0A)

Index (PWRV, One)

Multiply (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PPWR), 0x0A)

Index (PWRV, 0x02)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.CPAP))

Index (PWRV, 0x03)

Multiply (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.BKAP), 0x0A)

Index (PWRV, 0x04)

Multiply (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PLAP), 0x0A)

Index (PWRV, 0x05)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.B1DC))

Index (PWRV, 0x06)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.B1RC))

Index (PWRV, 0x07)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.B1FC))

Index (PWRV, 0x08)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.B1FV))

Index (PWRV, 0x09)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.B1DI))

Index (PWRV, 0x0A)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.B1CI))

Index (PWRV, 0x0B)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.B2RC))

Index (PWRV, 0x0C)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.B2FC))

Index (PWRV, 0x0D)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.B2FV))

Index (PWRV, 0x0E)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.B2DI))

Index (PWRV, 0x0F)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.B2CI))

Index (PWRV, 0x10)

Add (ShiftLeft (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.B1MH), 0x08), Zero, \_SB.PCI0.LPCB.H_EC.ECRD)

RefOf (\_SB.PCI0.LPCB.H_EC.B1ML)

Local0

If (Local0)

{

Not (Or (0xFFFF0000, Local0, Local0), Local0)

Multiply (Add (One, Local0, Local0), 0x0A, Local0)

}

Store (Local0, Index (PWRV, 0x11))

Add (ShiftLeft (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.B2MH), 0x08), Zero, \_SB.PCI0.LPCB.H_EC.ECRD)

RefOf (\_SB.PCI0.LPCB.H_EC.B2ML)

Local0

If (Local0)

{

Not (Or (0xFFFF0000, Local0, Local0), Local0)

Multiply (Add (One, Local0, Local0), 0x0A, Local0)

}

Store (Local0, Index (PWRV, 0x12))

}

Return (PWRV)

}

Method (OSDD, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (\_SB.PCI0.LPCB.H_EC.ECAV, One))

{

While (One)

{

Store (BID, _T_0)

If (LNotEqual (Match (Package (0x03)

{

0x20,

0x21,

0x09

}, MEQ, _T_0, MTR, Zero, Zero), Ones))

{

Name (OSD2, Package (0x08)

{

0x80000000,

0x80000000

})

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PENV))

Index (OSD2, Zero)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.CFSP))

Index (OSD2, One)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TSR3))

Index (OSD2, 0x02)

Store (ShiftLeft (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TER1), 0x02))

Index (OSD2, 0x03)

Store (ShiftLeft (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TER2), 0x02))

Index (OSD2, 0x04)

Store (ShiftLeft (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TER3), 0x02))

Index (OSD2, 0x05)

Store (ShiftLeft (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TER4), 0x02))

Index (OSD2, 0x06)

Store (ShiftLeft (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TER5), 0x02))

Index (OSD2, 0x07)

Return (OSD2)

}

Else

{

Name (OSD1, Package (0x07)

{

0x80000000,

0x80000000

})

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PENV))

Index (OSD1, Zero)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.CFSP))

Index (OSD1, One)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TSR3))

Index (OSD1, 0x02)

Store (ShiftLeft (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TER1), 0x02))

Index (OSD1, 0x03)

Store (ShiftLeft (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TER2), 0x02))

Index (OSD1, 0x04)

Store (ShiftLeft (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TER3), 0x02))

Index (OSD1, 0x05)

Store (ShiftLeft (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.TER4), 0x02))

Index (OSD1, 0x06)

Return (OSD1)

}

Break

}

Method (SDSP, 0, NotSerialized)

{

Return (0x0A)

}

Name (PADA, Package (0x0A)

{

One,

0xFFFFFFFF,

0x1A,

0xFFFFFFFF,

0xFFFFFFFF

})

Name (PADD, Package (0x0A)

{

0x02,

0x06A4,

0x06A0,

0x1A,

0x62,

0x63,

0x60,

0x61,

0x65,

0x64

})

Method (PADT, 0, NotSerialized)

{

If (PAMT)

{

Return (PADA)

}

Return (PADD)

}

Method (RPMD, 0, Serialized)

{

Name (MTMP, Buffer (0x1A) {})

If (LEqual (\_SB.PCI0.LPCB.H_EC.ECAV, One))

{

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PRCL))

Index (MTMP, Zero)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PRC0))

Index (MTMP, One)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PRC1))

Index (MTMP, 0x02)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PRCM))

Index (MTMP, 0x03)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PRIN))

Index (MTMP, 0x04)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PSTE))

Index (MTMP, 0x05)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PCAD))

Index (MTMP, 0x06)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PEWL))

Index (MTMP, 0x07)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PWRL))

Index (MTMP, 0x08)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PECD))

Index (MTMP, 0x09)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PEHI))

Index (MTMP, 0x0A)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PECI))

Index (MTMP, 0x0B)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PEPL))

Index (MTMP, 0x0C)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PEPM))

Index (MTMP, 0x0D)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PWFC))

Index (MTMP, 0x0E)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PECC))

Index (MTMP, 0x0F)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PDT0))

Index (MTMP, 0x10)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PDT1))

Index (MTMP, 0x11)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PDT2))

Index (MTMP, 0x12)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PDT3))

Index (MTMP, 0x13)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PRFC))

Index (MTMP, 0x14)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PRS0))

Index (MTMP, 0x15)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PRS1))

Index (MTMP, 0x16)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PRS2))

Index (MTMP, 0x17)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PRS3))

Index (MTMP, 0x18)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PRS4))

Index (MTMP, 0x19)

}

Return (MTMP)

}

Method (WPMD, 1, NotSerialized)

{

If (LNotEqual (SizeOf (Arg0), 0x1A))

{

Return (0xFFFFFFFF)

}

If (LEqual (\_SB.PCI0.LPCB.H_EC.ECAV, One))

{

\_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (Index (Arg0, Zero)), RefOf (\_SB.PCI0.LPCB.H_EC.PRCL), \_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (

Index (Arg0, One)), RefOf (\_SB.PCI0.LPCB.H_EC.PRC0), \_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (Index (Arg0, 0x02

)), RefOf (\_SB.PCI0.LPCB.H_EC.PRC1), \_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (Index (Arg0, 0x03)), RefOf (\_SB.PCI0.LPCB.H_EC.PRCM),

\_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (Index (Arg0, 0x04)), RefOf (\_SB.PCI0.LPCB.H_EC.PRIN), \_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (Index (

Arg0, 0x05)), RefOf (\_SB.PCI0.LPCB.H_EC.PSTE), \_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (Index (Arg0, 0x06)),

RefOf (\_SB.PCI0.LPCB.H_EC.PCAD), \_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (Index (Arg0, 0x07)), RefOf (\_SB.PCI0.LPCB.H_EC.PEWL), \_SB.PCI0.LPCB.H_EC.ECWT (

DerefOf (Index (Arg0, 0x08)), RefOf (\_SB.PCI0.LPCB.H_EC.PWRL), \_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (Index (Arg0,

0x09)), RefOf (\_SB.PCI0.LPCB.H_EC.PECD), \_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (Index (Arg0, 0x0A)), RefOf (

\_SB.PCI0.LPCB.H_EC.PEHI), \_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (Index (Arg0, 0x0B)), RefOf (\_SB.PCI0.LPCB.H_EC.PECI), \_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (

Index (Arg0, 0x0C)), RefOf (\_SB.PCI0.LPCB.H_EC.PEPL), \_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (Index (Arg0, 0x0D

)), RefOf (\_SB.PCI0.LPCB.H_EC.PEPM), \_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (Index (Arg0, 0x0E)), RefOf (\_SB.PCI0.LPCB.H_EC.PWFC),

\_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (Index (Arg0, 0x0F)), RefOf (\_SB.PCI0.LPCB.H_EC.PECC), \_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (Index (

Arg0, 0x10)), RefOf (\_SB.PCI0.LPCB.H_EC.PDT0), \_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (Index (Arg0, 0x11)),

RefOf (\_SB.PCI0.LPCB.H_EC.PDT1), \_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (Index (Arg0, 0x12)), RefOf (\_SB.PCI0.LPCB.H_EC.PDT2), \_SB.PCI0.LPCB.H_EC.ECWT (

DerefOf (Index (Arg0, 0x13)), RefOf (\_SB.PCI0.LPCB.H_EC.PDT3), \_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (Index (Arg0,

0x14)), RefOf (\_SB.PCI0.LPCB.H_EC.PRFC), \_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (Index (Arg0, 0x15)), RefOf (

\_SB.PCI0.LPCB.H_EC.PRS0), \_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (Index (Arg0, 0x16)), RefOf (\_SB.PCI0.LPCB.H_EC.PRS1), \_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (

Index (Arg0, 0x17)), RefOf (\_SB.PCI0.LPCB.H_EC.PRS2), \_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (Index (Arg0, 0x18

)), RefOf (\_SB.PCI0.LPCB.H_EC.PRS3), \_SB.PCI0.LPCB.H_EC.ECWT (DerefOf (Index (Arg0, 0x19)), RefOf (\_SB.PCI0.LPCB.H_EC.PRS4),

\_SB.PCI0.LPCB.H_EC.ECMD (0x67), Return (Zero)))))))))))))))))))))))))))

}

Method (ISPC, 0, NotSerialized)

{

If (LEqual (\_SB.PCI0.LPCB.H_EC.ECAV, One))

{

\_SB.PCI0.LPCB.H_EC.ECMD (0x65)

}

Return (Zero)

}

Method (ENPC, 0, NotSerialized)

{

If (LEqual (\_SB.PCI0.LPCB.H_EC.ECAV, One))

{

\_SB.PCI0.LPCB.H_EC.ECMD (0x66)

}

Return (Zero)

}

Method (RPCS, 0, NotSerialized)

{

If (LEqual (\_SB.PCI0.LPCB.H_EC.ECAV, One))

{

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PRCS))

Local0

}

Return (Local0)

}

Method (RPEC, 0, NotSerialized)

{

Store (Zero, Local0)

If (LEqual (\_SB.PCI0.LPCB.H_EC.ECAV, One))

{

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PEC0))

Local1

Or (Local0, Local1, Local0)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PEC1))

Local1

Or (Local0, ShiftLeft (Local1, 0x08), Local0)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PEC2))

Local1

Or (Local0, ShiftLeft (Local1, 0x10), Local0)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PEC3))

Local1

Or (Local0, ShiftLeft (Local1, 0x18), Local0)

}

Return (Local0)

}

Secondary System Description Table

View File SSDT-3.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* Original Table Header:

* Signature "SSDT"

* Length 0x00000C45 (3141)

* Revision 0x02

* Checksum 0x82

* OEM ID "INTEL "

* OEM Table ID "Ther_Rvp"

* OEM Revision 0x00001000 (4096)

* Compiler ID "INTL"

* Compiler Version 0x20120913 (538052883)

DefinitionBlock ("/Volumes/OS X El Capitan/Users/dima/Downloads/DarwinDumper_v2.9.9.2/DarwinDumperReports/006_2016-05-16_00-24-11_iMac14,2/DarwinDumper_2.9.9.2_AMI_X64_3526_Cap_dima/ACPI Tables/AML/SSDT-3.aml", "SSDT", 2, "INTEL ", "Ther_Rvp", 0x00001000)

{

* iASL Warning: There were 4 external control methods found during

* disassembly, but additional ACPI tables to resolve these externals

* were not specified. This resulting disassembler output file may not

* compile because the disassembler did not know how many arguments

* to assign to these methods. To specify the tables needed to resolve

* external control method references, use the one of the following

* example iASL invocations:

* iasl -e <ssdt1.aml,ssdt2.aml...> -d <dsdt.aml>

* iasl -e <dsdt.aml,ssdt2.aml...> -d <ssdt1.aml>

External (_SB_.PCI0.LPCB.H_EC.ECMD, MethodObj) // Warning: Unresolved Method, guessing 1 arguments (may be incorrect, see warning above)

External (_SB_.PCI0.LPCB.H_EC.ECWT, MethodObj) // Warning: Unresolved Method, guessing 4 arguments (may be incorrect, see warning above)

External (AC0F, MethodObj) // Warning: Unresolved Method, guessing 3 arguments (may be incorrect, see warning above)

External (AC1F, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above)

External (_PR_.AAC0)

External (_PR_.ACRT)

External (_PR_.APSV)

External (_PR_.CPU0)

External (_PR_.CPU1)

External (_PR_.CPU2)

External (_PR_.CPU3)

External (_PR_.CPU4)

External (_PR_.CPU5)

External (_PR_.CPU6)

External (_PR_.CPU7)

External (_PR_.DTS1, IntObj)

External (_PR_.DTS2, IntObj)

External (_PR_.DTS3, IntObj)

External (_PR_.DTS4, IntObj)

External (_PR_.DTSE)

External (_PR_.PDTS, IntObj)

External (_PR_.PKGA)

External (_SB_.PCI0.LPCB.H_EC.ECRD, IntObj)

External (_SB_.PCI0.LPCB.H_EC.PECH)

External (_SB_.PCI0.LPCB.H_EC.PECL)

External (_SB_.PCI0.LPCB.H_EC.PENV)

External (_SB_.PCI0.LPCB.H_EC.PLMX)

External (ACT1)

External (ACTT)

External (CRTT)

External (CTYP)

External (ECON, IntObj)

External (PSVT)

External (TC1V, IntObj)

External (TC2V, IntObj)

External (TCNT)

External (TSPV, IntObj)

External (VFN0, IntObj)

External (VFN1, IntObj)

External (VFN2, IntObj)

External (VFN3, IntObj)

External (VFN4, IntObj)

Scope (\_TZ)

{

Name (ETMD, One)

Name (THLD, 0x78)

Name (YBT4, 0x37)

Name (YBT3, 0x40)

Name (YBT2, 0x49)

Name (YBT1, 0x50)

Name (YBT0, 0x5B)

PowerResource (FN00, 0x00, 0x0000)

{

Method (_STA, 0, Serialized) // _STA: Status

{

Return (\VFN0)

}

Method (_ON, 0, Serialized) // _ON_: Power On

{

Store (One, \VFN0)

If (LAnd (\ECON, ETMD))

{

\_SB.PCI0.LPCB.H_EC.ECWT (AC0F (RefOf (\_SB.PCI0.LPCB.H_EC.PENV), \_SB.PCI0.LPCB.H_EC.ECMD (0x1A)))

}

Method (_OFF, 0, Serialized) // _OFF: Power Off

{

Store (Zero, \VFN0)

If (LAnd (\ECON, ETMD))

{

If (LNotEqual (\VFN1, Zero))

{

\_SB.PCI0.LPCB.H_EC.ECWT (AC1F (), RefOf (\_SB.PCI0.LPCB.H_EC.PENV), Else

{

\_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.PENV), \_SB.PCI0.LPCB.H_EC.ECMD (0x1A))

})

}

Device (FAN0)

{

Name (_HID, EisaId ("PNP0C0B")) // _HID: Hardware ID

Name (_UID, Zero) // _UID: Unique ID

Name (_PR0, Package (0x01) // _PR0: Power Resources for D0

{

FN00

})

}

PowerResource (FN01, 0x00, 0x0000)

{

Method (_STA, 0, Serialized) // _STA: Status

{

Return (\VFN1)

}

Method (_ON, 0, Serialized) // _ON_: Power On

{

Store (One, \VFN1)

If (LAnd (\ECON, ETMD))

{

If (LEqual (\VFN0, Zero))

{

\_SB.PCI0.LPCB.H_EC.ECWT (AC1F (), RefOf (\_SB.PCI0.LPCB.H_EC.PENV), \_SB.PCI0.LPCB.H_EC.ECMD (0x1A))

}

Method (_OFF, 0, Serialized) // _OFF: Power Off

{

Store (Zero, \VFN1)

If (LAnd (\ECON, ETMD))

{

If (LNotEqual (\VFN2, Zero))

{

\_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.PENV), Else

{

\_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.PENV), \_SB.PCI0.LPCB.H_EC.ECMD (0x1A))

})

}

Device (FAN1)

{

Name (_HID, EisaId ("PNP0C0B")) // _HID: Hardware ID

Name (_UID, One) // _UID: Unique ID

Name (_PR0, Package (0x01) // _PR0: Power Resources for D0

{

FN01

})

}

PowerResource (FN02, 0x00, 0x0000)

{

Method (_STA, 0, Serialized) // _STA: Status

{

Return (\VFN2)

}

Method (_ON, 0, Serialized) // _ON_: Power On

{

Store (One, \VFN2)

If (LAnd (\ECON, ETMD))

{

If (LEqual (\VFN1, Zero))

{

\_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.PENV), \_SB.PCI0.LPCB.H_EC.ECMD (0x1A))

}

Method (_OFF, 0, Serialized) // _OFF: Power Off

{

Store (Zero, \VFN2)

If (LAnd (\ECON, ETMD))

{

If (LNotEqual (\VFN3, Zero))

{

\_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.PENV), Else

{

\_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.PENV), \_SB.PCI0.LPCB.H_EC.ECMD (0x1A))

})

}

Device (FAN2)

{

Name (_HID, EisaId ("PNP0C0B")) // _HID: Hardware ID

Name (_UID, 0x02) // _UID: Unique ID

Name (_PR0, Package (0x01) // _PR0: Power Resources for D0

{

FN02

})

}

PowerResource (FN03, 0x00, 0x0000)

{

Method (_STA, 0, Serialized) // _STA: Status

{

Return (\VFN3)

}

Method (_ON, 0, Serialized) // _ON_: Power On

{

Store (One, \VFN3)

If (LAnd (\ECON, ETMD))

{

If (LEqual (\VFN2, Zero))

{

\_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.PENV), \_SB.PCI0.LPCB.H_EC.ECMD (0x1A))

}

Method (_OFF, 0, Serialized) // _OFF: Power Off

{

Store (Zero, \VFN3)

If (LAnd (\ECON, ETMD))

{

If (LNotEqual (\VFN4, Zero))

{

\_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.PENV), Else

{

\_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.PENV), \_SB.PCI0.LPCB.H_EC.ECMD (0x1A))

})

}

Device (FAN3)

{

Name (_HID, EisaId ("PNP0C0B")) // _HID: Hardware ID

Name (_UID, 0x03) // _UID: Unique ID

Name (_PR0, Package (0x01) // _PR0: Power Resources for D0

{

FN03

})

}

PowerResource (FN04, 0x00, 0x0000)

{

Method (_STA, 0, Serialized) // _STA: Status

{

Return (\VFN4)

}

Method (_ON, 0, Serialized) // _ON_: Power On

{

Store (One, \VFN4)

If (LAnd (\ECON, ETMD))

{

If (LEqual (\VFN3, Zero))

{

\_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.PENV), \_SB.PCI0.LPCB.H_EC.ECMD (0x1A))

}

Method (_OFF, 0, Serialized) // _OFF: Power Off

{

Store (Zero, \VFN4)

If (LAnd (\ECON, ETMD))

{

\_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.PENV), \_SB.PCI0.LPCB.H_EC.ECMD (0x1A))

}

Device (FAN4)

{

Name (_HID, EisaId ("PNP0C0B")) // _HID: Hardware ID

Name (_UID, 0x04) // _UID: Unique ID

Name (_PR0, Package (0x01) // _PR0: Power Resources for D0

{

FN04

})

}

ThermalZone (TZ00)

{

Name (PTMP, 0x0BB8)

Method (_SCP, 1, Serialized) // _SCP: Set Cooling Policy

{

Store (Arg0, \CTYP)

}

Method (_CRT, 0, Serialized) // _CRT: Critical Temperature

{

If (CondRefOf (\_PR.ACRT))

{

If (LNotEqual (\_PR.ACRT, Zero))

{

Return (Add (0x0AAC, Multiply (\_PR.ACRT, 0x0A)))

}

Return (Add (0x0AAC, Multiply (\CRTT, 0x0A)))

}

Method (_AC0, 0, Serialized) // _ACx: Active Cooling

{

If (CondRefOf (\_PR.AAC0))

{

If (LNotEqual (\_PR.AAC0, Zero))

{

Return (Add (0x0AAC, Multiply (\_PR.AAC0, 0x0A)))

}

Return (Add (0x0AAC, Multiply (\ACTT, 0x0A)))

}

Method (_AC1, 0, Serialized) // _ACx: Active Cooling

{

Return (Add (0x0AAC, Multiply (\ACT1, 0x0A)))

}

Method (_AC2, 0, Serialized) // _ACx: Active Cooling

{

Return (Subtract (Add (0x0AAC, Multiply (\ACT1, 0x0A)), 0x32

))

}

Method (_AC3, 0, Serialized) // _ACx: Active Cooling

{

Return (Subtract (Add (0x0AAC, Multiply (\ACT1, 0x0A)), 0x64

))

}

Method (_AC4, 0, Serialized) // _ACx: Active Cooling

{

Return (Subtract (Add (0x0AAC, Multiply (\ACT1, 0x0A)), 0x96

))

}

Name (_AL0, Package (0x01) // _ALx: Active List

{

FAN0

})

Name (_AL1, Package (0x01) // _ALx: Active List

{

FAN1

})

Name (_AL2, Package (0x01) // _ALx: Active List

{

FAN2

})

Name (_AL3, Package (0x01) // _ALx: Active List

{

FAN3

})

Name (_AL4, Package (0x01) // _ALx: Active List

{

FAN4

})

Method (_TMP, 0, Serialized) // _TMP: Temperature

{

If (LNot (ETMD))

{

Return (0x0BB8)

}

If (CondRefOf (\_PR.DTSE))

{

If (LEqual (\_PR.DTSE, 0x03))

{

Return (Add (0x0B10, Multiply (\CRTT, 0x0A)))

}

If (CondRefOf (\_PR.DTSE))

{

If (LEqual (\_PR.DTSE, One))

{

If (LEqual (\_PR.PKGA, One))

{

Store (\_PR.PDTS, Local0)

Return (Add (0x0AAC, Multiply (Local0, 0x0A)))

}

Store (\_PR.DTS1, Local0)

If (LGreater (\_PR.DTS2, Local0))

{

Store (\_PR.DTS2, Local0)

}

If (LGreater (\_PR.DTS3, Local0))

{

Store (\_PR.DTS3, Local0)

}

If (LGreater (\_PR.DTS4, Local0))

{

Store (\_PR.DTS4, Local0)

}

Return (Add (0x0AAC, Multiply (Local0, 0x0A)))

}

If (\ECON)

{

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PLMX))

Local0

Add (0x0AAC, Multiply (Local0, 0x0A), Local0)

Store (Local0, PTMP)

Return (Local0)

}

Return (0x0BC2)

}

ThermalZone (TZ01)

{

Name (PTMP, 0x0BB8)

Method (_SCP, 1, Serialized) // _SCP: Set Cooling Policy

{

Store (Arg0, \CTYP)

}

Method (_CRT, 0, Serialized) // _CRT: Critical Temperature

{

If (CondRefOf (\_PR.ACRT))

{

If (LNotEqual (\_PR.ACRT, Zero))

{

Return (Add (0x0AAC, Multiply (\_PR.ACRT, 0x0A)))

}

Return (Add (0x0AAC, Multiply (\CRTT, 0x0A)))

}

Method (_TMP, 0, Serialized) // _TMP: Temperature

{

If (LNot (ETMD))

{

Return (0x0BCC)

}

If (CondRefOf (\_PR.DTSE))

{

If (LEqual (\_PR.DTSE, 0x03))

{

Return (Add (0x0B10, Multiply (\CRTT, 0x0A)))

}

If (CondRefOf (\_PR.DTSE))

{

If (LEqual (\_PR.DTSE, One))

{

If (LEqual (\_PR.PKGA, One))

{

Store (\_PR.PDTS, Local0)

Return (Add (0x0AAC, Multiply (Local0, 0x0A)))

}

Store (\_PR.DTS1, Local0)

If (LGreater (\_PR.DTS2, Local0))

{

Store (\_PR.DTS2, Local0)

}

If (LGreater (\_PR.DTS3, Local0))

{

Store (\_PR.DTS3, Local0)

}

If (LGreater (\_PR.DTS4, Local0))

{

Store (\_PR.DTS4, Local0)

}

Return (Add (0x0AAC, Multiply (Local0, 0x0A)))

}

If (\ECON)

{

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PECH))

Local0

Multiply (Local0, 0x0A, Local0)

Store (\_SB.PCI0.LPCB.H_EC.ECRD, RefOf (\_SB.PCI0.LPCB.H_EC.PECL))

Local1

ShiftRight (Local1, 0x02, Local1)

Store (Divide (Multiply (Local1, 0x0A), 0x40, ), Local1)

Add (Local0, Local1, Local0)

Add (0x0AAC, Local0, Local0)

Store (Local0, PTMP)

Return (Local0)

}

Return (0x0BD6)

}

Method (XPSL, 0, Serialized)

{

If (LEqual (\TCNT, 0x08))

{

Return (Package (0x08)

{

\_PR.CPU0,

\_PR.CPU1,

\_PR.CPU2,

\_PR.CPU3,

\_PR.CPU4,

\_PR.CPU5,

\_PR.CPU6,

\_PR.CPU7

})

}

If (LEqual (\TCNT, 0x04))

{

Return (Package (0x04)

{

\_PR.CPU0,

\_PR.CPU1,

\_PR.CPU2,

\_PR.CPU3

})

}

If (LEqual (\TCNT, 0x02))

{

Return (Package (0x02)

{

\_PR.CPU0,

\_PR.CPU1

})

}

Return (Package (0x01)

{

\_PR.CPU0

})

}

Method (XPSV, 0, Serialized)

{

If (CondRefOf (\_PR.APSV))

{

If (LNotEqual (\_PR.APSV, Zero))

{

Return (Add (0x0AAC, Multiply (\_PR.APSV, 0x0A)))

}

Return (Add (0x0AAC, Multiply (\PSVT, 0x0A)))

}

Method (XTC1, 0, Serialized)

{

Return (\TC1V)

}

Method (XTC2, 0, Serialized)

{

Return (\TC2V)

}

Method (XTSP, 0, Serialized)

{

Return (\TSPV)

}

Secondary System Description Table

View File SSDT-4.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* Original Table Header:

* Signature "SSDT"

* Length 0x00000618 (1560)

* Revision 0x02

* Checksum 0x17

* OEM ID "INTEL"

* OEM Table ID "xh_rvp08"

* OEM Revision 0x00000000 (0)

* Compiler ID "INTL"

* Compiler Version 0x20120913 (538052883)

DefinitionBlock ("/Volumes/OS X El Capitan/Users/dima/Downloads/DarwinDumper_v2.9.9.2/DarwinDumperReports/006_2016-05-16_00-24-11_iMac14,2/DarwinDumper_2.9.9.2_AMI_X64_3526_Cap_dima/ACPI Tables/AML/SSDT-4.aml", "SSDT", 2, "INTEL", "xh_rvp08", 0x00000000)

{

External (_SB_.PCI0.XHC_.RHUB, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS01, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS02, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS03, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS04, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS05, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS06, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS07, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS08, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS09, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS10, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS11, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS12, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS13, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS14, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.SS01, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.SS02, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.SS03, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.SS04, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.SS05, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.SS06, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.SS07, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.SS08, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.SS09, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.SS10, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.USR1, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.USR2, DeviceObj)

Scope (\_SB.PCI0.XHC.RHUB)

{

Method (GPLD, 2, Serialized)

{

Name (PCKG, Package (0x01)

{

Buffer (0x10) {}

})

CreateField (DerefOf (Index (PCKG, Zero)), Zero, 0x07, REV)

Store (One, REV)

CreateField (DerefOf (Index (PCKG, Zero)), 0x40, One, VISI)

Store (Arg0, VISI)

CreateField (DerefOf (Index (PCKG, Zero)), 0x57, 0x08, GPOS)

Store (Arg1, GPOS)

Return (PCKG)

}

Method (GUPC, 1, Serialized)

{

Name (PCKG, Package (0x04)

{

Zero,

0xFF,

Zero,

Zero

})

Store (Arg0, Index (PCKG, Zero))

Return (PCKG)

}

Scope (\_SB.PCI0.XHC.RHUB.HS01)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, One))

}

Scope (\_SB.PCI0.XHC.RHUB.HS02)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x02))

}

Scope (\_SB.PCI0.XHC.RHUB.HS03)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x03))

}

Scope (\_SB.PCI0.XHC.RHUB.HS04)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x04))

}

Scope (\_SB.PCI0.XHC.RHUB.HS05)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x05))

}

Scope (\_SB.PCI0.XHC.RHUB.HS06)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x06))

}

Scope (\_SB.PCI0.XHC.RHUB.HS07)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x07))

}

Scope (\_SB.PCI0.XHC.RHUB.HS08)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x08))

}

Scope (\_SB.PCI0.XHC.RHUB.HS09)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x09))

}

Scope (\_SB.PCI0.XHC.RHUB.HS10)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x0A))

}

Scope (\_SB.PCI0.XHC.RHUB.HS11)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x0B))

}

Scope (\_SB.PCI0.XHC.RHUB.HS12)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x0C))

}

Scope (\_SB.PCI0.XHC.RHUB.HS13)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x0D))

}

Scope (\_SB.PCI0.XHC.RHUB.HS14)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x0E))

}

Scope (\_SB.PCI0.XHC.RHUB.USR1)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (Zero))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (Zero, Zero))

}

Scope (\_SB.PCI0.XHC.RHUB.USR2)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (Zero))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (Zero, Zero))

}

Scope (\_SB.PCI0.XHC.RHUB.SS01)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x07))

}

Scope (\_SB.PCI0.XHC.RHUB.SS02)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x05))

}

Scope (\_SB.PCI0.XHC.RHUB.SS03)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x06))

}

Scope (\_SB.PCI0.XHC.RHUB.SS04)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x0E))

}

Scope (\_SB.PCI0.XHC.RHUB.SS05)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x08))

}

Scope (\_SB.PCI0.XHC.RHUB.SS06)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x0F))

}

Scope (\_SB.PCI0.XHC.RHUB.SS07)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, One))

}

Scope (\_SB.PCI0.XHC.RHUB.SS08)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x0A))

}

Scope (\_SB.PCI0.XHC.RHUB.SS09)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x0D))

}

Scope (\_SB.PCI0.XHC.RHUB.SS10)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (Zero))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (Zero, Zero))

}

Secondary System Description Table

View File SSDT-5.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* Original Table Header:

* Signature "SSDT"

* Length 0x000053B2 (21426)

* Revision 0x02

* Checksum 0x72

* OEM ID "SaSsdt"

* OEM Table ID "SaSsdt "

* OEM Revision 0x00003000 (12288)

* Compiler ID "INTL"

* Compiler Version 0x20120913 (538052883)

DefinitionBlock ("/Volumes/OS X El Capitan/Users/dima/Downloads/DarwinDumper_v2.9.9.2/DarwinDumperReports/006_2016-05-16_00-24-11_iMac14,2/DarwinDumper_2.9.9.2_AMI_X64_3526_Cap_dima/ACPI Tables/AML/SSDT-5.aml", "SSDT", 2, "SaSsdt", "SaSsdt ", 0x00003000)

{

* iASL Warning: There were 8 external control methods found during

* disassembly, but additional ACPI tables to resolve these externals

* were not specified. This resulting disassembler output file may not

* compile because the disassembler did not know how many arguments

* to assign to these methods. To specify the tables needed to resolve

* external control method references, use the one of the following

* example iASL invocations:

* iasl -e <ssdt1.aml,ssdt2.aml...> -d <dsdt.aml>

* iasl -e <dsdt.aml,ssdt2.aml...> -d <ssdt1.aml>

External (_SB_.ISME, MethodObj) // Warning: Unresolved Method, guessing 4 arguments (may be incorrect, see warning above)

External (_SB_.SGOV, MethodObj) // Warning: Unresolved Method, guessing 5 arguments (may be incorrect, see warning above)

External (_SB_.SHPO, MethodObj) // Warning: Unresolved Method, guessing 2 arguments (may be incorrect, see warning above)

External (GUAM, MethodObj) // Warning: Unresolved Method, guessing 1 arguments (may be incorrect, see warning above)

External (HDOS, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above)

External (HNOT, MethodObj) // Warning: Unresolved Method, guessing 1 arguments (may be incorrect, see warning above)

External (PCRA, MethodObj) // Warning: Unresolved Method, guessing 2 arguments (may be incorrect, see warning above)

External (PCRO, MethodObj) // Warning: Unresolved Method, guessing 2 arguments (may be incorrect, see warning above)

External (_SB_.GGOV, IntObj)

External (_SB_.PCI0, DeviceObj)

External (_SB_.PCI0.GFX0, DeviceObj)

External (_SB_.PCI0.PEG0, DeviceObj)

External (_SB_.PCI0.PEG0.PEGP, DeviceObj)

External (_SB_.PCI0.PEG1, DeviceObj)

External (_SB_.PCI0.PEG1.PEGP, DeviceObj)

External (_SB_.PCI0.PEG2, DeviceObj)

External (_SB_.PCI0.PEG2.PEGP, DeviceObj)

External (CPSC)

External (DSEN)

External (ECR1, IntObj)

External (GPRW, IntObj)

External (OSYS)

External (S0ID)

External (SNXD)

OperationRegion (SANV, SystemMemory, 0x88AF4D98, 0x0135)

Field (SANV, AnyAcc, Lock, Preserve)

{

ASLB, 32,

IMON, 8,

IGDS, 8,

IBTT, 8,

IPAT, 8,

IPSC, 8,

IBIA, 8,

ISSC, 8,

IDMS, 8,

IF1E, 8,

HVCO, 8,

GSMI, 8,

PAVP, 8,

CADL, 8,

CSTE, 16,

NSTE, 16,

NDID, 8,

DID1, 32,

DID2, 32,

DID3, 32,

DID4, 32,

DID5, 32,

DID6, 32,

DID7, 32,

DID8, 32,

DID9, 32,

DIDA, 32,

DIDB, 32,

DIDC, 32,

DIDD, 32,

DIDE, 32,

DIDF, 32,

DIDX, 32,

NXD1, 32,

NXD2, 32,

NXD3, 32,

NXD4, 32,

NXD5, 32,

NXD6, 32,

NXD7, 32,

NXD8, 32,

NXDX, 32,

LIDS, 8,

KSV0, 32,

KSV1, 8,

BRTL, 8,

ALSE, 8,

ALAF, 8,

LLOW, 8,

LHIH, 8,

ALFP, 8,

IMTP, 8,

EDPV, 8,

SGMD, 8,

SGFL, 8,

SGGP, 8,

HRE0, 8,

HRG0, 32,

HRA0, 8,

PWE0, 8,

PWG0, 32,

PWA0, 8,

P1GP, 8,

HRE1, 8,

HRG1, 32,

HRA1, 8,

PWE1, 8,

PWG1, 32,

PWA1, 8,

P2GP, 8,

HRE2, 8,

HRG2, 32,

HRA2, 8,

PWE2, 8,

PWG2, 32,

PWA2, 8,

DLPW, 16,

DLHR, 16,

EECP, 8,

XBAS, 32,

GBAS, 16,

NVGA, 32,

NVHA, 32,

AMDA, 32,

LTRX, 8,

OBFX, 8,

LTRY, 8,

OBFY, 8,

LTRZ, 8,

OBFZ, 8,

SMSL, 16,

SNSL, 16,

P0UB, 8,

P1UB, 8,

P2UB, 8,

PCSL, 8,

PBGE, 8,

M64B, 64,

M64L, 64,

CPEX, 32,

EEC1, 8,

EEC2, 8,

SBN0, 8,

SBN1, 8,

SBN2, 8,

M32B, 32,

M32L, 32,

P0WK, 32,

P1WK, 32,

P2WK, 32,

MXD1, 32,

MXD2, 32,

MXD3, 32,

MXD4, 32,

MXD5, 32,

MXD6, 32,

MXD7, 32,

MXD8, 32,

PXFD, 8,

EBAS, 32,

DGVS, 32,

DGVB, 32,

HYSS, 32

}

Scope (\_SB.PCI0)

{

Name (LTRS, Zero)

Name (OBFS, Zero)

}

Scope (\_GPE)

{

Method (P0L6, 0, NotSerialized)

{

If (\_SB.ISME (P0WK, \_SB.SHPO (P0WK, One), Notify (\_SB.PCI0.PEG0, 0x02))) {}

}

Method (P1L6, 0, NotSerialized)

{

If (\_SB.ISME (P1WK, \_SB.SHPO (P1WK, One), Notify (\_SB.PCI0.PEG1, 0x02))) {}

}

Method (P2L6, 0, NotSerialized)

{

If (\_SB.ISME (P2WK, \_SB.SHPO (P2WK, One), Notify (\_SB.PCI0.PEG2, 0x02))) {}

}

Scope (\_SB.PCI0.PEG0)

{

Name (WKEN, Zero)

OperationRegion (PEGR, PCI_Config, 0xC0, 0x30)

Field (PEGR, DWordAcc, NoLock, Preserve)

{

Offset (0x02),

PSTS, 1,

Offset (0x2C),

GENG, 1,

, 1,

PMEG, 1

}

OperationRegion (MSID, SystemMemory, EBAS, 0x50)

Field (MSID, DWordAcc, Lock, Preserve)

{

VEID, 16,

Offset (0x40),

NVID, 32,

Offset (0x4C),

ATID, 32

}

OperationRegion (RPCX, SystemMemory, Add (\XBAS, 0x8000), 0x0100)

Field (RPCX, ByteAcc, NoLock, Preserve)

{

Offset (0x04),

CMDR, 8,

Offset (0x84),

D0ST, 2

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW)

0x69

0x04

}

Method (HPME, 0, Serialized)

{

Store (One, PSTS)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTRX, LTRS)

Store (OBFX, OBFS)

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Store (Zero, Local0)

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRS)

{

Or (Local0, 0x40, Local0)

}

If (OBFS)

{

Or (Local0, 0x10, Local0)

}

If (LGreaterEqual (Arg1, 0x03))

{

If (ECR1)

{

Or (Local0, 0x0100, Local0)

}

If (ECR1)

{

Or (Local0, 0x0200, Local0)

}

If (LNotEqual (Local0, Zero))

{

Or (Local0, One, Local0)

}

Return (Local0)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFS)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRS)

{

Store (And (ShiftRight (SMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (SMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (SNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (SNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

PowerResource (PG00, 0x00, 0x0000)

{

Name (_STA, One) // _STA: Status

Method (_ON, 0, Serialized) // _ON_: Power On

{

If (LAnd (LGreater (OSYS, 0x07D9), PEGS ()))

{

PGON (Zero)

Or (CMDR, 0x07, CMDR)

Store (Zero, D0ST)

If (LEqual (VEID, 0x10DE))

{

Store (HYSS, NVID)

}

If (LEqual (VEID, 0x1002))

{

Store (HYSS, ATID)

}

Store (One, _STA)

}

Method (_OFF, 0, Serialized) // _OFF: Power Off

{

If (LAnd (LGreater (OSYS, 0x07D9), PEGS ()))

{

PGOF (Zero)

Store (Zero, _STA)

}

Name (_PR0, Package (0x01) // _PR0: Power Resources for D0

{

PG00

})

Name (_PR2, Package (0x01) // _PR2: Power Resources for D2

{

PG00

})

Name (_PR3, Package (0x01) // _PR3: Power Resources for D3hot

{

PG00

})

Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake

{

If (Arg1)

{

Store (Zero, WKEN)

}

Else

{

If (LAnd (Arg0, Arg2))

{

Store (One, WKEN)

}

Else

{

Store (Zero, WKEN)

}

Method (P0EW, 0, NotSerialized)

{

If (WKEN)

{

If (LNotEqual (SGGP, Zero))

{

If (LEqual (SGGP, One))

{

\_SB.SGOV (P0WK, One, \_SB.SHPO (P0WK, Zero))

}

Method (_S0W, 0, NotSerialized) // _S0W: S0 Device Wake State

{

Return (0x04)

}

Scope (\_SB.PCI0.PEG0.PEGP)

{

OperationRegion (PCIS, PCI_Config, Zero, 0x0100)

Field (PCIS, AnyAcc, NoLock, Preserve)

{

PVID, 16,

PDID, 16

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW)

0x69

0x04

}

Scope (\_SB.PCI0.PEG1)

{

Name (WKEN, Zero)

OperationRegion (PEGR, PCI_Config, 0xC0, 0x30)

Field (PEGR, DWordAcc, NoLock, Preserve)

{

Offset (0x02),

PSTS, 1,

Offset (0x2C),

GENG, 1,

, 1,

PMEG, 1

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW)

0x69

0x04

}

Method (HPME, 0, Serialized)

{

Store (One, PSTS)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTRY, LTRS)

Store (OBFY, OBFS)

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Store (Zero, Local0)

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRS)

{

Or (Local0, 0x40, Local0)

}

If (OBFS)

{

Or (Local0, 0x10, Local0)

}

If (LGreaterEqual (Arg1, 0x03))

{

If (ECR1)

{

Or (Local0, 0x0100, Local0)

}

If (ECR1)

{

Or (Local0, 0x0200, Local0)

}

If (LNotEqual (Local0, Zero))

{

Or (Local0, One, Local0)

}

Return (Local0)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFS)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRS)

{

Store (And (ShiftRight (SMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (SMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (SNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (SNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

PowerResource (PG01, 0x00, 0x0000)

{

Name (_STA, One) // _STA: Status

Method (_ON, 0, Serialized) // _ON_: Power On

{

If (LAnd (LGreater (OSYS, 0x07D9), PEGS ()))

{

PGON (One)

Store (One, _STA)

}

Method (_OFF, 0, Serialized) // _OFF: Power Off

{

If (LAnd (LGreater (OSYS, 0x07D9), PEGS ()))

{

PGOF (One)

Store (Zero, _STA)

}

Name (_PR0, Package (0x01) // _PR0: Power Resources for D0

{

PG01

})

Name (_PR2, Package (0x01) // _PR2: Power Resources for D2

{

PG01

})

Name (_PR3, Package (0x01) // _PR3: Power Resources for D3hot

{

PG01

})

Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake

{

If (Arg1)

{

Store (Zero, WKEN)

}

Else

{

If (LAnd (Arg0, Arg2))

{

Store (One, WKEN)

}

Else

{

Store (Zero, WKEN)

}

Method (P1EW, 0, NotSerialized)

{

If (WKEN)

{

If (LNotEqual (P1GP, Zero))

{

If (LEqual (P1GP, One))

{

\_SB.SGOV (P1WK, One, \_SB.SHPO (P1WK, Zero))

}

Method (_S0W, 0, NotSerialized) // _S0W: S0 Device Wake State

{

Return (0x04)

}

Scope (\_SB.PCI0.PEG1.PEGP)

{

OperationRegion (PCIS, PCI_Config, Zero, 0x0100)

Field (PCIS, AnyAcc, NoLock, Preserve)

{

PVID, 16,

PDID, 16

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW)

0x69

0x04

}

Scope (\_SB.PCI0.PEG2)

{

Name (WKEN, Zero)

OperationRegion (PEGR, PCI_Config, 0xC0, 0x30)

Field (PEGR, DWordAcc, NoLock, Preserve)

{

Offset (0x02),

PSTS, 1,

Offset (0x2C),

GENG, 1,

, 1,

PMEG, 1

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW)

0x69

0x04

}

Method (HPME, 0, Serialized)

{

Store (One, PSTS)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTRZ, LTRS)

Store (OBFZ, OBFS)

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Store (Zero, Local0)

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRS)

{

Or (Local0, 0x40, Local0)

}

If (OBFS)

{

Or (Local0, 0x10, Local0)

}

If (LGreaterEqual (Arg1, 0x03))

{

If (ECR1)

{

Or (Local0, 0x0100, Local0)

}

If (ECR1)

{

Or (Local0, 0x0200, Local0)

}

If (LNotEqual (Local0, Zero))

{

Or (Local0, One, Local0)

}

Return (Local0)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFS)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRS)

{

Store (And (ShiftRight (SMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (SMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (SNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (SNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

PowerResource (PG02, 0x00, 0x0000)

{

Name (_STA, One) // _STA: Status

Method (_ON, 0, Serialized) // _ON_: Power On

{

If (LAnd (LGreater (OSYS, 0x07D9), PEGS ()))

{

PGON (0x02)

Store (One, _STA)

}

Method (_OFF, 0, Serialized) // _OFF: Power Off

{

If (LAnd (LGreater (OSYS, 0x07D9), PEGS ()))

{

PGOF (0x02)

Store (Zero, _STA)

}

Name (_PR0, Package (0x01) // _PR0: Power Resources for D0

{

PG02

})

Name (_PR2, Package (0x01) // _PR2: Power Resources for D2

{

PG02

})

Name (_PR3, Package (0x01) // _PR3: Power Resources for D3hot

{

PG02

})

Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake

{

If (Arg1)

{

Store (Zero, WKEN)

}

Else

{

If (LAnd (Arg0, Arg2))

{

Store (One, WKEN)

}

Else

{

Store (Zero, WKEN)

}

Method (P2EW, 0, NotSerialized)

{

If (WKEN)

{

If (LNotEqual (P2GP, Zero))

{

If (LEqual (P2GP, One))

{

\_SB.SGOV (P2WK, One, \_SB.SHPO (P2WK, Zero))

}

Method (_S0W, 0, NotSerialized) // _S0W: S0 Device Wake State

{

Return (0x04)

}

Scope (\_SB.PCI0.PEG2.PEGP)

{

OperationRegion (PCIS, PCI_Config, Zero, 0x0100)

Field (PCIS, AnyAcc, NoLock, Preserve)

{

PVID, 16,

PDID, 16

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW)

0x69

0x04

}

Scope (\_SB.PCI0.GFX0)

{

Method (_DOS, 1, NotSerialized) // _DOS: Disable Output Switching

{

Store (And (Arg0, 0x07), DSEN)

If (LEqual (And (Arg0, 0x03), Zero))

{

If (CondRefOf (HDOS))

{

HDOS ()

}

Method (_DOD, 0, NotSerialized) // _DOD: Display Output Devices

{

If (LEqual (IMTP, One))

{

Store (One, NDID)

}

Else

{

Store (Zero, NDID)

}

If (LNotEqual (DIDL, Zero))

{

Store (SDDL (DIDL), DID1)

}

If (LNotEqual (DDL2, Zero))

{

Store (SDDL (DDL2), DID2)

}

If (LNotEqual (DDL3, Zero))

{

Store (SDDL (DDL3), DID3)

}

If (LNotEqual (DDL4, Zero))

{

Store (SDDL (DDL4), DID4)

}

If (LNotEqual (DDL5, Zero))

{

Store (SDDL (DDL5), DID5)

}

If (LNotEqual (DDL6, Zero))

{

Store (SDDL (DDL6), DID6)

}

If (LNotEqual (DDL7, Zero))

{

Store (SDDL (DDL7), DID7)

}

If (LNotEqual (DDL8, Zero))

{

Store (SDDL (DDL8), DID8)

}

If (LNotEqual (DDL9, Zero))

{

Store (SDDL (DDL9), DID9)

}

If (LNotEqual (DD10, Zero))

{

Store (SDDL (DD10), DIDA)

}

If (LNotEqual (DD11, Zero))

{

Store (SDDL (DD11), DIDB)

}

If (LNotEqual (DD12, Zero))

{

Store (SDDL (DD12), DIDC)

}

If (LNotEqual (DD13, Zero))

{

Store (SDDL (DD13), DIDD)

}

If (LNotEqual (DD14, Zero))

{

Store (SDDL (DD14), DIDE)

}

If (LNotEqual (DD15, Zero))

{

Store (SDDL (DD15), DIDF)

}

If (LEqual (NDID, One))

{

Name (TMP1, Package (0x01)

{

0xFFFFFFFF

})

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMP1, Zero))

}

Else

{

Store (Or (0x00010000, DID1), Index (TMP1, Zero))

}

Return (TMP1)

}

If (LEqual (NDID, 0x02))

{

Name (TMP2, Package (0x02)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP2, Zero))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMP2, One))

}

Else

{

Store (Or (0x00010000, DID2), Index (TMP2, One))

}

Return (TMP2)

}

If (LEqual (NDID, 0x03))

{

Name (TMP3, Package (0x03)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP3, Zero))

Store (Or (0x00010000, DID2), Index (TMP3, One))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMP3, 0x02))

}

Else

{

Store (Or (0x00010000, DID3), Index (TMP3, 0x02))

}

Return (TMP3)

}

If (LEqual (NDID, 0x04))

{

Name (TMP4, Package (0x04)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP4, Zero))

Store (Or (0x00010000, DID2), Index (TMP4, One))

Store (Or (0x00010000, DID3), Index (TMP4, 0x02))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMP4, 0x03))

}

Else

{

Store (Or (0x00010000, DID4), Index (TMP4, 0x03))

}

Return (TMP4)

}

If (LEqual (NDID, 0x05))

{

Name (TMP5, Package (0x05)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP5, Zero))

Store (Or (0x00010000, DID2), Index (TMP5, One))

Store (Or (0x00010000, DID3), Index (TMP5, 0x02))

Store (Or (0x00010000, DID4), Index (TMP5, 0x03))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMP5, 0x04))

}

Else

{

Store (Or (0x00010000, DID5), Index (TMP5, 0x04))

}

Return (TMP5)

}

If (LEqual (NDID, 0x06))

{

Name (TMP6, Package (0x06)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP6, Zero))

Store (Or (0x00010000, DID2), Index (TMP6, One))

Store (Or (0x00010000, DID3), Index (TMP6, 0x02))

Store (Or (0x00010000, DID4), Index (TMP6, 0x03))

Store (Or (0x00010000, DID5), Index (TMP6, 0x04))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMP6, 0x05))

}

Else

{

Store (Or (0x00010000, DID6), Index (TMP6, 0x05))

}

Return (TMP6)

}

If (LEqual (NDID, 0x07))

{

Name (TMP7, Package (0x07)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP7, Zero))

Store (Or (0x00010000, DID2), Index (TMP7, One))

Store (Or (0x00010000, DID3), Index (TMP7, 0x02))

Store (Or (0x00010000, DID4), Index (TMP7, 0x03))

Store (Or (0x00010000, DID5), Index (TMP7, 0x04))

Store (Or (0x00010000, DID6), Index (TMP7, 0x05))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMP7, 0x06))

}

Else

{

Store (Or (0x00010000, DID7), Index (TMP7, 0x06))

}

Return (TMP7)

}

If (LEqual (NDID, 0x08))

{

Name (TMP8, Package (0x08)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP8, Zero))

Store (Or (0x00010000, DID2), Index (TMP8, One))

Store (Or (0x00010000, DID3), Index (TMP8, 0x02))

Store (Or (0x00010000, DID4), Index (TMP8, 0x03))

Store (Or (0x00010000, DID5), Index (TMP8, 0x04))

Store (Or (0x00010000, DID6), Index (TMP8, 0x05))

Store (Or (0x00010000, DID7), Index (TMP8, 0x06))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMP8, 0x07))

}

Else

{

Store (Or (0x00010000, DID8), Index (TMP8, 0x07))

}

Return (TMP8)

}

If (LEqual (NDID, 0x09))

{

Name (TMP9, Package (0x09)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP9, Zero))

Store (Or (0x00010000, DID2), Index (TMP9, One))

Store (Or (0x00010000, DID3), Index (TMP9, 0x02))

Store (Or (0x00010000, DID4), Index (TMP9, 0x03))

Store (Or (0x00010000, DID5), Index (TMP9, 0x04))

Store (Or (0x00010000, DID6), Index (TMP9, 0x05))

Store (Or (0x00010000, DID7), Index (TMP9, 0x06))

Store (Or (0x00010000, DID8), Index (TMP9, 0x07))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMP9, 0x08))

}

Else

{

Store (Or (0x00010000, DID9), Index (TMP9, 0x08))

}

Return (TMP9)

}

If (LEqual (NDID, 0x0A))

{

Name (TMPA, Package (0x0A)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMPA, Zero))

Store (Or (0x00010000, DID2), Index (TMPA, One))

Store (Or (0x00010000, DID3), Index (TMPA, 0x02))

Store (Or (0x00010000, DID4), Index (TMPA, 0x03))

Store (Or (0x00010000, DID5), Index (TMPA, 0x04))

Store (Or (0x00010000, DID6), Index (TMPA, 0x05))

Store (Or (0x00010000, DID7), Index (TMPA, 0x06))

Store (Or (0x00010000, DID8), Index (TMPA, 0x07))

Store (Or (0x00010000, DID9), Index (TMPA, 0x08))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMPA, 0x09))

}

Else

{

Store (Or (0x00010000, DIDA), Index (TMPA, 0x09))

}

Return (TMPA)

}

If (LEqual (NDID, 0x0B))

{

Name (TMPB, Package (0x0B)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMPB, Zero))

Store (Or (0x00010000, DID2), Index (TMPB, One))

Store (Or (0x00010000, DID3), Index (TMPB, 0x02))

Store (Or (0x00010000, DID4), Index (TMPB, 0x03))

Store (Or (0x00010000, DID5), Index (TMPB, 0x04))

Store (Or (0x00010000, DID6), Index (TMPB, 0x05))

Store (Or (0x00010000, DID7), Index (TMPB, 0x06))

Store (Or (0x00010000, DID8), Index (TMPB, 0x07))

Store (Or (0x00010000, DID9), Index (TMPB, 0x08))

Store (Or (0x00010000, DIDA), Index (TMPB, 0x09))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMPB, 0x0A))

}

Else

{

Store (Or (0x00010000, DIDB), Index (TMPB, 0x0A))

}

Return (TMPB)

}

If (LEqual (NDID, 0x0C))

{

Name (TMPC, Package (0x0C)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMPC, Zero))

Store (Or (0x00010000, DID2), Index (TMPC, One))

Store (Or (0x00010000, DID3), Index (TMPC, 0x02))

Store (Or (0x00010000, DID4), Index (TMPC, 0x03))

Store (Or (0x00010000, DID5), Index (TMPC, 0x04))

Store (Or (0x00010000, DID6), Index (TMPC, 0x05))

Store (Or (0x00010000, DID7), Index (TMPC, 0x06))

Store (Or (0x00010000, DID8), Index (TMPC, 0x07))

Store (Or (0x00010000, DID9), Index (TMPC, 0x08))

Store (Or (0x00010000, DIDA), Index (TMPC, 0x09))

Store (Or (0x00010000, DIDB), Index (TMPC, 0x0A))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMPC, 0x0B))

}

Else

{

Store (Or (0x00010000, DIDC), Index (TMPC, 0x0B))

}

Return (TMPC)

}

If (LEqual (NDID, 0x0D))

{

Name (TMPD, Package (0x0D)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMPD, Zero))

Store (Or (0x00010000, DID2), Index (TMPD, One))

Store (Or (0x00010000, DID3), Index (TMPD, 0x02))

Store (Or (0x00010000, DID4), Index (TMPD, 0x03))

Store (Or (0x00010000, DID5), Index (TMPD, 0x04))

Store (Or (0x00010000, DID6), Index (TMPD, 0x05))

Store (Or (0x00010000, DID7), Index (TMPD, 0x06))

Store (Or (0x00010000, DID8), Index (TMPD, 0x07))

Store (Or (0x00010000, DID9), Index (TMPD, 0x08))

Store (Or (0x00010000, DIDA), Index (TMPD, 0x09))

Store (Or (0x00010000, DIDB), Index (TMPD, 0x0A))

Store (Or (0x00010000, DIDC), Index (TMPD, 0x0B))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMPD, 0x0C))

}

Else

{

Store (Or (0x00010000, DIDD), Index (TMPD, 0x0C))

}

Return (TMPD)

}

If (LEqual (NDID, 0x0E))

{

Name (TMPE, Package (0x0E)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMPE, Zero))

Store (Or (0x00010000, DID2), Index (TMPE, One))

Store (Or (0x00010000, DID3), Index (TMPE, 0x02))

Store (Or (0x00010000, DID4), Index (TMPE, 0x03))

Store (Or (0x00010000, DID5), Index (TMPE, 0x04))

Store (Or (0x00010000, DID6), Index (TMPE, 0x05))

Store (Or (0x00010000, DID7), Index (TMPE, 0x06))

Store (Or (0x00010000, DID8), Index (TMPE, 0x07))

Store (Or (0x00010000, DID9), Index (TMPE, 0x08))

Store (Or (0x00010000, DIDA), Index (TMPE, 0x09))

Store (Or (0x00010000, DIDB), Index (TMPE, 0x0A))

Store (Or (0x00010000, DIDC), Index (TMPE, 0x0B))

Store (Or (0x00010000, DIDD), Index (TMPE, 0x0C))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMPE, 0x0D))

}

Else

{

Store (Or (0x00010000, DIDE), Index (TMPE, 0x0D))

}

Return (TMPE)

}

If (LEqual (NDID, 0x0F))

{

Name (TMPF, Package (0x0F)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMPF, Zero))

Store (Or (0x00010000, DID2), Index (TMPF, One))

Store (Or (0x00010000, DID3), Index (TMPF, 0x02))

Store (Or (0x00010000, DID4), Index (TMPF, 0x03))

Store (Or (0x00010000, DID5), Index (TMPF, 0x04))

Store (Or (0x00010000, DID6), Index (TMPF, 0x05))

Store (Or (0x00010000, DID7), Index (TMPF, 0x06))

Store (Or (0x00010000, DID8), Index (TMPF, 0x07))

Store (Or (0x00010000, DID9), Index (TMPF, 0x08))

Store (Or (0x00010000, DIDA), Index (TMPF, 0x09))

Store (Or (0x00010000, DIDB), Index (TMPF, 0x0A))

Store (Or (0x00010000, DIDC), Index (TMPF, 0x0B))

Store (Or (0x00010000, DIDD), Index (TMPF, 0x0C))

Store (Or (0x00010000, DIDE), Index (TMPF, 0x0D))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMPF, 0x0E))

}

Else

{

Store (Or (0x00010000, DIDF), Index (TMPF, 0x0E))

}

Return (TMPF)

}

If (LEqual (NDID, 0x10))

{

Name (TMPG, Package (0x10)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMPG, Zero))

Store (Or (0x00010000, DID2), Index (TMPG, One))

Store (Or (0x00010000, DID3), Index (TMPG, 0x02))

Store (Or (0x00010000, DID4), Index (TMPG, 0x03))

Store (Or (0x00010000, DID5), Index (TMPG, 0x04))

Store (Or (0x00010000, DID6), Index (TMPG, 0x05))

Store (Or (0x00010000, DID7), Index (TMPG, 0x06))

Store (Or (0x00010000, DID8), Index (TMPG, 0x07))

Store (Or (0x00010000, DID9), Index (TMPG, 0x08))

Store (Or (0x00010000, DIDA), Index (TMPG, 0x09))

Store (Or (0x00010000, DIDB), Index (TMPG, 0x0A))

Store (Or (0x00010000, DIDC), Index (TMPG, 0x0B))

Store (Or (0x00010000, DIDD), Index (TMPG, 0x0C))

Store (Or (0x00010000, DIDE), Index (TMPG, 0x0D))

Store (Or (0x00010000, DIDF), Index (TMPG, 0x0E))

Store (0x0002CA00, Index (TMPG, 0x0F))

Return (TMPG)

}

Return (Package (0x01)

{

0x0400

})

}

Device (DD01)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DID1), 0x0400))

{

Store (One, EDPV)

Store (NXD1, NXDX)

Store (DID1, DIDX)

Return (One)

}

If (LEqual (DID1, Zero))

{

Return (One)

}

Else

{

Return (And (0xFFFF, DID1))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

Return (CDDS (DID1))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD1)

}

Return (NDDS (DID1))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD02)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DID2), 0x0400))

{

Store (0x02, EDPV)

Store (NXD2, NXDX)

Store (DID2, DIDX)

Return (0x02)

}

If (LEqual (DID2, Zero))

{

Return (0x02)

}

Else

{

Return (And (0xFFFF, DID2))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (LIDS, Zero))

{

Return (Zero)

}

Return (CDDS (DID2))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD2)

}

Return (NDDS (DID2))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD03)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DID3), 0x0400))

{

Store (0x03, EDPV)

Store (NXD3, NXDX)

Store (DID3, DIDX)

Return (0x03)

}

If (LEqual (DID3, Zero))

{

Return (0x03)

}

Else

{

Return (And (0xFFFF, DID3))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DID3, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DID3))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD3)

}

Return (NDDS (DID3))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD04)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DID4), 0x0400))

{

Store (0x04, EDPV)

Store (NXD4, NXDX)

Store (DID4, DIDX)

Return (0x04)

}

If (LEqual (DID4, Zero))

{

Return (0x04)

}

Else

{

Return (And (0xFFFF, DID4))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DID4, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DID4))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD4)

}

Return (NDDS (DID4))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD05)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DID5), 0x0400))

{

Store (0x05, EDPV)

Store (NXD5, NXDX)

Store (DID5, DIDX)

Return (0x05)

}

If (LEqual (DID5, Zero))

{

Return (0x05)

}

Else

{

Return (And (0xFFFF, DID5))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DID5, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DID5))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD5)

}

Return (NDDS (DID5))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD06)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DID6), 0x0400))

{

Store (0x06, EDPV)

Store (NXD6, NXDX)

Store (DID6, DIDX)

Return (0x06)

}

If (LEqual (DID6, Zero))

{

Return (0x06)

}

Else

{

Return (And (0xFFFF, DID6))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DID6, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DID6))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD6)

}

Return (NDDS (DID6))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD07)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DID7), 0x0400))

{

Store (0x07, EDPV)

Store (NXD7, NXDX)

Store (DID7, DIDX)

Return (0x07)

}

If (LEqual (DID7, Zero))

{

Return (0x07)

}

Else

{

Return (And (0xFFFF, DID7))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DID7, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DID7))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD7)

}

Return (NDDS (DID7))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD08)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DID8), 0x0400))

{

Store (0x08, EDPV)

Store (NXD8, NXDX)

Store (DID8, DIDX)

Return (0x08)

}

If (LEqual (DID8, Zero))

{

Return (0x08)

}

Else

{

Return (And (0xFFFF, DID8))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DID8, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DID8))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD8)

}

Return (NDDS (DID8))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD09)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DID9), 0x0400))

{

Store (0x09, EDPV)

Store (NXD8, NXDX)

Store (DID9, DIDX)

Return (0x09)

}

If (LEqual (DID9, Zero))

{

Return (0x09)

}

Else

{

Return (And (0xFFFF, DID9))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DID9, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DID9))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD8)

}

Return (NDDS (DID9))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD0A)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DIDA), 0x0400))

{

Store (0x0A, EDPV)

Store (NXD8, NXDX)

Store (DIDA, DIDX)

Return (0x0A)

}

If (LEqual (DIDA, Zero))

{

Return (0x0A)

}

Else

{

Return (And (0xFFFF, DIDA))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DIDA, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DIDA))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD8)

}

Return (NDDS (DIDA))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD0B)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DIDB), 0x0400))

{

Store (0x0B, EDPV)

Store (NXD8, NXDX)

Store (DIDB, DIDX)

Return (0x0B)

}

If (LEqual (DIDB, Zero))

{

Return (0x0B)

}

Else

{

Return (And (0xFFFF, DIDB))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DIDB, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DIDB))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD8)

}

Return (NDDS (DIDB))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD0C)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DIDC), 0x0400))

{

Store (0x0C, EDPV)

Store (NXD8, NXDX)

Store (DIDC, DIDX)

Return (0x0C)

}

If (LEqual (DIDC, Zero))

{

Return (0x0C)

}

Else

{

Return (And (0xFFFF, DIDC))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DIDC, Zero))

{

Return (0x0C)

}

Else

{

Return (CDDS (DIDC))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD8)

}

Return (NDDS (DIDC))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD0D)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DIDD), 0x0400))

{

Store (0x0D, EDPV)

Store (NXD8, NXDX)

Store (DIDD, DIDX)

Return (0x0D)

}

If (LEqual (DIDD, Zero))

{

Return (0x0D)

}

Else

{

Return (And (0xFFFF, DIDD))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DIDD, Zero))

{

Return (0x0D)

}

Else

{

Return (CDDS (DIDD))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD8)

}

Return (NDDS (DIDD))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD0E)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DIDE), 0x0400))

{

Store (0x0E, EDPV)

Store (NXD8, NXDX)

Store (DIDE, DIDX)

Return (0x0E)

}

If (LEqual (DIDE, Zero))

{

Return (0x0E)

}

Else

{

Return (And (0xFFFF, DIDE))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DIDE, Zero))

{

Return (0x0E)

}

Else

{

Return (CDDS (DIDE))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD8)

}

Return (NDDS (DIDE))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD0F)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DIDF), 0x0400))

{

Store (0x0F, EDPV)

Store (NXD8, NXDX)

Store (DIDF, DIDX)

Return (0x0F)

}

If (LEqual (DIDF, Zero))

{

Return (0x0F)

}

Else

{

Return (And (0xFFFF, DIDF))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DIDC, Zero))

{

Return (0x0F)

}

Else

{

Return (CDDS (DIDF))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD8)

}

Return (NDDS (DIDF))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD1F)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (EDPV, Zero))

{

Return (0x1F)

}

Else

{

Return (And (0xFFFF, DIDX))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (EDPV, Zero))

{

Return (Zero)

}

Else

{

Return (CDDS (DIDX))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXDX)

}

Return (NDDS (DIDX))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Method (_BCL, 0, NotSerialized) // _BCL: Brightness Control Levels

{

Return (Package (0x67)

{

0x50,

0x32,

Zero,

One,

0x02,

0x03,

0x04,

0x05,

0x06,

0x07,

0x08,

0x09,

0x0A,

0x0B,

0x0C,

0x0D,

0x0E,

0x0F,

0x10,

0x11,

0x12,

0x13,

0x14,

0x15,

0x16,

0x17,

0x18,

0x19,

0x1A,

0x1B,

0x1C,

0x1D,

0x1E,

0x1F,

0x20,

0x21,

0x22,

0x23,

0x24,

0x25,

0x26,

0x27,

0x28,

0x29,

0x2A,

0x2B,

0x2C,

0x2D,

0x2E,

0x2F,

0x30,

0x31,

0x32,

0x33,

0x34,

0x35,

0x36,

0x37,

0x38,

0x39,

0x3A,

0x3B,

0x3C,

0x3D,

0x3E,

0x3F,

0x40,

0x41,

0x42,

0x43,

0x44,

0x45,

0x46,

0x47,

0x48,

0x49,

0x4A,

0x4B,

0x4C,

0x4D,

0x4E,

0x4F,

0x50,

0x51,

0x52,

0x53,

0x54,

0x55,

0x56,

0x57,

0x58,

0x59,

0x5A,

0x5B,

0x5C,

0x5D,

0x5E,

0x5F,

0x60,

0x61,

0x62,

0x63,

0x64

})

}

Method (_BCM, 1, NotSerialized) // _BCM: Brightness Control Method

{

If (LAnd (LGreaterEqual (Arg0, Zero), LLessEqual (Arg0, 0x64)))

{

\_SB.PCI0.GFX0.AINT (One, Arg0)

Store (Arg0, BRTL)

}

Method (_BQC, 0, NotSerialized) // _BQC: Brightness Query Current

{

Return (BRTL)

}

Method (SDDL, 1, NotSerialized)

{

Increment (NDID)

Store (And (Arg0, 0x0F0F), Local0)

Or (0x80000000, Local0, Local1)

If (LEqual (DIDL, Local0))

{

Return (Local1)

}

If (LEqual (DDL2, Local0))

{

Return (Local1)

}

If (LEqual (DDL3, Local0))

{

Return (Local1)

}

If (LEqual (DDL4, Local0))

{

Return (Local1)

}

If (LEqual (DDL5, Local0))

{

Return (Local1)

}

If (LEqual (DDL6, Local0))

{

Return (Local1)

}

If (LEqual (DDL7, Local0))

{

Return (Local1)

}

If (LEqual (DDL8, Local0))

{

Return (Local1)

}

If (LEqual (DDL9, Local0))

{

Return (Local1)

}

If (LEqual (DD10, Local0))

{

Return (Local1)

}

If (LEqual (DD11, Local0))

{

Return (Local1)

}

If (LEqual (DD12, Local0))

{

Return (Local1)

}

If (LEqual (DD13, Local0))

{

Return (Local1)

}

If (LEqual (DD14, Local0))

{

Return (Local1)

}

If (LEqual (DD15, Local0))

{

Return (Local1)

}

Return (Zero)

}

Method (CDDS, 1, NotSerialized)

{

Store (And (Arg0, 0x0F0F), Local0)

If (LEqual (Zero, Local0))

{

Return (0x1D)

}

If (LEqual (CADL, Local0))

{

Return (0x1F)

}

If (LEqual (CAL2, Local0))

{

Return (0x1F)

}

If (LEqual (CAL3, Local0))

{

Return (0x1F)

}

If (LEqual (CAL4, Local0))

{

Return (0x1F)

}

If (LEqual (CAL5, Local0))

{

Return (0x1F)

}

If (LEqual (CAL6, Local0))

{

Return (0x1F)

}

If (LEqual (CAL7, Local0))

{

Return (0x1F)

}

If (LEqual (CAL8, Local0))

{

Return (0x1F)

}

Return (0x1D)

}

Method (NDDS, 1, NotSerialized)

{

Store (And (Arg0, 0x0F0F), Local0)

If (LEqual (Zero, Local0))

{

Return (Zero)

}

If (LEqual (NADL, Local0))

{

Return (One)

}

If (LEqual (NDL2, Local0))

{

Return (One)

}

If (LEqual (NDL3, Local0))

{

Return (One)

}

If (LEqual (NDL4, Local0))

{

Return (One)

}

If (LEqual (NDL5, Local0))

{

Return (One)

}

If (LEqual (NDL6, Local0))

{

Return (One)

}

If (LEqual (NDL7, Local0))

{

Return (One)

}

If (LEqual (NDL8, Local0))

{

Return (One)

}

Return (Zero)

}

Method (DSST, 1, NotSerialized)

{

If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))

{

Store (NSTE, CSTE)

}

Scope (\_SB.PCI0)

{

OperationRegion (MCHP, PCI_Config, 0x40, 0xC0)

Field (MCHP, AnyAcc, NoLock, Preserve)

{

Offset (0x14),

AUDE, 8,

Offset (0x60),

TASM, 10,

Offset (0x62)

}

OperationRegion (IGDP, PCI_Config, 0x40, 0xC0)

Field (IGDP, AnyAcc, NoLock, Preserve)

{

Offset (0x10),

, 1,

GIVD, 1,

, 2,

GUMA, 3,

Offset (0x12),

Offset (0x14),

, 4,

GMFN, 1,

Offset (0x18),

Offset (0xA4),

ASLE, 8,

Offset (0xA8),

GSSE, 1,

GSSB, 14,

GSES, 1,

Offset (0xB0),

, 12,

CDVL, 1,

Offset (0xB2),

Offset (0xB5),

LBPC, 8,

Offset (0xBC),

ASLS, 32

}

OperationRegion (IGDM, SystemMemory, ASLB, 0x2000)

Field (IGDM, AnyAcc, NoLock, Preserve)

{

SIGN, 128,

SIZE, 32,

OVER, 32,

SVER, 256,

VVER, 128,

GVER, 128,

MBOX, 32,

DMOD, 32,

PCON, 32,

DVER, 64,

Offset (0x100),

DRDY, 32,

CSTS, 32,

CEVT, 32,

Offset (0x120),

DIDL, 32,

DDL2, 32,

DDL3, 32,

DDL4, 32,

DDL5, 32,

DDL6, 32,

DDL7, 32,

DDL8, 32,

CPDL, 32,

CPL2, 32,

CPL3, 32,

CPL4, 32,

CPL5, 32,

CPL6, 32,

CPL7, 32,

CPL8, 32,

CADL, 32,

CAL2, 32,

CAL3, 32,

CAL4, 32,

CAL5, 32,

CAL6, 32,

CAL7, 32,

CAL8, 32,

NADL, 32,

NDL2, 32,

NDL3, 32,

NDL4, 32,

NDL5, 32,

NDL6, 32,

NDL7, 32,

NDL8, 32,

ASLP, 32,

TIDX, 32,

CHPD, 32,

CLID, 32,

CDCK, 32,

SXSW, 32,

EVTS, 32,

CNOT, 32,

NRDY, 32,

DDL9, 32,

DD10, 32,

DD11, 32,

DD12, 32,

DD13, 32,

DD14, 32,

DD15, 32,

CPL9, 32,

CP10, 32,

CP11, 32,

CP12, 32,

CP13, 32,

CP14, 32,

CP15, 32,

Offset (0x200),

SCIE, 1,

GEFC, 4,

GXFC, 3,

GESF, 8,

Offset (0x204),

PARM, 32,

DSLP, 32,

Offset (0x300),

ARDY, 32,

ASLC, 32,

TCHE, 32,

ALSI, 32,

BCLP, 32,

PFIT, 32,

CBLV, 32,

BCLM, 320,

CPFM, 32,

EPFM, 32,

PLUT, 592,

PFMB, 32,

CCDV, 32,

PCFT, 32,

SROT, 32,

IUER, 32,

FDSP, 64,

FDSS, 32,

STAT, 32,

Offset (0x400),

GVD1, 49152,

PHED, 32,

BDDC, 2048

}

Name (DBTB, Package (0x15)

{

Zero,

0x07,

0x38,

0x01C0,

0x0E00,

0x3F,

0x01C7,

0x0E07,

0x01F8,

0x0E38,

0x0FC0,

Zero,

0x7000,

0x7007,

0x7038,

0x71C0,

0x7E00

})

Name (CDCT, Package (0x05)

{

Package (0x02)

{

0xE4,

0x0140

Package (0x02)

{

0xDE,

0x014D

Package (0x02)

{

0xDE,

0x014D

Package (0x02)

{

Zero,

Zero

Package (0x02)

{

0xDE,

0x014D

}

})

Name (SUCC, One)

Name (NVLD, 0x02)

Name (CRIT, 0x04)

Name (NCRT, 0x06)

Method (GSCI, 0, Serialized)

{

Method (GBDA, 0, Serialized)

{

If (LEqual (GESF, Zero))

{

Store (0x0659, PARM)

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GESF, One))

{

Store (0x00300482, PARM)

If (LEqual (S0ID, One))

{

Or (PARM, 0x0100, PARM)

}

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GESF, 0x04))

{

And (PARM, 0xEFFF0000, PARM)

And (PARM, ShiftLeft (DerefOf (Index (DBTB, IBTT)), 0x10),

PARM)

Or (IBTT, PARM, PARM)

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GESF, 0x05))

{

Store (IPSC, PARM)

Or (PARM, ShiftLeft (IPAT, 0x08), PARM)

Add (PARM, 0x0100, PARM)

Or (PARM, ShiftLeft (LIDS, 0x10), PARM)

Add (PARM, 0x00010000, PARM)

Or (PARM, ShiftLeft (IBIA, 0x14), PARM)

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GESF, 0x07))

{

Store (GIVD, PARM)

XOr (PARM, One, PARM)

Or (PARM, ShiftLeft (GMFN, One), PARM)

Or (PARM, 0x1800, PARM)

Or (PARM, ShiftLeft (IDMS, 0x11), PARM)

Or (ShiftLeft (DerefOf (Index (DerefOf (Index (CDCT, HVCO)), CDVL

)), 0x15), PARM, PARM)

Store (One, GESF)

Return (SUCC)

}

If (LEqual (GESF, 0x0A))

{

Store (Zero, PARM)

If (ISSC)

{

Or (PARM, 0x03, PARM)

}

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GESF, 0x0B))

{

Store (KSV0, PARM)

Store (KSV1, GESF)

Return (SUCC)

}

Store (Zero, GESF)

Return (CRIT)

}

Method (SBCB, 0, Serialized)

{

If (LEqual (GESF, Zero))

{

Store (Zero, PARM)

Store (0x000F87DD, PARM)

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GESF, One))

{

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x03))

{

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x04))

{

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x05))

{

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x07))

{

If (LAnd (LEqual (S0ID, One), LLess (OSYS, 0x07DF)))

{

If (LEqual (And (PARM, 0xFF), One))

{

\GUAM (One)

}

If (LEqual (And (PARM, 0xFF), Zero))

{

\GUAM (0x02)

}

If (LEqual (PARM, Zero))

{

Store (CLID, Local0)

If (And (0x80000000, Local0))

{

And (CLID, 0x0F, CLID)

GLID (CLID)

}

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x08))

{

If (LAnd (LEqual (S0ID, One), LLess (OSYS, 0x07DF)))

{

Store (And (ShiftRight (PARM, 0x08), 0xFF), Local0)

If (LEqual (Local0, Zero))

{

\GUAM (Zero)

}

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x09))

{

And (PARM, 0xFF, IBTT)

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x0A))

{

And (PARM, 0xFF, IPSC)

If (And (ShiftRight (PARM, 0x08), 0xFF))

{

And (ShiftRight (PARM, 0x08), 0xFF, IPAT)

Decrement (IPAT)

}

And (ShiftRight (PARM, 0x14), 0x07, IBIA)

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x0B))

{

And (ShiftRight (PARM, One), One, IF1E)

If (And (PARM, 0x0001E000))

{

And (ShiftRight (PARM, 0x0D), 0x0F, IDMS)

}

Else

{

And (ShiftRight (PARM, 0x11), 0x0F, IDMS)

}

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x10))

{

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x11))

{

Store (ShiftLeft (LIDS, 0x08), PARM)

Add (PARM, 0x0100, PARM)

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GESF, 0x12))

{

If (And (PARM, One))

{

If (LEqual (ShiftRight (PARM, One), One))

{

Store (One, ISSC)

}

Else

{

Store (Zero, GESF)

Return (CRIT)

}

Else

{

Store (Zero, ISSC)

}

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x13))

{

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x14))

{

And (PARM, 0x0F, PAVP)

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GEFC, 0x04))

{

Store (GBDA (), GXFC)

}

If (LEqual (GEFC, 0x06))

{

Store (SBCB (), GXFC)

}

Store (Zero, GEFC)

Store (One, CPSC)

Store (Zero, GSSE)

Store (Zero, SCIE)

Return (Zero)

}

Method (PDRD, 0, NotSerialized)

{

Return (LNot (DRDY))

}

Method (PSTS, 0, NotSerialized)

{

If (LGreater (CSTS, 0x02))

{

Sleep (ASLP)

}

Return (LEqual (CSTS, 0x03))

}

Method (GNOT, 2, NotSerialized)

{

If (PDRD ())

{

Return (One)

}

Store (Arg0, CEVT)

Store (0x03, CSTS)

If (LAnd (LEqual (CHPD, Zero), LEqual (Arg1, Zero)))

{

Notify (\_SB.PCI0.GFX0, Arg1)

}

If (CondRefOf (HNOT))

{

HNOT (Arg0)

}

Else

{

Notify (\_SB.PCI0.GFX0, 0x80)

}

Return (Zero)

}

Method (GHDS, 1, NotSerialized)

{

Store (Arg0, TIDX)

Return (GNOT (One, Zero))

}

Method (GLID, 1, NotSerialized)

{

If (LEqual (Arg0, One))

{

Store (0x03, CLID)

}

Else

{

Store (Arg0, CLID)

}

If (GNOT (0x02, Zero))

{

Or (CLID, 0x80000000, CLID)

Return (One)

}

Return (Zero)

}

Method (GDCK, 1, NotSerialized)

{

Store (Arg0, CDCK)

Return (GNOT (0x04, Zero))

}

Method (PARD, 0, NotSerialized)

{

If (LNot (ARDY))

{

Sleep (ASLP)

}

Return (LNot (ARDY))

}

Method (IUEH, 1, Serialized)

{

And (IUER, 0xC0, IUER)

XOr (IUER, ShiftLeft (One, Arg0), IUER)

If (LLessEqual (Arg0, 0x04))

{

Return (AINT (0x05, Zero))

}

Else

{

Return (AINT (Arg0, Zero))

}

Method (AINT, 2, NotSerialized)

{

If (LNot (And (TCHE, ShiftLeft (One, Arg0))))

{

Return (One)

}

If (PARD ())

{

Return (One)

}

If (LAnd (LGreaterEqual (Arg0, 0x05), LLessEqual (Arg0, 0x07)))

{

Store (ShiftLeft (One, Arg0), ASLC)

Store (One, ASLE)

Store (Zero, Local2)

While (LAnd (LLess (Local2, 0xFA), LNotEqual (ASLC, Zero)))

{

Sleep (0x04)

Increment (Local2)

}

Return (Zero)

}

If (LEqual (Arg0, 0x02))

{

If (CPFM)

{

And (CPFM, 0x0F, Local0)

And (EPFM, 0x0F, Local1)

If (LEqual (Local0, One))

{

If (And (Local1, 0x06))

{

Store (0x06, PFIT)

}

Else

{

If (And (Local1, 0x08))

{

Store (0x08, PFIT)

}

Else

{

Store (One, PFIT)

}

If (LEqual (Local0, 0x06))

{

If (And (Local1, 0x08))

{

Store (0x08, PFIT)

}

Else

{

If (And (Local1, One))

{

Store (One, PFIT)

}

Else

{

Store (0x06, PFIT)

}

If (LEqual (Local0, 0x08))

{

If (And (Local1, One))

{

Store (One, PFIT)

}

Else

{

If (And (Local1, 0x06))

{

Store (0x06, PFIT)

}

Else

{

Store (0x08, PFIT)

}

Else

{

XOr (PFIT, 0x07, PFIT)

}

Or (PFIT, 0x80000000, PFIT)

Store (0x04, ASLC)

}

Else

{

If (LEqual (Arg0, One))

{

Store (Divide (Multiply (Arg1, 0xFF), 0x64, ), BCLP)

Or (BCLP, 0x80000000, BCLP)

Store (0x02, ASLC)

}

Else

{

If (LEqual (Arg0, Zero))

{

Store (Arg1, ALSI)

Store (One, ASLC)

}

Else

{

Return (One)

}

Store (One, ASLE)

Return (Zero)

}

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xC6, 0x41, 0x5B, 0x3E, 0x1D, 0xEB, 0x60, 0x42,

/* 0008 */ 0x9D, 0x15, 0xC7, 0x1F, 0xBA, 0xDA, 0xE4, 0x14

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

If (LEqual (Arg1, One))

{

Store ("iGfx Supported Functions Bitmap ", Debug)

Return (0x0001E7FF)

}

Else

{

If (LEqual (_T_0, One))

{

If (LEqual (Arg1, One))

{

Store (" Adapter Power State Notification ", Debug)

If (LAnd (LEqual (S0ID, One), LLess (OSYS, 0x07DF)))

{

If (LEqual (And (DerefOf (Index (Arg3, Zero)), 0xFF),

One))

{

\GUAM (One)

}

Store (And (DerefOf (Index (Arg3, One)), 0xFF), Local0)

If (LEqual (Local0, Zero))

{

\GUAM (0x02)

}

If (LEqual (DerefOf (Index (Arg3, Zero)), Zero))

{

Store (CLID, Local0)

If (And (0x80000000, Local0))

{

And (CLID, 0x0F, CLID)

GLID (CLID)

}

Return (One)

}

Else

{

If (LEqual (_T_0, 0x02))

{

If (LEqual (Arg1, One))

{

Store ("Display Power State Notification ", Debug)

If (LAnd (LEqual (S0ID, One), LLess (OSYS, 0x07DF)))

{

Store (And (DerefOf (Index (Arg3, One)), 0xFF), Local0)

If (LEqual (Local0, Zero))

{

\GUAM (Zero)

}

Return (One)

}

Else

{

If (LEqual (_T_0, 0x03))

{

If (LEqual (Arg1, One))

{

Store ("BIOS POST Completion Notification ", Debug)

Return (One)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LEqual (Arg1, One))

{

Store ("Pre-Hires Set Mode ", Debug)

Return (One)

}

Else

{

If (LEqual (_T_0, 0x05))

{

If (LEqual (Arg1, One))

{

Store ("Post-Hires Set Mode ", Debug)

Return (One)

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LEqual (Arg1, One))

{

Store ("SetDisplayDeviceNotification", Debug)

Return (One)

}

Else

{

If (LEqual (_T_0, 0x07))

{

If (LEqual (Arg1, One))

{

Store ("SetBootDevicePreference ", Debug)

And (DerefOf (Index (Arg3, Zero)), 0xFF, IBTT)

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (Arg1, One))

{

Store ("SetPanelPreference ", Debug)

And (DerefOf (Index (Arg3, Zero)), 0xFF, IPSC)

If (And (DerefOf (Index (Arg3, One)), 0xFF))

{

And (DerefOf (Index (Arg3, One)), 0xFF, IPAT)

Decrement (IPAT)

}

And (ShiftRight (DerefOf (Index (Arg3, 0x02)), 0x04), 0x07,

IBIA)

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (Arg1, One))

{

Store ("FullScreenDOS ", Debug)

Return (One)

}

Else

{

If (LEqual (_T_0, 0x0A))

{

If (LEqual (Arg1, One))

{

Store ("APM Complete ", Debug)

Store (ShiftLeft (LIDS, 0x08), Local0)

Add (Local0, 0x0100, Local0)

Return (Local0)

}

Else

{

If (LEqual (_T_0, 0x0D))

{

If (LEqual (Arg1, One))

{

Store ("GetBootDisplayPreference ", Debug)

Or (ShiftLeft (DerefOf (Index (Arg3, 0x03)), 0x18), ShiftLeft (

DerefOf (Index (Arg3, 0x02)), 0x10), Local0)

And (Local0, 0xEFFF0000, Local0)

And (Local0, ShiftLeft (DerefOf (Index (DBTB, IBTT)), 0x10),

Local0)

Or (IBTT, Local0, Local0)

Return (Local0)

}

Else

{

If (LEqual (_T_0, 0x0E))

{

If (LEqual (Arg1, One))

{

Store ("GetPanelDetails ", Debug)

Store (IPSC, Local0)

Or (Local0, ShiftLeft (IPAT, 0x08), Local0)

Add (Local0, 0x0100, Local0)

Or (Local0, ShiftLeft (LIDS, 0x10), Local0)

Add (Local0, 0x00010000, Local0)

Or (Local0, ShiftLeft (IBIA, 0x14), Local0)

Return (Local0)

}

Else

{

If (LEqual (_T_0, 0x0F))

{

If (LEqual (Arg1, One))

{

Store ("GetInternalGraphics ", Debug)

Store (GIVD, Local0)

XOr (Local0, One, Local0)

Or (Local0, ShiftLeft (GMFN, One), Local0)

Or (Local0, 0x1800, Local0)

Or (Local0, ShiftLeft (IDMS, 0x11), Local0)

Or (ShiftLeft (DerefOf (Index (DerefOf (Index (CDCT, HVCO)), CDVL

)), 0x15), Local0, Local0)

Return (Local0)

}

Else

{

If (LEqual (_T_0, 0x10))

{

If (LEqual (Arg1, One))

{

Store ("GetAKSV ", Debug)

Name (KSVP, Package (0x02)

{

0x80000000,

0x8000

})

Store (KSV0, Index (KSVP, Zero))

Store (KSV1, Index (KSVP, One))

Return (KSVP)

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Scope (\_SB)

{

Device (SKC0)

{

Name (_HID, "INT3470") // _HID: Hardware ID

Name (_CID, EisaId ("PNP0C02")) // _CID: Compatible ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (IMTP, 0x02))

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Scope (\_SB.PCI0.GFX0)

{

Device (SKC0)

{

Name (_ADR, 0xCA00) // _ADR: Address

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (IMTP, One))

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Scope (\_SB.PCI0)

{

Name (HBRB, Zero)

Name (HBRD, Zero)

Name (HBRF, Zero)

Name (IVID, 0xFFFF)

Name (PEBA, Zero)

Name (PION, Zero)

Name (PIOF, Zero)

Name (PBUS, Zero)

Name (PDEV, Zero)

Name (PFUN, Zero)

Name (EBUS, Zero)

Name (EDEV, Zero)

Name (EFN0, Zero)

Name (EFN1, One)

Name (INDX, Zero)

Name (POFF, Zero)

Name (PLEN, Zero)

Name (VIOF, Zero)

Name (DSOF, 0x06)

Name (CPOF, 0x34)

Name (SBOF, 0x19)

Name (ELC0, Zero)

Name (ECP0, 0xFFFFFFFF)

Name (H0VI, Zero)

Name (H0DI, Zero)

Name (ELC1, Zero)

Name (ECP1, 0xFFFFFFFF)

Name (H1VI, Zero)

Name (H1DI, Zero)

Name (ELC2, Zero)

Name (ECP2, 0xFFFFFFFF)

Name (H2VI, Zero)

Name (H2DI, Zero)

Name (TIDX, Zero)

Name (OTSD, Zero)

Name (MXPG, 0x03)

Name (FBDL, Zero)

Name (CBDL, Zero)

Name (MBDL, Zero)

Name (HSTR, Zero)

Name (LREV, Zero)

Name (TCNT, Zero)

Name (LDLY, 0x012C)

OperationRegion (OPG0, SystemMemory, Add (XBAS, 0x8000), 0x1000)

Field (OPG0, AnyAcc, NoLock, Preserve)

{

P0VI, 16,

P0DI, 16,

Offset (0x06),

DSO0, 16,

Offset (0x34),

CPO0, 8,

Offset (0xB0),

, 4,

P0LD, 1,

Offset (0xBC),

, 5,

P0L2, 1,

P0L0, 1,

Offset (0x11A),

, 1,

P0VC, 1,

Offset (0x214),

Offset (0x216),

P0LS, 4,

Offset (0x248),

, 7,

Q0L2, 1,

Q0L0, 1,

Offset (0x504),

HST0, 32,

P0TR, 1,

Offset (0x91C),

, 31,

BSP1, 1,

Offset (0x93C),

, 31,

BSP2, 1,

Offset (0x95C),

, 31,

BSP3, 1,

Offset (0x97C),

, 31,

BSP4, 1,

Offset (0x99C),

, 31,

BSP5, 1,

Offset (0x9BC),

, 31,

BSP6, 1,

Offset (0x9DC),

, 31,

BSP7, 1,

Offset (0x9FC),

, 31,

BSP8, 1,

Offset (0xC20),

, 4,

P0AP, 2,

Offset (0xC38),

, 3,

P0RM, 1,

Offset (0xC74),

P0LT, 4,

Offset (0xD0C),

LRV0, 32

}

OperationRegion (PCS0, SystemMemory, Add (XBAS, ShiftLeft (SBN0, 0x14)), 0xF0)

Field (PCS0, DWordAcc, Lock, Preserve)

{

D0VI, 16,

Offset (0x2C),

S0VI, 16,

S0DI, 16

}

OperationRegion (CAP0, SystemMemory, Add (Add (XBAS, ShiftLeft (SBN0, 0x14)), EECP

), 0x14)

Field (CAP0, DWordAcc, NoLock, Preserve)

{

Offset (0x0C),

LCP0, 32,

LCT0, 16

}

OperationRegion (OPG1, SystemMemory, Add (XBAS, 0x9000), 0x1000)

Field (OPG1, AnyAcc, NoLock, Preserve)

{

P1VI, 16,

P1DI, 16,

Offset (0x06),

DSO1, 16,

Offset (0x34),

CPO1, 8,

Offset (0xB0),

, 4,

P1LD, 1,

Offset (0xBC),

, 5,

P1L2, 1,

P1L0, 1,

Offset (0x11A),

, 1,

P1VC, 1,

Offset (0x214),

Offset (0x216),

P1LS, 4,

Offset (0x248),

, 7,

Q1L2, 1,

Q1L0, 1,

Offset (0x504),

HST1, 32,

P1TR, 1,

Offset (0xC20),

, 4,

P1AP, 2,

Offset (0xC38),

, 3,

P1RM, 1,

Offset (0xC74),

P1LT, 4,

Offset (0xD0C),

LRV1, 32

}

OperationRegion (PCS1, SystemMemory, Add (XBAS, ShiftLeft (SBN1, 0x14)), 0xF0)

Field (PCS1, DWordAcc, Lock, Preserve)

{

D1VI, 16,

Offset (0x2C),

S1VI, 16,

S1DI, 16

}

OperationRegion (CAP1, SystemMemory, Add (Add (XBAS, ShiftLeft (SBN1, 0x14)), EEC1

), 0x14)

Field (CAP1, DWordAcc, NoLock, Preserve)

{

Offset (0x0C),

LCP1, 32,

LCT1, 16

}

OperationRegion (OPG2, SystemMemory, Add (XBAS, 0xA000), 0x1000)

Field (OPG2, AnyAcc, NoLock, Preserve)

{

P2VI, 16,

P2DI, 16,

Offset (0x06),

DSO2, 16,

Offset (0x34),

CPO2, 8,

Offset (0xB0),

, 4,

P2LD, 1,

Offset (0xBC),

, 5,

P2L2, 1,

P2L0, 1,

Offset (0x11A),

, 1,

P2VC, 1,

Offset (0x214),

Offset (0x216),

P2LS, 4,

Offset (0x248),

, 7,

Q2L2, 1,

Q2L0, 1,

Offset (0x504),

HST2, 32,

P2TR, 1,

Offset (0xC20),

, 4,

P2AP, 2,

Offset (0xC38),

, 3,

P2RM, 1,

Offset (0xC74),

P2LT, 4,

Offset (0xD0C),

LRV2, 32

}

OperationRegion (PCS2, SystemMemory, Add (XBAS, ShiftLeft (SBN2, 0x14)), 0xF0)

Field (PCS2, DWordAcc, Lock, Preserve)

{

D2VI, 16,

Offset (0x2C),

S2VI, 16,

S2DI, 16

}

OperationRegion (CAP2, SystemMemory, Add (Add (XBAS, ShiftLeft (SBN2, 0x14)), EEC2

), 0x14)

Field (CAP2, DWordAcc, NoLock, Preserve)

{

Offset (0x0C),

LCP2, 32,

LCT2, 16

}

OperationRegion (MCD0, SystemMemory, XBAS, 0xF0)

Field (MCD0, DWordAcc, NoLock, Preserve)

{

Offset (0x02),

MODI, 16

}

Method (PEGS, 0, Serialized)

{

Store (Zero, Local0)

If (LEqual (And (CPEX, 0x0FFF0FF0), 0x000506E0))

{

If (LNotEqual (And (MODI, 0x06), 0x04))

{

Store (One, Local0)

}

Return (Local0)

}

Method (PGON, 1, Serialized)

{

Store (Arg0, PION)

If (LEqual (PION, Zero))

{

If (LEqual (SGGP, Zero))

{

Return (Zero)

}

Else

{

If (LEqual (PION, One))

{

If (LEqual (P1GP, Zero))

{

Return (Zero)

}

Else

{

If (LEqual (PION, 0x02))

{

If (LEqual (P2GP, Zero))

{

Return (Zero)

}

Store (\XBAS, PEBA)

Store (GDEV (PION), PDEV)

Store (GFUN (PION), PFUN)

Name (SCLK, Package (0x03)

{

One,

0x0100,

Zero

})

If (LNotEqual (DerefOf (Index (SCLK, Zero)), Zero))

{

PCRA (0xDC, 0x100C)

Not (DerefOf (Index (SCLK, One)))

Sleep (0x10)

}

If (LEqual (CCHK (PION, One), Zero))

{

Return (Zero)

}

GPPR (PION, One)

If (LEqual (OSYS, 0x07D9))

{

If (LEqual (PION, Zero))

{

Store (Zero, P0AP)

Store (Zero, P0RM)

}

Else

{

If (LEqual (PION, One))

{

Store (Zero, P1AP)

Store (Zero, P1RM)

}

Else

{

If (LEqual (PION, 0x02))

{

Store (Zero, P2AP)

Store (Zero, P2RM)

}

If (LNotEqual (PBGE, Zero))

{

If (SBDL (PION))

{

PUAB (PION)

Store (GUBC (PION), CBDL)

Store (GMXB (PION), MBDL)

If (LGreater (CBDL, MBDL))

{

Store (MBDL, CBDL)

}

PDUB (PION, CBDL)

}

If (LEqual (PION, Zero))

{

Store (Zero, P0LD)

Store (One, P0TR)

Store (Zero, TCNT)

While (LLess (TCNT, LDLY))

{

If (LEqual (P0VC, Zero))

{

Break

}

Sleep (0x10)

Add (TCNT, 0x10, TCNT)

}

Else

{

If (LEqual (PION, One))

{

Store (Zero, P1LD)

Store (One, P1TR)

Store (Zero, TCNT)

While (LLess (TCNT, LDLY))

{

If (LEqual (P1VC, Zero))

{

Break

}

Sleep (0x10)

Add (TCNT, 0x10, TCNT)

}

Else

{

If (LEqual (PION, 0x02))

{

Store (Zero, P2LD)

Store (One, P2TR)

Store (Zero, TCNT)

While (LLess (TCNT, LDLY))

{

If (LEqual (P2VC, Zero))

{

Break

}

Sleep (0x10)

Add (TCNT, 0x10, TCNT)

}

Else

{

LKEN (PION)

}

If (LEqual (PION, Zero))

{

Store (H0VI, S0VI)

Store (H0DI, S0DI)

Or (And (ELC0, 0x43), And (LCT0, 0xFFBC), LCT0)

}

Else

{

If (LEqual (PION, One))

{

Store (H1VI, S1VI)

Store (H1DI, S1DI)

Or (And (ELC1, 0x43), And (LCT1, 0xFFBC), LCT1)

}

Else

{

If (LEqual (PION, 0x02))

{

Store (H2VI, S2VI)

Store (H2DI, S2DI)

Or (And (ELC2, 0x43), And (LCT2, 0xFFBC), LCT2)

}

Return (Zero)

}

Method (PGOF, 1, Serialized)

{

Store (Arg0, PIOF)

If (LEqual (PIOF, Zero))

{

If (LEqual (SGGP, Zero))

{

Return (Zero)

}

Else

{

If (LEqual (PIOF, One))

{

If (LEqual (P1GP, Zero))

{

Return (Zero)

}

Else

{

If (LEqual (PIOF, 0x02))

{

If (LEqual (P2GP, Zero))

{

Return (Zero)

}

Store (\XBAS, PEBA)

Store (GDEV (PIOF), PDEV)

Store (GFUN (PIOF), PFUN)

Name (SCLK, Package (0x03)

{

One,

0x0100,

Zero

})

If (LEqual (CCHK (PIOF, Zero), Zero))

{

Return (Zero)

}

If (LEqual (Arg0, Zero))

{

Store (LCT0, ELC0)

Store (S0VI, H0VI)

Store (S0DI, H0DI)

Store (LCP0, ECP0)

}

Else

{

If (LEqual (Arg0, One))

{

Store (LCT1, ELC1)

Store (S1VI, H1VI)

Store (S1DI, H1DI)

Store (LCP1, ECP1)

}

Else

{

If (LEqual (Arg0, 0x02))

{

Store (LCT2, ELC2)

Store (S2VI, H2VI)

Store (S2DI, H2DI)

Store (LCP2, ECP2)

}

If (LEqual (OSYS, 0x07D9))

{

If (LEqual (PIOF, Zero))

{

Store (One, P0LD)

Store (Zero, TCNT)

While (LLess (TCNT, LDLY))

{

If (LEqual (P0LT, 0x08))

{

Break

}

Sleep (0x10)

Add (TCNT, 0x10, TCNT)

}

Store (One, P0RM)

Store (0x03, P0AP)

}

Else

{

If (LEqual (PIOF, One))

{

Store (One, P1LD)

Store (Zero, TCNT)

While (LLess (TCNT, LDLY))

{

If (LEqual (P1LT, 0x08))

{

Break

}

Sleep (0x10)

Add (TCNT, 0x10, TCNT)

}

Store (One, P1RM)

Store (0x03, P1AP)

}

Else

{

If (LEqual (PIOF, 0x02))

{

Store (One, P2LD)

Store (Zero, TCNT)

While (LLess (TCNT, LDLY))

{

If (LEqual (P2LT, 0x08))

{

Break

}

Sleep (0x10)

Add (TCNT, 0x10, TCNT)

}

Store (One, P2RM)

Store (0x03, P2AP)

}

If (LNotEqual (PBGE, Zero))

{

If (SBDL (PIOF))

{

Store (GMXB (PIOF), MBDL)

PDUB (PIOF, MBDL)

}

Else

{

LKDS (PIOF)

}

If (LNotEqual (DerefOf (Index (SCLK, Zero)), Zero))

{

PCRO (0xDC, 0x100C)

DerefOf (Index (SCLK, One))

Sleep (0x10)

}

GPPR (PIOF, Zero)

If (LNotEqual (OSYS, 0x07D9))

{

DIWK (PIOF)

}

Return (Zero)

}

Method (MMRB, 5, NotSerialized)

{

Store (Arg0, Local7)

Or (Local7, ShiftLeft (Arg1, 0x14), Local7)

Or (Local7, ShiftLeft (Arg2, 0x0F), Local7)

Or (Local7, ShiftLeft (Arg3, 0x0C), Local7)

Or (Local7, Arg4, Local7)

OperationRegion (PCI0, SystemMemory, Local7, One)

Field (PCI0, ByteAcc, NoLock, Preserve)

{

TEMP, 8

}

Return (TEMP)

}

Method (MMWB, 6, NotSerialized)

{

Store (Arg0, Local7)

Or (Local7, ShiftLeft (Arg1, 0x14), Local7)

Or (Local7, ShiftLeft (Arg2, 0x0F), Local7)

Or (Local7, ShiftLeft (Arg3, 0x0C), Local7)

Or (Local7, Arg4, Local7)

OperationRegion (PCI0, SystemMemory, Local7, One)

Field (PCI0, ByteAcc, NoLock, Preserve)

{

TEMP, 8

}

Store (Arg5, TEMP)

}

Method (MMRW, 5, NotSerialized)

{

Store (Arg0, Local7)

Or (Local7, ShiftLeft (Arg1, 0x14), Local7)

Or (Local7, ShiftLeft (Arg2, 0x0F), Local7)

Or (Local7, ShiftLeft (Arg3, 0x0C), Local7)

Or (Local7, Arg4, Local7)

OperationRegion (PCI0, SystemMemory, Local7, 0x02)

Field (PCI0, ByteAcc, NoLock, Preserve)

{

TEMP, 16

}

Return (TEMP)

}

Method (MMWW, 6, NotSerialized)

{

Store (Arg0, Local7)

Or (Local7, ShiftLeft (Arg1, 0x14), Local7)

Or (Local7, ShiftLeft (Arg2, 0x0F), Local7)

Or (Local7, ShiftLeft (Arg3, 0x0C), Local7)

Or (Local7, Arg4, Local7)

OperationRegion (PCI0, SystemMemory, Local7, 0x02)

Field (PCI0, ByteAcc, NoLock, Preserve)

{

TEMP, 16

}

Store (Arg5, TEMP)

}

Method (MMRD, 5, NotSerialized)

{

Store (Arg0, Local7)

Or (Local7, ShiftLeft (Arg1, 0x14), Local7)

Or (Local7, ShiftLeft (Arg2, 0x0F), Local7)

Or (Local7, ShiftLeft (Arg3, 0x0C), Local7)

Or (Local7, Arg4, Local7)

OperationRegion (PCI0, SystemMemory, Local7, 0x04)

Field (PCI0, ByteAcc, NoLock, Preserve)

{

TEMP, 32

}

Return (TEMP)

}

Method (MMWD, 6, NotSerialized)

{

Store (Arg0, Local7)

Or (Local7, ShiftLeft (Arg1, 0x14), Local7)

Or (Local7, ShiftLeft (Arg2, 0x0F), Local7)

Or (Local7, ShiftLeft (Arg3, 0x0C), Local7)

Or (Local7, Arg4, Local7)

OperationRegion (PCI0, SystemMemory, Local7, 0x04)

Field (PCI0, ByteAcc, NoLock, Preserve)

{

TEMP, 32

}

Store (Arg5, TEMP)

}

Method (GULC, 1, NotSerialized)

{

Store (MMRD (PEBA, PBUS, PDEV, PFUN, 0xAC), Local7)

ShiftRight (Local7, 0x04, Local7)

And (Local7, 0x3F, Local7)

Store (Arg0, Local6)

ShiftRight (Local6, 0x04, Local6)

And (Local6, 0x3F, Local6)

If (LGreater (Local7, Local6))

{

Subtract (Local7, Local6, Local0)

}

Else

{

Store (Zero, Local0)

}

Return (Local0)

}

Method (GMXB, 1, NotSerialized)

{

If (LEqual (Arg0, Zero))

{

Store (HST0, HSTR)

}

Else

{

If (LEqual (Arg0, One))

{

Store (HST1, HSTR)

}

Else

{

If (LEqual (Arg0, 0x02))

{

Store (HST2, HSTR)

}

ShiftRight (HSTR, 0x10, HSTR)

And (HSTR, 0x03, HSTR)

If (LEqual (Arg0, Zero))

{

If (LEqual (HSTR, 0x03))

{

Store (0x08, Local0)

}

Else

{

Store (0x04, Local0)

}

Else

{

If (LEqual (Arg0, One))

{

If (LEqual (HSTR, 0x02))

{

Store (0x04, Local0)

}

Else

{

If (LEqual (HSTR, Zero))

{

Store (0x02, Local0)

}

Else

{

If (LEqual (Arg0, 0x02))

{

If (LEqual (HSTR, Zero))

{

Store (0x02, Local0)

}

Return (Local0)

}

Method (PUAB, 1, NotSerialized)

{

Store (Zero, FBDL)

Store (Zero, CBDL)

If (LEqual (Arg0, Zero))

{

Store (HST0, HSTR)

Store (LRV0, LREV)

}

Else

{

If (LEqual (Arg0, One))

{

Store (HST1, HSTR)

Store (LRV1, LREV)

}

Else

{

If (LEqual (Arg0, 0x02))

{

Store (HST2, HSTR)

Store (LRV2, LREV)

}

ShiftRight (HSTR, 0x10, HSTR)

And (HSTR, 0x03, HSTR)

ShiftRight (LREV, 0x14, LREV)

And (LREV, One, LREV)

If (LEqual (Arg0, Zero))

{

If (LEqual (HSTR, 0x03))

{

Store (Zero, FBDL)

Store (0x08, CBDL)

}

Else

{

If (LEqual (LREV, Zero))

{

Store (Zero, FBDL)

Store (0x04, CBDL)

}

Else

{

Store (0x04, FBDL)

Store (0x04, CBDL)

}

Else

{

If (LEqual (Arg0, One))

{

If (LEqual (HSTR, 0x02))

{

If (LEqual (LREV, Zero))

{

Store (0x04, FBDL)

Store (0x04, CBDL)

}

Else

{

Store (Zero, FBDL)

Store (0x04, CBDL)

}

Else

{

If (LEqual (HSTR, Zero))

{

If (LEqual (LREV, Zero))

{

Store (0x04, FBDL)

Store (0x02, CBDL)

}

Else

{

Store (0x02, FBDL)

Store (0x02, CBDL)

}

Else

{

If (LEqual (Arg0, 0x02))

{

If (LEqual (HSTR, Zero))

{

If (LEqual (LREV, Zero))

{

Store (0x06, FBDL)

Store (0x02, CBDL)

}

Else

{

Store (Zero, FBDL)

Store (0x02, CBDL)

}

Store (One, INDX)

If (LNotEqual (CBDL, Zero))

{

While (LLessEqual (INDX, CBDL))

{

If (LEqual (P0VI, IVID)) {}

Else

{

If (LNotEqual (P0VI, IVID))

{

If (LEqual (FBDL, Zero))

{

Store (Zero, BSP1)

}

If (LEqual (FBDL, One))

{

Store (Zero, BSP2)

}

If (LEqual (FBDL, 0x02))

{

Store (Zero, BSP3)

}

If (LEqual (FBDL, 0x03))

{

Store (Zero, BSP4)

}

If (LEqual (FBDL, 0x04))

{

Store (Zero, BSP5)

}

If (LEqual (FBDL, 0x05))

{

Store (Zero, BSP6)

}

If (LEqual (FBDL, 0x06))

{

Store (Zero, BSP7)

}

If (LEqual (FBDL, 0x07))

{

Store (Zero, BSP8)

}

Increment (FBDL)

Increment (INDX)

}

Method (PDUB, 2, NotSerialized)

{

Store (Zero, FBDL)

Store (Arg1, CBDL)

If (LEqual (CBDL, Zero))

{

Return (Zero)

}

If (LEqual (Arg0, Zero))

{

Store (HST0, HSTR)

Store (LRV0, LREV)

}

Else

{

If (LEqual (Arg0, One))

{

Store (HST1, HSTR)

Store (LRV1, LREV)

}

Else

{

If (LEqual (Arg0, 0x02))

{

Store (HST2, HSTR)

Store (LRV2, LREV)

}

ShiftRight (HSTR, 0x10, HSTR)

And (HSTR, 0x03, HSTR)

ShiftRight (LREV, 0x14, LREV)

And (LREV, One, LREV)

If (LEqual (Arg0, Zero))

{

If (LEqual (HSTR, 0x03))

{

If (LEqual (LREV, Zero))

{

Store (Subtract (0x08, CBDL), FBDL)

}

Else

{

Store (Zero, FBDL)

}

Else

{

If (LEqual (LREV, Zero))

{

Store (Subtract (0x04, CBDL), FBDL)

}

Else

{

Store (0x04, FBDL)

}

Else

{

If (LEqual (Arg0, One))

{

If (LEqual (HSTR, 0x02))

{

If (LEqual (LREV, Zero))

{

Store (Subtract (0x08, CBDL), FBDL)

}

Else

{

Store (Zero, FBDL)

}

Else

{

If (LEqual (HSTR, Zero))

{

If (LEqual (LREV, Zero))

{

Store (Subtract (0x06, CBDL), FBDL)

}

Else

{

Store (0x02, FBDL)

}

Else

{

If (LEqual (Arg0, 0x02))

{

If (LEqual (HSTR, Zero))

{

If (LEqual (LREV, Zero))

{

Store (Subtract (0x08, CBDL), FBDL)

}

Else

{

Store (Zero, FBDL)

}

Store (One, INDX)

While (LLessEqual (INDX, CBDL))

{

If (LEqual (P0VI, IVID)) {}

Else

{

If (LNotEqual (P0VI, IVID))

{

If (LEqual (FBDL, Zero))

{

Store (One, BSP1)

}

If (LEqual (FBDL, One))

{

Store (One, BSP2)

}

If (LEqual (FBDL, 0x02))

{

Store (One, BSP3)

}

If (LEqual (FBDL, 0x03))

{

Store (One, BSP4)

}

If (LEqual (FBDL, 0x04))

{

Store (One, BSP5)

}

If (LEqual (FBDL, 0x05))

{

Store (One, BSP6)

}

If (LEqual (FBDL, 0x06))

{

Store (One, BSP7)

}

If (LEqual (FBDL, 0x07))

{

Store (One, BSP8)

}

Increment (FBDL)

Increment (INDX)

}

Method (SBDL, 1, NotSerialized)

{

If (LEqual (Arg0, Zero))

{

If (LEqual (P0UB, Zero))

{

Return (Zero)

}

Else

{

If (LEqual (Arg0, One))

{

If (LEqual (P1UB, Zero))

{

Return (Zero)

}

Else

{

If (LEqual (Arg0, 0x02))

{

If (LEqual (P2UB, Zero))

{

Return (Zero)

}

Else

{

Return (Zero)

}

Return (One)

}

Method (GUBC, 1, NotSerialized)

{

Store (Zero, Local7)

If (LEqual (Arg0, Zero))

{

Store (LCP0, Local6)

}

Else

{

If (LEqual (Arg0, One))

{

Store (LCP1, Local6)

}

Else

{

If (LEqual (Arg0, 0x02))

{

Store (LCP2, Local6)

}

If (LEqual (Arg0, Zero))

{

If (LEqual (P0UB, 0xFF))

{

Store (GULC (Local6), Local5)

Store (Divide (Local5, 0x02, ), Local7)

}

Else

{

If (LNotEqual (P0UB, Zero))

{

Store (P0UB, Local7)

}

Else

{

If (LEqual (Arg0, One))

{

If (LEqual (P1UB, 0xFF))

{

Store (GULC (Local6), Local5)

Store (Divide (Local5, 0x02, ), Local7)

}

Else

{

If (LNotEqual (P1UB, Zero))

{

Store (P1UB, Local7)

}

Else

{

If (LEqual (Arg0, 0x02))

{

If (LEqual (P2UB, 0xFF))

{

Store (GULC (Local6), Local5)

Store (Divide (Local5, 0x02, ), Local7)

}

Else

{

If (LNotEqual (P2UB, Zero))

{

Store (P2UB, Local7)

}

Return (Local7)

}

Method (LKEN, 1, NotSerialized)

{

And (CPEX, 0x0F, Local3)

If (LEqual (Local3, Zero))

{

If (LEqual (Arg0, Zero))

{

Store (One, P0L0)

Sleep (0x10)

Store (Zero, Local0)

While (P0L0)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Else

{

If (LEqual (Arg0, One))

{

Store (One, P1L0)

Sleep (0x10)

Store (Zero, Local0)

While (P0L0)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Else

{

If (LEqual (Arg0, 0x02))

{

Store (One, P2L0)

Sleep (0x10)

Store (Zero, Local0)

While (P0L0)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Else

{

If (LNotEqual (Local3, Zero))

{

If (LEqual (Arg0, Zero))

{

Store (One, Q0L0)

Sleep (0x10)

Store (Zero, Local0)

While (Q0L0)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Else

{

If (LEqual (Arg0, One))

{

Store (One, Q1L0)

Sleep (0x10)

Store (Zero, Local0)

While (Q1L0)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Else

{

If (LEqual (Arg0, 0x02))

{

Store (One, Q2L0)

Sleep (0x10)

Store (Zero, Local0)

While (Q2L0)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Method (LKDS, 1, NotSerialized)

{

And (CPEX, 0x0F, Local3)

If (LEqual (Local3, Zero))

{

If (LEqual (Arg0, Zero))

{

Store (One, P0L2)

Sleep (0x10)

Store (Zero, Local0)

While (P0L2)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Else

{

If (LEqual (Arg0, One))

{

Store (One, P1L2)

Sleep (0x10)

Store (Zero, Local0)

While (P1L2)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Else

{

If (LEqual (Arg0, 0x02))

{

Store (One, P2L2)

Sleep (0x10)

Store (Zero, Local0)

While (P2L2)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Else

{

If (LNotEqual (Local3, Zero))

{

If (LEqual (Arg0, Zero))

{

Store (One, Q0L2)

Sleep (0x10)

Store (Zero, Local0)

While (Q0L2)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Else

{

If (LEqual (Arg0, One))

{

Store (One, Q1L2)

Sleep (0x10)

Store (Zero, Local0)

While (Q1L2)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Else

{

If (LEqual (Arg0, 0x02))

{

Store (One, Q2L2)

Sleep (0x10)

Store (Zero, Local0)

While (Q2L2)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Method (DIWK, 1, NotSerialized)

{

If (LEqual (Arg0, Zero))

{

\_SB.PCI0.PEG0.P0EW ()

}

Else

{

If (LEqual (Arg0, One))

{

\_SB.PCI0.PEG1.P1EW ()

}

Else

{

If (LEqual (Arg0, 0x02))

{

\_SB.PCI0.PEG2.P2EW ()

}

Method (GDEV, 1, NotSerialized)

{

If (LEqual (Arg0, Zero))

{

Store (One, Local0)

}

Else

{

If (LEqual (Arg0, One))

{

Store (One, Local0)

}

If (LEqual (Arg0, 0x02))

{

Store (One, Local0)

}

Return (Local0)

}

Method (GFUN, 1, NotSerialized)

{

If (LEqual (Arg0, Zero))

{

Store (Zero, Local0)

}

Else

{

If (LEqual (Arg0, One))

{

Store (One, Local0)

}

If (LEqual (Arg0, 0x02))

{

Store (0x02, Local0)

}

Return (Local0)

}

Method (CCHK, 2, NotSerialized)

{

If (LEqual (Arg0, Zero))

{

Store (P0VI, Local7)

}

Else

{

If (LEqual (Arg0, One))

{

Store (P1VI, Local7)

}

Else

{

If (LEqual (Arg0, 0x02))

{

Store (P2VI, Local7)

}

If (LEqual (Local7, IVID))

{

Return (Zero)

}

If (LNotEqual (Arg0, Zero))

{

Store (P0VI, Local7)

If (LEqual (Local7, IVID))

{

Return (Zero)

}

If (LEqual (Arg1, Zero))

{

If (LEqual (Arg0, Zero))

{

If (LEqual (SGPI (SGGP, PWE0, PWG0, PWA0), Zero))

{

Return (Zero)

}

If (LEqual (Arg0, One))

{

If (LEqual (SGPI (P1GP, PWE1, PWG1, PWA1), Zero))

{

Return (Zero)

}

If (LEqual (Arg0, 0x02))

{

If (LEqual (SGPI (P2GP, PWE2, PWG2, PWA2), Zero))

{

Return (Zero)

}

Else

{

If (LEqual (Arg1, One))

{

If (LEqual (Arg0, Zero))

{

If (LEqual (SGPI (SGGP, PWE0, PWG0, PWA0), One))

{

Return (Zero)

}

If (LEqual (Arg0, One))

{

If (LEqual (SGPI (P1GP, PWE1, PWG1, PWA1), One))

{

Return (Zero)

}

If (LEqual (Arg0, 0x02))

{

If (LEqual (SGPI (P2GP, PWE2, PWG2, PWA2), One))

{

Return (Zero)

}

Return (One)

}

Method (NTFY, 2, NotSerialized)

{

If (LEqual (Arg0, Zero))

{

Notify (\_SB.PCI0.PEG0, Arg1)

}

Else

{

If (LEqual (Arg0, One))

{

Notify (\_SB.PCI0.PEG1, Arg1)

}

Else

{

If (LEqual (Arg0, 0x02))

{

Notify (\_SB.PCI0.PEG2, Arg1)

}

Method (GPPR, 2, NotSerialized)

{

If (LEqual (Arg1, Zero))

{

If (LEqual (Arg0, Zero))

{

SGPO (SGGP, HRE0, HRG0, HRA0, One)

SGPO (SGGP, PWE0, PWG0, PWA0, Zero)

}

If (LEqual (Arg0, One))

{

SGPO (P1GP, HRE1, HRG1, HRA1, One)

SGPO (P1GP, PWE1, PWG1, PWA1, Zero)

}

If (LEqual (Arg0, 0x02))

{

SGPO (P2GP, HRE2, HRG2, HRA2, One)

SGPO (P2GP, PWE2, PWG2, PWA2, Zero)

}

Else

{

If (LEqual (Arg1, One))

{

If (LEqual (Arg0, Zero))

{

SGPO (SGGP, HRE0, HRG0, HRA0, One)

SGPO (SGGP, PWE0, PWG0, PWA0, One)

Sleep (DLPW)

SGPO (SGGP, HRE0, HRG0, HRA0, Zero)

Sleep (DLHR)

}

If (LEqual (Arg0, One))

{

SGPO (P1GP, HRE1, HRG1, HRA1, One)

SGPO (P1GP, PWE1, PWG1, PWA1, One)

Sleep (DLPW)

SGPO (P1GP, HRE1, HRG1, HRA1, Zero)

Sleep (DLHR)

}

If (LEqual (Arg0, 0x02))

{

SGPO (P2GP, HRE2, HRG2, HRA2, One)

SGPO (P2GP, PWE2, PWG2, PWA2, One)

Sleep (DLPW)

SGPO (P2GP, HRE2, HRG2, HRA2, Zero)

Sleep (DLHR)

}

Method (SGPO, 5, Serialized)

{

If (LEqual (Arg3, Zero))

{

Not (Arg4, Arg4)

And (Arg4, One, Arg4)

}

If (LEqual (Arg0, One))

{

If (CondRefOf (\_SB.SGOV))

{

\_SB.SGOV (Arg2, Arg4)

}

Method (SGPI, 4, Serialized)

{

If (LEqual (Arg0, One))

{

If (CondRefOf (\_SB.GGOV))

{

Store (\_SB.GGOV, Arg2)

Local0

}

If (LEqual (Arg3, Zero))

{

Not (Local0, Local0)

And (Local0, One, Local0)

}

Return (Local0)

}

Secondary System Description Table

View File SSDT-6.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* Original Table Header:

* Signature "SSDT"

* Length 0x00000E9A (3738)

* Revision 0x02

* Checksum 0x0F

* OEM ID "CpuRef"

* OEM Table ID "CpuSsdt"

* OEM Revision 0x00003000 (12288)

* Compiler ID "INTL"

* Compiler Version 0x20120913 (538052883)

DefinitionBlock ("/Volumes/OS X El Capitan/Users/dima/Downloads/DarwinDumper_v2.9.9.2/DarwinDumperReports/006_2016-05-16_00-24-11_iMac14,2/DarwinDumper_2.9.9.2_AMI_X64_3526_Cap_dima/ACPI Tables/AML/SSDT-6.aml", "SSDT", 2, "CpuRef", "CpuSsdt", 0x00003000)

{

External (_PR_.CPU0, DeviceObj)

External (_PR_.CPU1, DeviceObj)

External (_PR_.CPU2, DeviceObj)

External (_PR_.CPU3, DeviceObj)

External (_PR_.CPU4, DeviceObj)

External (_PR_.CPU5, DeviceObj)

External (_PR_.CPU6, DeviceObj)

External (_PR_.CPU7, DeviceObj)

External (_SB_.OSCP)

External (OSYS)

Scope (\)

{

Name (SSDT, Package (0x15)

{

"CPU0IST ",

0x880A6018,

0x00000870,

"APIST ",

0x880A5618,

0x000005AA,

"CPU0CST ",

0x880A5C18,

0x0000037F,

"APCST ",

0x880A8C18,

0x00000119,

"CPU0HWP ",

0x8631C918,

0x0000008E,

"APHWP ",

0x86617498,

0x00000119,

"HWPLVT ",

0x86617318,

0x00000130

})

Name (\PDC0, 0x80000000)

Name (\PDC1, 0x80000000)

Name (\PDC2, 0x80000000)

Name (\PDC3, 0x80000000)

Name (\PDC4, 0x80000000)

Name (\PDC5, 0x80000000)

Name (\PDC6, 0x80000000)

Name (\PDC7, 0x80000000)

Name (\SDTL, Zero)

}

Scope (\_PR)

{

Name (CTPC, Zero)

OperationRegion (PNVS, SystemMemory, 0x82B77000, 0x006B)

Field (PNVS, AnyAcc, Lock, Preserve)

{

PGRV, 8,

CFGD, 32,

Offset (0x06),

ACRT, 8,

APSV, 8,

AAC0, 8,

CPID, 32,

CPPC, 8,

CCTP, 8,

CLVL, 8,

CBMI, 8,

PL10, 16,

PL20, 16,

PLW0, 8,

CTC0, 8,

TAR0, 8,

PPC0, 8,

PL11, 16,

PL21, 16,

PLW1, 8,

CTC1, 8,

TAR1, 8,

PPC1, 8,

PL12, 16,

PL22, 16,

PLW2, 8,

CTC2, 8,

TAR2, 8,

PPC2, 8,

C3MW, 8,

C6MW, 8,

C7MW, 8,

CDMW, 8,

C3LT, 16,

C6LT, 16,

C7LT, 16,

CDLT, 16,

CDLV, 16,

CDPW, 16,

MPMF, 8,

DTSE, 8,

DTS1, 8,

DTS2, 8,

DTSF, 8,

PDTS, 8,

PKGA, 8,

DTS3, 8,

DTS4, 8,

BGMA, 64,

BGMS, 8,

BGIA, 16,

BGIL, 16,

DSIA, 16,

DSIL, 8,

DSAE, 8,

EPCS, 8,

EMNA, 64,

ELNG, 64,

HWPV, 8,

HWPA, 16,

HWPL, 16,

POWS, 8,

HDCE, 8

}

OperationRegion (IO_D, SystemIO, \_PR.DSIA, \_PR.DSIL)

Field (IO_D, ByteAcc, NoLock, Preserve)

{

TRPD, 8

}

OperationRegion (IO_P, SystemIO, \_PR.BGIA, \_PR.BGIL)

Field (IO_P, ByteAcc, NoLock, Preserve)

{

TRPF, 8

}

Scope (\_PR.CPU0)

{

Name (HI0, Zero)

Name (HC0, Zero)

Name (HW0, Zero)

Name (HW2, Zero)

Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities

{

Store (CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities

{

Store (COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (CPDC, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, REVS)

CreateDWordField (Arg0, 0x04, SIZE)

Store (SizeOf (Arg0), Local0)

Store (Subtract (Local0, 0x08), Local1)

CreateField (Arg0, 0x40, Multiply (Local1, 0x08), TEMP)

Name (STS0, Buffer (0x04)

{

0x00, 0x00, 0x00, 0x00

})

Concatenate (STS0, TEMP, Local2)

Return (COSC (Buffer (0x10)

{

/* 0000 */ 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47,

/* 0008 */ 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53

}, REVS, SIZE, Local2))

}

Method (COSC, 4, NotSerialized)

{

CreateDWordField (Arg3, Zero, STS0)

CreateDWordField (Arg3, 0x04, CAP0)

CreateDWordField (Arg0, Zero, IID0)

CreateDWordField (Arg0, 0x04, IID1)

CreateDWordField (Arg0, 0x08, IID2)

CreateDWordField (Arg0, 0x0C, IID3)

Name (UID0, Buffer (0x10)

{

/* 0000 */ 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47,

/* 0008 */ 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53

})

CreateDWordField (UID0, Zero, EID0)

CreateDWordField (UID0, 0x04, EID1)

CreateDWordField (UID0, 0x08, EID2)

CreateDWordField (UID0, 0x0C, EID3)

If (LNot (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)),

LAnd (LEqual (IID2, EID2), LEqual (IID3, EID3)))))

{

Store (0x06, STS0)

Return (Arg3)

}

If (LNotEqual (Arg1, One))

{

Store (0x0A, STS0)

Return (Arg3)

}

If (Not (And (STS0, One)))

{

If (And (CAP0, 0x2000))

{

Store (Zero, \_PR.HDCE)

}

Else

{

OperationRegion (SMIP, SystemIO, 0xB2, One)

Field (SMIP, ByteAcc, NoLock, Preserve)

{

IOB2, 8

}

Store (0x28, IOB2)

}

Return (Arg3)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS0)

CreateDWordField (Arg0, 0x04, CAP0)

If (LOr (LEqual (STS0, 0x06), LEqual (STS0, 0x0A)))

{

Return (Zero)

}

If (And (STS0, One))

{

And (CAP0, 0x0BFF, CAP0)

Return (Zero)

}

Or (And (PDC0, 0x7FFFFFFF), CAP0, PDC0)

If (And (CFGD, 0x7A))

{

If (LAnd (LAnd (And (CFGD, 0x0200), And (PDC0, 0x18

)), LNot (And (SDTL, 0x02))))

{

Or (SDTL, 0x02, SDTL)

OperationRegion (CST0, SystemMemory, DerefOf (Index (SSDT, 0x07)), DerefOf (Index (SSDT, 0x08

)))

Load (CST0, HC0)

}

If (LAnd (And (CFGD, One), LNot (And (SDTL, 0x08

))))

{

Or (SDTL, 0x08, SDTL)

OperationRegion (IST0, SystemMemory, DerefOf (Index (SSDT, One)), DerefOf (Index (SSDT, 0x02

)))

Load (IST0, HI0)

}

If (LOr (LEqual (OSYS, 0x07DC), LEqual (OSYS, 0x07DD)))

{

And (CFGD, 0xFF3FFFFF, CFGD)

}

If (LAnd (And (CFGD, 0x00400000), LNot (And (SDTL, 0x40

))))

{

If (And (\_SB.OSCP, 0x20))

{

Or (SDTL, 0x40, SDTL)

OperationRegion (HWP0, SystemMemory, DerefOf (Index (SSDT, 0x0D)), DerefOf (Index (SSDT, 0x0E

)))

Load (HWP0, HW0)

If (And (CFGD, 0x00800000))

{

OperationRegion (HWPL, SystemMemory, DerefOf (Index (SSDT, 0x13)), DerefOf (Index (SSDT, 0x14

)))

Load (HWPL, HW2)

}

If (And (\_SB.OSCP, 0x20))

{

If (LNot (And (\_SB.OSCP, 0x40)))

{

Store (Zero, HWPV)

}

If (And (\_SB.OSCP, 0x40))

{

Store (0x02, HWPV)

}

If (LNot (And (PDC0, 0x1000)))

{

OperationRegion (SMIP, SystemIO, 0xB2, One)

Field (SMIP, ByteAcc, NoLock, Preserve)

{

IOB2, 8

}

Store (0x27, IOB2)

}

Return (Zero)

}

Scope (\_PR.CPU1)

{

Name (HI1, Zero)

Name (HC1, Zero)

Name (HW1, Zero)

Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities

{

Store (\_PR.CPU0.CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities

{

Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS1)

CreateDWordField (Arg0, 0x04, CAP1)

If (LOr (LEqual (STS1, 0x06), LEqual (STS1, 0x0A)))

{

Return (Zero)

}

If (And (STS1, One))

{

And (CAP1, 0x0BFF, CAP1)

Return (Zero)

}

Or (And (PDC1, 0x7FFFFFFF), CAP1, PDC1)

If (LEqual (And (PDC1, 0x09), 0x09))

{

APPT ()

}

If (And (\_SB.OSCP, 0x20))

{

HWPT ()

}

If (And (PDC1, 0x18))

{

APCT ()

}

Store (PDC1, PDC0)

Return (Zero)

}

Method (APCT, 0, NotSerialized)

{

If (LAnd (And (CFGD, 0x7A), LNot (And (SDTL, 0x20

))))

{

Or (SDTL, 0x20, SDTL)

OperationRegion (CST1, SystemMemory, DerefOf (Index (SSDT, 0x0A)), DerefOf (Index (SSDT, 0x0B

)))

Load (CST1, HC1)

}

Method (APPT, 0, NotSerialized)

{

If (LAnd (And (CFGD, One), LNot (And (SDTL, 0x10

))))

{

Or (SDTL, 0x10, SDTL)

OperationRegion (IST1, SystemMemory, DerefOf (Index (SSDT, 0x04)), DerefOf (Index (SSDT, 0x05

)))

Load (IST1, HI1)

}

Method (HWPT, 0, NotSerialized)

{

If (LOr (LEqual (OSYS, 0x07DC), LEqual (OSYS, 0x07DD)))

{

And (CFGD, 0xFF3FFFFF, CFGD)

}

If (LAnd (And (CFGD, 0x00400000), LNot (And (SDTL, 0x80

))))

{

Or (SDTL, 0x80, SDTL)

OperationRegion (HWP1, SystemMemory, DerefOf (Index (SSDT, 0x10)), DerefOf (Index (SSDT, 0x11

)))

Load (HWP1, HW1)

}

Scope (\_PR.CPU2)

{

Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities

{

Store (\_PR.CPU0.CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities

{

Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS2)

CreateDWordField (Arg0, 0x04, CAP2)

If (LOr (LEqual (STS2, 0x06), LEqual (STS2, 0x0A)))

{

Return (Zero)

}

If (And (STS2, One))

{

And (CAP2, 0x0BFF, CAP2)

Return (Zero)

}

Or (And (PDC2, 0x7FFFFFFF), CAP2, PDC2)

If (LEqual (And (PDC2, 0x09), 0x09))

{

\_PR.CPU1.APPT ()

}

If (And (\_SB.OSCP, 0x20))

{

\_PR.CPU1.HWPT ()

}

If (And (PDC2, 0x18))

{

\_PR.CPU1.APCT ()

}

Store (PDC2, PDC0)

Return (Zero)

}

Scope (\_PR.CPU3)

{

Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities

{

Store (\_PR.CPU0.CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities

{

Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS3)

CreateDWordField (Arg0, 0x04, CAP3)

If (LOr (LEqual (STS3, 0x06), LEqual (STS3, 0x0A)))

{

Return (Zero)

}

If (And (STS3, One))

{

And (CAP3, 0x0BFF, CAP3)

Return (Zero)

}

Or (And (PDC3, 0x7FFFFFFF), CAP3, PDC3)

If (LEqual (And (PDC3, 0x09), 0x09))

{

\_PR.CPU1.APPT ()

}

If (And (\_SB.OSCP, 0x20))

{

\_PR.CPU1.HWPT ()

}

If (And (PDC3, 0x18))

{

\_PR.CPU1.APCT ()

}

Store (PDC3, PDC0)

Return (Zero)

}

Scope (\_PR.CPU4)

{

Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities

{

Store (\_PR.CPU0.CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities

{

Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS4)

CreateDWordField (Arg0, 0x04, CAP4)

If (LOr (LEqual (STS4, 0x06), LEqual (STS4, 0x0A)))

{

Return (Zero)

}

If (And (STS4, One))

{

And (CAP4, 0x0BFF, CAP4)

Return (Zero)

}

Or (And (PDC4, 0x7FFFFFFF), CAP4, PDC4)

If (LEqual (And (PDC4, 0x09), 0x09))

{

\_PR.CPU1.APPT ()

}

If (And (\_SB.OSCP, 0x20))

{

\_PR.CPU1.HWPT ()

}

If (And (PDC4, 0x18))

{

\_PR.CPU1.APCT ()

}

Store (PDC4, PDC0)

Return (Zero)

}

Scope (\_PR.CPU5)

{

Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities

{

Store (\_PR.CPU0.CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities

{

Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS5)

CreateDWordField (Arg0, 0x04, CAP5)

If (LOr (LEqual (STS5, 0x06), LEqual (STS5, 0x0A)))

{

Return (Zero)

}

If (And (STS5, One))

{

And (CAP5, 0x0BFF, CAP5)

Return (Zero)

}

Or (And (PDC5, 0x7FFFFFFF), CAP5, PDC5)

If (LEqual (And (PDC5, 0x09), 0x09))

{

\_PR.CPU1.APPT ()

}

If (And (\_SB.OSCP, 0x20))

{

\_PR.CPU1.HWPT ()

}

If (And (PDC5, 0x18))

{

\_PR.CPU1.APCT ()

}

Store (PDC5, PDC0)

Return (Zero)

}

Scope (\_PR.CPU6)

{

Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities

{

Store (\_PR.CPU0.CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities

{

Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS6)

CreateDWordField (Arg0, 0x04, CAP6)

If (LOr (LEqual (STS6, 0x06), LEqual (STS6, 0x0A)))

{

Return (Zero)

}

If (And (STS6, One))

{

And (CAP6, 0x0BFF, CAP6)

Return (Zero)

}

Or (And (PDC6, 0x7FFFFFFF), CAP6, PDC6)

If (LEqual (And (PDC6, 0x09), 0x09))

{

\_PR.CPU1.APPT ()

}

If (And (\_SB.OSCP, 0x20))

{

\_PR.CPU1.HWPT ()

}

If (And (PDC6, 0x18))

{

\_PR.CPU1.APCT ()

}

Store (PDC6, PDC0)

Return (Zero)

}

Scope (\_PR.CPU7)

{

Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities

{

Store (\_PR.CPU0.CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities

{

Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS7)

CreateDWordField (Arg0, 0x04, CAP7)

If (LOr (LEqual (STS7, 0x06), LEqual (STS7, 0x0A)))

{

Return (Zero)

}

If (And (STS7, One))

{

And (CAP7, 0x0BFF, CAP7)

Return (Zero)

}

Or (And (PDC7, 0x7FFFFFFF), CAP7, PDC7)

If (LEqual (And (PDC7, 0x09), 0x09))

{

\_PR.CPU1.APPT ()

}

If (And (\_SB.OSCP, 0x20))

{

\_PR.CPU1.HWPT ()

}

If (And (PDC7, 0x18))

{

\_PR.CPU1.APCT ()

}

Store (PDC7, PDC0)

Return (Zero)

}

Secondary System Description Table

View File SSDT-7.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* Original Table Header:

* Signature "SSDT"

* Length 0x00000798 (1944)

* Revision 0x01

* Checksum 0xE8

* OEM ID "APPLE "

* OEM Table ID "CpuPm"

* OEM Revision 0x00018200 (98816)

* Compiler ID "INTL"

* Compiler Version 0x20140926 (538183974)

DefinitionBlock ("/Volumes/OS X El Capitan/Users/dima/Downloads/DarwinDumper_v2.9.9.2/DarwinDumperReports/006_2016-05-16_00-24-11_iMac14,2/DarwinDumper_2.9.9.2_AMI_X64_3526_Cap_dima/ACPI Tables/AML/SSDT-7.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00018200)

{

External (_PR_.CPU0, DeviceObj)

External (_PR_.CPU1, DeviceObj)

External (_PR_.CPU2, DeviceObj)

External (_PR_.CPU3, DeviceObj)

Scope (\_PR.CPU0)

{

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store ("ssdtPRGen version....: 18.2 / Mac OS X 10.11.4 (15E65)", Debug)

Store ("custom mode..........: 0", Debug)

Store ("host processor.......: Intel(R) Core(TM) i3-6100 CPU @ 3.70GHz", Debug)

Store ("target processor.....: i3-6100", Debug)

Store ("number of processors.: 1", Debug)

Store ("baseFrequency........: 500", Debug)

Store ("frequency............: 3700", Debug)

Store ("busFrequency.........: 100", Debug)

Store ("logicalCPUs..........: 4", Debug)

Store ("maximum TDP..........: 47", Debug)

Store ("packageLength........: 33", Debug)

Store ("turboStates..........: 0", Debug)

Store ("maxTurboFrequency....: 3700", Debug)

Store ("machdep.xcpm.mode....: 1", Debug)

}

Name (APLF, Zero)

Name (APSN, Zero)

Name (APSS, Package (0x21)

{

Package (0x06)

{

0x0E74,

0xB798,

0x0A,

0x2500,

0x2500

Package (0x06)

{

0x0E10,

0xB09B,

0x0A,

0x2400,

0x2400

Package (0x06)

{

0x0DAC,

0xA9BE,

0x0A,

0x2300,

0x2300

Package (0x06)

{

0x0D48,

0xA301,

0x0A,

0x2200,

0x2200

Package (0x06)

{

0x0CE4,

0x9C63,

0x0A,

0x2100,

0x2100

Package (0x06)

{

0x0C80,

0x95E3,

0x0A,

0x2000,

0x2000

Package (0x06)

{

0x0C1C,

0x8F83,

0x0A,

0x1F00,

0x1F00

Package (0x06)

{

0x0BB8,

0x8940,

0x0A,

0x1E00,

0x1E00

Package (0x06)

{

0x0B54,

0x831C,

0x0A,

0x1D00,

0x1D00

Package (0x06)

{

0x0AF0,

0x7D16,

0x0A,

0x1C00,

0x1C00

Package (0x06)

{

0x0A8C,

0x772E,

0x0A,

0x1B00,

0x1B00

Package (0x06)

{

0x0A28,

0x7163,

0x0A,

0x1A00,

0x1A00

Package (0x06)

{

0x09C4,

0x6BB5,

0x0A,

0x1900,

0x1900

Package (0x06)

{

0x0960,

0x6625,

0x0A,

0x1800,

0x1800

Package (0x06)

{

0x08FC,

0x60B0,

0x0A,

0x1700,

0x1700

Package (0x06)

{

0x0898,

0x5B59,

0x0A,

0x1600,

0x1600

Package (0x06)

{

0x0834,

0x561D,

0x0A,

0x1500,

0x1500

Package (0x06)

{

0x07D0,

0x50FE,

0x0A,

0x1400,

0x1400

Package (0x06)

{

0x076C,

0x4BFA,

0x0A,

0x1300,

0x1300

Package (0x06)

{

0x0708,

0x4712,

0x0A,

0x1200,

0x1200

Package (0x06)

{

0x06A4,

0x4245,

0x0A,

0x1100,

0x1100

Package (0x06)

{

0x0640,

0x3D93,

0x0A,

0x1000,

0x1000

Package (0x06)

{

0x05DC,

0x38FC,

0x0A,

0x0F00,

0x0F00

Package (0x06)

{

0x0578,

0x347F,

0x0A,

0x0E00,

0x0E00

Package (0x06)

{

0x0514,

0x301C,

0x0A,

0x0D00,

0x0D00

Package (0x06)

{

0x04B0,

0x2BD4,

0x0A,

0x0C00,

0x0C00

Package (0x06)

{

0x044C,

0x27A5,

0x0A,

0x0B00,

0x0B00

Package (0x06)

{

0x03E8,

0x2390,

0x0A,

0x0A00,

0x0A00

Package (0x06)

{

0x0384,

0x1F94,

0x0A,

0x0900,

0x0900

Package (0x06)

{

0x0320,

0x1BB1,

0x0A,

0x0800,

0x0800

Package (0x06)

{

0x02BC,

0x17E6,

0x0A,

0x0700,

0x0700

Package (0x06)

{

0x0258,

0x1435,

0x0A,

0x0600,

0x0600

Package (0x06)

{

0x01F4,

0x109B,

0x0A,

0x0500,

0x0500

}

})

Method (ACST, 0, NotSerialized)

{

Store ("Method _PR_.CPU0.ACST Called", Debug)

Store ("CPU0 C-States : 253", Debug)

Return (Package (0x06)

{

One,

0x04,

Package (0x04)

{

ResourceTemplate ()

{

0x01, // Bit Width

0x02, // Bit Offset

0x0000000000000000, // Address

0x01, // Access Size

)

One,

Zero,

0x03E8

Package (0x04)

{

ResourceTemplate ()

{

0x01, // Bit Width

0x02, // Bit Offset

0x0000000000000010, // Address

0x03, // Access Size

)

0x03,

0xCD,

0x01F4

Package (0x04)

{

ResourceTemplate ()

{

0x01, // Bit Width

0x02, // Bit Offset

0x0000000000000020, // Address

0x03, // Access Size

)

0x06,

0xF5,

0x015E

Package (0x04)

{

ResourceTemplate ()

{

0x01, // Bit Width

0x02, // Bit Offset

0x0000000000000030, // Address

0x03, // Access Size

)

0x07,

0xF5,

0xC8

}

})

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

Store ("Method _PR_.CPU0._DSM Called", Debug)

If (LEqual (Arg2, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Return (Package (0x02)

{

"plugin-type",

One

})

}

Scope (\_PR.CPU1)

{

Method (APSS, 0, NotSerialized)

{

Store ("Method _PR_.CPU1.APSS Called", Debug)

Return (\_PR.CPU0.APSS)

}

Method (ACST, 0, NotSerialized)

{

Store ("Method _PR_.CPU1.ACST Called", Debug)

Store ("CPU1 C-States : 31", Debug)

Return (Package (0x07)

{

One,

0x05,

Package (0x04)

{

ResourceTemplate ()

{

0x01, // Bit Width

0x02, // Bit Offset

0x0000000000000000, // Address

0x01, // Access Size

)

One,

0x03E8,

0x03E8

Package (0x04)

{

ResourceTemplate ()

{

0x01, // Bit Width

0x02, // Bit Offset

0x0000000000000010, // Address

0x03, // Access Size

)

0x02,

0x94,

0x01F4

Package (0x04)

{

ResourceTemplate ()

{

0x01, // Bit Width

0x02, // Bit Offset

0x0000000000000030, // Address

0x03, // Access Size

)

0x03,

0xC6,

0xC8

Package (0x04)

{

ResourceTemplate ()

{

0x01, // Bit Width

0x02, // Bit Offset

0x0000000000000040, // Address

0x03, // Access Size

)

0x06,

0xF5,

0x015E

Package (0x04)

{

ResourceTemplate ()

{

0x01, // Bit Width

0x02, // Bit Offset

0x0000000000000050, // Address

0x03, // Access Size

)

0x07,

0xF5,

0xC8

}

})

}

Scope (\_PR.CPU2)

{

Method (APSS, 0, NotSerialized)

{

Store ("Method _PR_.CPU2.APSS Called", Debug)

Return (\_PR.CPU0.APSS)

}

Method (ACST, 0, NotSerialized)

{

Return (\_PR.CPU1.ACST ())

}

Scope (\_PR.CPU3)

{

Method (APSS, 0, NotSerialized)

{

Store ("Method _PR_.CPU3.APSS Called", Debug)

Return (\_PR.CPU0.APSS)

}

Method (ACST, 0, NotSerialized)

{

Return (\_PR.CPU1.ACST ())

}

Secondary System Description Table

View File SSDT-8.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* Original Table Header:

* Signature "SSDT"

* Length 0x00000147 (327)

* Revision 0x01

* Checksum 0x00

* OEM ID "toleda"

* OEM Table ID "100s530"

* OEM Revision 0x00003000 (12288)

* Compiler ID "INTL"

* Compiler Version 0x20141107 (538185991)

DefinitionBlock ("/Volumes/OS X El Capitan/Users/dima/Downloads/DarwinDumper_v2.9.9.2/DarwinDumperReports/006_2016-05-16_00-24-11_iMac14,2/DarwinDumper_2.9.9.2_AMI_X64_3526_Cap_dima/ACPI Tables/AML/SSDT-8.aml", "SSDT", 1, "toleda", "100s530", 0x00003000)

{

External (_SB_.PCI0, DeviceObj)

External (_SB_.PCI0.GFX0._ADR)

External (_SB_.PCI0.HECI._ADR)

Scope (\_SB.PCI0)

{

Name (GFX0._STA, Zero) // _STA: Status

Device (IGPU)

{

Name (_ADR, 0x00020000) // _ADR: Address

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (Zero, \_SB.PCI0.GFX0._ADR)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg2, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Return (Package (0x04)

{

"AAPL,ig-platform-id",

Buffer (0x04)

{

0x00, 0x00, 0x12, 0x19

"hda-gfx",

Buffer (0x0A)

{

"onboard-1"

}

})

}

Name (HECI._STA, Zero) // _STA: Status

Device (IMEI)

{

Name (_ADR, 0x00160000) // _ADR: Address

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (Zero, \_SB.PCI0.HECI._ADR)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg2, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Return (Package (0x02)

{

"device-id",

Buffer (0x04)

{

0x3A, 0xA1, 0x00, 0x00

}

})

}

Store ("ssdt-ami_100_skl-hd530_v2.0 github.com/toleda", Debug)

}

Secondary System Description Table

View File SSDT-9.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* Original Table Header:

* Signature "SSDT"

* Length 0x00000676 (1654)

* Revision 0x01

* Checksum 0x31

* OEM ID "PmRef"

* OEM Table ID "CpuPm"

* OEM Revision 0x00003000 (12288)

* Compiler ID "INTL"

* Compiler Version 0x20120320 (538051360)

DefinitionBlock ("/Volumes/OS X El Capitan/Users/dima/Downloads/DarwinDumper_v2.9.9.2/DarwinDumperReports/006_2016-05-16_00-24-11_iMac14,2/DarwinDumper_2.9.9.2_AMI_X64_3526_Cap_dima/ACPI Tables/AML/SSDT-9.aml", "SSDT", 1, "PmRef", "CpuPm", 0x00003000)

{

External (_PR_.CPU0, DeviceObj)

External (_PR_.CPU1, DeviceObj)

External (_PR_.CPU2, DeviceObj)

External (_PR_.CPU3, DeviceObj)

External (_PR_.CPU4, DeviceObj)

External (_PR_.CPU5, DeviceObj)

External (_PR_.CPU6, DeviceObj)

External (_PR_.CPU7, DeviceObj)

Scope (\_PR.CPU0)

{

Name (PSS, Package (0x1E)

{

Package (0x06)

{

0x00000E74,

0x000073A0,

0x0000000A,

0x00002500,

0x00002500

Package (0x06)

{

0x00000E10,

0x00007080,

0x0000000A,

0x00002400,

0x00002400

Package (0x06)

{

0x00000DAC,

0x00006D60,

0x0000000A,

0x00002300,

0x00002300

Package (0x06)

{

0x00000D48,

0x00006A40,

0x0000000A,

0x00002200,

0x00002200

Package (0x06)

{

0x00000CE4,

0x00006720,

0x0000000A,

0x00002100,

0x00002100

Package (0x06)

{

0x00000C80,

0x00006400,

0x0000000A,

0x00002000,

0x00002000

Package (0x06)

{

0x00000C1C,

0x000060E0,

0x0000000A,

0x00001F00,

0x00001F00

Package (0x06)

{

0x00000BB8,

0x00005DC0,

0x0000000A,

0x00001E00,

0x00001E00

Package (0x06)

{

0x00000B54,

0x00005AA0,

0x0000000A,

0x00001D00,

0x00001D00

Package (0x06)

{

0x00000AF0,

0x00005780,

0x0000000A,

0x00001C00,

0x00001C00

Package (0x06)

{

0x00000A8C,

0x00005460,

0x0000000A,

0x00001B00,

0x00001B00

Package (0x06)

{

0x00000A28,

0x00005140,

0x0000000A,

0x00001A00,

0x00001A00

Package (0x06)

{

0x000009C4,

0x00004E20,

0x0000000A,

0x00001900,

0x00001900

Package (0x06)

{

0x00000960,

0x00004B00,

0x0000000A,

0x00001800,

0x00001800

Package (0x06)

{

0x000008FC,

0x000047E0,

0x0000000A,

0x00001700,

0x00001700

Package (0x06)

{

0x00000898,

0x000044C0,

0x0000000A,

0x00001600,

0x00001600

Package (0x06)

{

0x00000834,

0x000041A0,

0x0000000A,

0x00001500,

0x00001500

Package (0x06)

{

0x000007D0,

0x00003E80,

0x0000000A,

0x00001400,

0x00001400

Package (0x06)

{

0x0000076C,

0x00003B60,

0x0000000A,

0x00001300,

0x00001300

Package (0x06)

{

0x00000708,

0x00003840,

0x0000000A,

0x00001200,

0x00001200

Package (0x06)

{

0x000006A4,

0x00003520,

0x0000000A,

0x00001100,

0x00001100

Package (0x06)

{

0x00000640,

0x00003200,

0x0000000A,

0x00001000,

0x00001000

Package (0x06)

{

0x000005DC,

0x00002EE0,

0x0000000A,

0x00000F00,

0x00000F00

Package (0x06)

{

0x00000578,

0x00002BC0,

0x0000000A,

0x00000E00,

0x00000E00

Package (0x06)

{

0x00000514,

0x000028A0,

0x0000000A,

0x00000D00,

0x00000D00

Package (0x06)

{

0x000004B0,

0x00002580,

0x0000000A,

0x00000C00,

0x00000C00

Package (0x06)

{

0x0000044C,

0x00002260,

0x0000000A,

0x00000B00,

0x00000B00

Package (0x06)

{

0x000003E8,

0x00001F40,

0x0000000A,

0x00000A00,

0x00000A00

Package (0x06)

{

0x00000384,

0x00001C20,

0x0000000A,

0x00000900,

0x00000900

Package (0x06)

{

0x00000320,

0x00001900,

0x0000000A,

0x00000800,

0x00000800

}

})

Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States

{

Return (PSS)

}

Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilites

{

Return (Zero)

}

Name (PCT, Package (0x02)

{

ResourceTemplate ()

{

0x00, // Bit Width

0x00, // Bit Offset

0x0000000000000000, // Address

ResourceTemplate ()

{

0x00, // Bit Width

0x00, // Bit Offset

0x0000000000000000, // Address

}

})

Method (_PCT, 0, NotSerialized) // _PCT: Performance Control

{

Return (PCT)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg2, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Return (Package (0x02)

{

"plugin-type",

One

})

}

Name (APSN, Zero)

Name (APLF, Zero)

}

Scope (\_PR.CPU1)

{

Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States

{

Return (\_PR.CPU0.PSS)

}

Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilites

{

Return (Zero)

}

Method (_PCT, 0, NotSerialized) // _PCT: Performance Control

{

Return (\_PR.CPU0.PCT)

}

Scope (\_PR.CPU2)

{

Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States

{

Return (\_PR.CPU0.PSS)

}

Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilites

{

Return (Zero)

}

Method (_PCT, 0, NotSerialized) // _PCT: Performance Control

{

Return (\_PR.CPU0.PCT)

}

Scope (\_PR.CPU3)

{

Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States

{

Return (\_PR.CPU0.PSS)

}

Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilites

{

Return (Zero)

}

Method (_PCT, 0, NotSerialized) // _PCT: Performance Control

{

Return (\_PR.CPU0.PCT)

}

Scope (\_PR.CPU4)

{

Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States

{

Return (\_PR.CPU0.PSS)

}

Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilites

{

Return (Zero)

}

Method (_PCT, 0, NotSerialized) // _PCT: Performance Control

{

Return (\_PR.CPU0.PCT)

}

Scope (\_PR.CPU5)

{

Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States

{

Return (\_PR.CPU0.PSS)

}

Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilites

{

Return (Zero)

}

Method (_PCT, 0, NotSerialized) // _PCT: Performance Control

{

Return (\_PR.CPU0.PCT)

}

Scope (\_PR.CPU6)

{

Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States

{

Return (\_PR.CPU0.PSS)

}

Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilites

{

Return (Zero)

}

Method (_PCT, 0, NotSerialized) // _PCT: Performance Control

{

Return (\_PR.CPU0.PCT)

}

Scope (\_PR.CPU7)

{

Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States

{

Return (\_PR.CPU0.PSS)

}

Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilites

{

Return (Zero)

}

Method (_PCT, 0, NotSerialized) // _PCT: Performance Control

{

Return (\_PR.CPU0.PCT)

}

Secondary System Description Table

View File SSDT.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* Original Table Header:

* Signature "SSDT"

* Length 0x0000036D (877)

* Revision 0x01

* Checksum 0x3A

* OEM ID "SataRe"

* OEM Table ID "SataTabl"

* OEM Revision 0x00001000 (4096)

* Compiler ID "INTL"

* Compiler Version 0x20120913 (538052883)

DefinitionBlock ("/Volumes/OS X El Capitan/Users/dima/Downloads/DarwinDumper_v2.9.9.2/DarwinDumperReports/006_2016-05-16_00-24-11_iMac14,2/DarwinDumper_2.9.9.2_AMI_X64_3526_Cap_dima/ACPI Tables/AML/SSDT.aml", "SSDT", 1, "SataRe", "SataTabl", 0x00001000)

{

External (_SB_.PCI0.SAT0, DeviceObj)

External (DSSP)

External (FHPP)

Scope (\)

{

Name (STFE, Buffer (0x07)

{

0x10, 0x06, 0x00, 0x00, 0x00, 0x00, 0xEF

})

Name (STFD, Buffer (0x07)

{

0x90, 0x06, 0x00, 0x00, 0x00, 0x00, 0xEF

})

Name (FZTF, Buffer (0x07)

{

0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF5

})

Name (DCFL, Buffer (0x07)

{

0xC1, 0x00, 0x00, 0x00, 0x00, 0x00, 0xB1

})

Name (SCBF, Buffer (0x15) {})

Name (CMDC, Zero)

Method (GTFB, 2, Serialized)

{

Multiply (CMDC, 0x38, Local0)

CreateField (SCBF, Local0, 0x38, CMDX)

Multiply (CMDC, 0x07, Local0)

CreateByteField (SCBF, Add (Local0, One), A001)

Store (Arg0, CMDX)

Store (Arg1, A001)

Increment (CMDC)

}

Scope (\_SB.PCI0.SAT0)

{

Name (REGF, One)

Method (_REG, 2, NotSerialized) // _REG: Region Availability

{

If (LEqual (Arg0, 0x02))

{

Store (Arg1, REGF)

}

Name (TMD0, Buffer (0x14) {})

CreateDWordField (TMD0, Zero, PIO0)

CreateDWordField (TMD0, 0x04, DMA0)

CreateDWordField (TMD0, 0x08, PIO1)

CreateDWordField (TMD0, 0x0C, DMA1)

CreateDWordField (TMD0, 0x10, CHNF)

Method (_GTM, 0, NotSerialized) // _GTM: Get Timing Mode

{

Store (0x78, PIO0)

Store (0x14, DMA0)

Store (0x78, PIO1)

Store (0x14, DMA1)

Or (CHNF, 0x05, CHNF)

Return (TMD0)

}

Method (_STM, 3, NotSerialized) // _STM: Set Timing Mode

{

}

Device (SPT0)

{

Name (_ADR, 0xFFFF) // _ADR: Address

Method (_GTF, 0, NotSerialized) // _GTF: Get Task File

{

Store (Zero, CMDC)

If (LOr (DSSP, FHPP))

{

GTFB (STFD, 0x06)

}

Else

{

GTFB (STFE, 0x06)

}

GTFB (FZTF, Zero)

GTFB (DCFL, Zero)

Return (SCBF)

}

Device (SPT1)

{

Name (_ADR, 0x0001FFFF) // _ADR: Address

Method (_GTF, 0, NotSerialized) // _GTF: Get Task File

{

Store (Zero, CMDC)

If (LOr (DSSP, FHPP))

{

GTFB (STFD, 0x06)

}

Else

{

GTFB (STFE, 0x06)

}

GTFB (FZTF, Zero)

GTFB (DCFL, Zero)

Return (SCBF)

}

Device (SPT2)

{

Name (_ADR, 0x0002FFFF) // _ADR: Address

Method (_GTF, 0, NotSerialized) // _GTF: Get Task File

{

Store (Zero, CMDC)

If (LOr (DSSP, FHPP))

{

GTFB (STFD, 0x06)

}

Else

{

GTFB (STFE, 0x06)

}

GTFB (FZTF, Zero)

GTFB (DCFL, Zero)

Return (SCBF)

}

Device (SPT3)

{

Name (_ADR, 0x0003FFFF) // _ADR: Address

Method (_GTF, 0, NotSerialized) // _GTF: Get Task File

{

Store (Zero, CMDC)

If (LOr (DSSP, FHPP))

{

GTFB (STFD, 0x06)

}

Else

{

GTFB (STFE, 0x06)

}

GTFB (FZTF, Zero)

GTFB (DCFL, Zero)

Return (SCBF)

}

Device (SPT4)

{

Name (_ADR, 0x0004FFFF) // _ADR: Address

Method (_GTF, 0, NotSerialized) // _GTF: Get Task File

{

Store (Zero, CMDC)

If (LOr (DSSP, FHPP))

{

GTFB (STFD, 0x06)

}

Else

{

GTFB (STFE, 0x06)

}

GTFB (FZTF, Zero)

GTFB (DCFL, Zero)

Return (SCBF)

}

Device (SPT5)

{

Name (_ADR, 0x0005FFFF) // _ADR: Address

Method (_GTF, 0, NotSerialized) // _GTF: Get Task File

{

Store (Zero, CMDC)

If (LOr (DSSP, FHPP))

{

GTFB (STFD, 0x06)

}

Else

{

GTFB (STFE, 0x06)

}

GTFB (FZTF, Zero)

GTFB (DCFL, Zero)

Return (SCBF)

}

UEFI ACPI Data Table

View File UEFI.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [UEFI]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "UEFI" [UEFI Boot Optimization Table]

[004h 0004 4] Table Length : 00000042

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : 0C

[00Ah 0010 6] Oem ID : ""

[010h 0016 8] Oem Table ID : ""

[018h 0024 4] Oem Revision : 00000000

[01Ch 0028 4] Asl Compiler ID : ""

[020h 0032 4] Asl Compiler Revision : 00000000

[024h 0036 16] UUID Identifier : C68ED8E2-9DC6-4CBD-9D94-DB65ACC5C332

[034h 0052 2] Data Offset : 0036

Raw Table Data: Length 66 (0x42)

0000: 55 45 46 49 42 00 00 00 01 0C 00 00 00 00 00 00 UEFIB...........

0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

0020: 00 00 00 00 E2 D8 8E C6 C6 9D BD 4C 9D 94 DB 65 ...........L...e

0030: AC C5 C3 32 36 00 01 00 00 00 00 00 00 00 00 00 ...26...........

0040: 00 00 ..

Dumped using getcodecid by Andy Vandijck. Further developed by InsanelyDeepak, ErmaC and Micky1979.

View File AudioCodecID.txt

----------------------------------------

AppleHDA

Codec: Realtek ALC892 [10ec:0892] Rev.[00100302]

Controller: Intel Corporation Sunrise Point-H HD Audio

----------------------------------------

AppleHDA

Codec: Intel [Unknown] [8086:2809] Rev.[00100000]

Controller: Intel Corporation Sunrise Point-H HD Audio

Dumped using VoodooHDA's getdump tool

View File VoodooHDAGetdump.txt

VoodooHDA's getdump tool failed to produce a dump.

NOTE: AppleHDA was loaded when this dump was attempted.

If you wish to get a successful dump using VoodooHDA and it's associated getdump tool then AppleHDA will have to be disabled.

The simplest option to do that will be to add AppleHDADisabler.kext to your system, rebuild caches and reboot. Then try this dump again.

Boot Log

Dumped using the bdmesg tool. Created by Kabyl, modified by JrCs from an idea by STLVNUB

View AMI_X64_3526_BootLog.txt File

0:100 0:100 MemLog inited, TSC freq: 3696503880

0:100 0:000 MemLog was calibrated without ACPI PM Timer: ACPI I/O space is not enabled.

0:100 0:000

0:100 0:000 Now is 15.5.2016, 21:16:41 (GMT)

0:100 0:000 Starting Clover rev 3526 on American Megatrends EFI

0:100 0:000 Build with: [Args: ./ebuild.sh | Command: build -D USE_LOW_EBDA -p Clover/Clover.dsc -a X64 -b RELEASE -t XCODE5 -n 3 | OS: 10.7.5 | XCODE: 4.4.1]

0:100 0:000 SelfDevicePath=PciRoot(0x0)\Pci(0x17,0x0)\Sata(0x0,0xFFFF,0x0)\HD(1,GPT,92169896-05EF-4C3F-9CC1-E51D3A268E8A,0x28,0x64000) @85C75A98

0:100 0:000 SelfDirPath = \EFI\BOOT

0:100 0:000 Total Memory Slots Count = 4

0:100 0:000 Type 17 Index = 0

0:100 0:000 Ignoring insane frequency value 0MHz

0:100 0:000 SmbiosTable.Type17->Speed = 0MHz

0:100 0:000 SmbiosTable.Type17->Size = 0MB

0:100 0:000 SmbiosTable.Type17->Bank/Device = BANK 0 ChannelA-DIMM0

0:100 0:000 SmbiosTable.Type17->Vendor = <null string>

0:100 0:000 SmbiosTable.Type17->SerialNumber = <null string>

0:100 0:000 SmbiosTable.Type17->PartNumber = <null string>

0:100 0:000 Type 17 Index = 1

0:100 0:000 SmbiosTable.Type17->Speed = 2400MHz

0:100 0:000 SmbiosTable.Type17->Size = 8192MB

0:100 0:000 SmbiosTable.Type17->Bank/Device = BANK 1 ChannelA-DIMM1

0:100 0:000 SmbiosTable.Type17->Vendor = Kingston

0:100 0:000 SmbiosTable.Type17->SerialNumber = 23422223

0:100 0:000 SmbiosTable.Type17->PartNumber = KHX2400C15D4/8G

0:100 0:000 Type 17 Index = 2

0:100 0:000 Ignoring insane frequency value 0MHz

0:100 0:000 SmbiosTable.Type17->Speed = 0MHz

0:100 0:000 SmbiosTable.Type17->Size = 0MB

0:100 0:000 SmbiosTable.Type17->Bank/Device = BANK 2 ChannelB-DIMM0

0:100 0:000 SmbiosTable.Type17->Vendor = <null string>

0:100 0:000 SmbiosTable.Type17->SerialNumber = <null string>

0:100 0:000 SmbiosTable.Type17->PartNumber = <null string>

0:100 0:000 Type 17 Index = 3

0:100 0:000 SmbiosTable.Type17->Speed = 2400MHz

0:100 0:000 SmbiosTable.Type17->Size = 8192MB

0:100 0:000 SmbiosTable.Type17->Bank/Device = BANK 3 ChannelB-DIMM1

0:100 0:000 SmbiosTable.Type17->Vendor = Kingston

0:100 0:000 SmbiosTable.Type17->SerialNumber = 24415790

0:100 0:000 SmbiosTable.Type17->PartNumber = KHX2400C15D4/8G

0:100 0:000 Boot status=0

0:100 0:000 Clover revision: 3526 running on MS-7970

0:100 0:000 ... with board Z170A-G43 PLUS (MS-7970)

0:100 0:000 CPU Vendor = 756E6547 Model=506E3

0:100 0:000 got cores from CPUID_1 = 0

0:100 0:000 The CPU not supported turbo

0:100 0:000 BrandString = Intel(R) Core(TM) i3-6100 CPU @ 3.70GHz

0:100 0:000 TSC/CCC Information Leaf:

0:100 0:000 numerator : 308

0:100 0:000 denominator : 2

0:100 0:000 Calibrated ARTFrequency: 24003271

0:100 0:000 MSR 0xE2 before patch 00008000

0:100 0:000 MSR 0xE2 is locked, PM patches will be turned on

0:100 0:000 MSR 0xE4 00000000

0:100 0:000 MSR 0xCE 00080838_F1012500

0:100 0:000 non-usable FLEX_RATIO = 10000

0:100 0:000 corrected FLEX_RATIO = 0

0:100 0:000 MSR 0x1B0 00000000

0:100 0:000 FSBFrequency=100MHz DMIvalue=100000kHz

0:100 0:000 Corrected FSBFrequency=100MHz

0:100 0:000 Vendor/Model/Stepping: 0x756E6547/0x5E/0x3

0:100 0:000 Family/ExtFamily: 0x6/0x0

0:100 0:000 MaxDiv/MinDiv: 37.0/8

0:100 0:000 Turbo: 37/37/37/37

0:100 0:000 Features: 0xBFEBFBFF

0:100 0:000 Threads: 4

0:100 0:000 Cores: 2

0:100 0:000 FSB: 100 MHz

0:100 0:000 CPU: 3700 MHz

0:100 0:000 TSC: 3700 MHz

0:100 0:000 PIS: 400 MHz

0:100 0:000 PCI (00|00:00.00) : 8086 190F class=060000

0:100 0:000 PCI (00|00:02.00) : 8086 1912 class=030000

0:100 0:000 Found GFX model=Intel HD Graphics 530

0:100 0:000 PCI (00|00:08.00) : 8086 1911 class=088000

0:100 0:000 PCI (00|00:14.00) : 8086 A12F class=0C0330

0:100 0:000 PCI (00|00:14.02) : 8086 A131 class=118000

0:100 0:000 PCI (00|00:15.00) : 8086 A160 class=118000

0:100 0:000 PCI (00|00:15.01) : 8086 A161 class=118000

0:100 0:000 PCI (00|00:16.00) : 8086 A13A class=078000

0:100 0:000 PCI (00|00:17.00) : 8086 A102 class=010601

0:100 0:000 PCI (00|00:1D.00) : 8086 A118 class=060400

0:100 0:000 PCI (00|01:00.00) : 1B21 1242 class=0C0330

0:100 0:000 PCI (00|00:1D.02) : 8086 A11A class=060400

0:100 0:000 PCI (00|02:00.00) : 10EC 8168 class=020000

0:100 0:000 LAN 0, Vendor=10EC, MMIO=E000

0:100 0:000 PCI (00|00:1D.03) : 8086 A11B class=060400

0:100 0:000 PCI (00|03:00.00) : 1B21 1080 class=060400

0:100 0:000 PCI (00|00:1E.00) : 8086 A127 class=118000

0:100 0:000 PCI (00|00:1F.00) : 8086 A145 class=060100

0:100 0:000 PCI (00|00:1F.02) : 8086 A121 class=058000

0:100 0:000 PCI (00|00:1F.03) : 8086 A170 class=040300

0:100 0:000 PCI (00|00:1F.04) : 8086 A123 class=0C0500

0:100 0:000 Clover load options size = 0 bytes

0:107 0:006 Using OEM config.plist at path: EFI\CLOVER\OEM\MS-7970\config.plist

0:107 0:000 EFI\CLOVER\OEM\MS-7970\config.plist loaded: Success

0:110 0:002 Found theme directory: applestyle

0:112 0:002 Found theme directory: BGM

0:114 0:002 Found theme directory: black_green

0:116 0:001 Found theme directory: bluemac

0:117 0:001 Found theme directory: bootcamp

0:118 0:000 Found theme directory: embedded

0:119 0:000 Found theme directory: iclover

0:119 0:000 Found theme directory: magnifico

0:121 0:001 Found theme directory: metal

0:123 0:002 Found theme directory: mrengles

0:124 0:001 Found theme directory: orange

0:125 0:000 Found theme directory: os_box

0:126 0:001 Found theme directory: os_one

0:127 0:000 Found theme directory: random

0:127 0:000 Found theme directory: Shield

0:132 0:004 Found theme directory: steampunkblack

0:134 0:001 Found theme directory: thinkpad

0:135 0:000 Loading early settings

0:135 0:000 timeout set to 5

0:135 0:000 Custom boot CUSTOM_BOOT_DISABLED (0x0)

0:135 0:000 KextsToPatch: 11 requested

0:135 0:000 KextsToPatch 0: AppleAPIC (Skylake Apple APIC Patch) Kext bin patch, data len: 6

0:135 0:000 KextsToPatch 1: AppleIntelSKLGraphicsFramebuffer (10.11-SKL-1912000-4_displays) Kext bin patch, data len: 4

0:135 0:000 KextsToPatch 2: AppleUSBXHCIPCI (Change 15 port limit to 26 in AppleUSBXHCIPCI) Kext bin patch, data len: 7

0:135 0:000 KextsToPatch 3: AppleIntelSKLGraphicsFramebuffer (HD530 Port 5 HDMI fix) :: patch disabled, skipped

0:135 0:000 KextsToPatch 4: AppleIntelSKLGraphicsFramebuffer (HD530 Port 6 HDMI fix) :: patch disabled, skipped

0:135 0:000 KextsToPatch 5: AppleIntelSKLGraphicsFramebuffer (HD530 Port 7 DVI fix) :: patch disabled, skipped

0:135 0:000 KextsToPatch 6: AppleHDA (t1-10.11-AppleHDA/Realtek ALC...) :: patch disabled, skipped

0:135 0:000 KextsToPatch 7: AppleHDA (t1-10.9-10.11-AppleHDA/Realtek ALC892) :: patch disabled, skipped

0:135 0:000 KextsToPatch 8: AppleHDA (t1-AppleHDA/Resources/xml>zml) :: patch disabled, skipped

0:135 0:000 KextsToPatch 9: IOBluetoothFamily (10.11-BT4LE-Handoff-Hotspot-lisai9093) :: patch disabled, skipped

0:135 0:000 KextsToPatch 10: AppleUSBXHCIPCI (Raise USB Port Limit) :: patch disabled, skipped

0:135 0:000 Default theme: bluemac

0:135 0:000 LoadDrivers() start

0:135 0:000 Loading FSInject-64.efi status=Success

0:136 0:000 Loading HFSPlus.efi status=Success

0:136 0:000 - driver needs connecting

0:136 0:000 Loading OsxFatBinaryDrv-64.efi status=Success

0:137 0:000 Loading OsxAptioFixDrv-64.efi status=Success

0:139 0:001 1 drivers needs connecting ...

0:139 0:000 PlatformDriverOverrideProtocol->GetDriver overriden

0:139 0:000 HFS+ driver loaded

0:139 0:000 Searching for invalid DiskIo BY_DRIVER connects: not found, all ok

0:255 0:116 LoadDrivers() end

0:255 0:000 Dump SMC keys from NVRAM:

0:267 0:012 SetScreenResolution: 1920x1080 - setting Mode 4

0:492 0:225 Video mode change to mode #4: Success

0:492 0:000 Console modes reported: 4, available modes:

0:492 0:000 Mode 1: 80x25

0:492 0:000 Mode 2: 80x50

0:492 0:000 Mode 3: 100x31

0:492 0:000 Mode 4: 128x40 (current mode)

0:492 0:000 reinit: self device path=PciRoot(0x0)\Pci(0x17,0x0)\Sata(0x0,0xFFFF,0x0)\HD(1,GPT,92169896-05EF-4C3F-9CC1-E51D3A268E8A,0x28,0x64000)

0:597 0:104 MAC address of LAN #0= D8:CB:8A:C6:44:F0:

0:597 0:000 ScanSPD() start

0:597 0:000 ScanSPD() end

0:597 0:000 Get Acpi Tables List from RSDT:

0:597 0:000 Found table: FACP A M I len=132

0:597 0:000 Found table: APIC A M I len=132

0:597 0:000 Found table: FPDT A M I len=68

0:597 0:000 Found table: FIDT A M I len=156

0:597 0:000 Found table: MCFG A M I len=60

0:597 0:000 Found table: HPET A M I len=56

0:597 0:000 Found table: SSDT SataTabl len=877

0:597 0:000 Found table: LPIT SKL len=148

0:597 0:000 Found table: SSDT sensrhub len=584

0:597 0:000 Found table: SSDT PtidDevc len=11182

0:597 0:000 Found table: SSDT Ther_Rvp len=3141

0:597 0:000 Found table: DBGP len=52

0:597 0:000 Found table: DBG2 len=84

0:597 0:000 Found table: SSDT xh_rvp08 len=1560

0:597 0:000 Found table: SSDT SaSsdt len=21426

0:597 0:000 Found table: UEFI len=66

0:597 0:000 Found table: SSDT CpuSsdt len=3738

0:597 0:000 Found table: BGRT A M I len=56

0:597 0:000 Calibrated TSC frequency =3696503880 =3696MHz

0:597 0:000 Loading main settings

0:597 0:000 USB FixOwnership: true

0:597 0:000 Dropping 2 tables

0:597 0:000 Drop table 0 signature="SSDT" (54445353) table-id="CpuPm" (0000006D50757043)

0:597 0:000 set table: 54445353, 6D50757043 to drop:

0:597 0:000 Drop table 1 signature="SSDT" (54445353) table-id="Cpu0Ist" (0074734930757043)

0:597 0:000 set table: 54445353, 74734930757043 to drop:

0:597 0:000 Config set Fixes will override FixMask mask!

0:597 0:000 final mask=00000000

0:597 0:000 PatchesDSDT: 4 requested

0:597 0:000 patch disabled, skipped

0:597 0:000 DSDT bin patch #2 lenToFind=4 lenToReplace=4

0:597 0:000 patch disabled, skipped

0:597 0:000 Config set ChassisType=0xD

0:597 0:000 Config set QPI=100MHz

0:601 0:003 found 3 volumes with blockIO

0:601 0:000 0. Volume:

0:601 0:000 PciRoot(0x0)\Pci(0x17,0x0)\Sata(0x0,0xFFFF,0x0)

0:602 0:000 Result of bootcode detection: bootable unknown (legacy)

0:602 0:000 1. Volume:

0:602 0:000 PciRoot(0x0)\Pci(0x17,0x0)\Sata(0x0,0xFFFF,0x0)\HD(1,GPT,92169896-05EF-4C3F-9CC1-E51D3A268E8A,0x28,0x64000)

0:602 0:000 Result of bootcode detection: bootable Clover (clover)

0:603 0:000 This is SelfVolume !!

0:603 0:000 2. Volume:

0:603 0:000 PciRoot(0x0)\Pci(0x17,0x0)\Sata(0x0,0xFFFF,0x0)\HD(2,GPT,FF030026-C74D-49A8-A1FF-DB78579DDE32,0x64800,0xDEF0388)

0:604 0:000 Using theme 'bluemac' (EFI\CLOVER\themes\bluemac)

0:604 0:000 OS main and drive as badge

0:606 0:002 Choosing theme bluemac

0:607 0:000 Custom entries start

0:607 0:000 Custom entries finish

0:607 0:000 Scanning loaders...

0:607 0:000 0: 'Whole Disc Boot' no file system

0:607 0:000 1: 'EFI'

0:622 0:015 2: 'OS X El Capitan'

0:625 0:003 AddLoaderEntry for Volume Name=OS X El Capitan

0:627 0:002 Check if volume Is Hibernated:

0:627 0:000 Check sleep image 'by signature':

0:634 0:006 read prefs \Library\Preferences\SystemConfiguration\com.apple.PowerManagement.plist status=Success

0:634 0:000 SleepImage name from pref: ImageVolume = 'OS X El Capitan', ImageName = '\private\var\vm\sleepimage'

0:636 0:001 Reading first 512 bytes of sleepimage ...

0:636 0:000 OurBlockIoRead: Lba=7E1A480, Offset=FC3490000 (BlockSize=512)

0:636 0:000 sig lion: 0

0:636 0:000 sig snow: 0

0:636 0:000 no valid sleep image offset was found

0:636 0:000 Reading completed -> Success

0:636 0:000 sleepimage offset could not be acquired

0:636 0:000 hibernated: no - sign

0:642 0:005 Custom legacy start

0:642 0:000 Custom legacy end

0:642 0:000 Scanning legacy ...

0:642 0:000 0: 'Whole Disc Boot' (legacy) not legacy

0:642 0:000 1: 'EFI' (clover) add legacy

0:642 0:000 added 'Boot Clover from EFI' OSType=3 Icon=clover

0:642 0:000 2: 'OS X El Capitan' (legacy) not legacy

0:642 0:000 Custom tool start

0:642 0:000 Custom tool end

0:644 0:001 found tool \EFI\CLOVER\tools\Shell64U.efi

0:644 0:000 Checking EFI partition Volume 1 for Clover

0:644 0:000 Found Clover

0:644 0:000 GetEfiBootDeviceFromNvram: efi-boot-device-data not found

0:644 0:000 EfiBootVolume not found

0:644 0:000 found entry 0. 'Boot Mac OS X from OS X El Capitan', Volume 'OS X El Capitan', DevicePath 'PciRoot(0x0)\Pci(0x17,0x0)\Sata(0x0,0xFFFF,0x0)\HD(2,GPT,FF030026-C74D-49A8-A1FF-DB78579DDE32,0x64800,0xDEF0388)\System\Library\CoreServices\boot.efi'

0:644 0:000 DefaultIndex=0 and MainMenu.EntryCount=8

0:644 0:000 Use anime=rotary_logo_bluemac frames=4

0:729 0:084 Found Mouse device:

0:730 0:000 GUI ready

3:967 3:236 Boot option Boot0000 not found

3:967 0:000 StartLoader() start

3:967 0:000 Entry->Settings: <null string>

3:967 0:000 Finally: Bus=99905kHz CPU=3697MHz

3:967 0:000 KernelAndKextPatches copyed to started entry

3:967 0:000 Kernel and Kext Patches at 8279FA22:

3:967 0:000 Allowed: y

3:967 0:000 Debug: n

3:967 0:000 KernelCpu: n

3:967 0:000 Lapic: n

3:967 0:000 Haswell-E: n

3:967 0:000 AICPUPM: y

3:967 0:000 AppleRTC: y

3:967 0:000 KernelPm: y

3:967 0:000 FakeCPUID: 0x0

3:967 0:000 ATIController: null

3:967 0:000 ATIDataLength: 0

3:967 0:000 0 Kexts to load

3:967 0:000 3 Kexts to patch

3:967 0:000 KextPatch[0]: 6 bytes, AppleAPIC

3:967 0:000 KextPatch[1]: 4 bytes, AppleIntelSKLGraphicsFramebuffer

3:967 0:000 KextPatch[2]: 7 bytes, AppleUSBXHCIPCI

3:967 0:000 Loading boot.efi status=Success

4:030 0:063 GetOSVersion: : 10.11.4

4:030 0:000 insert table 9 for dev 0:0

4:030 0:000 Injecting user memory modules to SMBIOS

4:030 0:000 Channels: 1

4:030 0:000 Interleave: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

4:030 0:000 BANK0 DIMM0 2600MHz 8192MB

4:030 0:000 BANK1 DIMM1 2600MHz 8192MB

4:030 0:000 mTotalSystemMemory = 16384

4:030 0:000 NumberOfMemoryDevices = 2

4:030 0:000 Type20[0]->End = 0x7FFFFF, Type17[0] = 0x2000

4:030 0:000 Type20[1]->End = 0xFFFFFF, Type17[1] = 0x6000

4:030 0:000 Table 131 is present, CPUType=10

4:030 0:000 Change to: 905

4:030 0:000 RSDT 0x88AC3028

4:030 0:000 FADT from RSDT: 0x88AC3160

4:030 0:000 XSDT 0x88AC3098

4:030 0:000 FADT from XSDT: 0x88AE5BA8

4:030 0:000 Xsdt reallocation done

4:030 0:000 old FADT length=10C

4:030 0:000 Apply DsdtFixMask=0x00000000 old way

4:030 0:000 drop _DSM mask=0x0000

4:030 0:000 ========= Auto patch DSDT Starting ========

4:030 0:000 VideoCard devID=0x19128086

4:030 0:000 DisplayADR1[0] = 0x20000, DisplayADR2[0] = 0xFFFE

4:030 0:000 USBADR[0] = 0x140000 and PCIe = 0xFFFE

4:031 0:000 USBADR[1] = 0x1D0000 and PCIe = 0x0

4:044 0:013 Audio HDA (addr:0x1F0003) setting specified layout-id=3 (0x3)

4:044 0:000 Patch pattern 48444153 :: patched at: [ (A0D5) (19D1) (86) (D) (A1) (6A) ]

4:044 0:000 first CPU found at 8AA3 offset 8AA6

4:044 0:000 score candidate at 8A9F

4:044 0:000 score inserted in acpi_cpu_score _PR_

4:044 0:000 Found ACPI CPU: CPU0 And CPU1 And CPU2 And CPU3 And CPU4 And CPU5 And CPU6 And CPU7

within the score: _PR_

4:045 0:000 Found PCIROOTUID = 0

4:045 0:000 ========= Auto patch DSDT Finished ========

4:045 0:000 Patch table: SSDT SataTabl

4:045 0:000 SSDT len = 0x36D

4:045 0:000 Patch pattern 48444153 :: bin not found!

4:045 0:000 Patch table: SSDT sensrhub

4:045 0:000 SSDT len = 0x248

4:045 0:000 Patch pattern 48444153 :: bin not found!

4:045 0:000 Patch table: SSDT PtidDevc

4:045 0:000 SSDT len = 0x2BAE

4:045 0:000 Patch pattern 48444153 :: bin not found!

4:045 0:000 Patch table: SSDT Ther_Rvp

4:045 0:000 SSDT len = 0xC45

4:045 0:000 Patch pattern 48444153 :: bin not found!

4:045 0:000 Patch table: SSDT xh_rvp08

4:045 0:000 SSDT len = 0x618

4:045 0:000 Patch pattern 48444153 :: bin not found!

4:045 0:000 Patch table: SSDT SaSsdt

4:045 0:000 SSDT len = 0x53B2

4:045 0:000 Patch pattern 48444153 :: bin not found!

4:045 0:000 Patch table: SSDT CpuSsdt

4:045 0:000 SSDT len = 0xE9A

4:045 0:000 Patch pattern 48444153 :: bin not found!

4:045 0:000 Drop tables from Xsdt, SIGN=XXXX TableID= Length=0

4:045 0:000 Xsdt has tables count=18

4:045 0:000 corrected XSDT length=180

4:045 0:000 Start: Processing Patched AML(s): Unsorted

4:045 0:000 Inserting SSDT.aml from EFI\CLOVER\OEM\MS-7970\ACPI\patched ... Success

4:046 0:000 Inserting SSDT-1.aml from EFI\CLOVER\OEM\MS-7970\ACPI\patched ... Success

4:047 0:001 End: Processing Patched AML(s)

4:047 0:000 CPUBase=0 and ApicCPUBase=1 ApicCPUNum=1

4:047 0:000 Maximum control=0x25

4:047 0:000 P-States: min 0x8, max 0x25

4:047 0:000 SSDT with CPU P-States generated successfully

4:047 0:000 SSDT with CPU C-States generated successfully

4:047 0:000 EdidDiscovered size=128

4:047 0:000 00 | 00 FF FF FF FF FF FF 00 4C 2D 7A 08 00 00 00 00

4:047 0:000 16 | 19 15 01 03 80 3C 22 78 0A BA 41 A1 59 55 9D 28

4:047 0:000 32 | 0D 50 54 BF EF 80 71 4F 81 00 81 40 81 80 95 00

4:047 0:000 48 | 95 0F B3 00 01 01 02 3A 80 18 71 38 2D 40 58 2C

4:047 0:000 64 | 45 00 56 50 21 00 00 1E 66 21 50 B0 51 00 1B 30

4:047 0:000 80 | 40 70 36 00 56 50 21 00 00 1E 00 00 00 FD 00 18

4:047 0:000 96 | 4B 1A 51 17 00 0A 20 20 20 20 20 20 00 00 00 FC

4:047 0:000 112 | 00 53 4D 54 32 37 41 33 30 30 0A 20 20 20 01 D0

4:047 0:000 Intel GFX injection not set

4:048 0:000 LAN Controller [10EC:8168] :: PciRoot(0x0)\Pci(0x1D,0x2)\Pci(0x0,0x0)

4:048 0:000 RCBA disabled; cannot use it

4:048 0:000 HDA Controller [8086:A170] :: PciRoot(0x0)\Pci(0x1F,0x3) => setting specified layout-id=3 (0x3)

4:048 0:000 stringlength = 552

4:048 0:000 CurrentMode: Width=1920 Height=1080

4:048 0:000 Beginning FSInjection

FSInjectionInstall ...

- Our FSI_SIMPLE_FILE_SYSTEM_PROTOCOL installed on handle: 85C75798

FSInjectionInstall ...

- Our FSI_SIMPLE_FILE_SYSTEM_PROTOCOL installed on handle: 85C75798

4:052 0:003 Preparing kexts injection for arch=x86_64 from \EFI\CLOVER\kexts\Other

4:052 0:000 Preparing kexts injection for arch=x86_64 from EFI\CLOVER\OEM\MS-7970\kexts\10.11

4:053 0:000 Extra kext: EFI\CLOVER\OEM\MS-7970\kexts\10.11\AppleALC.kext

4:058 0:005 Extra PlugIn kext: EFI\CLOVER\OEM\MS-7970\kexts\10.11\AppleALC.kext\Contents\PlugIns\PinConfigs.kext

4:060 0:002 Extra kext: EFI\CLOVER\OEM\MS-7970\kexts\10.11\RealtekRTL8111.kext

4:064 0:003 Extra kext: EFI\CLOVER\OEM\MS-7970\kexts\10.11\FakeSMC.kext

4:067 0:002 Extra kext: EFI\CLOVER\OEM\MS-7970\kexts\10.11\LPC_Injector.kext

4:069 0:002 Removed efi-boot-device-data variable: Not Found

4:069 0:000 Custom boot is disabled

4:069 0:000 Closing log

Device Properties

Dumped using gfxutil v0.71b by McMatrix from 2007

View device-properties.plist File

<?xml version="1.0" encoding="UTF-8"?>

<!DOCTYPE plist PUBLIC "-//Apple//DTD PLIST 1.0//EN" "http://www.apple.com/DTDs/PropertyList-1.0.dtd">

<dict>

<key>PciRoot(0x0)/Pci(0x1d,0x2)/Pci(0x0,0x0)</key>

<dict>

<key>built-in</key>

<data>

AQ==

</data>

<key>device_type</key>

<data>

RXRoZXJuZXQA

</data>

</dict>

<key>PciRoot(0x0)/Pci(0x1f,0x3)</key>

<dict>

<key>MaximumBootBeepVolume</key>

<data>

AA==

</data>

<key>PinConfigurations</key>

<data>

AA==

</data>

<key>layout-id</key>

<data>

AwAAAA==

</data>

</dict>

</plist>

I/O Kit Registry

This is best viewed in a separate browser window/tab. Click here to load it.

Kexts

AppleKexts
NonAppleKexts

Dumped using: kextstat -l | egrep "com.apple"

Apple Kexts : 96

IDX	REFS	ADDRESS	SIZE	WIRED	NAME	VERSION	LINKED AGAINST
1	79	0xffffff7f80a11000	0x9c80	0x9c80	com.apple.kpi.bsd	(15.4.0)
2	9	0xffffff7f810bf000	0x3890	0x3890	com.apple.kpi.dsep	(15.4.0)
3	98	0xffffff7f80a1b000	0x20e20	0x20e20	com.apple.kpi.iokit	(15.4.0)
4	106	0xffffff7f80a04000	0xd000	0xd000	com.apple.kpi.libkern	(15.4.0)
5	94	0xffffff7f80a00000	0x3d50	0x3d50	com.apple.kpi.mach	(15.4.0)
6	47	0xffffff7f80a42000	0x97f0	0x97f0	com.apple.kpi.private	(15.4.0)
7	64	0xffffff7f80a3c000	0x58a0	0x58a0	com.apple.kpi.unsupported	(15.4.0)
8	1	0xffffff7f80d07000	0x9000	0x9000	com.apple.kec.Libm	(1)	<4>
9	4	0xffffff7f810c6000	0x96000	0x96000	com.apple.kec.corecrypto	(1.0)	<7 6 5 4 3 1>
10	0	0xffffff7f814a8000	0xd000	0xd000	com.apple.kec.pthread	(1)	<7 6 5 4 1>
11	15	0xffffff7f8161a000	0x9000	0x9000	com.apple.iokit.IOACPIFamily	(1.4)	<7 6 4 3>
12	19	0xffffff7f80b8c000	0x35000	0x35000	com.apple.iokit.IOPCIFamily	(2.9)	<7 6 5 4 3>
13	1	0xffffff7f82648000	0x66000	0x66000	com.apple.driver.AppleACPIPlatform	(4.0)	<12 11 7 6 5 4 3 1>
14	1	0xffffff7f80f7f000	0x4000	0x4000	com.apple.driver.AppleUSBHostMergeProperties	(1.0.1)	<4 3 1>
15	8	0xffffff7f80f83000	0x72000	0x72000	com.apple.iokit.IOUSBHostFamily	(1.0.1)	<14 7 5 4 3 1>
16	7	0xffffff7f80ff5000	0xac000	0xac000	com.apple.iokit.IOUSBFamily	(900.4.1)	<15 12 7 5 4 3 1>
18	1	0xffffff7f8115c000	0xb000	0xb000	com.apple.driver.AppleFDEKeyStore	(28.30)	<9 7 6 5 4 3 1>
19	3	0xffffff7f811fd000	0x7000	0x7000	com.apple.iokit.IOReportFamily	(31)	<5 4 3>
20	5	0xffffff7f80a4c000	0x2f000	0x2f000	com.apple.iokit.IOStorageFamily	(2.1)	<7 6 5 4 3 1>
21	0	0xffffff7f81a4a000	0x1e000	0x1e000	com.apple.driver.DiskImages	(417.2)	<20 7 6 5 4 3 1>
22	1	0xffffff7f81fd6000	0x1e000	0x1e000	com.apple.driver.AppleCredentialManager	(1.0)	<9 7 6 5 4 3 1>
23	2	0xffffff7f8130a000	0x12000	0x12000	com.apple.driver.AppleMobileFileIntegrity	(1.0.5)	<9 7 6 5 4 3 2 1>
24	0	0xffffff7f81ff4000	0x2b000	0x2b000	com.apple.driver.AppleKeyStore	(2)	<23 22 9 7 6 5 4 3 1>
27	0	0xffffff7f810c3000	0x2000	0x2000	com.apple.security.TMSafetyNet	(8)	<7 6 5 4 2 1>
28	2	0xffffff7f8131c000	0x5000	0x5000	com.apple.kext.AppleMatch	(1.0.0d1)	<4 1>
29	1	0xffffff7f81321000	0x1e000	0x1e000	com.apple.security.sandbox	(300.0)	<28 23 20 7 6 5 4 3 2 1>
30	0	0xffffff7f8149e000	0x9000	0x9000	com.apple.security.quarantine	(3)	<29 28 7 6 5 4 2 1>
31	0	0xffffff7f826bf000	0x8000	0x8000	com.apple.nke.applicationfirewall	(163)	<7 6 5 4 3 1>
32	0	0xffffff7f81794000	0x19000	0x19000	com.apple.driver.AppleUSBLegacyHub	(900.4.1)	<16 5 4 3 1>
33	0	0xffffff7f82615000	0x3000	0x3000	com.apple.driver.AppleAPIC	(1.7)	<4 3>
34	0	0xffffff7f81eee000	0x4000	0x4000	com.apple.driver.AppleSMBIOS	(2.1)	<7 4 3>
35	0	0xffffff7f822fd000	0x3000	0x3000	com.apple.driver.AppleHPET	(1.8)	<11 7 5 4 3>
36	6	0xffffff7f81167000	0x8c000	0x8c000	com.apple.iokit.IOHIDFamily	(2.0.0)	<18 7 6 5 4 3 2 1>
37	0	0xffffff7f826b8000	0x4000	0x4000	com.apple.driver.AppleACPIButtons	(4.0)	<36 19 13 11 7 6 5 4 3 1>
38	0	0xffffff7f81f1c000	0x8000	0x8000	com.apple.driver.AppleRTC	(2.0)	<11 5 4 3 1>
39	1	0xffffff7f819be000	0x5000	0x5000	com.apple.driver.AppleEFIRuntime	(2.0)	<7 6 5 4 3>
40	1	0xffffff7f819c3000	0xa000	0xa000	com.apple.driver.AppleEFINVRAM	(2.0)	<39 7 6 5 4 3 2 1>
41	1	0xffffff7f81623000	0x45000	0x45000	com.apple.driver.usb.AppleUSBXHCI	(1.0.1)	<15 11 7 5 4 3 1>
42	0	0xffffff7f81668000	0x28000	0x28000	com.apple.driver.usb.AppleUSBXHCIPCI	(1.0.1)	<41 15 12 11 7 5 4 3 1>
43	2	0xffffff7f81b22000	0x1e000	0x1e000	com.apple.iokit.IOAHCIFamily	(2.8.1)	<5 4 3 1>
44	0	0xffffff7f8261a000	0x1f000	0x1f000	com.apple.driver.AppleAHCIPort	(3.1.8)	<43 12 5 4 3 1>
45	3	0xffffff7f8133f000	0x34000	0x34000	com.apple.iokit.IONetworkingFamily	(3.2)	<7 6 5 4 3 1>
47	0	0xffffff7f81b4d000	0x1c000	0x1c000	com.apple.iokit.IOAHCIBlockStorage	(2.8.5)	<43 20 6 5 4 3 1>
50	0	0xffffff7f81cab000	0xa000	0xa000	com.apple.BootCache	(38)	<7 6 5 4 3 1>
51	0	0xffffff7f825e6000	0x6000	0x6000	com.apple.AppleFSCompression.AppleFSCompressionTypeZlib	(1.0.0)	<6 4 3 2 1>
52	0	0xffffff7f825ee000	0x3000	0x3000	com.apple.AppleFSCompression.AppleFSCompressionTypeDataless	(1.0.0d1)	<7 6 4 3 2 1>
55	1	0xffffff7f8175d000	0x8000	0x8000	com.apple.driver.usb.AppleUSBHostCompositeDevice	(1.0.1)	<15 5 4 3 1>
56	1	0xffffff7f81d13000	0x8000	0x8000	com.apple.driver.usb.networking	(5.0.0)	<15 5 4 3 1>
57	0	0xffffff7f81d1b000	0x9000	0x9000	com.apple.driver.usb.cdc	(5.0.0)	<56 55 15 5 4 3 1>
58	0	0xffffff7f81610000	0xa000	0xa000	com.apple.driver.usb.IOUSBHostHIDDevice	(1.0.1)	<36 15 5 4 3 1>
59	1	0xffffff7f811f3000	0xa000	0xa000	com.apple.iokit.IOUSBHIDDriver	(900.4.1)	<36 16 5 4 3 1>
60	1	0xffffff7f81204000	0xd6000	0xd6000	com.apple.iokit.IOBluetoothFamily	(4.4.4f4)	<19 7 5 4 3 1>
61	1	0xffffff7f812da000	0x14000	0x14000	com.apple.driver.IOBluetoothHIDDriver	(4.4.4f4)	<60 36 5 4 3>
63	4	0xffffff7f80a7b000	0x31000	0x31000	com.apple.iokit.IOSCSIArchitectureModelFamily	(3.7.7)	<6 5 4 3 1>
65	4	0xffffff7f8194d000	0xa000	0xa000	com.apple.driver.IOPlatformPluginFamily	(6.0.0d7)	<11 7 6 5 4 3>
66	4	0xffffff7f81957000	0x1b000	0x1b000	com.apple.driver.AppleSMC	(3.1.9)	<11 7 5 4 3 1>
67	1	0xffffff7f81972000	0x17000	0x17000	com.apple.driver.X86PlatformPlugin	(1.0.0)	<66 65 16 15 11 7 6 5 4 3 1>
70	2	0xffffff7f80d10000	0x7c000	0x7c000	com.apple.vecLib.kext	(1.2.0)	<8 6 5 4 3>
71	7	0xffffff7f80d8c000	0x39000	0x39000	com.apple.iokit.IOAudioFamily	(204.3)	<70 5 4 3 1>
72	2	0xffffff7f82314000	0xf000	0xf000	com.apple.iokit.IOHDAFamily	(272.51.3)	<5 4 3 1>
73	10	0xffffff7f819f3000	0x47000	0x47000	com.apple.iokit.IOGraphicsFamily	(2.4.1)	<12 7 5 4 3 1>
74	1	0xffffff7f82327000	0x1d000	0x1d000	com.apple.driver.AppleHDAController	(272.51.3)	<73 72 71 12 7 6 5 4 3 1>
75	2	0xffffff7f8202a000	0x7a000	0x7a000	com.apple.iokit.IOAcceleratorFamily2	(205.3)	<73 12 7 6 5 4 3 1>
76	2	0xffffff7f820a4000	0x7000	0x7000	com.apple.AppleGraphicsDeviceControl	(3.12.6)	<7 6 5 4 3 1>
77	0	0xffffff7f820ab000	0x63000	0x63000	com.apple.driver.AppleIntelSKLGraphicsFramebuffer	(10.1.4)	<76 75 73 19 12 11 7 6 5 4 3 1>
78	1	0xffffff7f818dd000	0x5000	0x5000	com.apple.iokit.IOSlowAdaptiveClockingFamily	(1.0.0)	<7 6 5 4 3 1>
79	0	0xffffff7f82026000	0x2000	0x2000	com.apple.driver.AppleIntelSlowAdaptiveClocking	(4.0.0)	<78 4 3>
80	0	0xffffff7f8222a000	0x3000	0x3000	com.apple.driver.AppleIntelPCHPMC	(1.1)	<65 12 5 4 3>
82	2	0xffffff7f81a3a000	0x10000	0x10000	com.apple.iokit.IONDRVSupport	(2.4.1)	<73 12 7 5 4 3>
84	1	0xffffff7f818c4000	0x15000	0x15000	com.apple.iokit.IOSurface	(108.2.1)	<7 5 4 3 1>
85	0	0xffffff7f82130000	0xb7000	0xb7000	com.apple.driver.AppleIntelSKLGraphics	(10.1.4)	<84 75 73 12 7 6 5 4 3 1>
86	0	0xffffff7f822b9000	0xa000	0xa000	com.apple.driver.AppleHV	(1)	<7 6 5 4 3 1>
87	0	0xffffff7f81f7b000	0x4000	0x4000	com.apple.driver.AppleOSXWatchdog	(1)	<12 7 6 5 4 3 1>
88	1	0xffffff7f81c7a000	0x2a000	0x2a000	com.apple.driver.corecapture	(1.0.4)	<7 6 5 4 3 1>
89	0	0xffffff7f81ca4000	0x7000	0x7000	com.apple.driver.CoreCaptureResponder	(1)	<88 7 6 5 4 3 1>
90	0	0xffffff7f81b76000	0x5000	0x5000	com.apple.Dont_Steal_Mac_OS_X	(7.0.0)	<66 7 4 3 1>
91	2	0xffffff7f80ac8000	0x12000	0x12000	com.apple.iokit.IOSCSIParallelFamily	(3.0.0)	<63 5 4 3 1>
92	1	0xffffff7f80aac000	0x1c000	0x1c000	com.apple.iokit.IOSCSIBlockCommandsDevice	(3.7.7)	<63 20 6 5 4 3 1>
96	1	0xffffff7f818e8000	0x11000	0x11000	com.apple.iokit.IOSerialFamily	(11)	<7 6 5 4 3 1>
97	0	0xffffff7f81ada000	0xa000	0xa000	com.apple.iokit.IOBluetoothSerialManager	(4.4.4f4)	<96 7 5 4 3 1>
98	0	0xffffff7f815bc000	0x6000	0x6000	com.apple.iokit.IOUserEthernet	(1.0.1)	<45 6 5 4 3 1>
99	0	0xffffff7f814b5000	0xb000	0xb000	com.apple.driver.pmtelemetry	(1)	<7 6 5 4 3>
103	1	0xffffff7f82344000	0x13000	0x13000	com.apple.kext.OSvKernDSPLib	(525)	<5 4>
104	1	0xffffff7f82357000	0x13b000	0x13b000	com.apple.driver.DspFuncLib	(272.51.3)	<103 71 70 40 6 5 4 3 1>
105	0	0xffffff7f82492000	0xb2000	0xb2000	com.apple.driver.AppleHDA	(272.51.3)	<104 82 74 73 72 71 6 5 4 3 1>
106	1	0xffffff7f818d9000	0x4000	0x4000	com.apple.iokit.IOSMBusFamily	(1.1)	<5 4 3>
107	1	0xffffff7f81f88000	0x11000	0x11000	com.apple.driver.AppleSMBusController	(1.0.14d1)	<106 12 11 5 4 3>
108	0	0xffffff7f81f99000	0xe000	0xe000	com.apple.driver.AppleMCCSControl	(1.2.13)	<107 73 66 12 11 7 5 4 3 1>
109	0	0xffffff7f81d76000	0x5000	0x5000	com.apple.driver.AppleUpstreamUserClient	(3.6.1)	<73 12 11 7 5 4 3 1>
112	0	0xffffff7f81cc7000	0x5000	0x5000	com.apple.driver.AudioAUUC	(1.70)	<73 71 12 11 7 5 4 3 1>
114	1	0xffffff7f81989000	0x7000	0x7000	com.apple.driver.X86PlatformShim	(1.0.0)	<67 66 65 7 4 3>
115	0	0xffffff7f81f74000	0x4000	0x4000	com.apple.driver.ApplePlatformEnabler	(2.6.0d0)	<7 5 4 3>
116	0	0xffffff7f82596000	0x17000	0x17000	com.apple.driver.AGPM	(110.21.18)	<82 76 73 65 12 6 5 4 3>
117	1	0xffffff7f81cb7000	0x5000	0x5000	com.apple.kext.triggers	(1.0)	<7 6 5 4 3 1>
118	0	0xffffff7f81cbc000	0x9000	0x9000	com.apple.filesystems.autofs	(3.0)	<117 7 6 5 4 3 1>
122	1	0xffffff7f82748000	0xf000	0xf000	com.apple.filesystems.msdosfs	(1.10)	<7 5 4 1>

Dumped using: kextstat -l | egrep -v "com.apple"

Non Apple Kexts : 17

IDX	REFS	ADDRESS	SIZE	WIRED	NAME	VERSION	LINKED AGAINST
17	0	0xffffff7f810a1000	0x10000	0x10000	com.virtualhere.vhhcd	(1.0.60)	<16 5 4 3>
25	0	0xffffff7f826c9000	0x7f000	0x7f000	as.vit9696.AppleALC	(1.0.9)	<7 5 4 3 2 1>
26	0	0xffffff7f82764000	0x19000	0x19000	org.netkas.driver.FakeSMC	(1394)	<11 7 5 4 3 1>
46	0	0xffffff7f8277d000	0x68000	0x68000	com.insanelymac.RealtekRTL8111	(2.2.1d3)	<45 12 5 4 3 1>
49	0	0xffffff7f80bd4000	0x48000	0x48000	at.obdev.nke.LittleSnitch	(4352)	<5 4 3 1>
54	0	0xffffff7f81373000	0x110000	0x110000	com.Ralink.driver.RT2870USBWirelessDriver	(5.0.1)	<45 16 5 4 3 1>
62	0	0xffffff7f812ee000	0x9000	0x9000	jp.plentycom.driver.SteerMouse	(4.1.3)	<61 59 36 16 5 4 3>
83	0	0xffffff7f80d00000	0x4000	0x4000	com.intel.driver.EnergyDriver	(2.0)	<7 5 4 3>
93	2	0xffffff7f80ada000	0x31000	0x31000	com.sns.driver.SNSArchitectureModel	(1.1.5)	<92 91 63 7 5 4 3 1>
94	1	0xffffff7f80b0b000	0x13000	0x13000	com.sns.driver.Xtarget	(1.1.2)	<93 63 20 7 5 4 3 1>
95	0	0xffffff7f80cb5000	0x4b000	0x4b000	com.sns.driver.SnsiSCSI	(5.3.1)	<94 93 91 7 5 4 3 1>
100	0	0xffffff7f812fd000	0x7000	0x7000	com.Cycling74.driver.Soundflower	(1.0.0)	<71 5 4 3>
101	0	0xffffff7f80f53000	0x5000	0x5000	com.Apowersoft.driver.AudioDevice	(1.6.7)	<71 5 4 3>
102	0	0xffffff7f80dc5000	0x6000	0x6000	com.kandasoft.driver.Callnote	(1.0.2)	<71 5 4 3>
119	0	0xffffff7f827e5000	0x29000	0x29000	org.pqrs.driver.Karabiner	(10.18.0)	<36 5 4 3 1>
120	0	0xffffff7f8280e000	0x33000	0x33000	com.eltima.kext.eveusb	(333.5)	<16 12 7 5 4 3 1>
121	0	0xffffff7f81b7c000	0x2000	0x2000	com.nvidia.CUDA	(1.1.0)	<4 1>

LSPCI

lspci (nnvv)
lspci detailed (nnvvbxxxx)
lspci map (M)
lspci tree (nnvvt)

Numbers & names view. Dumped using pciutils v3.2.0 by Martin Mares. OS X port by THe KiNG. This version compiled by xsmile.

View File lspci (nnvv).txt

00:00.0 Host bridge [0600]: Intel Corporation Skylake Host Bridge/DRAM Registers [8086:190f] (rev 07)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx-

Latency: 0

Capabilities: [e0] Vendor Specific Information: Len=10 <?>

00:02.0 VGA compatible controller [0300]: Intel Corporation HD Graphics 530 [8086:1912] (rev 06) (prog-if 00 [VGA controller])

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at 7f90000000 (64-bit, non-prefetchable)

Region 2: Memory at 7f80000000 (64-bit, prefetchable)

Region 4: I/O ports at f000

Capabilities: [40] Vendor Specific Information: Len=0c <?>

Capabilities: [70] Express (v2) Root Complex Integrated Endpoint, MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset+

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-

LnkCap: Port #0, Speed unknown, Width x0, ASPM unknown, Latency L0 <64ns, L1 <1us

ClockPM- Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-

DevCap2: Completion Timeout: Not Supported, TimeoutDis-

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-

LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [ac] MSI: Enable+ Count=1/1 Maskable- 64bit-

Address: fee00000 Data: 4070

Capabilities: [d0] Power Management version 2

Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00:08.0 System peripheral [0880]: Intel Corporation Skylake Gaussian Mixture Model [8086:1911]

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Interrupt: pin A routed to IRQ 16

Region 0: Memory at 7f91029000 (64-bit, non-prefetchable) [disabled]

Capabilities: [90] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: fee00000 Data: 4071

Capabilities: [dc] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [f0] PCI Advanced Features

AFCap: TP+ FLR+

AFCtrl: FLR-

AFStatus: TP-

00:14.0 USB controller [0c03]: Intel Corporation Sunrise Point-H USB 3.0 xHCI Controller [8086:a12f] (rev 31) (prog-if 30 [XHCI])

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at 7f91010000 (64-bit, non-prefetchable)

Capabilities: [70] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0-,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [80] MSI: Enable+ Count=1/8 Maskable- 64bit+

Address: 00000000fee00000 Data: 4072

00:14.2 Signal processing controller [1180]: Intel Corporation Sunrise Point-H Thermal subsystem [8086:a131] (rev 31)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Interrupt: pin C routed to IRQ 18

Region 0: Memory at 7f91028000 (64-bit, non-prefetchable)

Capabilities: [50] Power Management version 3

Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: fee00000 Data: 4075

00:15.0 Signal processing controller [1180]: Intel Corporation Sunrise Point-H Serial IO I2C Controller #0 [8086:a160] (rev 31)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Interrupt: pin A routed to IRQ 16

Region 0: Memory at 7f91027000 (64-bit, non-prefetchable) [disabled]

Capabilities: [80] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D3 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [90] Vendor Specific Information: Len=14 <?>

00:15.1 Signal processing controller [1180]: Intel Corporation Sunrise Point-H Serial IO I2C Controller #1 [8086:a161] (rev 31)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Interrupt: pin B routed to IRQ 17

Region 0: Memory at 7f91026000 (64-bit, non-prefetchable) [disabled]

Capabilities: [80] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D3 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [90] Vendor Specific Information: Len=14 <?>

00:16.0 Communication controller [0780]: Intel Corporation Sunrise Point-H CSME HECI #1 [8086:a13a] (rev 31)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at 7f91025000 (64-bit, non-prefetchable)

Capabilities: [50] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [8c] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4073

00:17.0 SATA controller [0106]: Intel Corporation Sunrise Point-H SATA controller [AHCI mode] [8086:a102] (rev 31) (prog-if 01 [AHCI 1.0])

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at df228000 (32-bit, non-prefetchable)

Region 1: Memory at df22d000 (32-bit, non-prefetchable)

Region 2: I/O ports at f090

Region 3: I/O ports at f080

Region 4: I/O ports at f060

Region 5: Memory at df22c000 (32-bit, non-prefetchable)

Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit-

Address: fee00000 Data: 4074

Capabilities: [70] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [a8] SATA HBA v1.0 BAR4 Offset=00000004

00:1d.0 PCI bridge [0604]: Intel Corporation Sunrise Point-H PCI Express Root Port #9 [8086:a118] (rev f1) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Bus: primary=00, secondary=01, subordinate=01, sec-latency=0

Memory behind bridge: df100000-df1fffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 256 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #9, Speed 8GT/s, Width x1, ASPM unknown, Latency L0 <1us, L1 <16us

ClockPM- Surprise- LLActRep+ BwNot+

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 8GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-

Slot #12, PowerLimit 10.000W; Interlock- NoCompl+

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet- LinkState+

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Range ABC, TimeoutDis+ ARIFwd+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete+, EqualizationPhase1+

EqualizationPhase2+, EqualizationPhase3+, LinkEqualizationRequest-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Capabilities: [a0] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00:1d.2 PCI bridge [0604]: Intel Corporation Sunrise Point-H PCI Express Root Port #11 [8086:a11a] (rev f1) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Bus: primary=00, secondary=02, subordinate=02, sec-latency=0

I/O behind bridge: 0000e000-0000efff

Memory behind bridge: df000000-df0fffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #11, Speed 8GT/s, Width x1, ASPM unknown, Latency L0 <1us, L1 <16us

ClockPM- Surprise- LLActRep+ BwNot+

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-

Slot #14, PowerLimit 10.000W; Interlock- NoCompl+

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet- LinkState+

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Range ABC, TimeoutDis+ ARIFwd+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Capabilities: [a0] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00:1d.3 PCI bridge [0604]: Intel Corporation Sunrise Point-H PCI Express Root Port #12 [8086:a11b] (rev f1) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Bus: primary=00, secondary=03, subordinate=04, sec-latency=0

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #12, Speed 8GT/s, Width x1, ASPM unknown, Latency L0 unlimited, L1 <16us

ClockPM- Surprise- LLActRep+ BwNot+

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-

Slot #15, PowerLimit 10.000W; Interlock- NoCompl+

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet- LinkState+

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Range ABC, TimeoutDis+ ARIFwd+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Capabilities: [a0] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00:1e.0 Signal processing controller [1180]: Intel Corporation Sunrise Point-H Serial IO UART #0 [8086:a127] (rev 31)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Interrupt: pin A routed to IRQ 20

Region 0: Memory at 7f91024000 (64-bit, non-prefetchable) [disabled]

Capabilities: [80] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D3 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [90] Vendor Specific Information: Len=14 <?>

00:1f.0 ISA bridge [0601]: Intel Corporation Sunrise Point-H LPC Controller [8086:a145] (rev 31)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

00:1f.2 Memory controller [0580]: Intel Corporation Sunrise Point-H PMC [8086:a121] (rev 31)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Region 0: Memory at df224000 (32-bit, non-prefetchable) [disabled]

00:1f.3 Audio device [0403]: Intel Corporation Sunrise Point-H HD Audio [8086:a170] (rev 31)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:d970]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 64

Interrupt: pin A routed to IRQ 16

Region 0: Memory at 7f91020000 (64-bit, non-prefetchable)

Region 4: Memory at 7f91000000 (64-bit, non-prefetchable)

Capabilities: [50] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0-,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [60] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4076

00:1f.4 SMBus [0c05]: Intel Corporation Sunrise Point-H SMBus [8086:a123] (rev 31)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Interrupt: pin A routed to IRQ 16

Region 0: Memory at <ignored> (64-bit, non-prefetchable)

Region 4: I/O ports at <ignored>

01:00.0 USB controller [0c03]: ASMedia Technology Inc. ASM1142 USB 3.1 Host Controller [1b21:1242] (prog-if 30 [XHCI])

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at df100000 (64-bit, non-prefetchable)

Capabilities: [50] MSI: Enable+ Count=1/8 Maskable- 64bit+

Address: 00000000fee00000 Data: 4078

Capabilities: [68] MSI-X: Enable- Count=8 Masked-

Vector table: BAR=0 offset=00002000

PBA: BAR=0 offset=00002080

Capabilities: [78] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0-,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [80] Express (v2) Endpoint, MSI 00

DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s <64ns, L1 <2us

ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+

MaxPayload 256 bytes, MaxReadReq 512 bytes

DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #1, Speed 8GT/s, Width x2, ASPM L1, Latency L0 <2us, L1 unlimited

ClockPM- Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 8GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

DevCap2: Completion Timeout: Not Supported, TimeoutDis-

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-

LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete+, EqualizationPhase1+

EqualizationPhase2+, EqualizationPhase3+, LinkEqualizationRequest-

02:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller [10ec:8168] (rev 15)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 18

Region 0: I/O ports at e000 [disabled]

Region 2: Memory at df004000 (64-bit, non-prefetchable)

Region 4: Memory at df000000 (64-bit, non-prefetchable)

Capabilities: [40] Power Management version 3

Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [50] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4077

Capabilities: [70] Express (v2) Endpoint, MSI 01

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us

ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 4096 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 unlimited, L1 <64us

ClockPM+ Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

DevCap2: Completion Timeout: Range ABCD, TimeoutDis+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-

LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [b0] MSI-X: Enable- Count=4 Masked-

Vector table: BAR=4 offset=00000000

PBA: BAR=4 offset=00000800

03:00.0 PCI bridge [0604]: ASMedia Technology Inc. ASM1083/1085 PCIe to PCI Bridge [1b21:1080] (rev 03) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Bus: primary=03, secondary=04, subordinate=04, sec-latency=64

Secondary status: 66MHz+ FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+

Address: 0000000000000000 Data: 0000

Capabilities: [78] Power Management version 3

Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [80] Express (v1) PCI/PCI-X Bridge, MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ BrConfRtry-

MaxPayload 128 bytes, MaxReadReq 512 bytes

DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq- AuxPwr- TransPend-

LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <2us, L1 <2us

ClockPM- Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-

Capabilities: [c0] Subsystem: Device [0000:0000]

Bus centric view - Extended hex dump. Dumped using pciutils v3.2.0 by Martin Mares. OS X port by THe KiNG. This version compiled by xsmile.

View File lspci detailed (nnvvbxxxx).txt

00:00.0 Host bridge [0600]: Intel Corporation Skylake Host Bridge/DRAM Registers [8086:190f] (rev 07)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx-

Latency: 0

Capabilities: [e0] Vendor Specific Information: Len=10 <?>

00: 86 80 0f 19 06 00 90 20 07 00 00 06 00 00 00 00

10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 70 79

30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00

40: 01 90 d1 fe 00 00 00 00 01 00 d1 fe 00 00 00 00

50: c1 03 00 00 31 80 00 00 47 00 f0 8f 01 00 40 89

60: 01 00 00 e0 00 00 00 00 01 80 d1 fe 00 00 00 00

70: 00 00 00 ff 03 00 00 00 00 0c 00 ff 7f 00 00 00

80: 11 11 11 11 11 11 11 00 1a 00 00 00 00 00 00 00

90: 01 00 00 ff 03 00 00 00 01 00 f0 6e 04 00 00 00

a0: 01 00 00 00 04 00 00 00 01 00 00 6f 04 00 00 00

b0: 01 00 00 8a 01 00 80 89 01 00 40 89 01 00 00 90

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 09 00 10 01 7d 26 01 62 c8 00 04 94 00 00 07 00

f0: 00 00 00 00 c8 0f 03 00 00 00 00 00 00 00 00 00

00:02.0 VGA compatible controller [0300]: Intel Corporation HD Graphics 530 [8086:1912] (rev 06) (prog-if 00 [VGA controller])

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at 7f90000000 (64-bit, non-prefetchable)

Region 2: Memory at 7f80000000 (64-bit, prefetchable)

Region 4: I/O ports at f000

Capabilities: [40] Vendor Specific Information: Len=0c <?>

Capabilities: [70] Express (v2) Root Complex Integrated Endpoint, MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset+

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-

LnkCap: Port #0, Speed unknown, Width x0, ASPM unknown, Latency L0 <64ns, L1 <1us

ClockPM- Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-

DevCap2: Completion Timeout: Not Supported, TimeoutDis-

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-

LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [ac] MSI: Enable+ Count=1/1 Maskable- 64bit-

Address: fee00000 Data: 4070

Capabilities: [d0] Power Management version 2

Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00: 86 80 12 19 07 04 10 00 06 00 00 03 00 00 00 00

10: 04 00 00 90 7f 00 00 00 0c 00 00 80 7f 00 00 00

20: 01 f0 00 00 00 00 00 00 00 00 00 00 62 14 70 79

30: 00 00 00 00 40 00 00 00 00 00 00 00 10 01 00 00

40: 09 70 0c 01 7d 26 01 62 c8 00 04 94 00 00 00 00

50: c1 03 00 00 31 80 00 00 00 00 00 00 01 00 00 8a

60: 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 10 ac 92 00 00 80 00 10 00 00 00 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 05 d0 01 00

b0: 00 00 e0 fe 70 40 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 01 00 22 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 80 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 00 00 00 00 18 10 af 88

00:08.0 System peripheral [0880]: Intel Corporation Skylake Gaussian Mixture Model [8086:1911]

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Interrupt: pin A routed to IRQ 16

Region 0: Memory at 7f91029000 (64-bit, non-prefetchable) [disabled]

Capabilities: [90] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: fee00000 Data: 4071

Capabilities: [dc] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [f0] PCI Advanced Features

AFCap: TP+ FLR+

AFCtrl: FLR-

AFStatus: TP-

00: 86 80 11 19 00 00 10 00 00 00 80 08 00 00 00 00

10: 04 90 02 91 7f 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 70 79

30: 00 00 00 00 90 00 00 00 00 00 00 00 10 01 00 00

40: ff 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 05 dc 00 00 00 00 e0 fe 71 40 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 01 f0 02 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00

00:14.0 USB controller [0c03]: Intel Corporation Sunrise Point-H USB 3.0 xHCI Controller [8086:a12f] (rev 31) (prog-if 30 [XHCI])

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at 7f91010000 (64-bit, non-prefetchable)

Capabilities: [70] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0-,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [80] MSI: Enable+ Count=1/8 Maskable- 64bit+

Address: 00000000fee00000 Data: 4072

00: 86 80 2f a1 06 04 90 02 31 30 03 0c 00 00 80 00

10: 04 00 01 91 7f 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 70 79

30: 00 00 00 00 70 00 00 00 00 00 00 00 10 01 00 00

40: fd 01 34 80 88 c6 0f 80 00 00 00 00 00 00 00 00

50: 5f 6e ce 0f 00 00 00 00 00 00 00 00 00 00 00 00

60: 30 60 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 01 80 c2 c1 08 00 00 00 00 00 00 00 00 00 00 00

80: 05 00 87 00 00 00 e0 fe 00 00 00 00 72 40 00 00

90: 09 00 14 f0 10 00 40 01 00 00 00 00 c1 0a 08 00

a0: 00 08 04 00 00 18 00 00 8f 40 02 00 00 01 04 00

b0: 03 c0 00 00 0c 00 00 00 00 00 00 00 c0 00 00 00

c0: 00 03 00 00 30 0c 00 00 00 30 00 00 00 00 00 00

d0: 03 00 00 00 0c 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 30 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00

00:14.2 Signal processing controller [1180]: Intel Corporation Sunrise Point-H Thermal subsystem [8086:a131] (rev 31)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Interrupt: pin C routed to IRQ 18

Region 0: Memory at 7f91028000 (64-bit, non-prefetchable)

Capabilities: [50] Power Management version 3

Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: fee00000 Data: 4075

00: 86 80 31 a1 02 00 10 00 31 00 80 11 00 00 00 00

10: 04 80 02 91 7f 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 70 79

30: 00 00 00 00 50 00 00 00 00 00 00 00 12 03 00 00

40: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 01 80 23 00 08 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 05 00 00 00 00 00 e0 fe 75 40 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00

00:15.0 Signal processing controller [1180]: Intel Corporation Sunrise Point-H Serial IO I2C Controller #0 [8086:a160] (rev 31)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Interrupt: pin A routed to IRQ 16

Region 0: Memory at 7f91027000 (64-bit, non-prefetchable) [disabled]

Capabilities: [80] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D3 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [90] Vendor Specific Information: Len=14 <?>

00: 86 80 60 a1 00 00 10 00 31 00 80 11 00 00 80 00

10: 04 70 02 91 7f 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 70 79

30: 00 00 00 00 80 00 00 00 00 00 00 00 10 01 00 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 01 90 03 00 0b 00 00 00 00 00 00 00 00 00 00 00

90: 09 00 14 f0 10 00 40 01 01 21 00 00 c1 24 00 00

a0: 00 08 0f 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00

00:15.1 Signal processing controller [1180]: Intel Corporation Sunrise Point-H Serial IO I2C Controller #1 [8086:a161] (rev 31)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Interrupt: pin B routed to IRQ 17

Region 0: Memory at 7f91026000 (64-bit, non-prefetchable) [disabled]

Capabilities: [80] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D3 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [90] Vendor Specific Information: Len=14 <?>

00: 86 80 61 a1 00 00 10 00 31 00 80 11 00 00 80 00

10: 04 60 02 91 7f 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 70 79

30: 00 00 00 00 80 00 00 00 00 00 00 00 11 02 00 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 01 90 03 00 0b 00 00 00 00 00 00 00 00 00 00 00

90: 09 00 14 f0 10 00 40 01 01 21 00 00 c1 24 00 00

a0: 00 08 0f 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00

00:16.0 Communication controller [0780]: Intel Corporation Sunrise Point-H CSME HECI #1 [8086:a13a] (rev 31)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at 7f91025000 (64-bit, non-prefetchable)

Capabilities: [50] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [8c] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4073

00: 86 80 3a a1 06 04 10 00 31 00 80 07 00 00 80 00

10: 04 50 02 91 7f 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 70 79

30: 00 00 00 00 50 00 00 00 00 00 00 00 10 01 00 00

40: 55 02 00 90 10 00 01 80 06 03 00 60 00 00 00 00

50: 01 8c 03 40 08 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 40 08 00 00 00 00 00 02 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 05 00 81 00

90: 00 00 e0 fe 00 00 00 00 73 40 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00

00:17.0 SATA controller [0106]: Intel Corporation Sunrise Point-H SATA controller [AHCI mode] [8086:a102] (rev 31) (prog-if 01 [AHCI 1.0])

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at df228000 (32-bit, non-prefetchable)

Region 1: Memory at df22d000 (32-bit, non-prefetchable)

Region 2: I/O ports at f090

Region 3: I/O ports at f080

Region 4: I/O ports at f060

Region 5: Memory at df22c000 (32-bit, non-prefetchable)

Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit-

Address: fee00000 Data: 4074

Capabilities: [70] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [a8] SATA HBA v1.0 BAR4 Offset=00000004

00: 86 80 02 a1 07 04 b0 02 31 01 06 01 00 00 00 00

10: 00 80 22 df 00 d0 22 df 91 f0 00 00 81 f0 00 00

20: 61 f0 00 00 00 c0 22 df 00 00 00 00 62 14 70 79

30: 00 00 00 00 80 00 00 00 00 00 00 00 10 01 00 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 01 a8 03 40 08 00 00 00 00 00 00 00 00 00 00 00

80: 05 70 01 00 00 00 e0 fe 74 40 00 00 00 00 00 00

90: 00 00 fc 00 03 00 01 00 00 00 00 00 30 00 00 80

a0: 3c 00 00 00 00 00 00 00 12 00 10 00 48 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 11 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00

00:1d.0 PCI bridge [0604]: Intel Corporation Sunrise Point-H PCI Express Root Port #9 [8086:a118] (rev f1) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Bus: primary=00, secondary=01, subordinate=01, sec-latency=0

Memory behind bridge: df100000-df1fffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 256 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #9, Speed 8GT/s, Width x1, ASPM unknown, Latency L0 <1us, L1 <16us

ClockPM- Surprise- LLActRep+ BwNot+

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 8GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-

Slot #12, PowerLimit 10.000W; Interlock- NoCompl+

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet- LinkState+

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Range ABC, TimeoutDis+ ARIFwd+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete+, EqualizationPhase1+

EqualizationPhase2+, EqualizationPhase3+, LinkEqualizationRequest-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Capabilities: [a0] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00: 86 80 18 a1 07 00 10 00 f1 00 04 06 00 00 81 00

10: 00 00 00 00 00 00 00 00 00 01 01 00 f0 00 00 20

20: 10 df 10 df f1 ff 01 00 00 00 00 00 00 00 00 00

30: 00 00 00 00 40 00 00 00 00 00 00 00 10 01 12 00

40: 10 80 42 01 01 80 00 00 20 00 10 00 13 40 72 09

50: 40 00 13 70 00 b2 64 00 00 00 40 01 00 00 00 00

60: 00 00 00 00 37 08 00 00 00 04 00 00 0e 00 00 00

70: 03 00 1f 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 05 90 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 0d a0 00 00 62 14 70 79 00 00 00 00 00 00 00 00

a0: 01 00 03 c8 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 11 10 00 07 42 18 00 00 08 00 1e 8b 00 00 00 00

e0: 00 b7 f3 00 00 00 00 00 06 80 12 00 00 00 00 00

f0: 50 01 00 00 00 03 00 40 b3 0f 33 08 00 00 00 01

00:1d.2 PCI bridge [0604]: Intel Corporation Sunrise Point-H PCI Express Root Port #11 [8086:a11a] (rev f1) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Bus: primary=00, secondary=02, subordinate=02, sec-latency=0

I/O behind bridge: 0000e000-0000efff

Memory behind bridge: df000000-df0fffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #11, Speed 8GT/s, Width x1, ASPM unknown, Latency L0 <1us, L1 <16us

ClockPM- Surprise- LLActRep+ BwNot+

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-

Slot #14, PowerLimit 10.000W; Interlock- NoCompl+

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet- LinkState+

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Range ABC, TimeoutDis+ ARIFwd+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Capabilities: [a0] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00: 86 80 1a a1 07 00 10 00 f1 00 04 06 00 00 81 00

10: 00 00 00 00 00 00 00 00 00 02 02 00 e0 e0 00 20

20: 00 df 00 df f1 ff 01 00 00 00 00 00 00 00 00 00

30: 00 00 00 00 40 00 00 00 00 00 00 00 12 03 12 00

40: 10 80 42 01 01 80 00 00 00 00 10 00 13 40 72 0b

50: 40 00 11 70 00 b2 74 00 00 00 40 01 00 00 00 00

60: 00 00 00 00 37 08 00 00 00 04 00 00 0e 00 00 00

70: 03 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 05 90 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 0d a0 00 00 62 14 70 79 00 00 00 00 00 00 00 00

a0: 01 00 03 c8 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 01 10 00 07 42 18 00 00 08 00 1e 8b 00 00 00 00

e0: 00 03 e3 00 00 00 00 00 06 00 10 00 00 00 00 00

f0: 50 01 00 00 00 00 00 4c b3 0f 33 08 00 00 00 03

00:1d.3 PCI bridge [0604]: Intel Corporation Sunrise Point-H PCI Express Root Port #12 [8086:a11b] (rev f1) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Bus: primary=00, secondary=03, subordinate=04, sec-latency=0

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #12, Speed 8GT/s, Width x1, ASPM unknown, Latency L0 unlimited, L1 <16us

ClockPM- Surprise- LLActRep+ BwNot+

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-

Slot #15, PowerLimit 10.000W; Interlock- NoCompl+

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet- LinkState+

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Range ABC, TimeoutDis+ ARIFwd+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Capabilities: [a0] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00: 86 80 1b a1 07 00 10 00 f1 00 04 06 00 00 81 00

10: 00 00 00 00 00 00 00 00 00 03 04 00 f0 00 00 20

20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00

30: 00 00 00 00 40 00 00 00 00 00 00 00 13 04 12 00

40: 10 80 42 01 01 80 00 00 00 00 10 00 13 70 72 0c

50: 00 00 11 70 00 b2 7c 00 00 00 40 01 00 00 00 00

60: 00 00 00 00 37 08 00 00 00 04 00 00 0e 00 00 00

70: 03 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 05 90 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 0d a0 00 00 62 14 70 79 00 00 00 00 00 00 00 00

a0: 01 00 03 c8 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 01 10 00 07 42 18 00 00 08 00 1e 8b 00 00 00 00

e0: 00 03 e3 00 00 00 00 00 06 00 10 00 00 00 00 00

f0: 50 01 00 00 00 00 00 4c b3 0f 33 08 00 00 00 04

00:1e.0 Signal processing controller [1180]: Intel Corporation Sunrise Point-H Serial IO UART #0 [8086:a127] (rev 31)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Interrupt: pin A routed to IRQ 20

Region 0: Memory at 7f91024000 (64-bit, non-prefetchable) [disabled]

Capabilities: [80] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D3 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [90] Vendor Specific Information: Len=14 <?>

00: 86 80 27 a1 00 00 10 00 31 00 80 11 00 00 80 00

10: 04 40 02 91 7f 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 70 79

30: 00 00 00 00 80 00 00 00 00 00 00 00 14 01 00 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 01 90 03 00 0b 00 00 00 00 00 00 00 00 00 00 00

90: 09 00 14 f0 10 00 40 01 01 21 00 00 c1 24 00 00

a0: 00 08 0f 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00

00:1f.0 ISA bridge [0601]: Intel Corporation Sunrise Point-H LPC Controller [8086:a145] (rev 31)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

00: 86 80 45 a1 07 00 00 02 31 00 01 06 00 00 80 00

10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 70 79

30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 d0 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 70 00 0f 3f 01 02 fc 00 01 0a 3c 00 e1 03 0c 00

90: e1 02 1c 00 00 0f 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 33 22 11 00 67 45 00 00 cf ff 00 00 80 00 00 00

e0: c1 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00

00:1f.2 Memory controller [0580]: Intel Corporation Sunrise Point-H PMC [8086:a121] (rev 31)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Region 0: Memory at df224000 (32-bit, non-prefetchable) [disabled]

00: 86 80 21 a1 00 00 00 00 31 00 80 05 00 00 80 00

10: 00 40 22 df 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 70 79

30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

40: 01 18 00 00 80 01 00 00 00 00 00 fe 00 00 00 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: f8 36 80 d8 49 38 06 00 00 46 00 00 01 00 00 01

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00

00:1f.3 Audio device [0403]: Intel Corporation Sunrise Point-H HD Audio [8086:a170] (rev 31)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:d970]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 64

Interrupt: pin A routed to IRQ 16

Region 0: Memory at 7f91020000 (64-bit, non-prefetchable)

Region 4: Memory at 7f91000000 (64-bit, non-prefetchable)

Capabilities: [50] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0-,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [60] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4076

00: 86 80 70 a1 06 04 10 00 31 00 03 04 00 40 00 00

10: 04 00 02 91 7f 00 00 00 00 00 00 00 00 00 00 00

20: 04 00 00 91 7f 00 00 00 00 00 00 00 62 14 70 d9

30: 00 00 00 00 50 00 00 00 00 00 00 00 10 01 00 00

40: 00 00 00 00 1b 00 00 00 00 00 00 00 00 00 00 00

50: 01 60 43 c0 08 00 00 00 00 00 00 00 00 00 00 00

60: 05 00 81 00 00 00 e0 fe 00 00 00 00 76 40 00 00

70: 10 00 91 00 00 00 00 10 00 28 10 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 08 06 02 01 00 70 00 84 00 0c a5 82 10 00 01 00

d0: 00 0c b5 02 10 00 01 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00

00:1f.4 SMBus [0c05]: Intel Corporation Sunrise Point-H SMBus [8086:a123] (rev 31)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Interrupt: pin A routed to IRQ 16

Region 0: Memory at 7f9102a000 (64-bit, non-prefetchable)

Region 4: I/O ports at f040

00: 86 80 23 a1 03 00 80 02 31 00 05 0c 00 00 00 00

10: 04 a0 02 91 7f 00 00 00 00 00 00 00 00 00 00 00

20: 41 f0 00 00 00 00 00 00 00 00 00 00 62 14 70 79

30: 00 00 00 00 00 00 00 00 00 00 00 00 10 01 00 00

40: 11 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 01 04 00 00 00 01 00 00 00 00 00 00 00 00 00 00

60: 04 05 05 00 00 00 0a 0a 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 24 00 04 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00

01:00.0 USB controller [0c03]: ASMedia Technology Inc. ASM1142 USB 3.1 Host Controller [1b21:1242] (prog-if 30 [XHCI])

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at df100000 (64-bit, non-prefetchable)

Capabilities: [50] MSI: Enable+ Count=1/8 Maskable- 64bit+

Address: 00000000fee00000 Data: 4078

Capabilities: [68] MSI-X: Enable- Count=8 Masked-

Vector table: BAR=0 offset=00002000

PBA: BAR=0 offset=00002080

Capabilities: [78] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0-,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [80] Express (v2) Endpoint, MSI 00

DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s <64ns, L1 <2us

ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+

MaxPayload 256 bytes, MaxReadReq 512 bytes

DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #1, Speed 8GT/s, Width x2, ASPM L1, Latency L0 <2us, L1 unlimited

ClockPM- Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 8GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

DevCap2: Completion Timeout: Not Supported, TimeoutDis-

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-

LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete+, EqualizationPhase1+

EqualizationPhase2+, EqualizationPhase3+, LinkEqualizationRequest-

00: 21 1b 42 12 06 04 10 00 00 30 03 0c 00 00 00 00

10: 04 00 10 df 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 70 79

30: 00 00 00 00 50 00 00 00 00 00 00 00 10 01 00 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 05 68 87 00 00 00 e0 fe 00 00 00 00 78 40 00 00

60: 30 20 00 00 00 00 00 00 11 78 07 00 00 20 00 00

70: 80 20 00 00 00 00 00 00 01 80 43 c0 08 00 00 00

80: 10 00 02 00 22 82 90 05 30 28 11 00 23 d8 43 01

90: 40 00 13 10 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 08 00 00 00 04 00 00 0e 00 00 00

b0: 03 00 1e 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 21 1b 42 12 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 bf 52 01 32 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

02:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller [10ec:8168] (rev 15)

Subsystem: Micro-Star International Co., Ltd. [MSI] Device [1462:7970]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 18

Region 0: I/O ports at e000 [disabled]

Region 2: Memory at df004000 (64-bit, non-prefetchable)

Region 4: Memory at df000000 (64-bit, non-prefetchable)

Capabilities: [40] Power Management version 3

Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [50] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4077

Capabilities: [70] Express (v2) Endpoint, MSI 01

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us

ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 4096 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 unlimited, L1 <64us

ClockPM+ Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

DevCap2: Completion Timeout: Range ABCD, TimeoutDis+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-

LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [b0] MSI-X: Enable- Count=4 Masked-

Vector table: BAR=4 offset=00000000

PBA: BAR=4 offset=00000800

00: ec 10 68 81 06 04 10 00 15 00 00 02 00 00 00 00

10: 01 e0 00 00 00 00 00 00 04 40 00 df 00 00 00 00

20: 04 00 00 df 00 00 00 00 00 00 00 00 62 14 70 79

30: 00 00 00 00 40 00 00 00 00 00 00 00 12 01 00 00

40: 01 50 c3 ff 08 00 00 00 00 00 00 00 00 00 00 00

50: 05 70 81 00 00 00 e0 fe 00 00 00 00 77 40 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 10 b0 02 02 c0 8c 90 05 10 50 10 00 11 7c 47 00

80: 40 00 11 10 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 1f 08 0c 00 00 04 00 00 02 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 11 00 03 00 04 00 00 00 04 08 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

03:00.0 PCI bridge [0604]: ASMedia Technology Inc. ASM1083/1085 PCIe to PCI Bridge [1b21:1080] (rev 03) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Bus: primary=03, secondary=04, subordinate=04, sec-latency=64

Secondary status: 66MHz+ FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+

Address: 0000000000000000 Data: 0000

Capabilities: [78] Power Management version 3

Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [80] Express (v1) PCI/PCI-X Bridge, MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ BrConfRtry-

MaxPayload 128 bytes, MaxReadReq 512 bytes

DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq- AuxPwr- TransPend-

LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <2us, L1 <2us

ClockPM- Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-

Capabilities: [c0] Subsystem: Device [0000:0000]

00: 21 1b 80 10 07 00 10 00 03 00 04 06 00 00 01 00

10: 00 00 00 00 00 00 00 00 03 04 04 40 f1 01 20 20

20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00

30: ff 00 00 00 50 00 00 00 00 00 00 00 13 01 12 00

40: 20 00 00 00 00 0f 00 00 00 00 00 00 a7 27 00 00

50: 05 78 80 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 11 78 01 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 01 80 23 fe 08 00 00 00

80: 10 c0 71 00 00 80 90 05 10 28 02 00 11 dc 00 01

90: 00 00 11 00 00 00 00 00 c0 03 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 0d 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

Map view. Dumped using pciutils v3.2.0 by Martin Mares. OS X port by THe KiNG. This version compiled by xsmile.

View File lspci map (M).txt

00:00.0 Host bridge: Intel Corporation Skylake Host Bridge/DRAM Registers (rev 07)

00:02.0 VGA compatible controller: Illegal Vendor ID Device ffff (rev 06)

00:08.0 System peripheral: Intel Corporation Skylake Gaussian Mixture Model

00:14.0 USB controller: Intel Corporation Sunrise Point-H USB 3.0 xHCI Controller (rev 31)

00:14.2 Signal processing controller: Intel Corporation Sunrise Point-H Thermal subsystem (rev 31)

00:15.0 Signal processing controller: Intel Corporation Sunrise Point-H Serial IO I2C Controller #0 (rev 31)

00:15.1 Signal processing controller: Intel Corporation Sunrise Point-H Serial IO I2C Controller #1 (rev 31)

00:16.0 Communication controller: Intel Corporation Sunrise Point-H CSME HECI #1 (rev 31)

00:17.0 SATA controller: Intel Corporation Sunrise Point-H SATA controller [AHCI mode] (rev 31)

00:1d.0 PCI bridge: Intel Corporation Sunrise Point-H PCI Express Root Port #9 (rev f1)

## 00.1d:0 is a bridge from 00 to 01-01

00:1d.2 PCI bridge: Intel Corporation Sunrise Point-H PCI Express Root Port #11 (rev f1)

## 00.1d:2 is a bridge from 00 to 02-02

00:1d.3 PCI bridge: Intel Corporation Sunrise Point-H PCI Express Root Port #12 (rev f1)

## 00.1d:3 is a bridge from 00 to 03-04

00:1e.0 Signal processing controller: Intel Corporation Sunrise Point-H Serial IO UART #0 (rev 31)

00:1f.0 ISA bridge: Intel Corporation Sunrise Point-H LPC Controller (rev 31)

00:1f.2 Memory controller: Intel Corporation Sunrise Point-H PMC (rev 31)

00:1f.3 Audio device: Intel Corporation Sunrise Point-H HD Audio (rev 31)

00:1f.4 SMBus: Intel Corporation Sunrise Point-H SMBus (rev 31)

01:00.0 USB controller: ASMedia Technology Inc. ASM1142 USB 3.1 Host Controller

02:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller (rev 15)

03:00.0 PCI bridge: ASMedia Technology Inc. ASM1083/1085 PCIe to PCI Bridge (rev 03)

## 03.00:0 is a bridge from 03 to 04-04

Summary of buses:

00: Primary host bus

1d.3 Bridge to 03-04

1d.2 Bridge to 02-02

1d.0 Bridge to 01-01

01: Entered via 00:1d.0

02: Entered via 00:1d.2

03: Entered via 00:1d.3

00.0 Bridge to 04-04

Tree view. Dumped using pciutils v3.2.0 by Martin Mares. OS X port by THe KiNG. This version compiled by xsmile.

View File lspci tree (nnvvt).txt

-[0000:00]-+-00.0 Intel Corporation Skylake Host Bridge/DRAM Registers [8086:190f]

+-02.0 Intel Corporation HD Graphics 530 [8086:1912]

+-08.0 Intel Corporation Skylake Gaussian Mixture Model [8086:1911]

+-14.0 Intel Corporation Sunrise Point-H USB 3.0 xHCI Controller [8086:a12f]

+-14.2 Intel Corporation Sunrise Point-H Thermal subsystem [8086:a131]

+-15.0 Intel Corporation Sunrise Point-H Serial IO I2C Controller #0 [8086:a160]

+-15.1 Intel Corporation Sunrise Point-H Serial IO I2C Controller #1 [8086:a161]

+-16.0 Intel Corporation Sunrise Point-H CSME HECI #1 [8086:a13a]

+-17.0 Intel Corporation Sunrise Point-H SATA controller [AHCI mode] [8086:a102]

+-1d.0-[01]----00.0 ASMedia Technology Inc. ASM1142 USB 3.1 Host Controller [1b21:1242]

+-1d.2-[02]----00.0 Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller [10ec:8168]

+-1d.3-[03-04]----00.0-[04]--

+-1e.0 Intel Corporation Sunrise Point-H Serial IO UART #0 [8086:a127]

+-1f.0 Intel Corporation Sunrise Point-H LPC Controller [8086:a145]

+-1f.2 Intel Corporation Sunrise Point-H PMC [8086:a121]

+-1f.3 Intel Corporation Sunrise Point-H HD Audio [8086:a170]

\-1f.4 Intel Corporation Sunrise Point-H SMBus [8086:a123]