DarwinDumper

ACPI Tables

AAFT
APIC
ASF!
BGRT
DBG2
DBGP
DSDT
FACP
FACS
FIDT
FPDT
HPET
LPIT
MCFG
RSDT
SSDT-1
SSDT-2
SSDT-3
SSDT-4
SSDT-5
SSDT
UEFI

ASRock OEM AAFT Table

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* Disassembly of /Volumes/El Capitan/Users/dima/Downloads/DarwinDumper_v2.9.9.2/DarwinDumperReports/001_2016-03-11_19-07-15_MacPro3,1/DarwinDumper_2.9.9.2_AMI_X64_3358_Cap_dima/ACPI Tables/AML/AAFT.aml, Fri Mar 11 19:07:31 2016

* ACPI Data Table [AAFT]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "AAFT"

[004h 0004 4] Table Length : 000002CD

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : 33

[00Ah 0010 6] Oem ID : "ALASKA"

[010h 0016 8] Oem Table ID : "OEMAAFT "

[018h 0024 4] Oem Revision : 01072009

[01Ch 0028 4] Asl Compiler ID : "MSFT"

[020h 0032 4] Asl Compiler Revision : 00000097

**** Unknown ACPI table type [AAFT]

Raw Table Data: Length 717 (0x2CD)

0000: 41 41 46 54 CD 02 00 00 01 33 41 4C 41 53 4B 41 AAFT.....3ALASKA

0010: 4F 45 4D 41 41 46 54 20 09 20 07 01 4D 53 46 54 OEMAAFT . ..MSFT

0020: 97 00 00 00 09 08 95 03 01 01 00 02 15 2C 00 00 .............,..

0030: 00 02 53 41 54 41 33 20 43 6F 6E 74 72 6F 6C 6C ..SATA3 Controll

0040: 65 72 00 00 00 00 00 00 00 00 00 00 00 00 00 00 er..............

0050: 00 00 00 00 01 FF 00 01 10 67 00 00 00 02 43 D6 .........g....C.

0060: 87 EC A4 EB B5 4B A1 E5 3F 3E 36 B2 0D A9 41 53 .....K..?>6...AS

0070: 52 6F 63 6B 50 6C 61 74 66 6F 72 6D 43 6F 6E 66 RockPlatformConf

0080: 69 67 00 00 00 00 00 00 00 00 00 00 00 00 01 43 ig.............C

0090: D6 87 EC A4 EB B5 4B A1 E5 3F 3E 36 B2 0D A9 53 ......K..?>6...S

00A0: 65 74 75 70 00 00 00 00 00 00 00 00 00 00 00 00 etup............

00B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 11 ................

00C0: DD 00 00 00 01 47 4F 4F 44 5F 4E 49 47 54 48 5F .....GOOD_NIGTH_

00D0: 4C 45 44 00 00 00 00 00 00 00 00 00 00 00 00 00 LED.............

00E0: 00 00 00 00 00 59 0D 01 01 44 72 79 46 75 6E 63 .....Y...DryFunc

00F0: 74 69 6F 6E 00 00 00 00 00 00 00 00 00 00 00 00 tion............

0100: 00 00 00 00 00 00 00 00 00 51 0D 01 01 44 72 79 .........Q...Dry

0110: 50 65 72 69 6F 64 00 00 00 00 00 00 00 00 00 00 Period..........

0120: 00 00 00 00 00 00 00 00 00 00 00 00 00 52 0D 01 .............R..

0130: 01 44 72 79 44 75 72 61 74 69 6F 6E 00 00 00 00 .DryDuration....

0140: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

0150: 00 53 0D 01 01 44 72 79 46 61 6E 43 6F 6E 74 72 .S...DryFanContr

0160: 6F 6C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ol..............

0170: 00 00 00 00 00 54 0D 01 01 46 61 73 74 42 6F 6F .....T...FastBoo

0180: 74 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 t...............

0190: 00 00 00 00 00 00 00 00 00 01 00 01 18 31 01 00 .............1..

01A0: 00 53 65 74 75 70 00 00 00 00 00 00 00 00 00 00 .Setup..........

01B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

01C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 43 D6 87 .............C..

01D0: EC A4 EB B5 4B A1 E5 3F 3E 36 B2 0D A9 55 73 62 ....K..?>6...Usb

01E0: 53 75 70 70 6F 72 74 00 00 00 00 00 00 00 00 00 Support.........

01F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

0200: 00 00 00 00 00 00 00 00 00 43 D6 87 EC A4 EB B5 .........C......

0210: 4B A1 E5 3F 3E 36 B2 0D A9 41 53 52 6F 63 6B 50 K..?>6...ASRockP

0220: 6C 61 74 66 6F 72 6D 43 6F 6E 66 69 67 00 00 00 latformConfig...

0230: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

0240: 00 00 00 00 00 43 D6 87 EC A4 EB B5 4B A1 E5 3F .....C......K..?

0250: 3E 36 B2 0D A9 41 4D 49 54 53 45 53 65 74 75 70 >6...AMITSESetup

0260: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

0270: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

0280: 00 38 FA 11 C8 C8 42 79 45 A9 BB 60 E9 4E DD FB .8....ByE..`.N..

0290: 34 49 6E 74 65 6C 53 65 74 75 70 00 00 00 00 00 4IntelSetup.....

02A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

02B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 43 D6 87 .............C..

02C0: EC A4 EB B5 4B A1 E5 3F 3E 36 B2 0D A9 ....K..?>6...

Multiple APIC Description Table

View File APIC.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [APIC]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]

[004h 0004 4] Table Length : 00000084

[008h 0008 1] Revision : 03

[009h 0009 1] Checksum : D9

[00Ah 0010 6] Oem ID : "ALASKA"

[010h 0016 8] Oem Table ID : "A M I "

[018h 0024 4] Oem Revision : 01072009

[01Ch 0028 4] Asl Compiler ID : "AMI "

[020h 0032 4] Asl Compiler Revision : 00010013

[024h 0036 4] Local Apic Address : FEE00000

[028h 0040 4] Flags (decoded below) : 00000001

PC-AT Compatibility : 1

[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]

[02Dh 0045 1] Length : 08

[02Eh 0046 1] Processor ID : 01

[02Fh 0047 1] Local Apic ID : 00

[030h 0048 4] Flags (decoded below) : 00000001

Processor Enabled : 1

[034h 0052 1] Subtable Type : 04 [Local APIC NMI]

[035h 0053 1] Length : 06

[036h 0054 1] Processor ID : 01

[037h 0055 2] Flags (decoded below) : 0005

Polarity : 1

Trigger Mode : 1

[039h 0057 1] Interrupt Input LINT : 01

[03Ah 0058 1] Subtable Type : 00 [Processor Local APIC]

[03Bh 0059 1] Length : 08

[03Ch 0060 1] Processor ID : 02

[03Dh 0061 1] Local Apic ID : 02

[03Eh 0062 4] Flags (decoded below) : 00000001

Processor Enabled : 1

[042h 0066 1] Subtable Type : 04 [Local APIC NMI]

[043h 0067 1] Length : 06

[044h 0068 1] Processor ID : 02

[045h 0069 2] Flags (decoded below) : 0005

Polarity : 1

Trigger Mode : 1

[047h 0071 1] Interrupt Input LINT : 01

[048h 0072 1] Subtable Type : 00 [Processor Local APIC]

[049h 0073 1] Length : 08

[04Ah 0074 1] Processor ID : 03

[04Bh 0075 1] Local Apic ID : 01

[04Ch 0076 4] Flags (decoded below) : 00000001

Processor Enabled : 1

[050h 0080 1] Subtable Type : 04 [Local APIC NMI]

[051h 0081 1] Length : 06

[052h 0082 1] Processor ID : 03

[053h 0083 2] Flags (decoded below) : 0005

Polarity : 1

Trigger Mode : 1

[055h 0085 1] Interrupt Input LINT : 01

[056h 0086 1] Subtable Type : 00 [Processor Local APIC]

[057h 0087 1] Length : 08

[058h 0088 1] Processor ID : 04

[059h 0089 1] Local Apic ID : 03

[05Ah 0090 4] Flags (decoded below) : 00000001

Processor Enabled : 1

[05Eh 0094 1] Subtable Type : 04 [Local APIC NMI]

[05Fh 0095 1] Length : 06

[060h 0096 1] Processor ID : 04

[061h 0097 2] Flags (decoded below) : 0005

Polarity : 1

Trigger Mode : 1

[063h 0099 1] Interrupt Input LINT : 01

[064h 0100 1] Subtable Type : 01 [I/O APIC]

[065h 0101 1] Length : 0C

[066h 0102 1] I/O Apic ID : 02

[067h 0103 1] Reserved : 00

[068h 0104 4] Address : FEC00000

[06Ch 0108 4] Interrupt : 00000000

[070h 0112 1] Subtable Type : 02 [Interrupt Source Override]

[071h 0113 1] Length : 0A

[072h 0114 1] Bus : 00

[073h 0115 1] Source : 00

[074h 0116 4] Interrupt : 00000002

[078h 0120 2] Flags (decoded below) : 0000

Polarity : 0

Trigger Mode : 0

[07Ah 0122 1] Subtable Type : 02 [Interrupt Source Override]

[07Bh 0123 1] Length : 0A

[07Ch 0124 1] Bus : 00

[07Dh 0125 1] Source : 09

[07Eh 0126 4] Interrupt : 00000009

[082h 0130 2] Flags (decoded below) : 000D

Polarity : 1

Trigger Mode : 3

Raw Table Data: Length 132 (0x84)

0000: 41 50 49 43 84 00 00 00 03 D9 41 4C 41 53 4B 41 APIC......ALASKA

0010: 41 20 4D 20 49 20 00 00 09 20 07 01 41 4D 49 20 A M I ... ..AMI

0020: 13 00 01 00 00 00 E0 FE 01 00 00 00 00 08 01 00 ................

0030: 01 00 00 00 04 06 01 05 00 01 00 08 02 02 01 00 ................

0040: 00 00 04 06 02 05 00 01 00 08 03 01 01 00 00 00 ................

0050: 04 06 03 05 00 01 00 08 04 03 01 00 00 00 04 06 ................

0060: 04 05 00 01 01 0C 02 00 00 00 C0 FE 00 00 00 00 ................

0070: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 09 09 00 ................

0080: 00 00 0D 00 ....

Alert Standard Format Table

View File ASF!.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [ASF!]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "ASF!" [Alert Standard Format table]

[004h 0004 4] Table Length : 000000A5

[008h 0008 1] Revision : 20

[009h 0009 1] Checksum : 0F

[00Ah 0010 6] Oem ID : "INTEL "

[010h 0016 8] Oem Table ID : " HCG"

[018h 0024 4] Oem Revision : 00000001

[01Ch 0028 4] Asl Compiler ID : "TFSM"

[020h 0032 4] Asl Compiler Revision : 000F4240

[024h 0036 1] Subtable Type : 00 [ASF Information]

[025h 0037 1] Reserved : 00

[026h 0038 2] Length : 0010

[028h 0040 1] Minimum Reset Value : FF

[029h 0041 1] Minimum Polling Interval : FF

[02Ah 0042 2] System ID : 0001

[02Ch 0044 4] Manufacturer ID : 57010000

[030h 0048 1] Flags : 00

[031h 0049 3] Reserved : 000000

[034h 0052 1] Subtable Type : 01 [ASF Alerts]

[035h 0053 1] Reserved : 00

[036h 0054 2] Length : 002C

[038h 0056 1] AssertMask : 00

[039h 0057 1] DeassertMask : 00

[03Ah 0058 1] Alert Count : 03

[03Bh 0059 1] Alert Data Length : 0C

[03Ch 0060 1] Address : 89

[03Dh 0061 1] Command : 04

[03Eh 0062 1] Mask : 01

[03Fh 0063 1] Value : 01

[040h 0064 1] SensorType : 05

[041h 0065 1] Type : 6F

[042h 0066 1] Offset : 00

[043h 0067 1] SourceType : 68

[044h 0068 1] Severity : 08

[045h 0069 1] SensorNumber : 88

[046h 0070 1] Entity : 17

[047h 0071 1] Instance : 00

[048h 0072 1] Address : 89

[049h 0073 1] Command : 04

[04Ah 0074 1] Mask : 04

[04Bh 0075 1] Value : 04

[04Ch 0076 1] SensorType : 07

[04Dh 0077 1] Type : 6F

[04Eh 0078 1] Offset : 00

[04Fh 0079 1] SourceType : 68

[050h 0080 1] Severity : 20

[051h 0081 1] SensorNumber : 88

[052h 0082 1] Entity : 03

[053h 0083 1] Instance : 00

[054h 0084 1] Address : 89

[055h 0085 1] Command : 05

[056h 0086 1] Mask : 01

[057h 0087 1] Value : 01

[058h 0088 1] SensorType : 19

[059h 0089 1] Type : 6F

[05Ah 0090 1] Offset : 00

[05Bh 0091 1] SourceType : 68

[05Ch 0092 1] Severity : 20

[05Dh 0093 1] SensorNumber : 88

[05Eh 0094 1] Entity : 22

[05Fh 0095 1] Instance : 00

[060h 0096 1] Subtable Type : 02 [ASF Remote Control]

[061h 0097 1] Reserved : 00

[062h 0098 2] Length : 0018

[064h 0100 1] Control Count : 04

[065h 0101 1] Control Data Length : 04

[066h 0102 2] Reserved : 0000

[068h 0104 1] Function : 00

[069h 0105 1] Address : 88

[06Ah 0106 1] Command : 00

[06Bh 0107 1] Value : 03

[06Ch 0108 1] Function : 01

[06Dh 0109 1] Address : 88

[06Eh 0110 1] Command : 00

[06Fh 0111 1] Value : 02

[070h 0112 1] Function : 02

[071h 0113 1] Address : 88

[072h 0114 1] Command : 00

[073h 0115 1] Value : 01

[074h 0116 1] Function : 03

[075h 0117 1] Address : 88

[076h 0118 1] Command : 00

[077h 0119 1] Value : 04

[078h 0120 1] Subtable Type : 03 [ASF RMCP Boot Options]

[079h 0121 1] Reserved : 00

[07Ah 0122 2] Length : 0017

[07Ch 0124 7] Capabilities : 20 18 00 00 00 13 F0

[083h 0131 1] Completion Code : 00

[084h 0132 4] Enterprise ID : 57010000

[088h 0136 1] Command : 00

[089h 0137 2] Parameter : 0000

[08Bh 0139 2] Boot Options : 0100

[08Dh 0141 2] Oem Parameters : 0000

[08Fh 0143 1] Subtable Type : 84 [ASF Address]

[090h 0144 1] Reserved : 00

[091h 0145 2] Length : 0016

[093h 0147 1] Eprom Address : 00

[094h 0148 1] Device Count : 10

[095h 0149 1] Addresses : 5C 68 88 C2 D2 DC A0 A2 A4 A6 C8 00 00 00 00 00

Raw Table Data: Length 165 (0xA5)

0000: 41 53 46 21 A5 00 00 00 20 0F 49 4E 54 45 4C 20 ASF!.... .INTEL

0010: 20 48 43 47 00 00 00 00 01 00 00 00 54 46 53 4D HCG........TFSM

0020: 40 42 0F 00 00 00 10 00 FF FF 01 00 00 00 01 57 @B.............W

0030: 00 00 00 00 01 00 2C 00 00 00 03 0C 89 04 01 01 ......,.........

0040: 05 6F 00 68 08 88 17 00 89 04 04 04 07 6F 00 68 .o.h.........o.h

0050: 20 88 03 00 89 05 01 01 19 6F 00 68 20 88 22 00 ........o.h .".

0060: 02 00 18 00 04 04 00 00 00 88 00 03 01 88 00 02 ................

0070: 02 88 00 01 03 88 00 04 03 00 17 00 20 18 00 00 ............ ...

0080: 00 13 F0 00 00 00 01 57 00 00 00 00 01 00 00 84 .......W........

0090: 00 16 00 00 10 5C 68 88 C2 D2 DC A0 A2 A4 A6 C8 .....\h.........

00A0: 00 00 00 00 00 .....

Boot Graphics Resource Table

View File BGRT.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [BGRT]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "BGRT" [Boot Graphics Resource Table]

[004h 0004 4] Table Length : 00000038

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : DE

[00Ah 0010 6] Oem ID : "ALASKA"

[010h 0016 8] Oem Table ID : "A M I "

[018h 0024 4] Oem Revision : 01072009

[01Ch 0028 4] Asl Compiler ID : "AMI "

[020h 0032 4] Asl Compiler Revision : 00010013

[024h 0036 2] Version : 0001

[026h 0038 1] Status : 01

[027h 0039 1] Image Type : 00

[028h 0040 8] Image Address : 0000000084665018

[030h 0048 4] Image OffsetX : 0000012C

[034h 0052 4] Image OffsetY : 00000118

Raw Table Data: Length 56 (0x38)

0000: 42 47 52 54 38 00 00 00 01 DE 41 4C 41 53 4B 41 BGRT8.....ALASKA

0010: 41 20 4D 20 49 20 00 00 09 20 07 01 41 4D 49 20 A M I ... ..AMI

0020: 13 00 01 00 01 00 01 00 18 50 66 84 00 00 00 00 .........Pf.....

0030: 2C 01 00 00 18 01 00 00 ,.......

Debug Port Table 2

View File DBG2.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [DBG2]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "DBG2" [Debug Port table type 2]

[004h 0004 4] Table Length : 00000054

[008h 0008 1] Revision : 00

[009h 0009 1] Checksum : F0

[00Ah 0010 6] Oem ID : "INTEL "

[010h 0016 8] Oem Table ID : ""

[018h 0024 4] Oem Revision : 00000000

[01Ch 0028 4] Asl Compiler ID : "MSFT"

[020h 0032 4] Asl Compiler Revision : 0000005F

[024h 0036 4] Info Offset : 0000002C

[028h 0040 4] Info Count : 00000001

[02Ch 0044 1] Revision : 00

[02Dh 0045 2] Length : 0028

[02Fh 0047 1] Register Count : 01

[030h 0048 2] Namepath Length : 0002

[032h 0050 2] Namepath Offset : 0026

[034h 0052 2] OEM Data Length : 0000

[036h 0054 2] OEM Data Offset : 0000

[038h 0056 2] Port Type : 8000

[03Ah 0058 2] Port Subtype : 0000

[03Ch 0060 2] Reserved : 0000

[03Eh 0062 2] Base Address Offset : 0016

[040h 0064 2] Address Size Offset : 0022

[042h 0066 12] Base Address Register : [Generic Address Structure]

[042h 0066 1] Space ID : 01 [SystemIO]

[043h 0067 1] Bit Width : 08

[044h 0068 1] Bit Offset : 00

[045h 0069 1] Encoded Access Width : 00 [Undefined/Legacy]

[046h 0070 8] Address : 00000000000003F8

[04Eh 0078 4] Address Size : 00000020

[052h 0082 2] Namepath : "."

Raw Table Data: Length 84 (0x54)

0000: 44 42 47 32 54 00 00 00 00 F0 49 4E 54 45 4C 20 DBG2T.....INTEL

0010: 00 00 00 00 00 00 00 00 00 00 00 00 4D 53 46 54 ............MSFT

0020: 5F 00 00 00 2C 00 00 00 01 00 00 00 00 28 00 01 _...,........(..

0030: 02 00 26 00 00 00 00 00 00 80 00 00 00 00 16 00 ..&.............

0040: 22 00 01 08 00 00 F8 03 00 00 00 00 00 00 20 00 "............. .

0050: 00 00 2E 00 ....

Debug Port Table

View File DBGP.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [DBGP]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "DBGP" [Debug Port table]

[004h 0004 4] Table Length : 00000034

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : 6D

[00Ah 0010 6] Oem ID : "INTEL "

[010h 0016 8] Oem Table ID : ""

[018h 0024 4] Oem Revision : 00000000

[01Ch 0028 4] Asl Compiler ID : "MSFT"

[020h 0032 4] Asl Compiler Revision : 0000005F

[024h 0036 1] Interface Type : 00

[025h 0037 3] Reserved : 040004

[028h 0040 12] Debug Port Register : [Generic Address Structure]

[028h 0040 1] Space ID : 01 [SystemIO]

[029h 0041 1] Bit Width : 08

[02Ah 0042 1] Bit Offset : 00

[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy]

[02Ch 0044 8] Address : 00000000000003F8

Raw Table Data: Length 52 (0x34)

0000: 44 42 47 50 34 00 00 00 01 6D 49 4E 54 45 4C 20 DBGP4....mINTEL

0010: 00 00 00 00 00 00 00 00 00 00 00 00 4D 53 46 54 ............MSFT

0020: 5F 00 00 00 00 04 00 04 01 08 00 00 F8 03 00 00 _...............

0030: 00 00 00 00 ....

Differentiated System Description Table

View File DSDT.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* Original Table Header:

* Signature "DSDT"

* Length 0x00020B5A (133978)

* Revision 0x02

* Checksum 0xC1

* OEM ID "Apple "

* OEM Table ID "A M I "

* OEM Revision 0x01072009 (17244169)

* Compiler ID "INTL"

* Compiler Version 0x20120913 (538052883)

DefinitionBlock ("/Volumes/El Capitan/Users/dima/Downloads/DarwinDumper_v2.9.9.2/DarwinDumperReports/001_2016-03-11_19-07-15_MacPro3,1/DarwinDumper_2.9.9.2_AMI_X64_3358_Cap_dima/ACPI Tables/AML/DSDT.aml", "DSDT", 2, "Apple ", "A M I ", 0x01072009)

{

* iASL Warning: There were 22 external control methods found during

* disassembly, but only 13 were resolved (9 unresolved). Additional

* ACPI tables are required to properly disassemble the code. This

* resulting disassembler output file may not compile because the

* disassembler did not know how many arguments to assign to the

* unresolved methods.

External (_SB_.PCI0.PAUD.PUAM, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above)

External (_SB_.PCI0.XHC_.DUAM, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above)

External (_SB_.PCI0.XHC_.RHUB.INIR, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above)

External (_SB_.TPM_.PTS_, MethodObj) // Warning: Unresolved Method, guessing 1 arguments (may be incorrect, see warning above)

External (AL6F, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above)

External (HLVT, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above)

External (PS0X, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above)

External (PS2X, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above)

External (PS3X, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above)

External (_GPE.AL6F)

External (_GPE.HLVT)

External (_GPE.P0L6, MethodObj) // 0 Arguments

External (_GPE.P1L6, MethodObj) // 0 Arguments

External (_GPE.P2L6, MethodObj) // 0 Arguments

External (_PR_.BGIA, FieldUnitObj)

External (_PR_.BGMA, FieldUnitObj)

External (_PR_.BGMS, FieldUnitObj)

External (_PR_.CPPC, FieldUnitObj)

External (_PR_.CPU0._PPC, MethodObj) // 0 Arguments

External (_PR_.CPU0._PSS, MethodObj) // 0 Arguments

External (_PR_.CPU0.LPSS)

External (_PR_.CPU0.TPSS)

External (_PR_.DSAE, FieldUnitObj)

External (_PR_.DTSE, FieldUnitObj)

External (_PR_.DTSF, FieldUnitObj)

External (_PR_.ELNG, FieldUnitObj)

External (_PR_.EMNA, FieldUnitObj)

External (_PR_.EPCS, FieldUnitObj)

External (_PR_.TRPD, FieldUnitObj)

External (_PR_.TRPF, FieldUnitObj)

External (_SB_.IETM)

External (_SB_.PCI0.GFX0.CLID, FieldUnitObj)

External (_SB_.PCI0.GFX0.DD1F)

External (_SB_.PCI0.GFX0.GSCI, MethodObj) // 0 Arguments

External (_SB_.PCI0.GFX0.GSSE, FieldUnitObj)

External (_SB_.PCI0.GFX0.IUEH, MethodObj) // 1 Arguments

External (_SB_.PCI0.LPCB.H_EC.CHRG)

External (_SB_.PCI0.PEG0.HPME, MethodObj) // 0 Arguments

External (_SB_.PCI0.PEG1.HPME, MethodObj) // 0 Arguments

External (_SB_.PCI0.PEG2.HPME, MethodObj) // 0 Arguments

External (_SB_.PCI0.SAT0.SDSM)

External (_SB_.PCI0.XHC_.PS0X)

External (_SB_.PCI0.XHC_.PS3X)

External (_SB_.PCI0.XHC_.RHUB.PS0X)

External (_SB_.PCI0.XHC_.RHUB.PS2X)

External (_SB_.PCI0.XHC_.RHUB.PS3X)

External (ALSE, FieldUnitObj)

External (D1F0)

External (D1F1)

External (D1F2)

External (DIDX, FieldUnitObj)

External (GSMI, FieldUnitObj)

External (LHIH, FieldUnitObj)

External (LLOW, FieldUnitObj)

External (M32B, FieldUnitObj)

External (M32L, FieldUnitObj)

External (M64B, FieldUnitObj)

External (M64L, FieldUnitObj)

External (MDBG, IntObj)

External (P0L6, MethodObj) // 0 Arguments

External (P0WK, FieldUnitObj)

External (P1GP, FieldUnitObj)

External (P1L6, MethodObj) // 0 Arguments

External (P1WK, FieldUnitObj)

External (P2GP, FieldUnitObj)

External (P2L6, MethodObj) // 0 Arguments

External (P2WK, FieldUnitObj)

External (PDC0, IntObj)

External (PDC1, IntObj)

External (PDC2, IntObj)

External (PDC3, IntObj)

External (PDC4, IntObj)

External (PDC5, IntObj)

External (PDC6, IntObj)

External (PDC7, IntObj)

External (PGRT)

External (SDSM, IntObj)

External (SGGP, FieldUnitObj)

External (SGMD, FieldUnitObj)

Name (VER0, "Clover autopatched")

Name (WXP1, "Windows 2001")

Method (GET9, 2, NotSerialized)

{

CreateByteField (Arg0, Arg1, TCH9)

Return (TCH9)

}

Method (STR9, 2, NotSerialized)

{

Name (STR8, Buffer (0x50) {})

Name (STR9, Buffer (0x50) {})

Store (Arg0, STR8)

Store (Arg1, STR9)

Store (Zero, Local0)

Store (One, Local1)

While (Local1)

{

Store (GET9 (STR8, Local0), Local1)

Store (GET9 (STR9, Local0), Local2)

If (LNotEqual (Local1, Local2))

{

Return (Zero)

}

Increment (Local0)

}

Return (One)

}

Method (OOSI, 1, NotSerialized)

{

If (STR9 (WXP1, Arg0))

{

Return (One)

}

Return (Zero)

}

Name (ENTK, 0x87)

Name (EXTK, 0xAA)

Name (IO1B, 0x0280)

Name (IO1L, 0x10)

Name (IO2B, 0x0290)

Name (IO2L, 0x10)

Name (IO3B, 0x02A0)

Name (IO3L, 0x10)

Name (IO4B, 0x02B0)

Name (IO4L, 0x10)

Name (SP1O, 0x2E)

Name (IOES, Zero)

Name (PEBS, 0xE0000000)

Name (PELN, 0x10000000)

Name (MCHB, 0xFED10000)

Name (MCHL, 0x8000)

Name (EGPB, 0xFED19000)

Name (EGPL, 0x1000)

Name (DMIB, 0xFED18000)

Name (DMIL, 0x1000)

Name (VTBS, 0xFED90000)

Name (VTLN, 0x4000)

Name (CPVD, Zero)

Name (SMIP, 0xB2)

Name (PMBA, 0x1800)

Name (PMLN, 0x80)

Name (SMCR, 0x1830)

Name (TCBR, 0xFED08000)

Name (TCLT, 0x1000)

Name (SMBL, 0x20)

Name (APCB, 0xFEC00000)

Name (APCL, 0x1000)

Name (HPTC, 0x60)

Name (GPBA, 0x1C00)

Name (GPLN, 0x0400)

Name (FMBL, One)

Name (FDTP, 0x02)

Name (FUPS, 0x04)

Name (FUWS, 0x03)

Name (FEMD, 0x04)

Name (ASSB, Zero)

Name (AOTB, Zero)

Name (AAXB, Zero)

Name (PEHP, Zero)

Name (SHPC, One)

Name (PEPM, Zero)

Name (PEER, Zero)

Name (PECS, Zero)

Name (ITKE, Zero)

Name (MBEC, 0xFFFF)

Name (SRSI, 0xB2)

Name (CSMI, 0x61)

Name (DSSP, Zero)

Name (FHPP, Zero)

Name (SMIA, 0xB2)

Name (SMIB, 0xB3)

Name (OFST, 0x35)

Name (TRST, 0x02)

Name (TCMF, Zero)

Name (TMF1, Zero)

Name (TMF2, Zero)

Name (TMF3, Zero)

Name (TTPF, One)

Name (DTPT, Zero)

Name (TTDP, Zero)

Name (TPMB, 0xFFFFFFFF)

Name (TPMC, 0xFFFFFFFF)

Name (TPMM, 0xFED40000)

Name (FTPM, 0xFFFFFFFF)

Name (AMDT, Zero)

Name (TPMF, Zero)

Name (SS1, One)

Name (SS2, Zero)

Name (SS3, One)

Name (SS4, One)

Name (IOST, 0x0000)

Name (TOPM, 0x00000000)

Name (ROMS, 0xFFE00000)

Name (VGAF, One)

OperationRegion (GNVS, SystemMemory, 0x87F98000, 0x05F5)

Field (GNVS, AnyAcc, Lock, Preserve)

{

OSYS, 16,

SMIF, 8,

PRM0, 8,

PRM1, 8,

SCIF, 8,

PRM2, 8,

PRM3, 8,

LCKF, 8,

PRM4, 8,

PRM5, 8,

P80D, 32,

PWRS, 8,

DBGS, 8,

THOF, 8,

ACT1, 8,

ACTT, 8,

PSVT, 8,

TC1V, 8,

TC2V, 8,

TSPV, 8,

CRTT, 8,

DTSE, 8,

DTS1, 8,

DTS2, 8,

DTSF, 8,

Offset (0x1E),

Offset (0x1F),

Offset (0x20),

Offset (0x21),

Offset (0x22),

Offset (0x23),

Offset (0x24),

Offset (0x25),

REVN, 8,

APIC, 8,

TCNT, 8,

PCP0, 8,

PCP1, 8,

PPCM, 8,

PPMF, 32,

C67L, 8,

NATP, 8,

CMAP, 8,

CMBP, 8,

LPTP, 8,

FDCP, 8,

CMCP, 8,

CIRP, 8,

SMSC, 8,

W381, 8,

SMC1, 8,

EMAE, 8,

EMAP, 16,

EMAL, 16,

MEFE, 8,

DSTS, 8,

MORD, 8,

TCGP, 8,

PPRP, 32,

PPRQ, 8,

LPPR, 8,

IDEM, 8,

BID, 16,

PLID, 8,

BTYP, 8,

OSCC, 8,

NEXP, 8,

SBV1, 8,

SBV2, 8,

ECON, 8,

DSEN, 8,

GPIC, 8,

CTYP, 8,

L01C, 8,

VFN0, 8,

VFN1, 8,

VFN2, 8,

VFN3, 8,

VFN4, 8,

VFN5, 8,

VFN6, 8,

VFN7, 8,

VFN8, 8,

VFN9, 8,

ATMC, 8,

PTMC, 8,

PNHM, 32,

TBAL, 32,

TBAH, 32,

RTIP, 8,

TSOD, 8,

PFLV, 8,

BREV, 8,

BBID, 8,

PDTS, 8,

PKGA, 8,

PAMT, 8,

AC0F, 8,

AC1F, 8,

DTS3, 8,

DTS4, 8,

LTR1, 8,

LTR2, 8,

LTR3, 8,

LTR4, 8,

LTR5, 8,

LTR6, 8,

LTR7, 8,

LTR8, 8,

LTR9, 8,

LTRA, 8,

LTRB, 8,

LTRC, 8,

LTRD, 8,

LTRE, 8,

LTRF, 8,

LTRG, 8,

LTRH, 8,

LTRI, 8,

LTRJ, 8,

LTRK, 8,

OBF1, 8,

OBF2, 8,

OBF3, 8,

OBF4, 8,

OBF5, 8,

OBF6, 8,

OBF7, 8,

OBF8, 8,

OBF9, 8,

OBFA, 8,

OBFB, 8,

OBFC, 8,

OBFD, 8,

OBFE, 8,

OBFF, 8,

OBFG, 8,

OBFH, 8,

OBFI, 8,

OBFJ, 8,

OBFK, 8,

XTUB, 32,

XTUS, 32,

XMPB, 32,

DDRF, 8,

RTD3, 8,

PEP0, 8,

PEP3, 8,

DPTF, 8,

SADE, 8,

SACR, 8,

SAHT, 8,

CTDP, 8,

LPMP, 8,

LPMV, 8,

ECEU, 8,

TGFG, 16,

MEMD, 8,

ATRA, 8,

PTRA, 8,

MEMC, 8,

MEMH, 8,

FND1, 8,

FND2, 8,

AMBD, 8,

AMAT, 8,

AMPT, 8,

AMCT, 8,

AMHT, 8,

SKDE, 8,

SKAT, 8,

SKPT, 8,

SKCT, 8,

SKHT, 8,

EFDE, 8,

EFAT, 8,

EFPT, 8,

EFCT, 8,

EFHT, 8,

VRDE, 8,

VRAT, 8,

VRPT, 8,

VRCT, 8,

VRHT, 8,

DPAP, 8,

DPPP, 8,

DPCP, 8,

DCMP, 8,

TRTV, 8,

LPOE, 8,

LPOP, 8,

LPOS, 8,

LPOW, 8,

LPER, 8,

PPSZ, 32,

DISE, 8,

BGMA, 64,

BGMS, 8,

BGIA, 16,

IRMC, 8,

NFCE, 8,

CHEN, 8,

S0ID, 8,

CTDB, 8,

DKSM, 8,

SIO1, 16,

SIO2, 16,

SPBA, 16,

SEC0, 32,

SEC1, 32,

SEC2, 32,

SEC3, 32,

SEC4, 32,

SEC5, 32,

SEC6, 32,

SEC7, 32,

SEC8, 32,

Offset (0x1F4),

WIFD, 8,

WFAT, 8,

WFPT, 8,

WFCT, 8,

WFHT, 8,

PWRE, 8,

PWRP, 8,

Offset (0x203),

XHPR, 8,

RIC0, 8,

DVS0, 8,

DVS1, 8,

DVS2, 8,

DVS3, 8,

GBSX, 8,

IUBE, 8,

IUCE, 8,

IUDE, 8,

ECNO, 8,

AUDD, 16,

IC0D, 16,

IC1D, 16,

IC1S, 16,

VRRD, 16,

PSCP, 8,

I20D, 16,

I21D, 16,

RCG0, 16,

ECDB, 8,

P2ME, 8,

SSH0, 16,

SSL0, 16,

SSD0, 16,

FMH0, 16,

FML0, 16,

FMD0, 16,

FPH0, 16,

FPL0, 16,

FPD0, 16,

SSH1, 16,

SSL1, 16,

SSD1, 16,

FMH1, 16,

FML1, 16,

FMD1, 16,

FPH1, 16,

FPL1, 16,

FPD1, 16,

M0C0, 16,

M1C0, 16,

M2C0, 16,

M0C1, 16,

M1C1, 16,

M2C1, 16,

M0C2, 16,

M1C2, 16,

M0C3, 16,

M1C3, 16,

M0C4, 16,

M1C4, 16,

M0C5, 16,

M1C5, 16,

TBSF, 8,

GIRQ, 32,

DMTP, 8,

DMTD, 8,

DMSH, 8,

LANP, 8,

SHSB, 8,

PLCS, 8,

PLVL, 16,

GN1E, 8,

G1AT, 8,

G1PT, 8,

G1CT, 8,

G1HT, 8,

GN2E, 8,

G2AT, 8,

G2PT, 8,

G2CT, 8,

G2HT, 8,

WWSD, 8,

CVSD, 8,

SSDD, 8,

INLD, 8,

IFAT, 8,

IFPT, 8,

IFCT, 8,

IFHT, 8,

SDWE, 8,

USBH, 8,

BCV4, 8,

WTV0, 8,

WTV1, 8,

APFU, 8,

SOHP, 8,

GP5F, 8,

NOHP, 8,

TBSE, 8,

WKFN, 8,

PEPC, 32,

VRSD, 16,

PB1E, 8,

GNID, 8,

WAND, 8,

WWAT, 8,

WWPT, 8,

WWCT, 8,

WWHT, 8,

Offset (0x2A3),

MPL0, 16,

CHGE, 8,

SAC3, 8,

MEM3, 8,

AMC3, 8,

SKC3, 8,

EFC3, 8,

VRC3, 8,

WFC3, 8,

G1C3, 8,

G2C3, 8,

IFC3, 8,

WWC3, 8,

WGC3, 8,

SPST, 8,

PERE, 8,

Offset (0x2B7),

GN3E, 8,

G3AT, 8,

G3PT, 8,

G3CT, 8,

G3HT, 8,

GN4E, 8,

G4AT, 8,

G4PT, 8,

G4CT, 8,

G4HT, 8,

GN5E, 8,

G5AT, 8,

G5PT, 8,

G5CT, 8,

G5HT, 8,

GN6E, 8,

G6AT, 8,

G6PT, 8,

G6CT, 8,

G6HT, 8,

ECLP, 8,

G3C3, 8,

G4C3, 8,

G5C3, 8,

G6C3, 8,

TSP1, 8,

TSP2, 8,

TSP3, 8,

TSP4, 8,

TSP5, 8,

TSP6, 8,

TSP7, 8,

TSP8, 8,

SSP1, 8,

SSP2, 8,

SSP3, 8,

SSP4, 8,

SSP5, 8,

SSP6, 8,

SSP7, 8,

SSP8, 8,

MEMS, 8,

Offset (0x2F8),

S1DE, 8,

S1AT, 8,

S1PT, 8,

S1CT, 8,

S1HT, 8,

S2DE, 8,

S2AT, 8,

S2PT, 8,

S2CT, 8,

S2HT, 8,

S3DE, 8,

S3AT, 8,

S3PT, 8,

S3CT, 8,

S3HT, 8,

S4DE, 8,

S4AT, 8,

S4PT, 8,

S4CT, 8,

S4HT, 8,

S5DE, 8,

S5AT, 8,

S5PT, 8,

S5CT, 8,

S5HT, 8,

S6DE, 8,

S6AT, 8,

S6PT, 8,

S6CT, 8,

S6HT, 8,

S7DE, 8,

S7AT, 8,

S7PT, 8,

S7CT, 8,

S7HT, 8,

S1S3, 8,

S2S3, 8,

S3S3, 8,

S4S3, 8,

S5S3, 8,

S6S3, 8,

S7S3, 8,

PSME, 8,

PDT1, 8,

PLM1, 16,

PTW1, 16,

PDT2, 8,

PLM2, 16,

PTW2, 16,

DDT1, 8,

DDP1, 8,

DLI1, 16,

DPL1, 16,

DTW1, 16,

DMI1, 16,

DMA1, 16,

DMT1, 16,

DDT2, 8,

DDP2, 8,

DLI2, 16,

DPL2, 16,

DTW2, 16,

DMI2, 16,

DMA2, 16,

DMT2, 16,

WIFE, 8,

DOM1, 8,

LIM1, 16,

TIM1, 16,

DOM2, 8,

LIM2, 16,

TIM2, 16,

DOM3, 8,

LIM3, 16,

TIM3, 16,

TRD0, 8,

TRL0, 8,

TRD1, 8,

TRL1, 8,

WDM1, 8,

CID1, 16,

WDM2, 8,

CID2, 16,

Offset (0x364),

APPE, 8,

MPL1, 16,

MPL2, 16,

SDS0, 8,

SDS1, 8,

SDS2, 8,

SDS3, 8,

SDS4, 8,

SDS5, 8,

SDS6, 8,

SDS7, 8,

SDS8, 8,

SDS9, 8,

SDSA, 8,

TPLB, 8,

TPLH, 16,

WTVX, 8,

WITX, 8,

GPTD, 8,

GDBT, 16,

UTKX, 8,

SPTD, 8,

GEXN, 8,

TBTS, 8,

TARS, 8,

FPAT, 8,

FPEN, 8,

FPGN, 32,

FPLV, 8,

CPAD, 16,

CPAB, 8,

TNAT, 8,

CPGN, 32,

CF2T, 8,

ATLB, 32,

SDM0, 8,

SDM1, 8,

SDM2, 8,

SDM3, 8,

SDM4, 8,

SDM5, 8,

SDM6, 8,

SDM7, 8,

SDM8, 8,

SDM9, 8,

SDMA, 8,

USTP, 8,

SSHI, 16,

SSLI, 16,

SSDI, 16,

FMHI, 16,

FMLI, 16,

FMDI, 16,

FPHI, 16,

FPLI, 16,

FPDI, 16,

M0CI, 16,

M1CI, 16,

M0CS, 16,

M1CS, 16,

M0CU, 16,

M1CU, 16,

CAMT, 8,

DS4D, 16,

IVDF, 8,

EIDF, 8,

GFPS, 32,

GFPI, 32,

GNSM, 8,

GNSC, 8,

GGNR, 32,

GBTW, 32,

GBTK, 32,

GBTI, 32,

GPDI, 32,

GPLI, 32,

CL00, 8,

CL01, 8,

CL02, 8,

CL03, 8,

L0EN, 8,

L1EN, 8,

L2EN, 8,

L3EN, 8,

CDIV, 8,

C0TP, 8,

C0CV, 8,

C0GP, 8,

C0IB, 8,

C0IA, 16,

C0P0, 8,

C0P1, 8,

C0P2, 8,

C0P3, 8,

C0G0, 8,

C0G1, 8,

C0G2, 8,

C0G3, 8,

C0F0, 8,

C0F1, 8,

C0F2, 8,

C0F3, 8,

C0A0, 8,

C0A1, 8,

C0A2, 8,

C0A3, 8,

C0I0, 8,

C0I1, 8,

C0I2, 8,

C0I3, 8,

C0PL, 8,

C1TP, 8,

C1CV, 8,

C1GP, 8,

C1IB, 8,

C1IA, 16,

C1P0, 8,

C1P1, 8,

C1P2, 8,

C1P3, 8,

C1G0, 8,

C1G1, 8,

C1G2, 8,

C1G3, 8,

C1F0, 8,

C1F1, 8,

C1F2, 8,

C1F3, 8,

C1A0, 8,

C1A1, 8,

C1A2, 8,

C1A3, 8,

C1I0, 8,

C1I1, 8,

C1I2, 8,

C1I3, 8,

C1PL, 8,

C2TP, 8,

C2CV, 8,

C2GP, 8,

C2IB, 8,

C2IA, 16,

C2P0, 8,

C2P1, 8,

C2P2, 8,

C2P3, 8,

C2G0, 8,

C2G1, 8,

C2G2, 8,

C2G3, 8,

C2F0, 8,

C2F1, 8,

C2F2, 8,

C2F3, 8,

C2A0, 8,

C2A1, 8,

C2A2, 8,

C2A3, 8,

C2I0, 8,

C2I1, 8,

C2I2, 8,

C2I3, 8,

C2PL, 8,

C3TP, 8,

C3CV, 8,

C3GP, 8,

C3IB, 8,

C3IA, 16,

C3P0, 8,

C3P1, 8,

C3P2, 8,

C3P3, 8,

C3G0, 8,

C3G1, 8,

C3G2, 8,

C3G3, 8,

C3F0, 8,

C3F1, 8,

C3F2, 8,

C3F3, 8,

C3A0, 8,

C3A1, 8,

C3A2, 8,

C3A3, 8,

C3I0, 8,

C3I1, 8,

C3I2, 8,

C3I3, 8,

C3PL, 8,

L0SM, 8,

L0H0, 8,

L0H1, 8,

L0H2, 8,

L0H3, 8,

L0H4, 8,

L0H5, 8,

L0H6, 8,

L0H7, 8,

L0H8, 8,

L0PL, 8,

L0M0, 8,

L0M1, 8,

L0M2, 8,

L0M3, 8,

L0M4, 8,

L0M5, 8,

L0M6, 8,

L0M7, 8,

L0M8, 8,

L0M9, 8,

L0MA, 8,

L0MB, 8,

L0MC, 8,

L0MD, 8,

L0ME, 8,

L0MF, 8,

L0DI, 8,

L0BS, 8,

L0A0, 16,

L0A1, 16,

L0A2, 16,

L0A3, 16,

L0A4, 16,

L0A5, 16,

L0A6, 16,

L0A7, 16,

L0A8, 16,

L0A9, 16,

L0AA, 16,

L0AB, 16,

L0D0, 8,

L0D1, 8,

L0D2, 8,

L0D3, 8,

L0D4, 8,

L0D5, 8,

L0D6, 8,

L0D7, 8,

L0D8, 8,

L0D9, 8,

L0DA, 8,

L0DB, 8,

L0DV, 8,

L0CV, 8,

L0LU, 8,

L0NL, 8,

L0EE, 8,

L0VC, 8,

L0FS, 8,

L0DG, 8,

L0C0, 8,

L0C1, 8,

L0C2, 8,

L0C3, 8,

L0CK, 32,

L0CL, 8,

L1SM, 8,

L1H0, 8,

L1H1, 8,

L1H2, 8,

L1H3, 8,

L1H4, 8,

L1H5, 8,

L1H6, 8,

L1H7, 8,

L1H8, 8,

L1PL, 8,

L1M0, 8,

L1M1, 8,

L1M2, 8,

L1M3, 8,

L1M4, 8,

L1M5, 8,

L1M6, 8,

L1M7, 8,

L1M8, 8,

L1M9, 8,

L1MA, 8,

L1MB, 8,

L1MC, 8,

L1MD, 8,

L1ME, 8,

L1MF, 8,

L1DI, 8,

L1BS, 8,

L1A0, 16,

L1A1, 16,

L1A2, 16,

L1A3, 16,

L1A4, 16,

L1A5, 16,

L1A6, 16,

L1A7, 16,

L1A8, 16,

L1A9, 16,

L1AA, 16,

L1AB, 16,

L1D0, 8,

L1D1, 8,

L1D2, 8,

L1D3, 8,

L1D4, 8,

L1D5, 8,

L1D6, 8,

L1D7, 8,

L1D8, 8,

L1D9, 8,

L1DA, 8,

L1DB, 8,

L1DV, 8,

L1CV, 8,

L1LU, 8,

L1NL, 8,

L1EE, 8,

L1VC, 8,

L1FS, 8,

L1DG, 8,

L1C0, 8,

L1C1, 8,

L1C2, 8,

L1C3, 8,

L1CK, 32,

L1CL, 8,

L2SM, 8,

L2H0, 8,

L2H1, 8,

L2H2, 8,

L2H3, 8,

L2H4, 8,

L2H5, 8,

L2H6, 8,

L2H7, 8,

L2H8, 8,

L2PL, 8,

L2M0, 8,

L2M1, 8,

L2M2, 8,

L2M3, 8,

L2M4, 8,

L2M5, 8,

L2M6, 8,

L2M7, 8,

L2M8, 8,

L2M9, 8,

L2MA, 8,

L2MB, 8,

L2MC, 8,

L2MD, 8,

L2ME, 8,

L2MF, 8,

L2DI, 8,

L2BS, 8,

L2A0, 16,

L2A1, 16,

L2A2, 16,

L2A3, 16,

L2A4, 16,

L2A5, 16,

L2A6, 16,

L2A7, 16,

L2A8, 16,

L2A9, 16,

L2AA, 16,

L2AB, 16,

L2D0, 8,

L2D1, 8,

L2D2, 8,

L2D3, 8,

L2D4, 8,

L2D5, 8,

L2D6, 8,

L2D7, 8,

L2D8, 8,

L2D9, 8,

L2DA, 8,

L2DB, 8,

L2DV, 8,

L2CV, 8,

L2LU, 8,

L2NL, 8,

L2EE, 8,

L2VC, 8,

L2FS, 8,

L2DG, 8,

L2C0, 8,

L2C1, 8,

L2C2, 8,

L2C3, 8,

L2CK, 32,

L2CL, 8,

L3SM, 8,

L3H0, 8,

L3H1, 8,

L3H2, 8,

L3H3, 8,

L3H4, 8,

L3H5, 8,

L3H6, 8,

L3H7, 8,

L3H8, 8,

L3PL, 8,

L3M0, 8,

L3M1, 8,

L3M2, 8,

L3M3, 8,

L3M4, 8,

L3M5, 8,

L3M6, 8,

L3M7, 8,

L3M8, 8,

L3M9, 8,

L3MA, 8,

L3MB, 8,

L3MC, 8,

L3MD, 8,

L3ME, 8,

L3MF, 8,

L3DI, 8,

L3BS, 8,

L3A0, 16,

L3A1, 16,

L3A2, 16,

L3A3, 16,

L3A4, 16,

L3A5, 16,

L3A6, 16,

L3A7, 16,

L3A8, 16,

L3A9, 16,

L3AA, 16,

L3AB, 16,

L3D0, 8,

L3D1, 8,

L3D2, 8,

L3D3, 8,

L3D4, 8,

L3D5, 8,

L3D6, 8,

L3D7, 8,

L3D8, 8,

L3D9, 8,

L3DA, 8,

L3DB, 8,

L3DV, 8,

L3CV, 8,

L3LU, 8,

L3NL, 8,

L3EE, 8,

L3VC, 8,

L3FS, 8,

L3DG, 8,

L3C0, 8,

L3C1, 8,

L3C2, 8,

L3C3, 8,

L3CK, 32,

L3CL, 8,

ECR1, 8,

Offset (0x5AA),

I2SC, 8,

ODV0, 8,

ODV1, 8,

ODV2, 8,

ODV3, 8,

ODV4, 8,

ODV5, 8,

UBCB, 32,

EMOD, 8,

WIFC, 8,

Offset (0x5BE),

TPLS, 8,

TPDB, 8,

TPDH, 16,

TPDS, 8,

AG1L, 64,

AG1H, 64,

AG2L, 64,

AG2H, 64,

AG3L, 64,

AG3H, 64,

HEFE, 8,

XDCE, 8

}

Device (PSM)

{

Name (_HID, EisaId ("INT3420")) // _HID: Hardware ID

Name (_UID, Zero) // _UID: Unique ID

Name (_STR, Unicode ("Power Sharing Manager")) // _STR: Description String

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (PSME, One))

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Name (SPLX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (PDT1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (PLM1, Index (DerefOf (Index (SPLX, One)), One))

Store (PTW1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (PDT2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (PLM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (PTW2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Return (SPLX)

}

Name (DPLX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x03)

{

0x80000000,

Package (0x06)

{

0x80000000,

0x80000000

}

})

Method (DPLC, 0, Serialized)

{

Store (DDT1, Index (DerefOf (Index (DPLX, One)), Zero))

Store (DDP1, Index (DerefOf (Index (DPLX, One)), One))

Store (DLI1, Index (DerefOf (Index (DerefOf (Index (DPLX, One)),

0x02)), Zero))

Store (DPL1, Index (DerefOf (Index (DerefOf (Index (DPLX, One)),

0x02)), One))

Store (DTW1, Index (DerefOf (Index (DerefOf (Index (DPLX, One)),

0x02)), 0x02))

Store (DMI1, Index (DerefOf (Index (DerefOf (Index (DPLX, One)),

0x02)), 0x03))

Store (DMA1, Index (DerefOf (Index (DerefOf (Index (DPLX, One)),

0x02)), 0x04))

Store (DMT1, Index (DerefOf (Index (DerefOf (Index (DPLX, One)),

0x02)), 0x05))

Store (DDT2, Index (DerefOf (Index (DPLX, 0x02)), Zero))

Store (DDP2, Index (DerefOf (Index (DPLX, 0x02)), One))

Store (DLI2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)),

0x02)), Zero))

Store (DPL2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)),

0x02)), One))

Store (DTW2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)),

0x02)), 0x02))

Store (DMI2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)),

0x02)), 0x03))

Store (DMA2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)),

0x02)), 0x04))

Store (DMT2, Index (DerefOf (Index (DerefOf (Index (DPLX, 0x02)),

0x02)), 0x05))

Return (DPLX)

}

Scope (_SB)

{

Name (PRSA, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{3,4,5,6,10,11,12,14,15}

})

Alias (PRSA, PRSB)

Alias (PRSA, PRSC)

Alias (PRSA, PRSD)

Alias (PRSA, PRSE)

Alias (PRSA, PRSF)

Alias (PRSA, PRSG)

Alias (PRSA, PRSH)

Name (PR00, Package (0x2A)

{

Package (0x04)

{

0x0001FFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x0001FFFF,

One,

LNKB,

Zero

Package (0x04)

{

0x0001FFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x0001FFFF,

0x03,

LNKD,

Zero

Package (0x04)

{

0x0004FFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x0005FFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x0008FFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x001FFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x001FFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0x001FFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x001FFFFF,

0x03,

LNKD,

Zero

Package (0x04)

{

0x001EFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x001EFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0x001EFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x001EFFFF,

0x03,

LNKD,

Zero

Package (0x04)

{

0x001DFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x001DFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0x001DFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x001DFFFF,

0x03,

LNKD,

Zero

Package (0x04)

{

0x001CFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x001CFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0x001CFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x001CFFFF,

0x03,

LNKD,

Zero

Package (0x04)

{

0x001BFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x001BFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0x001BFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x001BFFFF,

0x03,

LNKD,

Zero

Package (0x04)

{

0x0017FFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x0016FFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x0016FFFF,

One,

LNKB,

Zero

Package (0x04)

{

0x0016FFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x0016FFFF,

0x03,

LNKD,

Zero

Package (0x04)

{

0x0015FFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x0015FFFF,

One,

LNKB,

Zero

Package (0x04)

{

0x0015FFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x0015FFFF,

0x03,

LNKD,

Zero

Package (0x04)

{

0x0014FFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x0014FFFF,

One,

LNKB,

Zero

Package (0x04)

{

0x0014FFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x0014FFFF,

0x03,

LNKD,

Zero

Package (0x04)

{

0x0013FFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x0002FFFF,

Zero,

LNKA,

Zero

}

})

Name (AR00, Package (0x2A)

{

Package (0x04)

{

0x0001FFFF,

Zero,

0x10

Package (0x04)

{

0x0001FFFF,

One,

Zero,

0x11

Package (0x04)

{

0x0001FFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0x0001FFFF,

0x03,

Zero,

0x13

Package (0x04)

{

0x0004FFFF,

Zero,

0x10

Package (0x04)

{

0x0005FFFF,

Zero,

0x10

Package (0x04)

{

0x0008FFFF,

Zero,

0x10

Package (0x04)

{

0x001FFFFF,

Zero,

0x10

Package (0x04)

{

0x001FFFFF,

One,

Zero,

0x11

Package (0x04)

{

0x001FFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0x001FFFFF,

0x03,

Zero,

0x13

Package (0x04)

{

0x001EFFFF,

Zero,

0x14

Package (0x04)

{

0x001EFFFF,

One,

Zero,

0x15

Package (0x04)

{

0x001EFFFF,

0x02,

Zero,

0x16

Package (0x04)

{

0x001EFFFF,

0x03,

Zero,

0x17

Package (0x04)

{

0x001DFFFF,

Zero,

0x10

Package (0x04)

{

0x001DFFFF,

One,

Zero,

0x11

Package (0x04)

{

0x001DFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0x001DFFFF,

0x03,

Zero,

0x13

Package (0x04)

{

0x001CFFFF,

Zero,

0x10

Package (0x04)

{

0x001CFFFF,

One,

Zero,

0x11

Package (0x04)

{

0x001CFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0x001CFFFF,

0x03,

Zero,

0x13

Package (0x04)

{

0x001BFFFF,

Zero,

0x10

Package (0x04)

{

0x001BFFFF,

One,

Zero,

0x11

Package (0x04)

{

0x001BFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0x001BFFFF,

0x03,

Zero,

0x13

Package (0x04)

{

0x0017FFFF,

Zero,

0x10

Package (0x04)

{

0x0016FFFF,

Zero,

0x10

Package (0x04)

{

0x0016FFFF,

One,

Zero,

0x11

Package (0x04)

{

0x0016FFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0x0016FFFF,

0x03,

Zero,

0x13

Package (0x04)

{

0x0015FFFF,

Zero,

0x10

Package (0x04)

{

0x0015FFFF,

One,

Zero,

0x11

Package (0x04)

{

0x0015FFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0x0015FFFF,

0x03,

Zero,

0x13

Package (0x04)

{

0x0014FFFF,

Zero,

0x10

Package (0x04)

{

0x0014FFFF,

One,

Zero,

0x11

Package (0x04)

{

0x0014FFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0x0014FFFF,

0x03,

Zero,

0x13

Package (0x04)

{

0x0013FFFF,

Zero,

0x14

Package (0x04)

{

0x0002FFFF,

Zero,

0x10

}

})

Name (PR01, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKD,

Zero

}

})

Name (AR01, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x10

Package (0x04)

{

0xFFFF,

One,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x13

}

})

Name (PR02, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKA,

Zero

}

})

Name (AR02, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x11

Package (0x04)

{

0xFFFF,

One,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x10

}

})

Name (PR03, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKB,

Zero

}

})

Name (AR03, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x12

Package (0x04)

{

0xFFFF,

One,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x11

}

})

Name (PR0C, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKD,

Zero

}

})

Name (AR0C, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x10

Package (0x04)

{

0xFFFF,

One,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x13

}

})

Name (PR0D, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKA,

Zero

}

})

Name (AR0D, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x11

Package (0x04)

{

0xFFFF,

One,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x10

}

})

Name (PR0E, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKB,

Zero

}

})

Name (AR0E, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x12

Package (0x04)

{

0xFFFF,

One,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x11

}

})

Name (PR0F, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKC,

Zero

}

})

Name (AR0F, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x13

Package (0x04)

{

0xFFFF,

One,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x12

}

})

Name (PR10, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKD,

Zero

}

})

Name (AR10, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x10

Package (0x04)

{

0xFFFF,

One,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x13

}

})

Name (PR04, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKD,

Zero

}

})

Name (AR04, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x10

Package (0x04)

{

0xFFFF,

One,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x13

}

})

Name (PR05, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKA,

Zero

}

})

Name (AR05, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x11

Package (0x04)

{

0xFFFF,

One,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x10

}

})

Name (PR06, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKB,

Zero

}

})

Name (AR06, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x12

Package (0x04)

{

0xFFFF,

One,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x11

}

})

Name (PR07, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKC,

Zero

}

})

Name (AR07, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x13

Package (0x04)

{

0xFFFF,

One,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x12

}

})

Name (PR08, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKD,

Zero

}

})

Name (AR08, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x10

Package (0x04)

{

0xFFFF,

One,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x13

}

})

Name (PR09, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKA,

Zero

}

})

Name (AR09, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x11

Package (0x04)

{

0xFFFF,

One,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x10

}

})

Name (PR0A, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKB,

Zero

}

})

Name (AR0A, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x12

Package (0x04)

{

0xFFFF,

One,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x11

}

})

Name (PR0B, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKC,

Zero

}

})

Name (AR0B, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x13

Package (0x04)

{

0xFFFF,

One,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x12

}

})

Name (PR14, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKD,

Zero

}

})

Name (AR14, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x10

Package (0x04)

{

0xFFFF,

One,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x13

}

})

Name (PR15, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKA,

Zero

}

})

Name (AR15, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x11

Package (0x04)

{

0xFFFF,

One,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x10

}

})

Name (PR16, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKB,

Zero

}

})

Name (AR16, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x12

Package (0x04)

{

0xFFFF,

One,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x11

}

})

Name (PR17, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKC,

Zero

}

})

Name (AR17, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x13

Package (0x04)

{

0xFFFF,

One,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x12

}

})

Name (PR11, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKA,

Zero

}

})

Name (AR11, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x11

Package (0x04)

{

0xFFFF,

One,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x10

}

})

Name (PR12, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKB,

Zero

}

})

Name (AR12, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x12

Package (0x04)

{

0xFFFF,

One,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x11

}

})

Name (PR13, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKC,

Zero

}

})

Name (AR13, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x13

Package (0x04)

{

0xFFFF,

One,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x12

}

})

}

Scope (_SB)

{

Device (PCI0)

{

Name (_HID, EisaId ("PNP0A08")) // _HID: Hardware ID

Name (_CID, EisaId ("PNP0A03")) // _CID: Compatible ID

Name (_ADR, Zero) // _ADR: Address

Method (^BN00, 0, NotSerialized)

{

Return (Zero)

}

Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number

{

Return (BN00 ())

}

Name (_UID, Zero) // _UID: Unique ID

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR00)

}

Return (PR00)

}

OperationRegion (HBUS, PCI_Config, Zero, 0x0100)

Field (HBUS, DWordAcc, NoLock, Preserve)

{

Offset (0x40),

EPEN, 1,

, 11,

EPBR, 20,

Offset (0x48),

MHEN, 1,

, 14,

MHBR, 17,

Offset (0x50),

GCLK, 1,

Offset (0x54),

D0EN, 1,

D1F2, 1,

D1F1, 1,

D1F0, 1,

Offset (0x60),

PXEN, 1,

PXSZ, 2,

, 23,

PXBR, 6,

Offset (0x68),

DIEN, 1,

, 11,

DIBR, 20,

Offset (0x70),

, 20,

MEBR, 12,

Offset (0x80),

PMLK, 1,

, 3,

PM0H, 2,

Offset (0x81),

PM1L, 2,

, 2,

PM1H, 2,

Offset (0x82),

PM2L, 2,

, 2,

PM2H, 2,

Offset (0x83),

PM3L, 2,

, 2,

PM3H, 2,

Offset (0x84),

PM4L, 2,

, 2,

PM4H, 2,

Offset (0x85),

PM5L, 2,

, 2,

PM5H, 2,

Offset (0x86),

PM6L, 2,

, 2,

PM6H, 2,

Offset (0x87),

Offset (0xA8),

, 20,

TUUD, 19,

Offset (0xBC),

, 20,

TLUD, 12,

Offset (0xC8),

, 7,

HTSE, 1

}

Name (BUF0, ResourceTemplate ()

{

WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,

0x0000, // Granularity

0x0000, // Range Minimum

0x00FF, // Range Maximum

0x0000, // Translation Offset

0x0100, // Length

,, _Y00)

DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,

0x00000000, // Granularity

0x00000000, // Range Minimum

0x00000CF7, // Range Maximum

0x00000000, // Translation Offset

0x00000CF8, // Length

,, , TypeStatic)

IO (Decode16,

0x0CF8, // Range Minimum

0x0CF8, // Range Maximum

0x01, // Alignment

0x08, // Length

)

DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,

0x00000000, // Granularity

0x00000D00, // Range Minimum

0x0000FFFF, // Range Maximum

0x00000000, // Translation Offset

0x0000F300, // Length

,, , TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000A0000, // Range Minimum

0x000BFFFF, // Range Maximum

0x00000000, // Translation Offset

0x00020000, // Length

,, , AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000C0000, // Range Minimum

0x000C3FFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y01, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000C4000, // Range Minimum

0x000C7FFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y02, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000C8000, // Range Minimum

0x000CBFFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y03, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000CC000, // Range Minimum

0x000CFFFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y04, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000D0000, // Range Minimum

0x000D3FFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y05, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000D4000, // Range Minimum

0x000D7FFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y06, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000D8000, // Range Minimum

0x000DBFFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y07, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000DC000, // Range Minimum

0x000DFFFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y08, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000E0000, // Range Minimum

0x000E3FFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y09, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000E4000, // Range Minimum

0x000E7FFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y0A, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000E8000, // Range Minimum

0x000EBFFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y0B, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000EC000, // Range Minimum

0x000EFFFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y0C, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000F0000, // Range Minimum

0x000FFFFF, // Range Maximum

0x00000000, // Translation Offset

0x00010000, // Length

,, _Y0D, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,

0x00000000, // Granularity

0x00000000, // Range Minimum

0xDFFFFFFF, // Range Maximum

0x00000000, // Translation Offset

0xE0000000, // Length

,, _Y0E, AddressRangeMemory, TypeStatic)

QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,

0x0000000000000000, // Granularity

0x0000000000010000, // Range Minimum

0x000000000001FFFF, // Range Maximum

0x0000000000000000, // Translation Offset

0x0000000000010000, // Length

,, _Y0F, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,

0x00000000, // Granularity

0xFD000000, // Range Minimum

0xFE7FFFFF, // Range Maximum

0x00000000, // Translation Offset

0x01800000, // Length

,, , AddressRangeMemory, TypeStatic)

})

Name (EP_B, Zero)

Name (MH_B, Zero)

Name (PC_B, Zero)

Name (PC_L, Zero)

Name (DM_B, Zero)

Method (GEPB, 0, Serialized)

{

If (LEqual (EP_B, Zero))

{

ShiftLeft (EPBR, 0x0C, EP_B)

}

Return (EP_B)

}

Method (GMHB, 0, Serialized)

{

If (LEqual (MH_B, Zero))

{

ShiftLeft (MHBR, 0x0F, MH_B)

}

Return (MH_B)

}

Method (GPCB, 0, Serialized)

{

If (LEqual (PC_B, Zero))

{

ShiftLeft (PXBR, 0x1A, PC_B)

}

Return (PC_B)

}

Method (GPCL, 0, Serialized)

{

If (LEqual (PC_L, Zero))

{

ShiftRight (0x10000000, PXSZ, PC_L)

}

Return (PC_L)

}

Method (GDMB, 0, Serialized)

{

If (LEqual (DM_B, Zero))

{

ShiftLeft (DIBR, 0x0C, DM_B)

}

Return (DM_B)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Store (GPCL (), Local0)

CreateWordField (BUF0, \_SB.PCI0._Y00._MAX, PBMX) // _MAX: Maximum Base Address

Store (Subtract (ShiftRight (Local0, 0x14), 0x02), PBMX)

CreateWordField (BUF0, \_SB.PCI0._Y00._LEN, PBLN) // _LEN: Length

Store (Subtract (ShiftRight (Local0, 0x14), One), PBLN)

If (PM1L)

{

CreateDWordField (BUF0, \_SB.PCI0._Y01._LEN, C0LN) // _LEN: Length

Store (Zero, C0LN)

}

If (LEqual (PM1L, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y01._RW, C0RW) // _RW_: Read-Write Status

Store (Zero, C0RW)

}

If (PM1H)

{

CreateDWordField (BUF0, \_SB.PCI0._Y02._LEN, C4LN) // _LEN: Length

Store (Zero, C4LN)

}

If (LEqual (PM1H, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y02._RW, C4RW) // _RW_: Read-Write Status

Store (Zero, C4RW)

}

If (PM2L)

{

CreateDWordField (BUF0, \_SB.PCI0._Y03._LEN, C8LN) // _LEN: Length

Store (Zero, C8LN)

}

If (LEqual (PM2L, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y03._RW, C8RW) // _RW_: Read-Write Status

Store (Zero, C8RW)

}

If (PM2H)

{

CreateDWordField (BUF0, \_SB.PCI0._Y04._LEN, CCLN) // _LEN: Length

Store (Zero, CCLN)

}

If (LEqual (PM2H, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y04._RW, CCRW) // _RW_: Read-Write Status

Store (Zero, CCRW)

}

If (PM3L)

{

CreateDWordField (BUF0, \_SB.PCI0._Y05._LEN, D0LN) // _LEN: Length

Store (Zero, D0LN)

}

If (LEqual (PM3L, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y05._RW, D0RW) // _RW_: Read-Write Status

Store (Zero, D0RW)

}

If (PM3H)

{

CreateDWordField (BUF0, \_SB.PCI0._Y06._LEN, D4LN) // _LEN: Length

Store (Zero, D4LN)

}

If (LEqual (PM3H, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y06._RW, D4RW) // _RW_: Read-Write Status

Store (Zero, D4RW)

}

If (PM4L)

{

CreateDWordField (BUF0, \_SB.PCI0._Y07._LEN, D8LN) // _LEN: Length

Store (Zero, D8LN)

}

If (LEqual (PM4L, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y07._RW, D8RW) // _RW_: Read-Write Status

Store (Zero, D8RW)

}

If (PM4H)

{

CreateDWordField (BUF0, \_SB.PCI0._Y08._LEN, DCLN) // _LEN: Length

Store (Zero, DCLN)

}

If (LEqual (PM4H, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y08._RW, DCRW) // _RW_: Read-Write Status

Store (Zero, DCRW)

}

If (PM5L)

{

CreateDWordField (BUF0, \_SB.PCI0._Y09._LEN, E0LN) // _LEN: Length

Store (Zero, E0LN)

}

If (LEqual (PM5L, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y09._RW, E0RW) // _RW_: Read-Write Status

Store (Zero, E0RW)

}

If (PM5H)

{

CreateDWordField (BUF0, \_SB.PCI0._Y0A._LEN, E4LN) // _LEN: Length

Store (Zero, E4LN)

}

If (LEqual (PM5H, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y0A._RW, E4RW) // _RW_: Read-Write Status

Store (Zero, E4RW)

}

If (PM6L)

{

CreateDWordField (BUF0, \_SB.PCI0._Y0B._LEN, E8LN) // _LEN: Length

Store (Zero, E8LN)

}

If (LEqual (PM6L, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y0B._RW, E8RW) // _RW_: Read-Write Status

Store (Zero, E8RW)

}

If (PM6H)

{

CreateDWordField (BUF0, \_SB.PCI0._Y0C._LEN, ECLN) // _LEN: Length

Store (Zero, ECLN)

}

If (LEqual (PM6H, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y0C._RW, ECRW) // _RW_: Read-Write Status

Store (Zero, ECRW)

}

If (PM0H)

{

CreateDWordField (BUF0, \_SB.PCI0._Y0D._LEN, F0LN) // _LEN: Length

Store (Zero, F0LN)

}

If (LEqual (PM0H, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y0D._RW, F0RW) // _RW_: Read-Write Status

Store (Zero, F0RW)

}

CreateDWordField (BUF0, \_SB.PCI0._Y0E._MIN, M1MN) // _MIN: Minimum Base Address

CreateDWordField (BUF0, \_SB.PCI0._Y0E._MAX, M1MX) // _MAX: Maximum Base Address

CreateDWordField (BUF0, \_SB.PCI0._Y0E._LEN, M1LN) // _LEN: Length

Store (M32L, M1LN)

Store (M32B, M1MN)

Subtract (Add (M1MN, M1LN), One, M1MX)

If (LEqual (M64L, Zero))

{

CreateDWordField (BUF0, \_SB.PCI0._Y0F._LEN, MSLN) // _LEN: Length

Store (Zero, MSLN)

}

Else

{

CreateQWordField (BUF0, \_SB.PCI0._Y0F._LEN, M2LN) // _LEN: Length

CreateQWordField (BUF0, \_SB.PCI0._Y0F._MIN, M2MN) // _MIN: Minimum Base Address

CreateQWordField (BUF0, \_SB.PCI0._Y0F._MAX, M2MX) // _MAX: Maximum Base Address

Store (M64L, M2LN)

Store (M64B, M2MN)

Subtract (Add (M2MN, M2LN), One, M2MX)

}

Return (BUF0)

}

Name (GUID, Buffer (0x10)

{

/* 0000 */ 0x5B, 0x4D, 0xDB, 0x33, 0xF7, 0x1F, 0x1C, 0x40,

/* 0008 */ 0x96, 0x57, 0x74, 0x41, 0xC0, 0x3D, 0xD7, 0x66

})

Name (SUPP, Zero)

Name (CTRL, Zero)

Name (XCNT, Zero)

Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities

{

Store (Arg3, Local0)

CreateDWordField (Local0, Zero, CDW1)

CreateDWordField (Local0, 0x04, CDW2)

CreateDWordField (Local0, 0x08, CDW3)

If (LAnd (LEqual (Arg0, GUID), NEXP))

{

Store (CDW2, SUPP)

Store (CDW3, CTRL)

If (LAnd (LEqual (TBTS, One), LEqual (TNAT, One)))

{

And (CTRL, 0xFFFFFFF7, CTRL)

}

If (Not (And (CDW1, One)))

{

If (And (CTRL, One))

{

NHPG ()

}

If (And (CTRL, 0x04))

{

NPME ()

}

If (LNotEqual (Arg1, One))

{

Or (CDW1, 0x08, CDW1)

}

If (LNotEqual (CDW3, CTRL))

{

Or (CDW1, 0x10, CDW1)

}

Store (CTRL, CDW3)

Store (CTRL, OSCC)

Return (Local0)

}

Else

{

Or (CDW1, 0x04, CDW1)

Return (Local0)

}

Scope (\_SB.PCI0)

{

Device (GFX0)

{

Name (_ADR, 0x00020000) // _ADR: Address

}

Device (B0D4)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Name (_ADR, 0x00040000) // _ADR: Address

}

Scope (\_SB.PCI0)

{

Name (PALK, Zero)

Name (PA0H, Zero)

Name (PA1H, Zero)

Name (PA1L, Zero)

Name (PA2H, Zero)

Name (PA2L, Zero)

Name (PA3H, Zero)

Name (PA3L, Zero)

Name (PA4H, Zero)

Name (PA4L, Zero)

Name (PA5H, Zero)

Name (PA5L, Zero)

Name (PA6H, Zero)

Name (PA6L, Zero)

Method (NPTS, 1, NotSerialized)

{

Store (PM0H, PA0H)

Store (PMLK, PALK)

Store (PM1H, PA1H)

Store (PM1L, PA1L)

Store (PM2H, PA2H)

Store (PM2L, PA2L)

Store (PM3H, PA3H)

Store (PM3L, PA3L)

Store (PM4H, PA4H)

Store (PM4L, PA4L)

Store (PM5H, PA5H)

Store (PM5L, PA5L)

Store (PM6H, PA6H)

Store (PM6L, PA6L)

}

Method (NWAK, 1, NotSerialized)

{

Store (PA0H, PM0H)

Store (PA1H, PM1H)

Store (PA1L, PM1L)

Store (PA2H, PM2H)

Store (PA2L, PM2L)

Store (PA3H, PM3H)

Store (PA3L, PM3L)

Store (PA4H, PM4H)

Store (PA4L, PM4L)

Store (PA5H, PM5H)

Store (PA5L, PM5L)

Store (PA6H, PM6H)

Store (PA6L, PM6L)

Store (PALK, PMLK)

}

Device (PEG0)

{

Name (_ADR, 0x00010000) // _ADR: Address

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR01)

}

Return (PR01)

}

Device (PEGP)

{

Name (_ADR, Zero) // _ADR: Address

}

Device (PEG1)

{

Name (_ADR, 0x00010001) // _ADR: Address

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR02)

}

Return (PR02)

}

Device (PEGP)

{

Name (_ADR, Zero) // _ADR: Address

}

Device (PEG2)

{

Name (_ADR, 0x00010002) // _ADR: Address

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR03)

}

Return (PR03)

}

Device (PEGP)

{

Name (_ADR, Zero) // _ADR: Address

}

Device (LPCB)

{

Name (_ADR, 0x001F0000) // _ADR: Address

Scope (\_SB.PCI0.LPCB)

{

}

Method (SPTS, 1, NotSerialized)

{

Store (One, SLPX)

Store (One, SLPE)

}

Method (SWAK, 1, NotSerialized)

{

Store (Zero, SLPE)

If (RTCS) {}

Else

{

Notify (PWRB, 0x02)

}

OperationRegion (SMIE, SystemIO, PMBA, 0x04)

Field (SMIE, ByteAcc, NoLock, Preserve)

{

, 10,

RTCS, 1,

, 3,

PEXS, 1,

WAKS, 1,

Offset (0x03),

PWBT, 1,

Offset (0x04)

}

OperationRegion (SLPR, SystemIO, SMCR, 0x08)

Field (SLPR, ByteAcc, NoLock, Preserve)

{

, 4,

SLPE, 1,

, 31,

SLPX, 1,

Offset (0x08)

}

OperationRegion (CPSB, SystemMemory, 0x87970F18, 0x10)

Field (CPSB, AnyAcc, NoLock, Preserve)

{

RTCX, 1,

SBB0, 7,

SBB1, 8,

SBB2, 8,

SBB3, 8,

SBB4, 8,

SBB5, 8,

SBB6, 8,

SBB7, 8,

SBB8, 8,

SBB9, 8,

SBBA, 8,

SBBB, 8,

SBBC, 8,

SBBD, 8,

SBBE, 8,

SBBF, 8

}

Device (SIO1)

{

Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID

Name (_UID, Zero) // _UID: Unique ID

Name (CRS, ResourceTemplate ()

{

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x00, // Alignment

0x00, // Length

_Y10)

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x00, // Alignment

0x00, // Length

_Y11)

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x00, // Alignment

0x00, // Length

_Y12)

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x00, // Alignment

0x00, // Length

_Y13)

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x00, // Alignment

0x00, // Length

_Y14)

})

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

If (LAnd (LLess (SP1O, 0x03F0), LGreater (SP1O, 0xF0)))

{

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y10._MIN, GPI0) // _MIN: Minimum Base Address

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y10._MAX, GPI1) // _MAX: Maximum Base Address

CreateByteField (CRS, \_SB.PCI0.LPCB.SIO1._Y10._LEN, GPIL) // _LEN: Length

Store (SP1O, GPI0)

Store (SP1O, GPI1)

Store (0x02, GPIL)

}

If (IO1B)

{

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y11._MIN, GP10) // _MIN: Minimum Base Address

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y11._MAX, GP11) // _MAX: Maximum Base Address

CreateByteField (CRS, \_SB.PCI0.LPCB.SIO1._Y11._LEN, GPL1) // _LEN: Length

Store (IO1B, GP10)

Store (IO1B, GP11)

Store (IO1L, GPL1)

}

If (IO2B)

{

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y12._MIN, GP20) // _MIN: Minimum Base Address

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y12._MAX, GP21) // _MAX: Maximum Base Address

CreateByteField (CRS, \_SB.PCI0.LPCB.SIO1._Y12._LEN, GPL2) // _LEN: Length

Store (IO2B, GP20)

Store (IO2B, GP21)

Store (IO2L, GPL2)

}

If (IO3B)

{

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y13._MIN, GP30) // _MIN: Minimum Base Address

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y13._MAX, GP31) // _MAX: Maximum Base Address

CreateByteField (CRS, \_SB.PCI0.LPCB.SIO1._Y13._LEN, GPL3) // _LEN: Length

Store (IO3B, GP30)

Store (IO3B, GP31)

Store (IO3L, GPL3)

}

If (IO4B)

{

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y14._MIN, GP40) // _MIN: Minimum Base Address

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y14._MAX, GP41) // _MAX: Maximum Base Address

CreateByteField (CRS, \_SB.PCI0.LPCB.SIO1._Y14._LEN, GPL4) // _LEN: Length

Store (IO4B, GP40)

Store (IO4B, GP41)

Store (IO4L, GPL4)

}

Return (CRS)

}

Name (DCAT, Package (0x15)

{

0x02,

0x03,

One,

Zero,

0xFF,

0x05,

0xFF,

0x05,

0xFF,

0x06,

0xFF,

0xFF

})

Method (SIOK, 1, NotSerialized)

{

ENFG (0x0A)

While (OPT3)

{

Stall (0x80)

Store (0xFF, OPT3)

}

And (Arg0, One, Local0)

And (OPT2, 0xFE, Local1)

Or (Local0, Local1, OPT2)

Store (And (Arg0, One), ACTR)

EXFG ()

}

Method (SLED, 1, NotSerialized)

{

ENFG (0x0B)

If (Arg0)

{

If (LOr (LEqual (OPT7, 0x87), LEqual (OPT7, 0x40)))

{

Store (0x45, OPT7)

}

Else

{

If (LNotEqual (OPT7, Zero))

{

Store (0x40, OPT7)

}

EXFG ()

}

Mutex (MUT0, 0x00)

Method (ENFG, 1, NotSerialized)

{

Acquire (MUT0, 0x0FFF)

Store (ENTK, INDX)

Store (Arg0, LDN)

}

Method (EXFG, 0, NotSerialized)

{

Store (EXTK, INDX)

Release (MUT0)

}

Method (LPTM, 1, NotSerialized)

{

ENFG (CGLD (Arg0))

And (OPT0, 0x02, Local0)

EXFG ()

Return (Local0)

}

Method (UHID, 1, NotSerialized)

{

ENFG (CGLD (Arg0))

And (OPT0, 0x10, Local0)

EXFG ()

If (Local0)

{

Return (0x1005D041)

}

Else

{

Return (0x0105D041)

}

OperationRegion (IOID, SystemIO, SP1O, 0x02)

Field (IOID, ByteAcc, NoLock, Preserve)

{

INDX, 8,

DATA, 8

}

IndexField (INDX, DATA, ByteAcc, NoLock, Preserve)

{

Offset (0x07),

LDN, 8,

Offset (0x21),

SCF1, 8,

SCF2, 8,

SCF3, 8,

SCF4, 8,

SCF5, 8,

SCF6, 8,

SCF7, 8,

Offset (0x29),

CKCF, 8,

Offset (0x2F),

SCFF, 8,

ACTR, 8,

Offset (0x60),

IOAH, 8,

IOAL, 8,

IOH2, 8,

IOL2, 8,

Offset (0x70),

INTR, 4,

INTT, 4,

Offset (0x74),

DMCH, 8,

Offset (0xE0),

RGE0, 8,

RGE1, 8,

RGE2, 8,

RGE3, 8,

RGE4, 8,

RGE5, 8,

RGE6, 8,

RGE7, 8,

RGE8, 8,

RGE9, 8,

Offset (0xF0),

OPT0, 8,

OPT1, 8,

OPT2, 8,

OPT3, 8,

OPT4, 8,

OPT5, 8,

OPT6, 8,

OPT7, 8,

OPT8, 8,

OPT9, 8

}

Method (CGLD, 1, NotSerialized)

{

Return (DerefOf (Index (DCAT, Arg0)))

}

Method (DSTA, 1, NotSerialized)

{

ENFG (CGLD (Arg0))

Store (ACTR, Local0)

Or (ShiftLeft (IOAH, 0x08), IOAL, Local1)

EXFG ()

If (LEqual (Local0, 0xFF))

{

Return (Zero)

}

And (Local0, One, Local0)

If (LLess (Arg0, 0x10))

{

Or (IOST, ShiftLeft (Local0, Arg0), IOST)

}

If (Local0)

{

Return (0x0F)

}

Else

{

If (LLess (Arg0, 0x10))

{

If (And (ShiftLeft (One, Arg0), IOST))

{

Return (0x0D)

}

Else

{

Return (Zero)

}

Else

{

If (Local1)

{

Return (0x0D)

}

Return (Zero)

}

Method (DCNT, 2, NotSerialized)

{

ENFG (CGLD (Arg0))

If (LAnd (LLess (DMCH, 0x04), LNotEqual (And (DMCH, 0x03,

Local1), Zero)))

{

RDMA (Arg0, Arg1, Increment (Local1))

}

Store (Arg1, ACTR)

ShiftLeft (IOAH, 0x08, Local1)

Or (IOAL, Local1, Local1)

RRIO (Arg0, Arg1, Local1, 0x08)

EXFG ()

}

Name (CRS1, ResourceTemplate ()

{

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x01, // Alignment

0x00, // Length

_Y17)

IRQNoFlags (_Y15)

{}

DMA (Compatibility, NotBusMaster, Transfer8, _Y16)

{}

})

CreateWordField (CRS1, \_SB.PCI0.LPCB.SIO1._Y15._INT, IRQM) // _INT: Interrupts

CreateByteField (CRS1, \_SB.PCI0.LPCB.SIO1._Y16._DMA, DMAM) // _DMA: Direct Memory Access

CreateWordField (CRS1, \_SB.PCI0.LPCB.SIO1._Y17._MIN, IO11) // _MIN: Minimum Base Address

CreateWordField (CRS1, \_SB.PCI0.LPCB.SIO1._Y17._MAX, IO12) // _MAX: Maximum Base Address

CreateByteField (CRS1, \_SB.PCI0.LPCB.SIO1._Y17._LEN, LEN1) // _LEN: Length

Name (CRS2, ResourceTemplate ()

{

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x01, // Alignment

0x00, // Length

_Y1A)

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x01, // Alignment

0x00, // Length

_Y1B)

IRQNoFlags (_Y18)

{}

DMA (Compatibility, NotBusMaster, Transfer8, _Y19)

{}

})

CreateWordField (CRS2, \_SB.PCI0.LPCB.SIO1._Y18._INT, IRQE) // _INT: Interrupts

CreateByteField (CRS2, \_SB.PCI0.LPCB.SIO1._Y19._DMA, DMAE) // _DMA: Direct Memory Access

CreateWordField (CRS2, \_SB.PCI0.LPCB.SIO1._Y1A._MIN, IO21) // _MIN: Minimum Base Address

CreateWordField (CRS2, \_SB.PCI0.LPCB.SIO1._Y1A._MAX, IO22) // _MAX: Maximum Base Address

CreateByteField (CRS2, \_SB.PCI0.LPCB.SIO1._Y1A._LEN, LEN2) // _LEN: Length

CreateWordField (CRS2, \_SB.PCI0.LPCB.SIO1._Y1B._MIN, IO31) // _MIN: Minimum Base Address

CreateWordField (CRS2, \_SB.PCI0.LPCB.SIO1._Y1B._MAX, IO32) // _MAX: Maximum Base Address

CreateByteField (CRS2, \_SB.PCI0.LPCB.SIO1._Y1B._LEN, LEN3) // _LEN: Length

Method (DCRS, 2, NotSerialized)

{

ENFG (CGLD (Arg0))

ShiftLeft (IOAH, 0x08, IO11)

Or (IOAL, IO11, IO11)

Store (IO11, IO12)

Store (0x08, LEN1)

If (INTR)

{

ShiftLeft (One, INTR, IRQM)

}

Else

{

Store (Zero, IRQM)

}

If (LOr (LGreater (DMCH, 0x03), LEqual (Arg1, Zero)))

{

Store (Zero, DMAM)

}

Else

{

And (DMCH, 0x03, Local1)

ShiftLeft (One, Local1, DMAM)

}

EXFG ()

Return (CRS1)

}

Method (DCR2, 2, NotSerialized)

{

ENFG (CGLD (Arg0))

ShiftLeft (IOAH, 0x08, IO21)

Or (IOAL, IO21, IO21)

Store (IO21, IO22)

Store (0x08, LEN2)

ShiftLeft (IOH2, 0x08, IO31)

Or (IOL2, IO31, IO31)

Store (IO31, IO32)

Store (0x08, LEN3)

If (INTR)

{

ShiftLeft (One, INTR, IRQE)

}

Else

{

Store (Zero, IRQE)

}

If (LOr (LGreater (DMCH, 0x03), LEqual (Arg1, Zero)))

{

Store (Zero, DMAE)

}

Else

{

And (DMCH, 0x03, Local1)

ShiftLeft (One, Local1, DMAE)

}

EXFG ()

Return (CRS2)

}

Method (DSRS, 2, NotSerialized)

{

If (And (LEqual (Arg1, 0x02), LPTM (Arg1)))

{

DSR2 (Arg0, Arg1)

}

Else

{

CreateWordField (Arg0, 0x09, IRQM)

CreateByteField (Arg0, 0x0C, DMAM)

CreateWordField (Arg0, 0x02, IO11)

ENFG (CGLD (Arg1))

And (IO11, 0xFF, IOAL)

ShiftRight (IO11, 0x08, IOAH)

If (IRQM)

{

FindSetRightBit (IRQM, Local0)

Subtract (Local0, One, INTR)

}

Else

{

Store (Zero, INTR)

}

If (DMAM)

{

FindSetRightBit (DMAM, Local0)

Subtract (Local0, One, DMCH)

}

Else

{

Store (0x04, DMCH)

}

EXFG ()

DCNT (Arg1, One)

Store (Arg1, Local2)

If (LGreater (Local2, Zero))

{

Subtract (Local2, One, Local2)

}

Method (DSR2, 2, NotSerialized)

{

CreateWordField (Arg0, 0x11, IRQE)

CreateByteField (Arg0, 0x14, DMAE)

CreateWordField (Arg0, 0x02, IO21)

CreateWordField (Arg0, 0x0A, IO31)

ENFG (CGLD (Arg1))

And (IO21, 0xFF, IOAL)

ShiftRight (IO21, 0x08, IOAH)

And (IO31, 0xFF, IOL2)

ShiftRight (IO31, 0x08, IOH2)

If (IRQE)

{

FindSetRightBit (IRQE, Local0)

Subtract (Local0, One, INTR)

}

Else

{

Store (Zero, INTR)

}

If (DMAE)

{

FindSetRightBit (DMAE, Local0)

Subtract (Local0, One, DMCH)

}

Else

{

Store (0x04, DMCH)

}

EXFG ()

DCNT (Arg1, One)

Store (Arg1, Local2)

If (LGreater (Local2, Zero))

{

Subtract (Local2, One, Local2)

}

Name (PMFG, Zero)

Method (SIOS, 1, NotSerialized)

{

Store ("SIOS", Debug)

ENFG (0x0A)

If (KBFG)

{

OperationRegion (KBIO, SystemIO, 0x60, 0x05)

Field (KBIO, ByteAcc, NoLock, Preserve)

{

KBDT, 8,

Offset (0x02),

Offset (0x03),

Offset (0x04),

KBST, 8

}

If (LNotEqual (Arg0, 0x05))

{

Sleep (0xC8)

And (KBST, One, Local0)

While (Local0)

{

Store (KBDT, Local0)

Sleep (0xC8)

And (KBST, One, Local0)

}

If (LEqual (Arg0, One))

{

SIOK (Ones)

ENFG (0x0A)

If (KBFG)

{

Or (OPT6, 0x10, OPT6)

}

If (MSFG)

{

Or (OPT6, 0x20, OPT6)

}

Or (OPT2, One, OPT2)

And (RGE8, 0x3F, RGE8)

Or (OPT7, 0x10, OPT7)

And (RGE8, 0x3F, RGE8)

Or (RGE8, 0xC0, RGE8)

}

If (LGreaterEqual (Arg0, 0x03))

{

And (RGE0, 0x9F, RGE0)

Store (Zero, RGE1)

Store (Zero, RGE2)

Store (RGE3, Local0)

Sleep (0xC8)

If (KBFG)

{

Or (RGE0, 0x41, RGE0)

}

Else

{

And (RGE0, 0xBF, RGE0)

}

If (MSFG)

{

Or (RGE0, 0x22, RGE0)

}

Else

{

And (RGE0, 0xDF, RGE0)

}

And (RGE8, 0x3F, RGE8)

And (OPT7, 0xEF, OPT7)

}

If (Or (LEqual (Arg0, One), LEqual (Arg0, 0x03)))

{

Store (0x0A, LDN)

Or (OPT0, 0x20, OPT0)

Or (RGE4, 0x10, RGE4)

SLED (Ones)

}

EXFG ()

}

Method (SIOW, 1, NotSerialized)

{

Store ("SIOW", Debug)

ENFG (0x0A)

SIOK (Zero)

ENFG (0x0A)

While (OPT3)

{

Stall (0x80)

Store (0xFF, OPT3)

}

And (RGE0, 0x9F, RGE0)

And (OPT6, 0xCF, OPT6)

And (OPT2, 0xFE, OPT2)

SLED (Zero)

EXFG ()

}

Method (SIOH, 0, NotSerialized)

{

If (And (PMFG, 0x08)) {}

If (And (PMFG, 0x10)) {}

}

Device (HHMD)

{

Name (_HID, EisaId ("PNP0C08")) // _HID: Hardware ID

Name (_UID, Zero) // _UID: Unique ID

Name (LDN, 0x0B)

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (Zero)

}

Device (SGPI)

{

Name (_HID, EisaId ("PNP0C08")) // _HID: Hardware ID

Name (_UID, One) // _UID: Unique ID

Name (LDN, 0x09)

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (Zero)

}

Device (PS2K)

{

Name (_HID, EisaId ("PNP0303")) // _HID: Hardware ID

Name (_UID, Zero) // _UID: Unique ID

Name (LDN, 0x05)

Name (_CID, EisaId ("PNP030B")) // _CID: Compatible ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (And (IOST, 0x0400))

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

IO (Decode16,

0x0060, // Range Minimum

0x0060, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IO (Decode16,

0x0064, // Range Minimum

0x0064, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IRQNoFlags ()

{1}

})

Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings

{

StartDependentFn (0x00, 0x00)

{

IO (Decode16,

0x0060, // Range Minimum

0x0060, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IO (Decode16,

0x0064, // Range Minimum

0x0064, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IRQNoFlags ()

{1}

}

EndDependentFn ()

})

Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake

{

Store (Arg0, KBFG)

}

Scope (\)

{

Name (KBFG, One)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x6D, 0x04))

}

Device (PS2M)

{

Name (_HID, EisaId ("PNP0F03")) // _HID: Hardware ID

Name (_UID, Zero) // _UID: Unique ID

Name (LDN, 0x05)

Name (_CID, EisaId ("PNP0F13")) // _CID: Compatible ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (And (IOST, 0x4000))

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Name (CRS1, ResourceTemplate ()

{

IRQNoFlags ()

{12}

})

Name (CRS2, ResourceTemplate ()

{

IO (Decode16,

0x0060, // Range Minimum

0x0060, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IO (Decode16,

0x0064, // Range Minimum

0x0064, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IRQNoFlags ()

{12}

})

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

If (And (IOST, 0x0400))

{

Return (CRS1)

}

Else

{

Return (CRS2)

}

Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings

{

StartDependentFn (0x00, 0x00)

{

IRQNoFlags ()

{12}

}

EndDependentFn ()

})

Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake

{

Store (Arg0, MSFG)

}

Scope (\)

{

Name (MSFG, One)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x6D, 0x04))

}

Device (RP09)

{

Name (_ADR, 0x001D0000) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0380)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (PMSX)

{

Store (0xC8, Local0)

While (Local0)

{

Store (One, PMSX)

If (PMSX)

{

Decrement (Local0)

}

Else

{

Store (Zero, Local0)

}

Notify (PXSX, 0x02)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR0C)

}

Return (PR0C)

}

Device (RP10)

{

Name (_ADR, 0x001D0001) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0380)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (PMSX)

{

Store (0xC8, Local0)

While (Local0)

{

Store (One, PMSX)

If (PMSX)

{

Decrement (Local0)

}

Else

{

Store (Zero, Local0)

}

Notify (PXSX, 0x02)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR0D)

}

Return (PR0D)

}

Device (RP11)

{

Name (_ADR, 0x001D0002) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0380)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (PMSX)

{

Store (0xC8, Local0)

While (Local0)

{

Store (One, PMSX)

If (PMSX)

{

Decrement (Local0)

}

Else

{

Store (Zero, Local0)

}

Notify (PXSX, 0x02)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR0E)

}

Return (PR0E)

}

Device (RP12)

{

Name (_ADR, 0x001D0003) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0380)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (PMSX)

{

Store (0xC8, Local0)

While (Local0)

{

Store (One, PMSX)

If (PMSX)

{

Decrement (Local0)

}

Else

{

Store (Zero, Local0)

}

Notify (PXSX, 0x02)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR0F)

}

Return (PR0F)

}

Device (D050)

{

Name (_ADR, Zero) // _ADR: Address

}

Device (RP13)

{

Name (_ADR, 0x001D0004) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0380)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (PMSX)

{

Store (0xC8, Local0)

While (Local0)

{

Store (One, PMSX)

If (PMSX)

{

Decrement (Local0)

}

Else

{

Store (Zero, Local0)

}

Notify (PXSX, 0x02)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR10)

}

Return (PR10)

}

Device (RP01)

{

Name (_ADR, 0x001C0000) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0380)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (PMSX)

{

Store (0xC8, Local0)

While (Local0)

{

Store (One, PMSX)

If (PMSX)

{

Decrement (Local0)

}

Else

{

Store (Zero, Local0)

}

Notify (PXSX, 0x02)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR04)

}

Return (PR04)

}

Device (RP02)

{

Name (_ADR, 0x001C0001) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0380)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (PMSX)

{

Store (0xC8, Local0)

While (Local0)

{

Store (One, PMSX)

If (PMSX)

{

Decrement (Local0)

}

Else

{

Store (Zero, Local0)

}

Notify (PXSX, 0x02)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR05)

}

Return (PR05)

}

Device (RP03)

{

Name (_ADR, 0x001C0002) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0380)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (PMSX)

{

Store (0xC8, Local0)

While (Local0)

{

Store (One, PMSX)

If (PMSX)

{

Decrement (Local0)

}

Else

{

Store (Zero, Local0)

}

Notify (PXSX, 0x02)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR06)

}

Return (PR06)

}

Device (RP04)

{

Name (_ADR, 0x001C0003) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0380)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (PMSX)

{

Store (0xC8, Local0)

While (Local0)

{

Store (One, PMSX)

If (PMSX)

{

Decrement (Local0)

}

Else

{

Store (Zero, Local0)

}

Notify (PXSX, 0x02)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR07)

}

Return (PR07)

}

Device (RP05)

{

Name (_ADR, 0x001C0004) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0380)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (PMSX)

{

Store (0xC8, Local0)

While (Local0)

{

Store (One, PMSX)

If (PMSX)

{

Decrement (Local0)

}

Else

{

Store (Zero, Local0)

}

Notify (PXSX, 0x02)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR08)

}

Return (PR08)

}

Device (RP06)

{

Name (_ADR, 0x001C0005) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0380)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (PMSX)

{

Store (0xC8, Local0)

While (Local0)

{

Store (One, PMSX)

If (PMSX)

{

Decrement (Local0)

}

Else

{

Store (Zero, Local0)

}

Notify (PXSX, 0x02)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR09)

}

Return (PR09)

}

Device (RP07)

{

Name (_ADR, 0x001C0006) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0380)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (PMSX)

{

Store (0xC8, Local0)

While (Local0)

{

Store (One, PMSX)

If (PMSX)

{

Decrement (Local0)

}

Else

{

Store (Zero, Local0)

}

Notify (PXSX, 0x02)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR0A)

}

Return (PR0A)

}

Device (RP08)

{

Name (_ADR, 0x001C0007) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0380)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (PMSX)

{

Store (0xC8, Local0)

While (Local0)

{

Store (One, PMSX)

If (PMSX)

{

Decrement (Local0)

}

Else

{

Store (Zero, Local0)

}

Notify (PXSX, 0x02)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR0B)

}

Return (PR0B)

}

Device (RP17)

{

Name (_ADR, 0x001B0000) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0380)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (PMSX)

{

Store (0xC8, Local0)

While (Local0)

{

Store (One, PMSX)

If (PMSX)

{

Decrement (Local0)

}

Else

{

Store (Zero, Local0)

}

Notify (PXSX, 0x02)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR14)

}

Return (PR14)

}

Device (RP18)

{

Name (_ADR, 0x001B0001) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0380)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (PMSX)

{

Store (0xC8, Local0)

While (Local0)

{

Store (One, PMSX)

If (PMSX)

{

Decrement (Local0)

}

Else

{

Store (Zero, Local0)

}

Notify (PXSX, 0x02)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR15)

}

Return (PR15)

}

Device (RP19)

{

Name (_ADR, 0x001B0002) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0380)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (PMSX)

{

Store (0xC8, Local0)

While (Local0)

{

Store (One, PMSX)

If (PMSX)

{

Decrement (Local0)

}

Else

{

Store (Zero, Local0)

}

Notify (PXSX, 0x02)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR16)

}

Return (PR16)

}

Device (RP20)

{

Name (_ADR, 0x001B0003) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0380)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (PMSX)

{

Store (0xC8, Local0)

While (Local0)

{

Store (One, PMSX)

If (PMSX)

{

Decrement (Local0)

}

Else

{

Store (Zero, Local0)

}

Notify (PXSX, 0x02)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR17)

}

Return (PR17)

}

Device (RP14)

{

Name (_ADR, 0x001D0005) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0380)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (PMSX)

{

Store (0xC8, Local0)

While (Local0)

{

Store (One, PMSX)

If (PMSX)

{

Decrement (Local0)

}

Else

{

Store (Zero, Local0)

}

Notify (PXSX, 0x02)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR11)

}

Return (PR11)

}

Device (RP15)

{

Name (_ADR, 0x001D0006) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0380)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (PMSX)

{

Store (0xC8, Local0)

While (Local0)

{

Store (One, PMSX)

If (PMSX)

{

Decrement (Local0)

}

Else

{

Store (Zero, Local0)

}

Notify (PXSX, 0x02)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR12)

}

Return (PR12)

}

Device (RP16)

{

Name (_ADR, 0x001D0007) // _ADR: Address

OperationRegion (PXCS, PCI_Config, Zero, 0x0380)

Field (PXCS, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x19),

SBNR, 8,

Offset (0x50),

L0SE, 1,

, 3,

LDIS, 1,

Offset (0x51),

Offset (0x52),

, 13,

LASX, 1,

Offset (0x54),

, 6,

HPCE, 1,

Offset (0x5A),

ABPX, 1,

, 2,

PDCX, 1,

, 2,

PDSX, 1,

Offset (0x5B),

Offset (0x60),

Offset (0x62),

PSPX, 1,

PMEP, 1,

Offset (0xA4),

D3HT, 2,

Offset (0xD8),

, 30,

HPEX, 1,

PMEX, 1,

Offset (0xE2),

, 2,

L23E, 1,

L23R, 1,

Offset (0x324),

, 3,

LEDM, 1

}

Field (PXCS, AnyAcc, NoLock, WriteAsZeros)

{

Offset (0xDC),

, 30,

HPSX, 1,

PMSX, 1

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Name (OPTS, Buffer (0x02)

{

0x00, 0x00

})

CreateBitField (OPTS, Zero, FUN0)

CreateBitField (OPTS, 0x04, FUN4)

CreateBitField (OPTS, 0x06, FUN6)

CreateBitField (OPTS, 0x08, FUN8)

CreateBitField (OPTS, 0x09, FUN9)

If (LGreaterEqual (Arg1, 0x02))

{

Store (One, FUN0)

If (LTRE)

{

Store (One, FUN6)

}

If (OBFF)

{

Store (One, FUN4)

}

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Store (One, FUN8)

Store (One, FUN9)

}

Return (OPTS)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFN)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRN)

{

If (LOr (LEqual (LMSL, Zero), LEqual (LNSL, Zero)))

{

If (LEqual (PCHS, SPTH))

{

Store (0x0846, LMSL)

Store (0x0846, LNSL)

}

Else

{

If (LEqual (PCHS, SPTL))

{

Store (0x1003, LMSL)

Store (0x1003, LNSL)

}

Store (And (ShiftRight (LMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (LMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (LNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (LNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Device (PXSX)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (HPCE)

}

Method (HPME, 0, Serialized)

{

If (PMSX)

{

Store (0xC8, Local0)

While (Local0)

{

Store (One, PMSX)

If (PMSX)

{

Decrement (Local0)

}

Else

{

Store (Zero, Local0)

}

Notify (PXSX, 0x02)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTR1, LTRE)

Store (PML1, LMSL)

Store (PNL1, LNSL)

Store (OBF1, OBFF)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table

{

If (PICM)

{

Return (AR13)

}

Return (PR13)

}

Device (D04F)

{

Name (_ADR, 0xFF) // _ADR: Address

}

Scope (_GPE)

{

}

Name (_S0, Package (0x04) // _S0_: S0 System State

{

Zero,

Zero

})

Name (_S3, Package (0x04) // _S3_: S3 System State

{

0x05,

Zero,

Zero

})

Name (_S4, Package (0x04) // _S4_: S4 System State

{

0x06,

Zero,

Zero

})

Name (_S5, Package (0x04) // _S5_: S5 System State

{

0x07,

Zero,

Zero

})

Method (_PTS, 1, NotSerialized) // _PTS: Prepare To Sleep

{

If (LEqual (Arg0, 0x05)) {}

Else

{

If (Arg0)

{

LEDS (Arg0)

\_SB.PCI0.LPCB.SIO1.SIOS (Arg0)

\_SB.PCI0.LPCB.SPTS (Arg0)

\_SB.PCI0.NPTS (Arg0)

RPTS (Arg0)

}

Method (_WAK, 1, NotSerialized) // _WAK: Wake

{

If (LOr (LLess (Arg0, One), LGreater (Arg0, 0x05)))

{

Store (0x03, Arg0)

}

RWAK (Arg0)

\_SB.PCI0.NWAK (Arg0)

\_SB.PCI0.LPCB.SWAK (Arg0)

\_SB.PCI0.LPCB.SIO1.SIOW (Arg0)

LEDW (Arg0)

Return (WAKP)

}

Scope (_PR)

{

Processor (CPU0, 0x01, 0x00001810, 0x06) {}

Processor (CPU1, 0x02, 0x00001810, 0x06) {}

Processor (CPU2, 0x03, 0x00001810, 0x06) {}

Processor (CPU3, 0x04, 0x00001810, 0x06) {}

Processor (CPU4, 0x05, 0x00001810, 0x06) {}

Processor (CPU5, 0x06, 0x00001810, 0x06) {}

Processor (CPU6, 0x07, 0x00001810, 0x06) {}

Processor (CPU7, 0x08, 0x00001810, 0x06) {}

}

Scope (_PR.CPU0)

{

Name (CPC1, Package (0x11)

{

0x11,

One,

ResourceTemplate ()

{

0x08, // Bit Width

0x00, // Bit Offset

0x0000000000000771, // Address

0x04, // Access Size

)

0x10,

Zero,

ResourceTemplate ()

{

0x08, // Bit Width

0x00, // Bit Offset

0x0000000000001234, // Address

0x02, // Access Size

)

ResourceTemplate ()

{

0x08, // Bit Width

0x10, // Bit Offset

0x0000000000000774, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x08, // Bit Width

0x00, // Bit Offset

0x0000000000000774, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x08, // Bit Width

0x08, // Bit Offset

0x0000000000000774, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x00, // Bit Width

0x00, // Bit Offset

0x0000000000000000, // Address

ResourceTemplate ()

{

0x00, // Bit Width

0x00, // Bit Offset

0x0000000000000000, // Address

ResourceTemplate ()

{

0x00, // Bit Width

0x00, // Bit Offset

0x0000000000000000, // Address

ResourceTemplate ()

{

0x40, // Bit Width

0x00, // Bit Offset

0x00000000000000E7, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x40, // Bit Width

0x00, // Bit Offset

0x00000000000000E8, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x01, // Bit Width

0x01, // Bit Offset

0x0000000000000777, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x01, // Bit Width

0x00, // Bit Offset

0x0000000000000770, // Address

0x04, // Access Size

)

}

})

Name (CPC2, Package (0x15)

{

0x15,

0x02,

ResourceTemplate ()

{

0x08, // Bit Width

0x00, // Bit Offset

0x0000000000000771, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x08, // Bit Width

0x08, // Bit Offset

0x00000000000000CE, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x08, // Bit Width

0x10, // Bit Offset

0x0000000000000771, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x08, // Bit Width

0x18, // Bit Offset

0x0000000000000771, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x08, // Bit Width

0x08, // Bit Offset

0x0000000000000771, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x08, // Bit Width

0x10, // Bit Offset

0x0000000000000774, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x08, // Bit Width

0x00, // Bit Offset

0x0000000000000774, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x08, // Bit Width

0x08, // Bit Offset

0x0000000000000774, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x00, // Bit Width

0x00, // Bit Offset

0x0000000000000000, // Address

ResourceTemplate ()

{

0x00, // Bit Width

0x00, // Bit Offset

0x0000000000000000, // Address

ResourceTemplate ()

{

0x00, // Bit Width

0x00, // Bit Offset

0x0000000000000000, // Address

ResourceTemplate ()

{

0x40, // Bit Width

0x00, // Bit Offset

0x00000000000000E7, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x40, // Bit Width

0x00, // Bit Offset

0x00000000000000E8, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x02, // Bit Width

0x01, // Bit Offset

0x0000000000000777, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x01, // Bit Width

0x00, // Bit Offset

0x0000000000000770, // Address

0x04, // Access Size

)

One,

ResourceTemplate ()

{

0x0A, // Bit Width

0x20, // Bit Offset

0x0000000000000774, // Address

0x04, // Access Size

)

ResourceTemplate ()

{

0x08, // Bit Width

0x18, // Bit Offset

0x0000000000000774, // Address

0x04, // Access Size

)

Zero

})

}

Scope (_SB)

{

Device (PAGD)

{

Name (_HID, "ACPI000C") // _HID: Hardware ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (OOSI ("Processor Aggregator Device"))

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Name (_PUR, Package (0x02) // _PUR: Processor Utilization Request

{

One,

Zero

})

}

Scope (_SB.PCI0)

{

Device (PDRC)

{

Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID

Name (_UID, One) // _UID: Unique ID

Name (BUF0, ResourceTemplate ()

{

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00008000, // Address Length

_Y1C)

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00001000, // Address Length

_Y1D)

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00001000, // Address Length

_Y1E)

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00000000, // Address Length

_Y1F)

Memory32Fixed (ReadWrite,

0xFED20000, // Address Base

0x00020000, // Address Length

)

Memory32Fixed (ReadOnly,

0xFED90000, // Address Base

0x00004000, // Address Length

)

Memory32Fixed (ReadWrite,

0xFED45000, // Address Base

0x0004B000, // Address Length

)

Memory32Fixed (ReadOnly,

0xFF000000, // Address Base

0x01000000, // Address Length

)

Memory32Fixed (ReadOnly,

0xFEE00000, // Address Base

0x00100000, // Address Length

)

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00000000, // Address Length

_Y20)

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00000000, // Address Length

_Y21)

})

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y1C._BAS, MBR0) // _BAS: Base Address

Store (GMHB (), MBR0)

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y1D._BAS, DBR0) // _BAS: Base Address

Store (GDMB (), DBR0)

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y1E._BAS, EBR0) // _BAS: Base Address

Store (GEPB (), EBR0)

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y1F._BAS, XBR0) // _BAS: Base Address

Store (GPCB (), XBR0)

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y1F._LEN, XSZ0) // _LEN: Length

Store (GPCL (), XSZ0)

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y20._BAS, SXRA) // _BAS: Base Address

Store (SXRB, SXRA)

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y20._LEN, SXRL) // _LEN: Length

Store (SXRS, SXRL)

If (LNot (HPTE))

{

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y21._BAS, HBAS) // _BAS: Base Address

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y21._LEN, HLEN) // _LEN: Length

Store (HPTB, HBAS)

Store (0x0400, HLEN)

}

Return (BUF0)

}

Method (BRTN, 1, Serialized)

{

If (LEqual (And (DIDX, 0x0F00), 0x0400))

{

Notify (\_SB.PCI0.GFX0.DD1F, Arg0)

}

Name (PNVB, 0x87F99C98)

Name (PNVL, 0x01F8)

If (LEqual (ECR1, One))

{

Scope (_SB.PCI0)

{

Name (PCIG, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

})

Method (PCID, 4, Serialized)

{

If (LEqual (Arg0, PCIG))

{

If (LGreaterEqual (Arg1, 0x03))

{

If (LEqual (Arg2, Zero))

{

Return (Buffer (0x02)

{

0x01, 0x03

})

}

If (LEqual (Arg2, 0x08))

{

Return (One)

}

If (LEqual (Arg2, 0x09))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Return (Buffer (One)

{

0x00

})

}

Scope (_SB.PCI0)

{

Method (PCIC, 1, Serialized)

{

If (LEqual (ECR1, One))

{

If (LEqual (Arg0, PCIG))

{

Return (One)

}

Return (Zero)

}

OperationRegion (PNVA, SystemMemory, PNVB, PNVL)

Field (PNVA, AnyAcc, Lock, Preserve)

{

RCRV, 32,

PCHS, 16,

PCHG, 16,

RPA1, 32,

RPA2, 32,

RPA3, 32,

RPA4, 32,

RPA5, 32,

RPA6, 32,

RPA7, 32,

RPA8, 32,

RPA9, 32,

RPAA, 32,

RPAB, 32,

RPAC, 32,

RPAD, 32,

RPAE, 32,

RPAF, 32,

RPAG, 32,

RPAH, 32,

RPAI, 32,

RPAJ, 32,

RPAK, 32,

NHLA, 64,

NHLL, 32,

ADFM, 32,

SBRG, 32,

GPEM, 32,

G2L0, 32,

G2L1, 32,

G2L2, 32,

G2L3, 32,

G2L4, 32,

G2L5, 32,

G2L6, 32,

G2L7, 32,

G2L8, 32,

G2L9, 32,

PML1, 16,

PML2, 16,

PML3, 16,

PML4, 16,

PML5, 16,

PML6, 16,

PML7, 16,

PML8, 16,

PML9, 16,

PMLA, 16,

PMLB, 16,

PMLC, 16,

PMLD, 16,

PMLE, 16,

PMLF, 16,

PMLG, 16,

PMLH, 16,

PMLI, 16,

PMLJ, 16,

PMLK, 16,

PNL1, 16,

PNL2, 16,

PNL3, 16,

PNL4, 16,

PNL5, 16,

PNL6, 16,

PNL7, 16,

PNL8, 16,

PNL9, 16,

PNLA, 16,

PNLB, 16,

PNLC, 16,

PNLD, 16,

PNLE, 16,

PNLF, 16,

PNLG, 16,

PNLH, 16,

PNLI, 16,

PNLJ, 16,

PNLK, 16,

U0C0, 32,

U1C0, 32,

ADPM, 32,

XHPC, 8,

XRPC, 8,

XSPC, 8,

XSPA, 8,

HPTB, 32,

HPTE, 8,

SMD0, 8,

SMD1, 8,

SMD2, 8,

SMD3, 8,

SMD4, 8,

SMD5, 8,

SMD6, 8,

SMD7, 8,

SMD8, 8,

SMD9, 8,

SMDA, 8,

SIR0, 8,

SIR1, 8,

SIR2, 8,

SIR3, 8,

SIR4, 8,

SIR5, 8,

SIR6, 8,

SIR7, 8,

SIR8, 8,

SIR9, 8,

SIRA, 8,

SB00, 32,

SB01, 32,

SB02, 32,

SB03, 32,

SB04, 32,

SB05, 32,

SB06, 32,

SB07, 32,

SB08, 32,

SB09, 32,

SB0A, 32,

SB10, 32,

SB11, 32,

SB12, 32,

SB13, 32,

SB14, 32,

SB15, 32,

SB16, 32,

SB17, 32,

SB18, 32,

SB19, 32,

SB1A, 32,

GPEN, 8,

SGIR, 8,

NIT1, 8,

NIT2, 8,

NIT3, 8,

NPM1, 8,

NPM2, 8,

NPM3, 8,

NPC1, 8,

NPC2, 8,

NPC3, 8,

NL11, 16,

NL12, 16,

NL13, 16,

ND21, 8,

ND22, 8,

ND23, 8,

ND11, 32,

ND12, 32,

ND13, 32,

NLR1, 16,

NLR2, 16,

NLR3, 16,

NLD1, 32,

NLD2, 32,

NLD3, 32,

NEA1, 16,

NEA2, 16,

NEA3, 16,

NEB1, 16,

NEB2, 16,

NEB3, 16,

NEC1, 16,

NEC2, 16,

NEC3, 16,

NRA1, 16,

NRA2, 16,

NRA3, 16,

NMB1, 32,

NMB2, 32,

NMB3, 32,

NMV1, 32,

NMV2, 32,

NMV3, 32,

NPB1, 32,

NPB2, 32,

NPB3, 32,

NPV1, 32,

NPV2, 32,

NPV3, 32,

Offset (0x1E6),

SXRB, 32,

SXRS, 32,

CIOE, 8,

CIOI, 8,

TAEN, 8,

TIRQ, 8,

XWMB, 32,

EMH4, 8,

CSKU, 8

}

Scope (_SB)

{

Name (GCOM, Package (0x02)

{

Package (0x08)

{

0x00AF0000,

0x00AE0000,

0x00AC0000,

0x00AD0000

Package (0x0A)

{

0x00AF0000,

0x00AE0000,

0x00AC0000,

0x00AD0000

}

})

Name (GPPG, Package (0x02)

{

Package (0x08)

{

0x18,

0x08,

0x0C

Package (0x0A)

{

0x18,

0x0D,

0x18,

0x0B,

0x0C

}

})

Name (PCFG, Package (0x02)

{

Package (0x08)

{

0x0400,

0x04C0,

0x0400,

0x04C0,

0x0580,

0x0400,

0x04C0,

0x0400

Package (0x0A)

{

0x0400,

0x04C0,

0x0400,

0x04C0,

0x0580,

0x05E8,

0x06A8,

0x0768,

0x0400,

0x0400

}

})

Name (HOWN, Package (0x02)

{

Package (0x08)

{

0xD0,

0xD4,

0xD0,

0xD4,

0xD8,

0xD0,

0xD4,

0xD0

Package (0x0A)

{

0xD0,

0xD4,

0xD0,

0xD4,

0xD8,

0xDC,

0xE0,

0xE4,

0xD0,

0xD0

}

})

Name (POWN, Package (0x02)

{

Package (0x08)

{

0x20,

0x30,

0x20,

0x30,

0x40,

0x20,

0x30,

0x20

Package (0x0A)

{

0x20,

0x2C,

0x20,

0x2C,

0x38,

0x40,

0x4C,

0x58,

0x20,

0x20

}

})

Name (GPEO, Package (0x02)

{

Package (0x08)

{

0x0140,

0x0144,

0x0140,

0x0144,

0x0148,

0x0140,

0x0144,

0x0140

Package (0x0A)

{

0x0140,

0x0144,

0x0140,

0x0144,

0x0148,

0x014C,

0x0150,

0x0154,

0x0140,

0x0140

}

})

Name (GPES, Package (0x0A)

{

Zero,

Zero

})

Name (RXEV, Package (0x0A)

{

Ones,

Ones

})

Method (GNUM, 1, NotSerialized)

{

Store (GNMB (Arg0), Local1)

Store (GGRP (Arg0), Local2)

Return (Add (Local1, Multiply (Local2, 0x18)))

}

Method (INUM, 1, NotSerialized)

{

If (LEqual (PCHS, 0x02))

{

Store (Zero, Local0)

}

Else

{

Store (One, Local0)

}

Store (GNMB (Arg0), Local1)

Store (GGRP (Arg0), Local2)

Store (Zero, Local3)

While (LLess (Local3, Local2))

{

Add (DerefOf (Index (DerefOf (Index (GPPG, Local0)), Local3)),

Local1, Local1)

Increment (Local3)

}

Return (Add (0x18, Mod (Local1, 0x60)))

}

Method (GGRP, 1, Serialized)

{

ShiftRight (And (Arg0, 0x00FF0000), 0x10, Local0)

Return (Local0)

}

Method (GNMB, 1, Serialized)

{

Return (And (Arg0, 0xFFFF))

}

Method (GGPE, 1, NotSerialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (And (ShiftRight (GPEM, Multiply (Local0, 0x02)), 0x03

), Local2)

If (LEqual (Local2, Zero))

{

Return (0x6F)

}

Else

{

Return (Add (Multiply (Subtract (Local2, One), 0x20), Local1

))

}

Method (GADR, 2, NotSerialized)

{

If (LEqual (PCHS, 0x02))

{

Store (Zero, Local0)

}

Else

{

Store (One, Local0)

}

Store (Add (DerefOf (Index (DerefOf (Index (GCOM, Local0)), Arg0

)), SBRG), Local1)

Store (DerefOf (Index (DerefOf (Index (Arg1, Local0)), Arg0)),

Local2)

Return (Add (Local1, Local2))

}

Method (GPC0, 1, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

TEMP, 32

}

Return (TEMP)

}

Method (SPC0, 2, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

TEMP, 32

}

Store (Arg1, TEMP)

}

Method (GPC1, 1, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)

), 0x04), Local2)

OperationRegion (PDW1, SystemMemory, Local2, 0x04)

Field (PDW1, AnyAcc, NoLock, Preserve)

{

TEMP, 32

}

Return (TEMP)

}

Method (SPC1, 2, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)

), 0x04), Local2)

OperationRegion (PDW1, SystemMemory, Local2, 0x04)

Field (PDW1, AnyAcc, NoLock, Preserve)

{

TEMP, 32

}

Store (Arg1, TEMP)

}

Method (SRXO, 2, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

, 28,

TEMP, 1,

Offset (0x04)

}

Store (Arg1, TEMP)

}

Method (GGIV, 1, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

, 1,

TEMP, 1,

Offset (0x04)

}

Return (TEMP)

}

Method (GGOV, 1, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

TEMP, 1,

Offset (0x04)

}

Return (TEMP)

}

Method (SGOV, 2, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

TEMP, 1,

Offset (0x04)

}

Store (Arg1, TEMP)

}

Method (GGII, 1, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

, 23,

TEMP, 1,

Offset (0x04)

}

Return (TEMP)

}

Method (SGII, 2, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

, 23,

TEMP, 1,

Offset (0x04)

}

Store (Arg1, TEMP)

}

Method (GPMV, 1, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

, 10,

TEMP, 3,

Offset (0x04)

}

Return (TEMP)

}

Method (SPMV, 2, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

, 10,

TEMP, 3,

Offset (0x04)

}

Store (Arg1, TEMP)

}

Method (GHPO, 1, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

OperationRegion (PREG, SystemMemory, GADR (Local0, HOWN), 0x04)

Field (PREG, AnyAcc, NoLock, Preserve)

{

TEMP, 32

}

Return (And (ShiftRight (TEMP, Local1), One))

}

Method (SHPO, 2, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

OperationRegion (PREG, SystemMemory, GADR (Local0, HOWN), 0x04)

Field (PREG, AnyAcc, NoLock, Preserve)

{

TEMP, 32

}

Or (And (TEMP, Not (ShiftLeft (One, Local1))),

ShiftLeft (Arg1, Local1), TEMP)

}

Method (GGPO, 1, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, POWN), Multiply (ShiftRight (Local1, 0x03),

0x04)), Local2)

OperationRegion (PREG, SystemMemory, Local2, 0x04)

Field (PREG, AnyAcc, NoLock, Preserve)

{

TEMP, 32

}

Return (And (ShiftRight (TEMP, Multiply (And (Local1, 0x07), 0x04

)), 0x03))

}

Method (SGRA, 2, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

, 20,

TEMP, 1,

Offset (0x04)

}

Store (Arg1, TEMP)

}

Method (SGWP, 2, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)

), 0x04), Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

, 10,

TEMP, 4,

Offset (0x04)

}

Store (Arg1, TEMP)

}

Method (UGP1, 1, Serialized)

{

OperationRegion (GPPX, SystemMemory, GADR (Arg0, GPEO), 0x24)

Field (GPPX, AnyAcc, NoLock, Preserve)

{

STSX, 32,

Offset (0x20),

GENX, 32

}

If (LEqual (And (ShiftRight (GPEM, Multiply (Arg0, 0x02)),

0x03), Zero))

{

Store (And (STSX, GENX), Index (GPES, Arg0))

}

Else

{

Store (Zero, Index (GPES, Arg0))

}

Method (UGPS, 0, Serialized)

{

If (LEqual (PCHS, One))

{

Store (0x0A, Local0)

}

Else

{

Store (0x08, Local0)

}

While (Local0)

{

Decrement (Local0)

UGP1 (Local0)

}

Method (CGP1, 2, Serialized)

{

If (LEqual (And (ShiftRight (GPEM, Multiply (Arg0, 0x02)),

0x03), Zero))

{

OperationRegion (GPPX, SystemMemory, GADR (Arg0, GPEO), 0x04)

Field (GPPX, AnyAcc, NoLock, Preserve)

{

STSX, 32

}

Store (Arg1, STSX)

}

Method (CGPS, 0, Serialized)

{

If (LEqual (PCHS, One))

{

Store (0x0A, Local0)

}

Else

{

Store (0x08, Local0)

}

While (Local0)

{

Decrement (Local0)

CGP1 (Local0, 0xFFFFFFFF)

}

Method (CGLS, 0, Serialized)

{

If (LEqual (PCHS, One))

{

Store (0x0A, Local0)

}

Else

{

Store (0x08, Local0)

}

While (Local0)

{

Decrement (Local0)

If (LEqual (Local0, 0x09))

{

Store (G2L9, Local1)

}

Else

{

If (LEqual (Local0, 0x08))

{

Store (G2L8, Local1)

}

Else

{

If (LEqual (Local0, 0x07))

{

Store (G2L7, Local1)

}

Else

{

If (LEqual (Local0, 0x06))

{

Store (G2L6, Local1)

}

Else

{

If (LEqual (Local0, 0x05))

{

Store (G2L5, Local1)

}

Else

{

If (LEqual (Local0, 0x04))

{

Store (G2L4, Local1)

}

Else

{

If (LEqual (Local0, 0x03))

{

Store (G2L3, Local1)

}

Else

{

If (LEqual (Local0, 0x02))

{

Store (G2L2, Local1)

}

Else

{

If (LEqual (Local0, One))

{

Store (G2L1, Local1)

}

Else

{

If (LEqual (Local0, Zero))

{

Store (G2L0, Local1)

}

Else

{

Continue

}

CGP1 (Local0, Local1)

}

Method (CAGS, 1, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

If (LEqual (And (ShiftRight (GPEM, Multiply (Local0, 0x02)),

0x03), Zero))

{

OperationRegion (GPPX, SystemMemory, GADR (Local0, GPEO), 0x04)

Field (GPPX, AnyAcc, NoLock, Preserve)

{

STSX, 32

}

Store (STSX, Local3)

ShiftLeft (One, Local1, Local2)

Or (STSX, Local2, STSX)

}

Method (ISME, 1, NotSerialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Return (And (ShiftRight (DerefOf (Index (GPES, Local0)), Local1),

One))

}

Method (DIPI, 1, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

, 9,

RDIS, 1,

, 15,

RCFG, 2,

Offset (0x04)

}

If (LNotEqual (RCFG, 0x02))

{

Store (DerefOf (Index (RXEV, Local0)), Local3)

And (Local3, Not (ShiftLeft (0x03, Multiply (Local1, 0x02))

), Local3)

Or (Local3, ShiftLeft (RCFG, Multiply (Local1, 0x02)), Index (

RXEV, Local0))

Store (0x02, RCFG)

Store (One, RDIS)

}

Method (UIPI, 1, Serialized)

{

Store (GGRP (Arg0), Local0)

Store (GNMB (Arg0), Local1)

Store (Add (GADR (Local0, PCFG), Multiply (Local1, 0x08)),

Local2)

OperationRegion (PDW0, SystemMemory, Local2, 0x04)

Field (PDW0, AnyAcc, NoLock, Preserve)

{

, 9,

RDIS, 1,

, 15,

RCFG, 2,

Offset (0x04)

}

Store (And (ShiftRight (DerefOf (Index (RXEV, Local0)), Multiply (Local1,

0x02)), 0x03), Local3)

If (LNotEqual (Local3, 0x02))

{

Store (Zero, RDIS)

Store (Local3, RCFG)

}

Scope (\)

{

Method (THEN, 0, Serialized)

{

OperationRegion (THBA, SystemMemory, 0xFE200000, 0x10)

Field (THBA, DWordAcc, NoLock, Preserve)

{

DO00, 32

}

Return (LNotEqual (DO00, 0xFFFFFFFF))

}

Method (THDA, 2, Serialized)

{

Store (0xFE200000, Local0)

Add (Local0, Multiply (0x40, Multiply (0x80, Subtract (Arg0, 0x20)

)), Local0)

Add (Local0, Multiply (0x40, Arg1), Local0)

Return (Local0)

}

Method (STRD, 3, Serialized)

{

If (LGreater (Add (Arg1, Arg2), SizeOf (Arg0)))

{

Return (Zero)

}

ToBuffer (Arg0, Local3)

Store (Zero, Local0)

Store (Zero, Local1)

While (LLess (Local1, Arg2))

{

Store (DerefOf (Index (Local3, Add (Arg1, Local1))), Local2)

Add (Local0, ShiftLeft (Local2, Multiply (0x08, Local1)), Local0)

Increment (Local1)

}

Return (Local0)

}

Method (THDS, 1, Serialized)

{

If (LNot (THEN ()))

{

Return (Zero)

}

Store (SizeOf (Arg0), Local0)

Store (THDA (0x20, 0x16), Local1)

OperationRegion (THBA, SystemMemory, Local1, 0x40)

Field (THBA, QWordAcc, NoLock, Preserve)

{

QO00, 64

}

Field (THBA, DWordAcc, NoLock, Preserve)

{

DO00, 32,

Offset (0x10),

DO10, 32,

Offset (0x30),

DO30, 32

}

Field (THBA, WordAcc, NoLock, Preserve)

{

WO00, 16

}

Field (THBA, ByteAcc, NoLock, Preserve)

{

BO00, 8

}

Store (0x01000242, DO10)

Store (Local0, WO00)

Store (Zero, Local6)

Store (Local0, Local7)

While (LGreaterEqual (Local7, 0x08))

{

Store (STRD (Arg0, Local6, 0x08), QO00)

Add (Local6, 0x08, Local6)

Subtract (Local7, 0x08, Local7)

}

If (LGreaterEqual (Local7, 0x04))

{

Store (STRD (Arg0, Local6, 0x04), DO00)

Add (Local6, 0x04, Local6)

Subtract (Local7, 0x04, Local7)

}

If (LGreaterEqual (Local7, 0x02))

{

Store (STRD (Arg0, Local6, 0x02), WO00)

Add (Local6, 0x02, Local6)

Subtract (Local7, 0x02, Local7)

}

If (LGreaterEqual (Local7, One))

{

Store (STRD (Arg0, Local6, One), BO00)

Add (Local6, One, Local6)

Subtract (Local7, One, Local7)

}

Store (Zero, DO30)

}

Method (THDH, 1, Serialized)

{

THDS (ToHexString (Arg0))

}

Method (THDD, 1, Serialized)

{

THDS (ToDecimalString (Arg0))

}

Name (SPTH, One)

Name (SPTL, 0x02)

Method (PCHV, 0, NotSerialized)

{

If (LEqual (PCHS, One))

{

Return (SPTH)

}

If (LEqual (PCHS, 0x02))

{

Return (SPTL)

}

Return (Zero)

}

Scope (_GPE)

{

Method (_L6D, 0, Serialized) // _Lxx: Level-Triggered GPE

{

\_SB.PCI0.XHC.GPEH ()

\_SB.PCI0.HDEF.GPEH ()

\_SB.PCI0.GLAN.GPEH ()

}

Scope (_SB.PCI0)

{

Device (PRRE)

{

Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID

Name (_UID, "PCHRESV") // _UID: Unique ID

Name (_STA, 0x03) // _STA: Status

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Name (BUF0, ResourceTemplate ()

{

Memory32Fixed (ReadWrite,

0xFD000000, // Address Base

0x00AC0000, // Address Length

)

Memory32Fixed (ReadWrite,

0xFDAD0000, // Address Base

0x00010000, // Address Length

)

Memory32Fixed (ReadWrite,

0xFDB00000, // Address Base

0x00500000, // Address Length

)

Memory32Fixed (ReadWrite,

0xFE000000, // Address Base

0x00020000, // Address Length

)

Memory32Fixed (ReadWrite,

0xFE036000, // Address Base

0x00006000, // Address Length

)

Memory32Fixed (ReadWrite,

0xFE03D000, // Address Base

0x003C3000, // Address Length

)

Memory32Fixed (ReadWrite,

0xFE410000, // Address Base

0x003F0000, // Address Length

)

})

Return (BUF0)

}

Scope (_SB.PCI0.LPCB)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

OperationRegion (LPC, PCI_Config, Zero, 0x0100)

Field (LPC, AnyAcc, NoLock, Preserve)

{

Offset (0x02),

CDID, 16,

Offset (0x08),

CRID, 8,

Offset (0x80),

IOD0, 8,

IOD1, 8,

Offset (0xA0),

, 9,

PRBL, 1,

Offset (0xAC),

Offset (0xAD),

Offset (0xAE),

XUSB, 1,

Offset (0xB8),

, 22,

GR0B, 2,

Offset (0xBC),

, 2,

GR19, 2,

Offset (0xC0),

Offset (0xDC),

, 2,

ESPI, 1

}

Scope (_SB.PCI0)

{

Device (PPMC)

{

Name (_ADR, 0x001F0002) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

OperationRegion (PMCB, PCI_Config, Zero, 0x0100)

Field (PMCB, AnyAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x40),

Offset (0x41),

ACBA, 8,

Offset (0x48),

, 12,

PWBA, 20

}

Device (SBUS)

{

Name (_ADR, 0x001F0004) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

OperationRegion (SMBP, PCI_Config, Zero, 0xC0)

Field (SMBP, DWordAcc, NoLock, Preserve)

{

Offset (0x20),

, 5,

SBAR, 11,

Offset (0x40),

, 2,

I2CE, 1,

Offset (0x50),

, 5,

TCOB, 11

}

OperationRegion (SMBI, SystemIO, ShiftLeft (SBAR, 0x05), 0x10)

Field (SMBI, ByteAcc, NoLock, Preserve)

{

HSTS, 8,

Offset (0x02),

HCON, 8,

HCOM, 8,

TXSA, 8,

DAT0, 8,

DAT1, 8,

HBDR, 8,

PECR, 8,

RXSA, 8,

SDAT, 16

}

Method (SSXB, 2, Serialized)

{

If (STRT ())

{

Return (Zero)

}

Store (Zero, I2CE)

Store (0xBF, HSTS)

Store (Arg0, TXSA)

Store (Arg1, HCOM)

Store (0x48, HCON)

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (One)

}

Return (Zero)

}

Method (SRXB, 1, Serialized)

{

If (STRT ())

{

Return (0xFFFF)

}

Store (Zero, I2CE)

Store (0xBF, HSTS)

Store (Or (Arg0, One), TXSA)

Store (0x44, HCON)

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (DAT0)

}

Return (0xFFFF)

}

Method (SWRB, 3, Serialized)

{

If (STRT ())

{

Return (Zero)

}

Store (Zero, I2CE)

Store (0xBF, HSTS)

Store (Arg0, TXSA)

Store (Arg1, HCOM)

Store (Arg2, DAT0)

Store (0x48, HCON)

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (One)

}

Return (Zero)

}

Method (SRDB, 2, Serialized)

{

If (STRT ())

{

Return (0xFFFF)

}

Store (Zero, I2CE)

Store (0xBF, HSTS)

Store (Or (Arg0, One), TXSA)

Store (Arg1, HCOM)

Store (0x48, HCON)

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (DAT0)

}

Return (0xFFFF)

}

Method (SWRW, 3, Serialized)

{

If (STRT ())

{

Return (Zero)

}

Store (Zero, I2CE)

Store (0xBF, HSTS)

Store (Arg0, TXSA)

Store (Arg1, HCOM)

And (Arg2, 0xFF, DAT1)

And (ShiftRight (Arg2, 0x08), 0xFF, DAT0)

Store (0x4C, HCON)

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (One)

}

Return (Zero)

}

Method (SRDW, 2, Serialized)

{

If (STRT ())

{

Return (0xFFFF)

}

Store (Zero, I2CE)

Store (0xBF, HSTS)

Store (Or (Arg0, One), TXSA)

Store (Arg1, HCOM)

Store (0x4C, HCON)

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (Or (ShiftLeft (DAT0, 0x08), DAT1))

}

Return (0xFFFFFFFF)

}

Method (SBLW, 4, Serialized)

{

If (STRT ())

{

Return (Zero)

}

Store (Arg3, I2CE)

Store (0xBF, HSTS)

Store (Arg0, TXSA)

Store (Arg1, HCOM)

Store (SizeOf (Arg2), DAT0)

Store (Zero, Local1)

Store (DerefOf (Index (Arg2, Zero)), HBDR)

Store (0x54, HCON)

While (LGreater (SizeOf (Arg2), Local1))

{

Store (0x0FA0, Local0)

While (LAnd (LNot (And (HSTS, 0x80)), Local0))

{

Decrement (Local0)

Stall (0x32)

}

If (LNot (Local0))

{

KILL ()

Return (Zero)

}

Store (0x80, HSTS)

Increment (Local1)

If (LGreater (SizeOf (Arg2), Local1))

{

Store (DerefOf (Index (Arg2, Local1)), HBDR)

}

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (One)

}

Return (Zero)

}

Method (SBLR, 3, Serialized)

{

Name (TBUF, Buffer (0x0100) {})

If (STRT ())

{

Return (Zero)

}

Store (Arg2, I2CE)

Store (0xBF, HSTS)

Store (Or (Arg0, One), TXSA)

Store (Arg1, HCOM)

Store (0x54, HCON)

Store (0x0FA0, Local0)

While (LAnd (LNot (And (HSTS, 0x80)), Local0))

{

Decrement (Local0)

Stall (0x32)

}

If (LNot (Local0))

{

KILL ()

Return (Zero)

}

Store (DAT0, Index (TBUF, Zero))

Store (0x80, HSTS)

Store (One, Local1)

While (LLess (Local1, DerefOf (Index (TBUF, Zero))))

{

Store (0x0FA0, Local0)

While (LAnd (LNot (And (HSTS, 0x80)), Local0))

{

Decrement (Local0)

Stall (0x32)

}

If (LNot (Local0))

{

KILL ()

Return (Zero)

}

Store (HBDR, Index (TBUF, Local1))

Store (0x80, HSTS)

Increment (Local1)

}

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (TBUF)

}

Return (Zero)

}

Method (STRT, 0, Serialized)

{

Store (0xC8, Local0)

While (Local0)

{

If (And (HSTS, 0x40))

{

Decrement (Local0)

Sleep (One)

If (LEqual (Local0, Zero))

{

Return (One)

}

Else

{

Store (Zero, Local0)

}

Store (0x0FA0, Local0)

While (Local0)

{

If (And (HSTS, One))

{

Decrement (Local0)

Stall (0x32)

If (LEqual (Local0, Zero))

{

KILL ()

}

Else

{

Return (Zero)

}

Return (One)

}

Method (COMP, 0, Serialized)

{

Store (0x0FA0, Local0)

While (Local0)

{

If (And (HSTS, 0x02))

{

Return (One)

}

Else

{

Decrement (Local0)

Stall (0x32)

If (LEqual (Local0, Zero))

{

KILL ()

}

Return (Zero)

}

Method (KILL, 0, Serialized)

{

Or (HCON, 0x02, HCON)

Or (HSTS, 0xFF, HSTS)

}

Scope (_SB)

{

Device (LNKA)

{

Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID

Name (_UID, One) // _UID: Unique ID

Method (_DIS, 0, Serialized) // _DIS: Disable Device

{

Or (PARC, 0x80, PARC)

}

Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings

{

Return (PRSA)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Name (RTLA, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLA, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PARC, 0x0F), IRQ0)

Return (RTLA)

}

Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PARC)

}

Method (_STA, 0, Serialized) // _STA: Status

{

If (And (PARC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

Device (LNKB)

{

Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID

Name (_UID, 0x02) // _UID: Unique ID

Method (_DIS, 0, Serialized) // _DIS: Disable Device

{

Or (PBRC, 0x80, PBRC)

}

Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings

{

Return (PRSB)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Name (RTLB, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLB, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PBRC, 0x0F), IRQ0)

Return (RTLB)

}

Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PBRC)

}

Method (_STA, 0, Serialized) // _STA: Status

{

If (And (PBRC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

Device (LNKC)

{

Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID

Name (_UID, 0x03) // _UID: Unique ID

Method (_DIS, 0, Serialized) // _DIS: Disable Device

{

Or (PCRC, 0x80, PCRC)

}

Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings

{

Return (PRSC)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Name (RTLC, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLC, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PCRC, 0x0F), IRQ0)

Return (RTLC)

}

Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PCRC)

}

Method (_STA, 0, Serialized) // _STA: Status

{

If (And (PCRC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

Device (LNKD)

{

Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID

Name (_UID, 0x04) // _UID: Unique ID

Method (_DIS, 0, Serialized) // _DIS: Disable Device

{

Or (PDRC, 0x80, PDRC)

}

Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings

{

Return (PRSD)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Name (RTLD, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLD, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PDRC, 0x0F), IRQ0)

Return (RTLD)

}

Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PDRC)

}

Method (_STA, 0, Serialized) // _STA: Status

{

If (And (PDRC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

Device (LNKE)

{

Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID

Name (_UID, 0x05) // _UID: Unique ID

Method (_DIS, 0, Serialized) // _DIS: Disable Device

{

Or (PERC, 0x80, PERC)

}

Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings

{

Return (PRSE)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Name (RTLE, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLE, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PERC, 0x0F), IRQ0)

Return (RTLE)

}

Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PERC)

}

Method (_STA, 0, Serialized) // _STA: Status

{

If (And (PERC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

Device (LNKF)

{

Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID

Name (_UID, 0x06) // _UID: Unique ID

Method (_DIS, 0, Serialized) // _DIS: Disable Device

{

Or (PFRC, 0x80, PFRC)

}

Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings

{

Return (PRSF)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Name (RTLF, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLF, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PFRC, 0x0F), IRQ0)

Return (RTLF)

}

Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PFRC)

}

Method (_STA, 0, Serialized) // _STA: Status

{

If (And (PFRC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

Device (LNKG)

{

Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID

Name (_UID, 0x07) // _UID: Unique ID

Method (_DIS, 0, Serialized) // _DIS: Disable Device

{

Or (PGRC, 0x80, PGRC)

}

Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings

{

Return (PRSG)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Name (RTLG, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLG, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PGRC, 0x0F), IRQ0)

Return (RTLG)

}

Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PGRC)

}

Method (_STA, 0, Serialized) // _STA: Status

{

If (And (PGRC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

Device (LNKH)

{

Name (_HID, EisaId ("PNP0C0F")) // _HID: Hardware ID

Name (_UID, 0x08) // _UID: Unique ID

Method (_DIS, 0, Serialized) // _DIS: Disable Device

{

Or (PHRC, 0x80, PHRC)

}

Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings

{

Return (PRSH)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Name (RTLH, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLH, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PHRC, 0x0F), IRQ0)

Return (RTLH)

}

Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PHRC)

}

Method (_STA, 0, Serialized) // _STA: Status

{

If (And (PHRC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

Scope (\)

{

Name (PMBV, Zero)

Method (PMBS, 0, NotSerialized)

{

If (LEqual (PMBV, Zero))

{

Store (ShiftLeft (\_SB.PCI0.PPMC.ACBA, 0x08), PMBV)

}

Return (PMBV)

}

Name (PWRV, Zero)

Method (PWRM, 0, NotSerialized)

{

If (LEqual (PWRV, Zero))

{

Store (ShiftLeft (\_SB.PCI0.PPMC.PWBA, 0x0C), PWRV)

}

Return (PWRV)

}

Name (TCBV, Zero)

Method (TCBS, 0, NotSerialized)

{

If (LEqual (TCBV, Zero))

{

Store (ShiftLeft (\_SB.PCI0.SBUS.TCOB, 0x05), TCBV)

}

Return (TCBV)

}

OperationRegion (PMIO, SystemIO, PMBS (), 0x80)

Field (PMIO, ByteAcc, NoLock, Preserve)

{

Offset (0x01),

PBSS, 1,

Offset (0x40),

, 17,

GPEC, 1

}

OperationRegion (PMLP, SystemIO, Add (PMBS (), 0x80), 0x20)

Field (PMLP, ByteAcc, NoLock, Preserve)

{

Offset (0x10),

Offset (0x11),

GE08, 1,

, 8,

GE17, 1,

, 17,

GE35, 1,

, 9,

GE45, 1,

Offset (0x16),

GE48, 1,

, 2,

GE51, 1,

Offset (0x20)

}

Field (PMLP, ByteAcc, NoLock, WriteAsZeros)

{

Offset (0x01),

GS08, 1,

, 8,

GS17, 1,

, 17,

GS35, 1,

, 9,

GS45, 1,

Offset (0x06),

GS48, 1,

, 2,

GS51, 1,

, 2,

GS54, 1,

GS55, 1,

Offset (0x10)

}

OperationRegion (TCBA, SystemIO, TCBS (), 0x10)

Field (TCBA, ByteAcc, NoLock, Preserve)

{

Offset (0x04),

, 9,

CPSC, 1

}

OperationRegion (PWMR, SystemMemory, PWRM (), 0x0800)

Field (PWMR, AnyAcc, NoLock, Preserve)

{

Offset (0xE0),

Offset (0xE2),

DWLE, 1,

HWLE, 1

}

OperationRegion (PMST, SystemMemory, PWRV, 0x80)

Field (PMST, DWordAcc, NoLock, Preserve)

{

Offset (0x18),

, 25,

USBP, 1,

Offset (0x1C),

Offset (0x1F),

PMFS, 1,

Offset (0x20),

MPMC, 32,

, 20,

UWAB, 1

}

Method (PCRR, 2, Serialized)

{

Add (ShiftLeft (Arg0, 0x10), Arg1, Local0)

Add (SBRG, Local0, Local0)

OperationRegion (PCR0, SystemMemory, Local0, 0x04)

Field (PCR0, DWordAcc, Lock, Preserve)

{

DAT0, 32

}

Return (DAT0)

}

Method (PCRW, 3, Serialized)

{

Add (ShiftLeft (Arg0, 0x10), Arg1, Local0)

Add (SBRG, Local0, Local0)

OperationRegion (PCR0, SystemMemory, Local0, 0x04)

Field (PCR0, DWordAcc, Lock, Preserve)

{

DAT0, 32

}

Store (Arg2, DAT0)

OperationRegion (PCR1, SystemMemory, Add (SBRG, 0x00C73418), 0x04)

Field (PCR1, DWordAcc, Lock, Preserve)

{

DAT1, 32

}

Store (DAT1, Local1)

}

Method (PCRO, 3, Serialized)

{

Store (PCRR (Arg0, Arg1), Local0)

Store (Or (Local0, Arg2), Local1)

PCRW (Arg0, Arg1, Local1)

}

Method (PCRA, 3, Serialized)

{

Store (PCRR (Arg0, Arg1), Local0)

Store (And (Local0, Arg2), Local1)

PCRW (Arg0, Arg1, Local1)

}

Method (PCAO, 4, Serialized)

{

Store (PCRR (Arg0, Arg1), Local0)

Store (Or (And (Local0, Arg2), Arg3), Local1)

PCRW (Arg0, Arg1, Local1)

}

Scope (_SB.PCI0)

{

Name (LTRN, Zero)

Name (OBFN, Zero)

Name (LMSL, Zero)

Name (LNSL, Zero)

Device (GLAN)

{

Name (_ADR, 0x001F0006) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

OperationRegion (GLBA, PCI_Config, Zero, 0x0100)

Field (GLBA, AnyAcc, NoLock, Preserve)

{

DVID, 16,

Offset (0xCC),

Offset (0xCD),

PMEE, 1,

, 6,

PMES, 1

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x6D, 0x04))

}

Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake

{

Store (Arg0, PMEE)

}

Method (GPEH, 0, NotSerialized)

{

If (LEqual (DVID, 0xFFFF))

{

Return (Zero)

}

If (LAnd (PMEE, PMES))

{

Store (One, PMES)

Notify (GLAN, 0x02)

}

Scope (_SB.PCI0)

{

Device (XHC)

{

Name (_ADR, 0x00140000) // _ADR: Address

OperationRegion (XPRT, PCI_Config, Zero, 0x0100)

Field (XPRT, AnyAcc, NoLock, Preserve)

{

DVID, 16,

Offset (0x74),

D0D3, 2,

Offset (0x75),

PMEE, 1,

, 6,

PMES, 1,

Offset (0xA8),

, 13,

MW13, 1,

MW14, 1,

Offset (0xAC),

Offset (0xB0),

, 13,

MB13, 1,

MB14, 1,

Offset (0xB4),

Offset (0xD0),

PR2, 32,

PR2M, 32,

PR3, 32,

PR3M, 32

}

Name (XFLT, Zero)

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xB7, 0x0C, 0x34, 0xAC, 0x01, 0xE9, 0xBF, 0x45,

/* 0008 */ 0xB7, 0xE6, 0x2B, 0x34, 0xEC, 0x93, 0x1E, 0x23

}))

{

If (LEqual (Arg1, 0x03))

{

Store (Arg1, XFLT)

}

Return (Zero)

}

Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State

{

Return (0x03)

}

Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State

{

Return (0x03)

}

Method (_S3W, 0, NotSerialized) // _S3W: S3 Device Wake State

{

Return (0x03)

}

Method (_S4W, 0, NotSerialized) // _S4W: S4 Device Wake State

{

Return (0x03)

}

Method (_S0W, 0, NotSerialized) // _S0W: S0 Device Wake State

{

If (LEqual (XFLT, Zero))

{

Return (Zero)

}

Else

{

Return (0x03)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x6D, 0x04))

}

Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake

{

Store (Arg0, PMEE)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

If (CondRefOf (\_SB.PCI0.XHC.RHUB.INIR))

{

^RHUB.INIR ()

}

Method (GPEH, 0, NotSerialized)

{

If (LEqual (DVID, 0xFFFF))

{

Return (Zero)

}

Store (PMES, Local0)

Store (One, PMES)

If (LAnd (PMEE, Local0))

{

Notify (XHC, 0x02)

}

OperationRegion (XHCP, SystemMemory, Add (GPCB (), 0x000A0000), 0x0100)

Field (XHCP, AnyAcc, Lock, Preserve)

{

Offset (0x04),

PDBM, 16,

Offset (0x10),

MEMB, 64

}

Method (USRA, 0, Serialized)

{

If (LEqual (PCHV (), SPTH))

{

Return (0x0F)

}

Else

{

Return (0x0B)

}

Method (SSPA, 0, Serialized)

{

If (LEqual (PCHV (), SPTH))

{

Return (0x11)

}

Else

{

Return (0x0D)

}

Name (XRST, Zero)

Method (_PS0, 0, Serialized) // _PS0: Power State 0

{

If (LEqual (DVID, 0xFFFF))

{

Return (Zero)

}

Store (MEMB, Local2)

Store (PDBM, Local1)

And (PDBM, 0xFFFFFFFFFFFFFFF9, PDBM)

Store (D0D3, Local3)

Store (Zero, D0D3)

Store (XWMB, MEMB)

Or (Local1, 0x02, PDBM)

OperationRegion (MC11, SystemMemory, XWMB, 0x9000)

Field (MC11, DWordAcc, Lock, Preserve)

{

Offset (0x81C4),

, 2,

UPSW, 2

}

Store (Zero, UPSW)

And (PDBM, 0xFFFFFFFFFFFFFFFD, PDBM)

Store (Local2, MEMB)

Store (Local1, PDBM)

If (CondRefOf (\_SB.PCI0.XHC.PS0X))

{

PS0X

}

If (LAnd (UWAB, LOr (LEqual (D0D3, Zero), LEqual (^^XDCI.D0I3, Zero))))

{

Store (One, MPMC)

While (PMFS)

{

Sleep (0x0A)

}

Method (_PS3, 0, Serialized) // _PS3: Power State 3

{

If (LEqual (DVID, 0xFFFF))

{

Return (Zero)

}

Store (MEMB, Local2)

Store (PDBM, Local1)

And (PDBM, 0xFFFFFFFFFFFFFFF9, PDBM)

Store (Zero, D0D3)

Store (XWMB, MEMB)

Or (Local1, 0x02, PDBM)

OperationRegion (MC11, SystemMemory, XWMB, 0x9000)

Field (MC11, DWordAcc, Lock, Preserve)

{

Offset (0x81C4),

, 2,

UPSW, 2

}

Store (0x03, UPSW)

And (PDBM, 0xFFFFFFFFFFFFFFFD, PDBM)

Store (0x03, D0D3)

Store (Local2, MEMB)

Store (Local1, PDBM)

If (CondRefOf (\_SB.PCI0.XHC.PS3X))

{

PS3X

}

If (LAnd (UWAB, LAnd (LEqual (D0D3, 0x03), LOr (LEqual (^^XDCI.D0I3,

0x03), LEqual (^^XDCI.DVID, 0xFFFF)))))

{

Store (0x03, MPMC)

While (PMFS)

{

Sleep (0x0A)

}

Method (CUID, 1, Serialized)

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xA9, 0x12, 0x95, 0x7C, 0x05, 0x17, 0xB4, 0x4C,

/* 0008 */ 0xAF, 0x7D, 0x50, 0x6A, 0x24, 0x23, 0xAB, 0x71

}))

{

Return (One)

}

Return (Zero)

}

Device (RHUB)

{

Name (_ADR, Zero) // _ADR: Address

Method (_PS0, 0, Serialized) // _PS0: Power State 0

{

If (LEqual (DVID, 0xFFFF))

{

Return (Zero)

}

If (CondRefOf (\_SB.PCI0.XHC.RHUB.PS0X))

{

PS0X

}

Method (_PS2, 0, Serialized) // _PS2: Power State 2

{

If (LEqual (DVID, 0xFFFF))

{

Return (Zero)

}

If (CondRefOf (\_SB.PCI0.XHC.RHUB.PS2X))

{

PS2X

}

Method (_PS3, 0, Serialized) // _PS3: Power State 3

{

If (LEqual (DVID, 0xFFFF))

{

Return (Zero)

}

If (CondRefOf (\_SB.PCI0.XHC.RHUB.PS3X))

{

PS3X

}

Device (HS01)

{

Name (_ADR, One) // _ADR: Address

}

Device (HS02)

{

Name (_ADR, 0x02) // _ADR: Address

}

Device (HS03)

{

Name (_ADR, 0x03) // _ADR: Address

}

Device (HS04)

{

Name (_ADR, 0x04) // _ADR: Address

}

Device (HS05)

{

Name (_ADR, 0x05) // _ADR: Address

}

Device (HS06)

{

Name (_ADR, 0x06) // _ADR: Address

}

Device (HS07)

{

Name (_ADR, 0x07) // _ADR: Address

}

Device (HS08)

{

Name (_ADR, 0x08) // _ADR: Address

}

Device (HS09)

{

Name (_ADR, 0x09) // _ADR: Address

}

Device (HS10)

{

Name (_ADR, 0x0A) // _ADR: Address

}

Device (USR1)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (USRA (), Zero))

}

Device (USR2)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (USRA (), One))

}

Device (SS01)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (SSPA (), Zero))

}

Device (SS02)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (SSPA (), One))

}

Device (SS03)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (SSPA (), 0x02))

}

Device (SS04)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (SSPA (), 0x03))

}

Device (SS05)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (SSPA (), 0x04))

}

Device (SS06)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (SSPA (), 0x05))

}

If (LEqual (PCHV (), SPTH))

{

Scope (_SB.PCI0.XHC.RHUB)

{

Device (HS11)

{

Name (_ADR, 0x0B) // _ADR: Address

}

Device (HS12)

{

Name (_ADR, 0x0C) // _ADR: Address

}

Device (HS13)

{

Name (_ADR, 0x0D) // _ADR: Address

}

Device (HS14)

{

Name (_ADR, 0x0E) // _ADR: Address

}

Device (SS07)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (SSPA (), 0x06))

}

Device (SS08)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (SSPA (), 0x07))

}

Device (SS09)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (SSPA (), 0x08))

}

Device (SS10)

{

Method (_ADR, 0, NotSerialized) // _ADR: Address

{

Return (Add (SSPA (), 0x09))

}

Scope (_SB.PCI0)

{

Device (XDCI)

{

Name (_ADR, 0x00140001) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

Name (_DDN, "SPT XHCI controller") // _DDN: DOS Device Name

Name (_STR, Unicode ("SPT XHCI controller")) // _STR: Description String

Method (_S0W, 0, NotSerialized) // _S0W: S0 Device Wake State

{

Return (0x03)

}

OperationRegion (OTGD, PCI_Config, Zero, 0x0100)

Field (OTGD, WordAcc, NoLock, Preserve)

{

DVID, 16,

Offset (0x74),

D0I3, 2,

Offset (0x84),

Offset (0x85),

PMEE, 1,

, 6,

PMES, 1

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LNotEqual (DVID, 0xFFFFFFFF))

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0)

{

Device (HDEF)

{

Name (_ADR, 0x001F0003) // _ADR: Address

OperationRegion (HDAR, PCI_Config, Zero, 0x0100)

Field (HDAR, WordAcc, NoLock, Preserve)

{

VDID, 32,

Offset (0x48),

, 6,

MBCG, 1,

Offset (0x54),

Offset (0x55),

PMEE, 1,

, 6,

PMES, 1

}

Name (_S0W, 0x03) // _S0W: S0 Device Wake State

Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake

{

Store (Arg0, PMEE)

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x6D, 0x04))

}

Method (GPEH, 0, NotSerialized)

{

If (LEqual (VDID, 0xFFFFFFFF))

{

Return (Zero)

}

If (LAnd (PMEE, PMES))

{

ADBG ("HDEF GPEH")

Store (One, PMES)

Notify (HDEF, 0x02)

}

Name (NBUF, ResourceTemplate ()

{

QWordMemory (ResourceConsumer, PosDecode, MinNotFixed, MaxNotFixed, NonCacheable, ReadOnly,

0x0000000000000001, // Granularity

0x0000000000000000, // Range Minimum

0x0000000000000000, // Range Maximum

0x0000000000000000, // Translation Offset

0x0000000000000000, // Length

,, _Y22, AddressRangeACPI, TypeStatic)

})

Method (AUWA, 0, Serialized)

{

If (LEqual (PCHS, One))

{

If (LEqual (^^LPCB.CRID, Zero))

{

Return (One)

}

Else

{

If (LEqual (^^LPCB.CRID, Zero))

{

Return (One)

}

If (LEqual (^^LPCB.CRID, One))

{

Return (One)

}

If (LEqual (^^LPCB.CRID, 0x09))

{

Return (One)

}

Return (Zero)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

ADBG ("HDEF _INI")

CreateQWordField (NBUF, \_SB.PCI0.HDEF._Y22._MIN, NBAS) // _MIN: Minimum Base Address

CreateQWordField (NBUF, \_SB.PCI0.HDEF._Y22._MAX, NMAS) // _MAX: Maximum Base Address

CreateQWordField (NBUF, \_SB.PCI0.HDEF._Y22._LEN, NLEN) // _LEN: Length

Store (NHLA, NBAS)

Add (NHLA, Subtract (NHLL, One), NMAS)

Store (NHLL, NLEN)

If (LEqual (AUWA (), One))

{

Store (Zero, MBCG)

}

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

ADBG ("HDEF _DSM")

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x6E, 0x88, 0x9F, 0xA6, 0xEB, 0x6C, 0x94, 0x45,

/* 0008 */ 0xA4, 0x1F, 0x7B, 0x5D, 0xCE, 0x24, 0xC5, 0x53

}))

{

While (One)

{

Store (Arg2, _T_0)

If (LEqual (_T_0, Zero))

{

Return (Buffer (One)

{

0x0F

})

}

Else

{

If (LEqual (_T_0, One))

{

ADBG ("_DSM Fun 1 NHLT")

Return (NBUF)

}

Else

{

If (LEqual (_T_0, 0x02))

{

ADBG ("_DSM Fun 2 FMSK")

Return (ADFM)

}

Else

{

If (LEqual (_T_0, 0x03))

{

ADBG ("_DSM Fun 3 PPMS")

Return (Zero)

}

Else

{

ADBG ("_DSM Fun NOK")

Return (Buffer (One)

{

0x00

})

}

Break

}

ADBG ("_DSM UUID NOK")

}

Device (SAT0)

{

Name (_ADR, 0x00170000) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (CondRefOf (\_SB.PCI0.SAT0.SDSM))

{

Return (SDSM)

Arg0

Arg1

Arg2

Arg3

}

Return (Zero)

}

Device (PRT0)

{

Name (_ADR, 0xFFFF) // _ADR: Address

}

Device (PRT1)

{

Name (_ADR, 0x0001FFFF) // _ADR: Address

}

Device (PRT2)

{

Name (_ADR, 0x0002FFFF) // _ADR: Address

}

Device (PRT3)

{

Name (_ADR, 0x0003FFFF) // _ADR: Address

}

Device (PRT4)

{

Name (_ADR, 0x0004FFFF) // _ADR: Address

}

Device (PRT5)

{

Name (_ADR, 0x0005FFFF) // _ADR: Address

}

Method (RDCA, 5, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

OperationRegion (RPAL, SystemMemory, Add (GPCB (), Add (0x000B8100, Arg1)), 0x04)

Field (RPAL, DWordAcc, Lock, Preserve)

{

RPCD, 32

}

OperationRegion (EPAC, SystemMemory, Add (GPCB (), 0x000B8308), 0x08)

Field (EPAC, DWordAcc, Lock, Preserve)

{

CAIR, 32,

CADR, 32

}

OperationRegion (NCRG, SystemMemory, Add (GPCB (), 0x000B8FC0), 0x04)

Field (NCRG, DWordAcc, Lock, Preserve)

{

CRGC, 32

}

If (LGreater (Arg0, 0x02))

{

Return (Zero)

}

Else

{

Store (Arg0, CRGC)

}

While (One)

{

Store (ToInteger (Arg4), _T_0)

If (LEqual (_T_0, Zero))

{

Return (RPCD)

}

Else

{

If (LEqual (_T_0, 0x02))

{

Store (Arg1, CAIR)

Return (CADR)

}

Else

{

If (LEqual (_T_0, One))

{

And (Arg2, RPCD, Local0)

Or (Arg3, Local0, Local0)

Store (Local0, RPCD)

}

Else

{

If (LEqual (_T_0, 0x03))

{

Store (Arg1, CAIR)

And (Arg2, CADR, Local0)

Or (Arg3, Local0, Local0)

Store (Local0, CADR)

}

Else

{

Return (Zero)

}

Break

}

Method (RPD0, 1, Serialized)

{

RDCA (Arg0, 0xA4, 0xFFFFFFFC, Zero, One)

}

Method (RPD3, 1, Serialized)

{

RDCA (Arg0, 0xA4, 0xFFFFFFFC, 0x03, One)

}

Device (NVM1)

{

Name (_ADR, 0x00C1FFFF) // _ADR: Address

Name (PRBI, Zero)

Name (PRBD, Zero)

Name (PCMD, Zero)

Name (NCRN, Zero)

Name (NITV, Zero)

Name (NPMV, Zero)

Name (NPCV, Zero)

Name (NL1V, Zero)

Name (ND2V, Zero)

Name (ND1V, Zero)

Name (NLRV, Zero)

Name (NLDV, Zero)

Name (NEAV, Zero)

Name (NEBV, Zero)

Name (NECV, Zero)

Name (NRAV, Zero)

Name (NMBV, Zero)

Name (NMVV, Zero)

Name (NPBV, Zero)

Name (NPVV, Zero)

Method (EPD0, 0, Serialized)

{

RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, Zero, 0x03)

}

Method (EPD3, 0, Serialized)

{

RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, 0x03, 0x03)

}

Method (CNRS, 0, Serialized)

{

If (LEqual (NITV, Zero))

{

Return (Zero)

}

RDCA (NCRN, 0x10, Zero, Zero, 0x03)

RDCA (NCRN, 0x14, Zero, Zero, 0x03)

RDCA (NCRN, 0x18, Zero, Zero, 0x03)

RDCA (NCRN, 0x1C, Zero, Zero, 0x03)

RDCA (NCRN, 0x20, Zero, Zero, 0x03)

RDCA (NCRN, 0x24, Zero, Zero, 0x03)

RDCA (NCRN, 0x04, 0xFFFFFFF8, PCMD, 0x03)

RDCA (NCRN, PRBI, Zero, PRBD, 0x03)

If (LNotEqual (NL1V, Zero))

{

RDCA (NCRN, Add (NL1V, 0x0C), 0xFFFFFF00, ND2V, 0x03)

RDCA (NCRN, Add (NL1V, 0x08), 0x0F, And (ND1V, 0xFFFFFFF0

), 0x03)

RDCA (NCRN, Add (NL1V, 0x08), 0xFFFFFFFF, ND1V, 0x03)

}

If (LNotEqual (NLRV, Zero))

{

RDCA (NCRN, Add (NLRV, 0x04), 0xFFFFFFFF, NLDV, 0x03)

}

RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFEBF, And (NEAV, 0xFFFC

), 0x03)

RDCA (NCRN, Add (NPCV, 0x28), 0xFFFFFBFF, NECV, 0x03)

RDCA (NCRN, Add (NPCV, 0x08), 0xFFFFFF1F, NEBV, 0x03)

RDCA (NCRN, 0x68, 0xFFFFFBFF, NRAV, One)

If (LEqual (And (NEAV, 0x40), 0x40))

{

RDCA (NCRN, 0x50, 0xFFFFFFDF, 0x20, One)

While (LEqual (And (RDCA (NCRN, 0x52, Zero, Zero, Zero), 0x2000

), Zero))

{

Stall (0x0A)

}

RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFFFC, And (NEAV, 0x03

), 0x03)

If (LNotEqual (NMVV, Zero))

{

RDCA (NCRN, NMBV, Zero, NMVV, 0x03)

}

If (LNotEqual (NPVV, Zero))

{

RDCA (NCRN, NPBV, Zero, NPVV, 0x03)

}

Method (_PS3, 0, Serialized) // _PS3: Power State 3

{

If (LEqual (NITV, Zero))

{

Return (Zero)

}

Store (RDCA (NCRN, 0x04, Zero, Zero, 0x02), PCMD)

If (LEqual (NITV, One))

{

Store (0x24, PRBI)

Store (RDCA (NCRN, 0x24, Zero, Zero, 0x02), PRBD)

}

Else

{

If (LEqual (NITV, 0x02))

{

Store (0x10, PRBI)

Store (RDCA (NCRN, 0x10, Zero, Zero, 0x02), PRBD)

}

EPD3 ()

RPD3 (NCRN)

}

Method (_PS0, 0, Serialized) // _PS0: Power State 0

{

If (LEqual (NITV, Zero))

{

Return (Zero)

}

RPD0 (NCRN)

EPD0 ()

Store (RDCA (NCRN, Add (NPMV, 0x04), Zero, Zero, 0x02),

Local0)

If (LEqual (And (Local0, 0x08), Zero))

{

CNRS ()

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (NIT1, NITV)

Store (NPM1, NPMV)

Store (NPC1, NPCV)

Store (NL11, NL1V)

Store (ND21, ND2V)

Store (ND11, ND1V)

Store (NLR1, NLRV)

Store (NLD1, NLDV)

Store (NEA1, NEAV)

Store (NEB1, NEBV)

Store (NEC1, NECV)

Store (NRA1, NRAV)

Store (NMB1, NMBV)

Store (NMV1, NMVV)

Store (NPB1, NPBV)

Store (NPV1, NPVV)

Store (Zero, NCRN)

}

Device (NVM2)

{

Name (_ADR, 0x00C2FFFF) // _ADR: Address

Name (PRBI, Zero)

Name (PRBD, Zero)

Name (PCMD, Zero)

Name (NCRN, Zero)

Name (NITV, Zero)

Name (NPMV, Zero)

Name (NPCV, Zero)

Name (NL1V, Zero)

Name (ND2V, Zero)

Name (ND1V, Zero)

Name (NLRV, Zero)

Name (NLDV, Zero)

Name (NEAV, Zero)

Name (NEBV, Zero)

Name (NECV, Zero)

Name (NRAV, Zero)

Name (NMBV, Zero)

Name (NMVV, Zero)

Name (NPBV, Zero)

Name (NPVV, Zero)

Method (EPD0, 0, Serialized)

{

RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, Zero, 0x03)

}

Method (EPD3, 0, Serialized)

{

RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, 0x03, 0x03)

}

Method (CNRS, 0, Serialized)

{

If (LEqual (NITV, Zero))

{

Return (Zero)

}

RDCA (NCRN, 0x10, Zero, Zero, 0x03)

RDCA (NCRN, 0x14, Zero, Zero, 0x03)

RDCA (NCRN, 0x18, Zero, Zero, 0x03)

RDCA (NCRN, 0x1C, Zero, Zero, 0x03)

RDCA (NCRN, 0x20, Zero, Zero, 0x03)

RDCA (NCRN, 0x24, Zero, Zero, 0x03)

RDCA (NCRN, 0x04, 0xFFFFFFF8, PCMD, 0x03)

RDCA (NCRN, PRBI, Zero, PRBD, 0x03)

If (LNotEqual (NL1V, Zero))

{

RDCA (NCRN, Add (NL1V, 0x0C), 0xFFFFFF00, ND2V, 0x03)

RDCA (NCRN, Add (NL1V, 0x08), 0x0F, And (ND1V, 0xFFFFFFF0

), 0x03)

RDCA (NCRN, Add (NL1V, 0x08), 0xFFFFFFFF, ND1V, 0x03)

}

If (LNotEqual (NLRV, Zero))

{

RDCA (NCRN, Add (NLRV, 0x04), 0xFFFFFFFF, NLDV, 0x03)

}

RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFEBF, And (NEAV, 0xFFFC

), 0x03)

RDCA (NCRN, Add (NPCV, 0x28), 0xFFFFFBFF, NECV, 0x03)

RDCA (NCRN, Add (NPCV, 0x08), 0xFFFFFF1F, NEBV, 0x03)

RDCA (NCRN, 0x68, 0xFFFFFBFF, NRAV, One)

If (LEqual (And (NEAV, 0x40), 0x40))

{

RDCA (NCRN, 0x50, 0xFFFFFFDF, 0x20, One)

While (LEqual (And (RDCA (NCRN, 0x52, Zero, Zero, Zero), 0x2000

), Zero))

{

Stall (0x0A)

}

RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFFFC, And (NEAV, 0x03

), 0x03)

If (LNotEqual (NMVV, Zero))

{

RDCA (NCRN, NMBV, Zero, NMVV, 0x03)

}

If (LNotEqual (NPVV, Zero))

{

RDCA (NCRN, NPBV, Zero, NPVV, 0x03)

}

Method (_PS3, 0, Serialized) // _PS3: Power State 3

{

If (LEqual (NITV, Zero))

{

Return (Zero)

}

Store (RDCA (NCRN, 0x04, Zero, Zero, 0x02), PCMD)

If (LEqual (NITV, One))

{

Store (0x24, PRBI)

Store (RDCA (NCRN, 0x24, Zero, Zero, 0x02), PRBD)

}

Else

{

If (LEqual (NITV, 0x02))

{

Store (0x10, PRBI)

Store (RDCA (NCRN, 0x10, Zero, Zero, 0x02), PRBD)

}

EPD3 ()

RPD3 (NCRN)

}

Method (_PS0, 0, Serialized) // _PS0: Power State 0

{

If (LEqual (NITV, Zero))

{

Return (Zero)

}

RPD0 (NCRN)

EPD0 ()

Store (RDCA (NCRN, Add (NPMV, 0x04), Zero, Zero, 0x02),

Local0)

If (LEqual (And (Local0, 0x08), Zero))

{

CNRS ()

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (NIT2, NITV)

Store (NPM2, NPMV)

Store (NPC2, NPCV)

Store (NL12, NL1V)

Store (ND22, ND2V)

Store (ND12, ND1V)

Store (NLR2, NLRV)

Store (NLD2, NLDV)

Store (NEA2, NEAV)

Store (NEB2, NEBV)

Store (NEC2, NECV)

Store (NRA2, NRAV)

Store (NMB2, NMBV)

Store (NMV2, NMVV)

Store (NPB2, NPBV)

Store (NPV2, NPVV)

Store (One, NCRN)

}

Device (NVM3)

{

Name (_ADR, 0x00C3FFFF) // _ADR: Address

Name (PRBI, Zero)

Name (PRBD, Zero)

Name (PCMD, Zero)

Name (NCRN, Zero)

Name (NITV, Zero)

Name (NPMV, Zero)

Name (NPCV, Zero)

Name (NL1V, Zero)

Name (ND2V, Zero)

Name (ND1V, Zero)

Name (NLRV, Zero)

Name (NLDV, Zero)

Name (NEAV, Zero)

Name (NEBV, Zero)

Name (NECV, Zero)

Name (NRAV, Zero)

Name (NMBV, Zero)

Name (NMVV, Zero)

Name (NPBV, Zero)

Name (NPVV, Zero)

Method (EPD0, 0, Serialized)

{

RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, Zero, 0x03)

}

Method (EPD3, 0, Serialized)

{

RDCA (NCRN, Add (NPMV, 0x04), 0xFFFFFFFC, 0x03, 0x03)

}

Method (CNRS, 0, Serialized)

{

If (LEqual (NITV, Zero))

{

Return (Zero)

}

RDCA (NCRN, 0x10, Zero, Zero, 0x03)

RDCA (NCRN, 0x14, Zero, Zero, 0x03)

RDCA (NCRN, 0x18, Zero, Zero, 0x03)

RDCA (NCRN, 0x1C, Zero, Zero, 0x03)

RDCA (NCRN, 0x20, Zero, Zero, 0x03)

RDCA (NCRN, 0x24, Zero, Zero, 0x03)

RDCA (NCRN, 0x04, 0xFFFFFFF8, PCMD, 0x03)

RDCA (NCRN, PRBI, Zero, PRBD, 0x03)

If (LNotEqual (NL1V, Zero))

{

RDCA (NCRN, Add (NL1V, 0x0C), 0xFFFFFF00, ND2V, 0x03)

RDCA (NCRN, Add (NL1V, 0x08), 0x0F, And (ND1V, 0xFFFFFFF0

), 0x03)

RDCA (NCRN, Add (NL1V, 0x08), 0xFFFFFFFF, ND1V, 0x03)

}

If (LNotEqual (NLRV, Zero))

{

RDCA (NCRN, Add (NLRV, 0x04), 0xFFFFFFFF, NLDV, 0x03)

}

RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFEBF, And (NEAV, 0xFFFC

), 0x03)

RDCA (NCRN, Add (NPCV, 0x28), 0xFFFFFBFF, NECV, 0x03)

RDCA (NCRN, Add (NPCV, 0x08), 0xFFFFFF1F, NEBV, 0x03)

RDCA (NCRN, 0x68, 0xFFFFFBFF, NRAV, One)

If (LEqual (And (NEAV, 0x40), 0x40))

{

RDCA (NCRN, 0x50, 0xFFFFFFDF, 0x20, One)

While (LEqual (And (RDCA (NCRN, 0x52, Zero, Zero, Zero), 0x2000

), Zero))

{

Stall (0x0A)

}

RDCA (NCRN, Add (NPCV, 0x10), 0xFFFFFFFC, And (NEAV, 0x03

), 0x03)

If (LNotEqual (NMVV, Zero))

{

RDCA (NCRN, NMBV, Zero, NMVV, 0x03)

}

If (LNotEqual (NPVV, Zero))

{

RDCA (NCRN, NPBV, Zero, NPVV, 0x03)

}

Method (_PS3, 0, Serialized) // _PS3: Power State 3

{

If (LEqual (NITV, Zero))

{

Return (Zero)

}

Store (RDCA (NCRN, 0x04, Zero, Zero, 0x02), PCMD)

If (LEqual (NITV, One))

{

Store (0x24, PRBI)

Store (RDCA (NCRN, 0x24, Zero, Zero, 0x02), PRBD)

}

Else

{

If (LEqual (NITV, 0x02))

{

Store (0x10, PRBI)

Store (RDCA (NCRN, 0x10, Zero, Zero, 0x02), PRBD)

}

EPD3 ()

RPD3 (NCRN)

}

Method (_PS0, 0, Serialized) // _PS0: Power State 0

{

If (LEqual (NITV, Zero))

{

Return (Zero)

}

RPD0 (NCRN)

EPD0 ()

Store (RDCA (NCRN, Add (NPMV, 0x04), Zero, Zero, 0x02),

Local0)

If (LEqual (And (Local0, 0x08), Zero))

{

CNRS ()

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (NIT3, NITV)

Store (NPM3, NPMV)

Store (NPC3, NPCV)

Store (NL13, NL1V)

Store (ND23, ND2V)

Store (ND13, ND1V)

Store (NLR3, NLRV)

Store (NLD3, NLDV)

Store (NEA3, NEAV)

Store (NEB3, NEBV)

Store (NEC3, NECV)

Store (NRA3, NRAV)

Store (NMB3, NMBV)

Store (NMV3, NMVV)

Store (NPB3, NPBV)

Store (NPV3, NPVV)

Store (0x02, NCRN)

}

Device (CIO2)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (CIOE, One))

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Name (_HID, "INT343E") // _HID: Hardware ID

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Name (CBUF, ResourceTemplate ()

{

Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, _Y23)

{

0x00000010,

}

Memory32Fixed (ReadWrite,

0xFE400000, // Address Base

0x00010000, // Address Length

)

})

CreateDWordField (CBUF, \_SB.PCI0.CIO2._CRS._Y23._INT, CIOV) // _INT: Interrupts

Store (CIOI, CIOV)

Return (CBUF)

}

Device (TERM)

{

Name (_HID, "INT343D") // _HID: Hardware ID

Name (_UID, One) // _UID: Unique ID

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Name (RBUF, ResourceTemplate ()

{

Memory32Fixed (ReadWrite,

0xFE03C000, // Address Base

0x00001000, // Address Length

)

Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, _Y24)

{

0x00000012,

}

})

CreateDWordField (RBUF, \_SB.PCI0.TERM._CRS._Y24._INT, IRQN) // _INT: Interrupts

Store (TIRQ, IRQN)

Return (RBUF)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (TAEN, Zero))

{

Return (Zero)

}

If (LEqual (TIRQ, Zero))

{

Return (Zero)

}

Return (0x0F)

}

Scope (_SB.PCI0)

{

Method (LPD3, 1, Serialized)

{

OperationRegion (ICB1, SystemMemory, Add (Arg0, 0x84), 0x04)

Field (ICB1, DWordAcc, NoLock, Preserve)

{

TEMP, 32

}

Or (TEMP, 0x03, TEMP)

Store (TEMP, Local0)

}

Method (LHRV, 1, Serialized)

{

OperationRegion (ICB1, SystemMemory, Add (Arg0, 0x08), 0x04)

Field (ICB1, DWordAcc, NoLock, Preserve)

{

HRV, 8

}

Return (HRV)

}

Method (LPD0, 1, Serialized)

{

OperationRegion (ICB1, SystemMemory, Add (Arg0, 0x84), 0x04)

Field (ICB1, DWordAcc, NoLock, Preserve)

{

TEMP, 32

}

And (TEMP, 0xFFFFFFFC, TEMP)

Store (TEMP, Local0)

}

Method (GETD, 1, Serialized)

{

OperationRegion (ICB1, SystemMemory, Add (Arg0, 0x84), 0x04)

Field (ICB1, DWordAcc, NoLock, Preserve)

{

TEMP, 32

}

Return (And (TEMP, 0x03))

}

Method (LCRS, 3, Serialized)

{

Name (RBUF, ResourceTemplate ()

{

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00001000, // Address Length

_Y25)

Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, _Y26)

{

0x00000014,

}

})

CreateDWordField (RBUF, \_SB.PCI0.LCRS._Y25._BAS, BVAL) // _BAS: Base Address

CreateDWordField (RBUF, \_SB.PCI0.LCRS._Y25._LEN, BLEN) // _LEN: Length

CreateDWordField (RBUF, \_SB.PCI0.LCRS._Y26._INT, IRQN) // _INT: Interrupts

Store (Arg1, BVAL)

Store (Arg2, IRQN)

If (LEqual (Arg0, 0x04))

{

Store (0x08, BLEN)

}

Return (RBUF)

}

Method (LSTA, 1, Serialized)

{

If (LOr (LEqual (Arg0, Zero), LEqual (Arg0, 0x03)))

{

Return (Zero)

}

If (LLess (OSYS, 0x07DC))

{

Return (Zero)

}

Return (0x0F)

}

Method (GIRQ, 1, Serialized)

{

Return (Add (0x18, Mod (Arg0, 0x60)))

}

Scope (_SB.PCI0)

{

Device (SIRC)

{

Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID

Name (_STA, 0x03) // _STA: Status

Name (_UID, 0x05) // _UID: Unique ID

Method (ADDB, 3, Serialized)

{

Name (BUFF, ResourceTemplate ()

{

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00001000, // Address Length

_Y27)

})

CreateDWordField (BUFF, \_SB.PCI0.SIRC.ADDB._Y27._BAS, ADDR) // _BAS: Base Address

CreateDWordField (BUFF, \_SB.PCI0.SIRC.ADDB._Y27._LEN, LENG) // _LEN: Length

Store (ResourceTemplate ()

{

}, Local0)

If (LOr (LOr (LEqual (Arg0, One), LEqual (Arg0, 0x03)), LEqual (

Arg0, 0x04)))

{

Store (Arg2, ADDR)

ConcatenateResTemplate (Local0, BUFF, Local0)

}

If (LEqual (Arg0, 0x03))

{

Store (Arg1, ADDR)

ConcatenateResTemplate (Local0, BUFF, Local0)

}

If (LEqual (Arg0, 0x04))

{

Store (Add (0x08, Arg1), ADDR)

Store (0x0FF8, LENG)

ConcatenateResTemplate (Local0, BUFF, Local0)

}

Return (Local0)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

ConcatenateResTemplate (Local0, ADDB (SMD0, SB00, SB10), Local0)

ConcatenateResTemplate (Local0, ADDB (SMD1, SB01, SB11), Local0)

ConcatenateResTemplate (Local0, ADDB (SMD2, SB02, SB12), Local0)

ConcatenateResTemplate (Local0, ADDB (SMD3, SB03, SB13), Local0)

ConcatenateResTemplate (Local0, ADDB (SMD4, SB04, SB14), Local0)

ConcatenateResTemplate (Local0, ADDB (SMD5, SB05, SB15), Local0)

ConcatenateResTemplate (Local0, ADDB (SMD6, SB06, SB16), Local0)

ConcatenateResTemplate (Local0, ADDB (SMD7, SB07, SB17), Local0)

ConcatenateResTemplate (Local0, ADDB (SMD8, SB08, SB18), Local0)

ConcatenateResTemplate (Local0, ADDB (SMD9, SB09, SB19), Local0)

ConcatenateResTemplate (Local0, ADDB (SMDA, SB0A, SB1A), Local0)

If (LEqual (^^GPI0._STA (), Zero))

{

ConcatenateResTemplate (Local0, ^^GPI0._CRS (), Local0)

}

Return (Local0)

}

Device (GPI0)

{

Method (_HID, 0, NotSerialized) // _HID: Hardware ID

{

If (LEqual (PCHV (), SPTH))

{

Return ("INT345D")

}

Return ("INT344B")

}

Name (LINK, "\\_SB.PCI0.GPI0")

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Name (RBUF, ResourceTemplate ()

{

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00010000, // Address Length

_Y28)

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00010000, // Address Length

_Y29)

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00010000, // Address Length

_Y2A)

Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, _Y2B)

{

0x0000000E,

}

})

CreateDWordField (RBUF, \_SB.PCI0.GPI0._CRS._Y28._BAS, COM0) // _BAS: Base Address

CreateDWordField (RBUF, \_SB.PCI0.GPI0._CRS._Y29._BAS, COM1) // _BAS: Base Address

CreateDWordField (RBUF, \_SB.PCI0.GPI0._CRS._Y2A._BAS, COM3) // _BAS: Base Address

CreateDWordField (RBUF, \_SB.PCI0.GPI0._CRS._Y2B._INT, IRQN) // _INT: Interrupts

Store (Add (SBRG, 0x00AF0000), COM0)

Store (Add (SBRG, 0x00AE0000), COM1)

Store (Add (SBRG, 0x00AC0000), COM3)

Store (SGIR, IRQN)

Return (RBUF)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (SBRG, Zero))

{

Return (Zero)

}

If (LEqual (GPEN, Zero))

{

Return (Zero)

}

Return (0x0F)

}

Scope (_SB.PCI0)

{

Device (I2C0)

{

Name (LINK, "\\_SB.PCI0.I2C0")

}

If (LNotEqual (SMD0, 0x02))

{

Scope (_SB.PCI0.I2C0)

{

Name (_HID, "INT3442") // _HID: Hardware ID

Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision

{

Return (LHRV (SB10))

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Return (LCRS (SMD0, SB00, SIR0))

}

Method (_PSC, 0, NotSerialized) // _PSC: Power State Current

{

GETD (SB10)

}

Method (_PS0, 0, NotSerialized) // _PS0: Power State 0

{

LPD0 (SB10)

}

Method (_PS3, 0, NotSerialized) // _PS3: Power State 3

{

LPD3 (SB10)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (LSTA (SMD0))

}

If (LEqual (SMD0, 0x02))

{

Scope (_SB.PCI0.I2C0)

{

Name (_ADR, 0x00150000) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

Scope (_SB.PCI0)

{

Device (I2C1)

{

Name (LINK, "\\_SB.PCI0.I2C1")

}

If (LNotEqual (SMD1, 0x02))

{

Scope (_SB.PCI0.I2C1)

{

Name (_HID, "INT3443") // _HID: Hardware ID

Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision

{

Return (LHRV (SB11))

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Return (LCRS (SMD1, SB01, SIR1))

}

Method (_PSC, 0, NotSerialized) // _PSC: Power State Current

{

GETD (SB11)

}

Method (_PS0, 0, NotSerialized) // _PS0: Power State 0

{

LPD0 (SB11)

}

Method (_PS3, 0, NotSerialized) // _PS3: Power State 3

{

LPD3 (SB11)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (LSTA (SMD1))

}

If (LEqual (SMD1, 0x02))

{

Scope (_SB.PCI0.I2C1)

{

Name (_ADR, 0x00150001) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

Scope (_SB.PCI0)

{

Device (I2C2)

{

Name (LINK, "\\_SB.PCI0.I2C2")

}

If (LNotEqual (SMD2, 0x02))

{

Scope (_SB.PCI0.I2C2)

{

Name (_HID, "INT3444") // _HID: Hardware ID

Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision

{

Return (LHRV (SB12))

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Return (LCRS (SMD2, SB02, SIR2))

}

Method (_PSC, 0, NotSerialized) // _PSC: Power State Current

{

GETD (SB12)

}

Method (_PS0, 0, NotSerialized) // _PS0: Power State 0

{

LPD0 (SB12)

}

Method (_PS3, 0, NotSerialized) // _PS3: Power State 3

{

LPD3 (SB12)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (LSTA (SMD2))

}

If (LEqual (SMD2, 0x02))

{

Scope (_SB.PCI0.I2C2)

{

Name (_ADR, 0x00150002) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

Scope (_SB.PCI0)

{

Device (I2C3)

{

Name (LINK, "\\_SB.PCI0.I2C3")

}

If (LNotEqual (SMD3, 0x02))

{

Scope (_SB.PCI0.I2C3)

{

Name (_HID, "INT3445") // _HID: Hardware ID

Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision

{

Return (LHRV (SB13))

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Return (LCRS (SMD3, SB03, SIR3))

}

Method (_PSC, 0, NotSerialized) // _PSC: Power State Current

{

GETD (SB13)

}

Method (_PS0, 0, NotSerialized) // _PS0: Power State 0

{

LPD0 (SB13)

}

Method (_PS3, 0, NotSerialized) // _PS3: Power State 3

{

LPD3 (SB13)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (LSTA (SMD3))

}

If (LEqual (SMD3, 0x02))

{

Scope (_SB.PCI0.I2C3)

{

Name (_ADR, 0x00150003) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

Scope (_SB.PCI0)

{

Device (I2C4)

{

Name (LINK, "\\_SB.PCI0.I2C4")

}

If (LNotEqual (SMD4, 0x02))

{

Scope (_SB.PCI0.I2C4)

{

Name (_HID, "INT3446") // _HID: Hardware ID

Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision

{

Return (LHRV (SB14))

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Return (LCRS (SMD4, SB04, SIR4))

}

Method (_PSC, 0, NotSerialized) // _PSC: Power State Current

{

GETD (SB14)

}

Method (_PS0, 0, NotSerialized) // _PS0: Power State 0

{

LPD0 (SB14)

}

Method (_PS3, 0, NotSerialized) // _PS3: Power State 3

{

LPD3 (SB14)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (LSTA (SMD4))

}

If (LEqual (SMD4, 0x02))

{

Scope (_SB.PCI0.I2C4)

{

Name (_ADR, 0x00190002) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

Scope (_SB.PCI0)

{

Device (I2C5)

{

Name (LINK, "\\_SB.PCI0.I2C5")

}

If (LNotEqual (SMD5, 0x02))

{

Scope (_SB.PCI0.I2C5)

{

Name (_HID, "INT3447") // _HID: Hardware ID

Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision

{

Return (LHRV (SB15))

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Return (LCRS (SMD5, SB05, SIR5))

}

Method (_PSC, 0, NotSerialized) // _PSC: Power State Current

{

GETD (SB15)

}

Method (_PS0, 0, NotSerialized) // _PS0: Power State 0

{

LPD0 (SB15)

}

Method (_PS3, 0, NotSerialized) // _PS3: Power State 3

{

LPD3 (SB15)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (LSTA (SMD5))

}

If (LEqual (SMD5, 0x02))

{

Scope (_SB.PCI0.I2C5)

{

Name (_ADR, 0x00190001) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

Scope (_SB.PCI0)

{

Device (SPI0)

{

}

If (LNotEqual (SMD6, 0x02))

{

Scope (_SB.PCI0.SPI0)

{

Name (_HID, "INT3440") // _HID: Hardware ID

Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision

{

Return (LHRV (SB16))

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Return (LCRS (SMD6, SB06, SIR6))

}

Method (_PSC, 0, NotSerialized) // _PSC: Power State Current

{

GETD (SB16)

}

Method (_PS0, 0, NotSerialized) // _PS0: Power State 0

{

LPD0 (SB16)

}

Method (_PS3, 0, NotSerialized) // _PS3: Power State 3

{

LPD3 (SB16)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (LSTA (SMD6))

}

If (LEqual (SMD6, 0x02))

{

Scope (_SB.PCI0.SPI0)

{

Name (_ADR, 0x001E0002) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

Scope (_SB.PCI0)

{

Device (SPI1)

{

}

If (LNotEqual (SMD7, 0x02))

{

Scope (_SB.PCI0.SPI1)

{

Name (_HID, "INT3441") // _HID: Hardware ID

Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision

{

Return (LHRV (SB17))

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Return (LCRS (SMD7, SB07, SIR7))

}

Method (_PSC, 0, NotSerialized) // _PSC: Power State Current

{

GETD (SB17)

}

Method (_PS0, 0, NotSerialized) // _PS0: Power State 0

{

LPD0 (SB17)

}

Method (_PS3, 0, NotSerialized) // _PS3: Power State 3

{

LPD3 (SB17)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (LSTA (SMD7))

}

If (LEqual (SMD7, 0x02))

{

Scope (_SB.PCI0.SPI1)

{

Name (_ADR, 0x001E0003) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

Scope (_SB.PCI0)

{

Device (UA00)

{

}

If (LNotEqual (SMD8, 0x02))

{

Scope (_SB.PCI0.UA00)

{

Method (_HID, 0, NotSerialized) // _HID: Hardware ID

{

If (LNotEqual (SMD9, 0x04))

{

Return ("INT3448")

}

Else

{

Return (0x020CD041)

}

Name (_UID, "SerialIoUart0") // _UID: Unique ID

Name (_DDN, "SerialIoUart0") // _DDN: DOS Device Name

Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision

{

Return (LHRV (SB18))

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Return (LCRS (SMD8, SB08, SIR8))

}

Method (_PSC, 0, NotSerialized) // _PSC: Power State Current

{

GETD (SB18)

}

Method (_PS0, 0, NotSerialized) // _PS0: Power State 0

{

If (LNotEqual (SMD8, 0x04))

{

LPD0 (SB18)

}

Method (_PS3, 0, NotSerialized) // _PS3: Power State 3

{

If (LNotEqual (SMD8, 0x04))

{

LPD3 (SB18)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (LSTA (SMD8))

}

If (LEqual (SMD8, 0x02))

{

Scope (_SB.PCI0.UA00)

{

Name (_ADR, 0x001E0000) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

Scope (_SB.PCI0)

{

Device (UA01)

{

}

If (LNotEqual (SMD9, 0x02))

{

Scope (_SB.PCI0.UA01)

{

Method (_HID, 0, NotSerialized) // _HID: Hardware ID

{

If (LNotEqual (SMD9, 0x04))

{

Return ("INT3449")

}

Else

{

Return (0x020CD041)

}

Name (_UID, "SerialIoUart1") // _UID: Unique ID

Name (_DDN, "SerialIoUart1") // _DDN: DOS Device Name

Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision

{

Return (LHRV (SB19))

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Return (LCRS (SMD9, SB09, SIR9))

}

Method (_PSC, 0, NotSerialized) // _PSC: Power State Current

{

GETD (SB19)

}

Method (_PS0, 0, NotSerialized) // _PS0: Power State 0

{

If (LNotEqual (SMD9, 0x04))

{

LPD0 (SB19)

}

Method (_PS3, 0, NotSerialized) // _PS3: Power State 3

{

If (LNotEqual (SMD9, 0x04))

{

LPD3 (SB19)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (LSTA (SMD9))

}

If (LEqual (SMD9, 0x02))

{

Scope (_SB.PCI0.UA01)

{

Name (_ADR, 0x001E0001) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

Scope (_SB.PCI0)

{

Device (UA02)

{

}

If (LNotEqual (SMDA, 0x02))

{

Scope (_SB.PCI0.UA02)

{

Method (_HID, 0, NotSerialized) // _HID: Hardware ID

{

If (LNotEqual (SMDA, 0x04))

{

Return ("INT344A")

}

Else

{

Return (0x020CD041)

}

Name (_UID, "SerialIoUart2") // _UID: Unique ID

Name (_DDN, "SerialIoUart2") // _DDN: DOS Device Name

Method (_HRV, 0, NotSerialized) // _HRV: Hardware Revision

{

Return (LHRV (SB1A))

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Return (LCRS (SMDA, SB0A, SIRA))

}

Method (_PSC, 0, NotSerialized) // _PSC: Power State Current

{

GETD (SB1A)

}

Method (_PS0, 0, NotSerialized) // _PS0: Power State 0

{

If (LNotEqual (SMDA, 0x04))

{

LPD0 (SB1A)

}

Method (_PS3, 0, NotSerialized) // _PS3: Power State 3

{

If (LNotEqual (SMDA, 0x04))

{

LPD3 (SB1A)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (LSTA (SMDA))

}

If (LEqual (SMDA, 0x02))

{

Scope (_SB.PCI0.UA02)

{

Name (_ADR, 0x00190000) // _ADR: Address

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Return (Zero)

}

Scope (_SB.PCI0)

{

Name (HIDG, Buffer (0x10)

{

/* 0000 */ 0xF7, 0xF6, 0xDF, 0x3C, 0x67, 0x42, 0x55, 0x45,

/* 0008 */ 0xAD, 0x05, 0xB3, 0x0A, 0x3D, 0x89, 0x38, 0xDE

})

Name (TP7G, Buffer (0x10)

{

/* 0000 */ 0x82, 0xEB, 0x87, 0xEF, 0x51, 0xF9, 0xDA, 0x46,

/* 0008 */ 0x84, 0xEC, 0x14, 0x87, 0x1A, 0xC6, 0xF8, 0x4B

})

Method (HIDD, 5, Serialized)

{

If (LEqual (Arg0, HIDG))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, One))

{

Return (Buffer (One)

{

0x03

})

}

If (LEqual (Arg2, One))

{

Return (Arg4)

}

Return (Buffer (One)

{

0x00

})

}

Method (TP7D, 6, Serialized)

{

If (LEqual (Arg0, TP7G))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, One))

{

Return (Buffer (One)

{

0x03

})

}

If (LEqual (Arg2, One))

{

Return (ConcatenateResTemplate (Arg4, Arg5))

}

Return (Buffer (One)

{

0x00

})

}

Scope (_SB.PCI0.I2C0)

{

Device (TPD0)

{

Name (HID2, Zero)

Name (SBFB, ResourceTemplate ()

{

I2cSerialBus (0x0020, ControllerInitiated, 0x00061A80,

AddressingMode7Bit, "\\_SB.PCI0.I2C0",

0x00, ResourceConsumer, _Y2C,

)

})

Name (SBFI, ResourceTemplate ()

{

Interrupt (ResourceConsumer, Level, ActiveLow, ExclusiveAndWake, ,, _Y2D)

{

0x00000000,

}

})

Name (SBFG, ResourceTemplate ()

{

GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0000

}

})

CreateWordField (SBFB, \_SB.PCI0.I2C0.TPD0._Y2C._ADR, BADR) // _ADR: Address

CreateDWordField (SBFB, \_SB.PCI0.I2C0.TPD0._Y2C._SPE, SPED) // _SPE: Speed

CreateWordField (SBFG, 0x17, INT1)

CreateDWordField (SBFI, \_SB.PCI0.I2C0.TPD0._Y2D._INT, INT2) // _INT: Interrupts

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

If (LLess (OSYS, 0x07DC))

{

SRXO (GPDI, One)

}

Store (GNUM (GPDI), INT1)

Store (INUM (GPDI), INT2)

If (LEqual (SDM0, Zero))

{

SHPO (GPDI, One)

}

If (LEqual (SDS0, One))

{

Store ("SYNA2393", _HID)

Store (0x20, HID2)

Return (Zero)

}

If (LEqual (SDS0, 0x02))

{

Store ("06CB2846", _HID)

Store (0x20, HID2)

Return (Zero)

}

If (LEqual (SDS0, 0x05))

{

Store ("CUST0001", _HID)

Store (TPDH, HID2)

Store (TPDB, BADR)

If (LEqual (TPDS, Zero))

{

Store (0x000186A0, SPED)

}

If (LEqual (TPDS, One))

{

Store (0x00061A80, SPED)

}

If (LEqual (TPDS, 0x02))

{

Store (0x000F4240, SPED)

}

Return (Zero)

}

Name (_HID, "XXXX0000") // _HID: Hardware ID

Name (_CID, "PNP0C50") // _CID: Compatible ID

Name (_S0W, 0x03) // _S0W: S0 Device Wake State

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, HIDG))

{

Return (HIDD (Arg0, Arg1, Arg2, Arg3, HID2))

}

If (LEqual (Arg0, TP7G))

{

Return (TP7D (Arg0, Arg1, Arg2, Arg3, SBFB, SBFG))

}

Return (Buffer (One)

{

0x00

})

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LOr (LEqual (SDS0, 0x05), LOr (LEqual (SDS0, One), LEqual (

SDS0, 0x02))))

{

Return (0x0F)

}

Return (Zero)

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

If (LLess (OSYS, 0x07DC))

{

Return (SBFI)

}

If (LEqual (SDM0, Zero))

{

Return (ConcatenateResTemplate (SBFB, SBFG))

}

Return (ConcatenateResTemplate (SBFB, SBFI))

}

Device (HDAC)

{

Name (_HID, "INT0000") // _HID: Hardware ID

Name (_CID, "INT0000") // _CID: Compatible ID

Name (_DDN, "Intel(R) Smart Sound Technology Audio Codec") // _DDN: DOS Device Name

Name (_UID, One) // _UID: Unique ID

Name (CADR, Zero)

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

If (LEqual (I2SC, One))

{

Store ("INT3439", _HID)

Store ("INT3439", _CID)

Store (0x1A, CADR)

Return (Zero)

}

If (LEqual (I2SC, 0x02))

{

Store ("INT343A", _HID)

Store ("INT343A", _CID)

Store (0x1C, CADR)

Return (Zero)

}

If (LEqual (I2SC, 0x03))

{

Store ("INT343B", _HID)

Store ("INT343B", _CID)

Store (0x34, CADR)

Return (Zero)

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Name (SBFB, ResourceTemplate ()

{

I2cSerialBus (0x0000, ControllerInitiated, 0x00061A80,

AddressingMode7Bit, "\\_SB.PCI0.I2C0",

0x00, ResourceConsumer, _Y2E,

)

})

Name (SBFI, ResourceTemplate ()

{

Interrupt (ResourceConsumer, Level, ActiveLow, ExclusiveAndWake, ,, _Y2F)

{

0x00000000,

}

})

CreateWordField (SBFB, \_SB.PCI0.I2C0.HDAC._CRS._Y2E._ADR, ADR) // _ADR: Address

Store (CADR, ADR)

CreateDWordField (SBFI, \_SB.PCI0.I2C0.HDAC._CRS._Y2F._INT, AINT) // _INT: Interrupts

Store (INUM (0x02040016), AINT)

If (LEqual (BID, 0x20))

{

Return (SBFB)

}

Return (ConcatenateResTemplate (SBFB, SBFI))

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LNotEqual (I2SC, Zero))

{

Return (0x0F)

}

Return (Zero)

}

Scope (_SB.PCI0.I2C1)

{

Device (TPL1)

{

Name (HID2, Zero)

Name (SBFB, ResourceTemplate ()

{

I2cSerialBus (0x004C, ControllerInitiated, 0x00061A80,

AddressingMode7Bit, "\\_SB.PCI0.I2C1",

0x00, ResourceConsumer, _Y30,

)

})

Name (SBFG, ResourceTemplate ()

{

GpioInt (Level, ActiveLow, Exclusive, PullDefault, 0x0000,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0000

}

})

Name (SBFI, ResourceTemplate ()

{

Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, ,, _Y31)

{

0x00000000,

}

})

CreateWordField (SBFB, \_SB.PCI0.I2C1.TPL1._Y30._ADR, BADR) // _ADR: Address

CreateDWordField (SBFB, \_SB.PCI0.I2C1.TPL1._Y30._SPE, SPED) // _SPE: Speed

CreateDWordField (SBFI, \_SB.PCI0.I2C1.TPL1._Y31._INT, INT2) // _INT: Interrupts

CreateWordField (SBFG, 0x17, INT1)

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

If (LLess (OSYS, 0x07DC))

{

SRXO (GPLI, One)

}

Store (GNUM (GPLI), INT1)

Store (INUM (GPLI), INT2)

If (LEqual (SDM1, Zero))

{

SHPO (GPLI, One)

}

If (LEqual (SDS1, One))

{

Store ("ATML3432", _HID)

Store (Zero, HID2)

Store (0x4C, BADR)

Store (0x00061A80, SPED)

Return (Zero)

}

If (LEqual (SDS1, 0x02))

{

Store ("ATML2952", _HID)

Store (Zero, HID2)

Store (0x4A, BADR)

Store (0x00061A80, SPED)

Return (Zero)

}

If (LEqual (SDS1, 0x03))

{

Store ("ELAN2097", _HID)

Store (One, HID2)

Store (0x10, BADR)

Store (0x00061A80, SPED)

Return (Zero)

}

If (LEqual (SDS1, 0x04))

{

Store ("NTRG0001", _HID)

Store (One, HID2)

Store (0x07, BADR)

Store (0x00061A80, SPED)

Return (Zero)

}

If (LEqual (SDS1, 0x05))

{

Store ("NTRG0002", _HID)

Store (One, HID2)

Store (0x64, BADR)

Store (0x00061A80, SPED)

Return (Zero)

}

If (LEqual (SDS1, 0x06))

{

Store ("CUST0000", _HID)

Store (TPLH, HID2)

Store (TPLB, BADR)

If (LEqual (TPLS, Zero))

{

Store (0x000186A0, SPED)

}

If (LEqual (TPLS, One))

{

Store (0x00061A80, SPED)

}

If (LEqual (TPLS, 0x02))

{

Store (0x000F4240, SPED)

}

Return (Zero)

}

Name (_HID, "XXXX0000") // _HID: Hardware ID

Name (_CID, "PNP0C50") // _CID: Compatible ID

Name (_S0W, 0x04) // _S0W: S0 Device Wake State

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, HIDG))

{

Return (HIDD (Arg0, Arg1, Arg2, Arg3, HID2))

}

If (LEqual (Arg0, TP7G))

{

Return (TP7D (Arg0, Arg1, Arg2, Arg3, SBFB, SBFG))

}

Return (Buffer (One)

{

0x00

})

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LNotEqual (SDS1, Zero))

{

Return (0x0F)

}

Return (Zero)

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

If (LLess (OSYS, 0x07DC))

{

Return (SBFI)

}

If (LEqual (SDM1, Zero))

{

Return (ConcatenateResTemplate (SBFB, SBFG))

}

Return (ConcatenateResTemplate (SBFB, SBFI))

}

Device (IMP3)

{

Name (_ADR, Zero) // _ADR: Address

Name (_HID, "IMPJ0003") // _HID: Hardware ID

Name (_CID, "IMPJ0003") // _CID: Compatible ID

Name (_UID, One) // _UID: Unique ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (BID, 0x20))

{

Return (0x0F)

}

Return (Zero)

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Name (SBUF, ResourceTemplate ()

{

I2cSerialBus (0x006E, ControllerInitiated, 0x00061A80,

AddressingMode7Bit, "\\_SB.PCI0.I2C1",

0x00, ResourceConsumer, ,

)

})

Return (SBUF)

}

Scope (_SB.PCI0.SPI1)

{

Device (FPNT)

{

Method (_HID, 0, NotSerialized) // _HID: Hardware ID

{

If (LEqual (SDS7, One))

{

Return ("FPC1011")

}

If (LEqual (SDS7, 0x02))

{

Return ("FPC1020")

}

If (LEqual (SDS7, 0x03))

{

Return ("VFSI6101")

}

If (LEqual (SDS7, 0x04))

{

Return ("VFSI7500")

}

If (LEqual (SDS7, 0x05))

{

Return ("EGIS0300")

}

If (LEqual (SDS7, 0x06))

{

Return ("FPC1021")

}

Return ("FPNT_DIS")

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

SHPO (GFPI, One)

SHPO (GFPS, One)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LNotEqual (SDS7, Zero))

{

Return (0x0F)

}

Return (Zero)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

Name (BBUF, ResourceTemplate ()

{

SpiSerialBus (0x0000, PolarityLow, FourWireMode, 0x08,

ControllerInitiated, 0x00989680, ClockPolarityLow,

ClockPhaseFirst, "\\_SB.PCI0.SPI1",

0x00, ResourceConsumer, _Y32,

)

GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0008

}

})

Name (IBUF, ResourceTemplate ()

{

Interrupt (ResourceConsumer, Level, ActiveLow, ExclusiveAndWake, ,, _Y33)

{

0x00000000,

}

})

Name (GBUF, ResourceTemplate ()

{

GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, _Y34,

)

{ // Pin list

0x0000

}

})

Name (UBUF, ResourceTemplate ()

{

GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionInputOnly,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0000

}

})

CreateDWordField (BBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y32._SPE, SPEX) // _SPE: Speed

CreateByteField (BBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y32._PHA, PHAX) // _PHA: Clock Phase

CreateWordField (BBUF, 0x3B, SPIN)

CreateWordField (GBUF, 0x17, GPIN)

CreateDWordField (IBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y33._INT, IPIN) // _INT: Interrupts

CreateBitField (IBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y33._LL, ILVL) // _LL_: Low Level

CreateBitField (IBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y33._HE, ITRG) // _HE_: High-Edge

CreateField (GBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y34._POL, 0x02, GLVL) // _POL: Polarity

CreateBitField (GBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y34._MOD, GTRG) // _MOD: Mode

CreateBitField (BBUF, \_SB.PCI0.SPI1.FPNT._CRS._Y32._DPL, SCSP) // _DPL: Device Selection Polarity

CreateWordField (UBUF, 0x17, UPIN)

Store (GNUM (GFPS), SPIN)

Store (GNUM (GFPI), GPIN)

Store (INUM (GFPI), IPIN)

Store (GNUM (GFPI), UPIN)

If (LOr (LEqual (SDS7, 0x02), LEqual (SDS7, 0x06)))

{

Store (Zero, ILVL)

Store (One, ITRG)

Store (Zero, GLVL)

Store (One, GTRG)

}

If (LEqual (SDS7, 0x04))

{

Store (Zero, ILVL)

Store (One, ITRG)

}

While (One)

{

Store (SDS7, _T_0)

If (LEqual (_T_0, One))

{

Store (0x00989680, SPEX)

Store (Zero, PHAX)

}

Else

{

If (LEqual (_T_0, 0x02))

{

Store (0x002DC6C0, SPEX)

Store (Zero, PHAX)

}

Else

{

If (LEqual (_T_0, 0x03))

{

Store (0x007A1200, SPEX)

Store (One, PHAX)

}

Else

{

If (LEqual (_T_0, 0x04))

{

Store (0x007A1200, SPEX)

Store (Zero, PHAX)

}

Else

{

If (LEqual (_T_0, 0x05))

{

Store (0x00F42400, SPEX)

Store (Zero, PHAX)

}

Else

{

If (LEqual (_T_0, 0x06))

{

Store (0x002DC6C0, SPEX)

Store (Zero, PHAX)

}

Else

{

}

Break

}

If (LEqual (SDS7, One))

{

Return (BBUF)

}

If (LAnd (LEqual (SDS7, 0x04), LEqual (SDM7, Zero)))

{

Return (ConcatenateResTemplate (BBUF, ConcatenateResTemplate (UBUF, GBUF)))

}

If (LAnd (LEqual (SDS7, 0x04), LNotEqual (SDM7, Zero)))

{

Return (ConcatenateResTemplate (BBUF, ConcatenateResTemplate (UBUF, IBUF)))

}

If (LEqual (SDM7, Zero))

{

Return (ConcatenateResTemplate (BBUF, GBUF))

}

Return (ConcatenateResTemplate (BBUF, IBUF))

}

Scope (_SB.PCI0.UA00)

{

Device (BTH0)

{

Method (_HID, 0, NotSerialized) // _HID: Hardware ID

{

If (LEqual (SDS8, One))

{

Return ("INT33E1")

}

If (LEqual (SDS8, 0x02))

{

Return ("BCM2E40")

}

Return ("INT33E1")

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

SHPO (GBTI, One)

SHPO (GBTW, One)

SHPO (GBTK, One)

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Name (SBFG, ResourceTemplate ()

{

UartSerialBus (0x0001C200, DataBitsEight, StopBitsOne,

0xC0, LittleEndian, ParityTypeNone, FlowControlHardware,

0x0020, 0x0020, "\\_SB.PCI0.UA00",

0x00, ResourceConsumer, ,

)

GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0000

}

GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0000

}

GpioInt (Edge, ActiveLow, Exclusive, PullDefault, 0x0000,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0000

}

})

CreateWordField (SBFG, 0x8C, INT3)

CreateWordField (SBFG, 0x3C, WAK3)

CreateWordField (SBFG, 0x64, KIL3)

Store (GNUM (GBTI), INT3)

Store (GNUM (GBTW), WAK3)

Store (GNUM (GBTK), KIL3)

Name (SBFI, ResourceTemplate ()

{

UartSerialBus (0x0001C200, DataBitsEight, StopBitsOne,

0xC0, LittleEndian, ParityTypeNone, FlowControlHardware,

0x0020, 0x0020, "\\_SB.PCI0.UA00",

0x00, ResourceConsumer, ,

)

GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0000

}

GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0000

}

Interrupt (ResourceConsumer, Edge, ActiveLow, Exclusive, ,, _Y35)

{

0x00000000,

}

})

CreateDWordField (SBFI, \_SB.PCI0.UA00.BTH0._CRS._Y35._INT, INT4) // _INT: Interrupts

CreateWordField (SBFI, 0x3C, WAK4)

CreateWordField (SBFI, 0x64, KIL4)

Store (INUM (GBTI), INT4)

Store (GNUM (GBTW), WAK4)

Store (GNUM (GBTK), KIL4)

If (LEqual (SDM8, Zero))

{

Return (SBFG)

}

Else

{

Return (SBFI)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LNotEqual (SDS8, Zero))

{

Return (0x0F)

}

Return (Zero)

}

Name (_S0W, 0x02) // _S0W: S0 Device Wake State

}

Scope (_SB.PCI0)

{

Device (GNSS)

{

Name (_HID, "INT33A2") // _HID: Hardware ID

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Name (BUF1, ResourceTemplate ()

{

UartSerialBus (0x0001C200, DataBitsEight, StopBitsOne,

0xC0, LittleEndian, ParityTypeNone, FlowControlHardware,

0x0040, 0x0040, "\\_SB.PCI0.UA01",

0x00, ResourceConsumer, ,

)

})

Name (BUF2, ResourceTemplate ()

{

GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0000

}

})

CreateWordField (BUF2, 0x17, RPIN)

Store (GNUM (GGNR), RPIN)

If (LEqual (GNSC, One))

{

Return (ConcatenateResTemplate (BUF1, BUF2))

}

Else

{

Return (BUF2)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (GNSC, Zero))

{

Return (Zero)

}

Return (0x0F)

}

Scope (_SB.PCI0)

{

Device (GEXP)

{

Name (_ADR, One) // _ADR: Address

Name (_STA, 0x0B) // _STA: Status

Method (SGEP, 3, Serialized)

{

CSER (GEXN, Arg0, Arg1, Arg2, Zero)

}

Method (SGED, 3, Serialized)

{

CSER (GEXN, Arg0, Arg1, Arg2, One)

}

Method (GEPS, 2, Serialized)

{

Return (CSER (GEXN, Arg0, Arg1, Zero, 0x02))

}

Method (SGEI, 3, Serialized)

{

CSER (GEXN, Arg0, Arg1, Arg2, 0x03)

}

Name (PPR, 0x08)

Name (INR, Package (0x03)

{

Zero,

One,

0x02

})

Name (OUTR, Package (0x03)

{

0x04,

0x05,

0x06

})

Name (CFGR, Package (0x03)

{

0x0C,

0x0D,

0x0E

})

Name (POLR, Package (0x03)

{

0x08,

0x09,

0x0A

})

Name (EXPA, 0x22)

Name (UCCH, One)

Name (END, 0x0200)

Name (READ, 0x0100)

Name (CACH, Package (0x02)

{

Package (0x10)

{

Package (0x02)

{

Zero,

Zero

Package (0x02)

{

Zero,

Zero

Package (0x02)

{

Zero,

Zero

Package (0x02)

{

0x03,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

0x03,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

0x03,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

0x03,

Zero

}

Package (0x10)

{

Package (0x02)

{

Zero,

Zero

Package (0x02)

{

Zero,

Zero

Package (0x02)

{

Zero,

Zero

Package (0x02)

{

0x03,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

0x03,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

0x03,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

One,

Zero

Package (0x02)

{

0x03,

Zero

}

})

Method (W3DC, 4, Serialized)

{

Store (Arg3, Index (DerefOf (Index (DerefOf (Index (CACH, Arg0)),

Arg1)), Arg2))

}

Method (R3DC, 3, Serialized)

{

Return (DerefOf (Index (DerefOf (Index (DerefOf (Index (CACH, Arg0)),

Arg1)), Arg2)))

}

Method (WREG, 4, Serialized)

{

OperationRegion (BAR0, SystemMemory, Arg0, 0x0208)

Field (BAR0, DWordAcc, NoLock, Preserve)

{

ICON, 32,

TAR, 32,

Offset (0x10),

DATA, 32,

HCNT, 32,

LCNT, 32,

Offset (0x2C),

, 5,

ABRT, 1,

Offset (0x40),

RBCK, 32,

Offset (0x54),

CLR, 32,

Offset (0x6C),

ENB, 1,

Offset (0x70),

ACTV, 1,

TFNF, 1,

, 1,

RFNE, 1,

Offset (0x7C),

HOLD, 32,

Offset (0x9C),

ENSB, 1,

Offset (0x204),

RST, 32

}

Store (Add (Timer, 0xC350), Local1)

Store (0x07, RST)

Store (Zero, ENB)

Store (RBCK, Local0)

Store (CLR, Local0)

Store (0x001C001C, HOLD)

Store (0x0210, HCNT)

Store (0x0280, LCNT)

Store (Add (EXPA, Arg1), TAR)

Store (0x65, ICON)

Store (One, ENB)

While (LNotEqual (ENSB, One))

{

If (LGreater (Timer, Local1))

{

Return (Zero)

}

Store (Arg2, DATA)

Store (Add (END, Arg3), DATA)

While (LNotEqual (ACTV, Zero))

{

If (LGreater (Timer, Local1))

{

Return (Zero)

}

Store (Zero, ENB)

While (LNotEqual (ENSB, Zero))

{

If (LGreater (Timer, Local1))

{

Return (Zero)

}

W3DC (Arg1, Arg2, One, Arg3)

If (LEqual (R3DC (Arg1, Arg2, Zero), One))

{

W3DC (Arg1, Arg2, Zero, 0x02)

}

Return (Zero)

}

Method (RREG, 3, Serialized)

{

If (LEqual (UCCH, One))

{

If (LEqual (R3DC (Arg1, Arg2, Zero), 0x02))

{

Return (R3DC (Arg1, Arg2, One))

}

OperationRegion (BAR0, SystemMemory, Arg0, 0x0208)

Field (BAR0, DWordAcc, NoLock, Preserve)

{

ICON, 32,

TAR, 32,

Offset (0x10),

DATA, 32,

HCNT, 32,

LCNT, 32,

Offset (0x2C),

, 5,

ABRT, 1,

Offset (0x40),

RBCK, 32,

Offset (0x54),

CLR, 32,

Offset (0x6C),

ENB, 1,

Offset (0x70),

ACTV, 1,

TFNF, 1,

, 1,

RFNE, 1,

Offset (0x7C),

HOLD, 32,

Offset (0x9C),

ENSB, 1,

Offset (0x204),

RST, 32

}

Store (Add (Timer, 0xC350), Local1)

Store (0x07, RST)

Store (Zero, ENB)

Store (RBCK, Local0)

Store (CLR, Local0)

Store (0x001C001C, HOLD)

Store (0x0210, HCNT)

Store (0x0280, LCNT)

Store (Add (EXPA, Arg1), TAR)

Store (0x65, ICON)

Store (One, ENB)

While (LNotEqual (ENSB, One))

{

If (LGreater (Timer, Local1))

{

Return (Zero)

}

Store (Arg2, DATA)

Store (Add (END, READ), DATA)

While (LNotEqual (ACTV, Zero))

{

If (LGreater (Timer, Local1))

{

Return (Zero)

}

Store (DATA, Local0)

Store (Zero, ENB)

While (LNotEqual (ENSB, Zero))

{

If (LGreater (Timer, Local1))

{

Return (Zero)

}

Return (Local0)

}

Method (PS0, 1, Serialized)

{

OperationRegion (BAR1, SystemMemory, Arg0, 0x88)

Field (BAR1, DWordAcc, NoLock, Preserve)

{

Offset (0x84),

D0D3, 2

}

Store (Zero, D0D3)

Store (D0D3, Local0)

}

Method (PS3, 1, Serialized)

{

OperationRegion (BAR1, SystemMemory, Arg0, 0x88)

Field (BAR1, DWordAcc, NoLock, Preserve)

{

Offset (0x84),

D0D3, 2

}

Store (0x03, D0D3)

Store (D0D3, Local0)

}

Method (CSER, 5, Serialized)

{

Name (SB1X, Zero)

Name (SB0X, Zero)

Name (SMDX, Zero)

Name (PINN, Zero)

Name (REGN, Zero)

Name (REGA, Zero)

Name (OLDV, Zero)

Name (NEWV, Zero)

Name (RETV, Zero)

If (LGreater (Arg0, 0x05))

{

Return (Zero)

}

If (LEqual (Arg0, Zero))

{

Store (SB10, SB1X)

Store (SB00, SB0X)

Store (SMD0, SMDX)

}

If (LEqual (Arg0, One))

{

Store (SB11, SB1X)

Store (SB01, SB0X)

Store (SMD1, SMDX)

}

If (LEqual (Arg0, 0x02))

{

Store (SB12, SB1X)

Store (SB02, SB0X)

Store (SMD2, SMDX)

}

If (LEqual (Arg0, 0x03))

{

Store (SB13, SB1X)

Store (SB03, SB0X)

Store (SMD3, SMDX)

}

If (LEqual (Arg0, 0x04))

{

Store (SB14, SB1X)

Store (SB04, SB0X)

Store (SMD4, SMDX)

}

If (LEqual (Arg0, 0x05))

{

Store (SB15, SB1X)

Store (SB05, SB0X)

Store (SMD5, SMDX)

}

If (LGreater (Arg0, 0x05))

{

Return (Zero)

}

If (LGreater (Arg1, One))

{

Return (Zero)

}

If (LGreater (Arg2, 0x17))

{

Return (Zero)

}

If (LGreater (Arg3, One))

{

Return (Zero)

}

If (LGreater (Arg4, 0x02))

{

Return (Zero)

}

If (LNotEqual (SMDX, 0x03))

{

Return (Zero)

}

If (LEqual (Arg4, Zero))

{

Store (OUTR, Local0)

}

If (LEqual (Arg4, One))

{

Store (CFGR, Local0)

}

If (LEqual (Arg4, 0x02))

{

Store (INR, Local0)

}

If (LEqual (Arg4, 0x03))

{

Store (POLR, Local0)

}

PS0 (SB1X)

Divide (Arg2, PPR, PINN, REGN)

Store (DerefOf (Index (Local0, REGN)), REGA)

Store (RREG (SB0X, Arg1, REGA), OLDV)

If (LEqual (Arg4, 0x02))

{

Store (And (One, ShiftRight (OLDV, PINN)), RETV)

}

Else

{

And (OLDV, Not (ShiftLeft (One, PINN)), NEWV)

Or (ShiftLeft (Arg3, PINN), NEWV, NEWV)

If (LNotEqual (NEWV, OLDV))

{

WREG (SB0X, Arg1, REGA, NEWV)

}

PS3 (SB1X)

Return (RETV)

}

Method (PKG1, 1, Serialized)

{

Name (PKG, Package (0x01)

{

Zero

})

Store (Arg0, Index (PKG, Zero))

Return (PKG)

}

Method (PKG3, 3, Serialized)

{

Name (PKG, Package (0x03)

{

Zero,

Zero

})

Store (Arg0, Index (PKG, Zero))

Store (Arg1, Index (PKG, One))

Store (Arg2, Index (PKG, 0x02))

Return (PKG)

}

If (USTP)

{

Scope (_SB.PCI0.I2C1)

{

Method (SSCN, 0, NotSerialized)

{

Return (PKG3 (SSHI, SSLI, SSDI))

}

Method (FMCN, 0, NotSerialized)

{

Return (PKG3 (FMHI, FMLI, FMDI))

}

Method (FPCN, 0, NotSerialized)

{

Return (PKG3 (FPHI, FPLI, FPDI))

}

Method (M0D3, 0, NotSerialized)

{

Return (PKG1 (M0CI))

}

Method (M1D3, 0, NotSerialized)

{

Return (PKG1 (M1CI))

}

Scope (_SB.PCI0.SPI1)

{

Method (M0D3, 0, NotSerialized)

{

Return (PKG1 (M0CS))

}

Method (M1D3, 0, NotSerialized)

{

Return (PKG1 (M1CS))

}

Scope (_SB.PCI0.UA01)

{

Method (M0D3, 0, NotSerialized)

{

Return (PKG1 (M0CU))

}

Method (M1D3, 0, NotSerialized)

{

Return (PKG1 (M1CU))

}

If (LEqual (PCHV (), SPTL))

{

Scope (_SB.PCI0)

{

Device (PEMC)

{

Name (_ADR, 0x001E0004) // _ADR: Address

OperationRegion (SCSR, PCI_Config, Zero, 0x0100)

Field (SCSR, WordAcc, NoLock, Preserve)

{

Offset (0x84),

PSTA, 32,

Offset (0xA2),

, 2,

PGEN, 1

}

Method (_PS0, 0, Serialized) // _PS0: Power State 0

{

Store (Zero, PGEN)

PCRA (0xC0, 0x0600, 0x7FFFFFBA)

Sleep (0x02)

PCRO (0xC0, 0x0600, 0x80000045)

And (PSTA, 0xFFFFFFFC, PSTA)

Store (PSTA, Local0)

}

Method (_PS3, 0, Serialized) // _PS3: Power State 3

{

Store (One, PGEN)

Or (PSTA, 0x03, PSTA)

Store (PSTA, Local0)

}

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

ADBG (Concatenate ("EMH4=", ToDecimalString (EMH4)))

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xA5, 0x3E, 0xC1, 0xF6, 0xCD, 0x65, 0x1F, 0x46,

/* 0008 */ 0xAB, 0x7A, 0x29, 0xF7, 0xE8, 0xD5, 0xBD, 0x61

}))

{

If (LEqual (Arg1, Zero))

{

While (One)

{

Store (Arg2, _T_0)

If (LEqual (_T_0, Zero))

{

If (LEqual (EMH4, One))

{

Return (Buffer (One)

{

0x61

})

}

Return (Buffer (One)

{

0x21

})

}

Else

{

If (LEqual (_T_0, 0x05))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

Return (Buffer (One)

{

0x05

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Device (CARD)

{

Name (_ADR, 0x08) // _ADR: Address

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (Zero)

}

Device (PSDC)

{

Name (_ADR, 0x001E0006) // _ADR: Address

OperationRegion (SCSR, PCI_Config, Zero, 0x0100)

Field (SCSR, WordAcc, NoLock, Preserve)

{

Offset (0x84),

PSTA, 32,

Offset (0xA2),

, 2,

PGEN, 1

}

Method (_PS0, 0, Serialized) // _PS0: Power State 0

{

Store (Zero, PGEN)

PCRA (0xC0, 0x0600, 0xFFFFFE7A)

Sleep (0x02)

PCRO (0xC0, 0x0600, 0x0185)

And (PSTA, 0xFFFFFFFC, PSTA)

Store (PSTA, Local0)

}

Method (_PS3, 0, Serialized) // _PS3: Power State 3

{

Store (One, PGEN)

Or (PSTA, 0x03, PSTA)

Store (PSTA, Local0)

}

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xA5, 0x3E, 0xC1, 0xF6, 0xCD, 0x65, 0x1F, 0x46,

/* 0008 */ 0xAB, 0x7A, 0x29, 0xF7, 0xE8, 0xD5, 0xBD, 0x61

}))

{

If (LEqual (Arg1, Zero))

{

While (One)

{

Store (Arg2, _T_0)

If (LEqual (_T_0, Zero))

{

Return (Buffer (One)

{

0x19

})

}

Else

{

If (LEqual (_T_0, 0x03))

{

Sleep (0x64)

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_0, 0x04))

{

Sleep (0x64)

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Device (CARD)

{

Name (_ADR, 0x08) // _ADR: Address

Method (_RMV, 0, NotSerialized) // _RMV: Removal Status

{

Return (One)

}

Scope (_SB.PCI0)

{

Device (ISHD)

{

Name (_ADR, 0x00130000) // _ADR: Address

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Scope (_SB.PCI0)

{

Device (HECI)

{

Name (_ADR, 0x00160000) // _ADR: Address

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

Name (ECUP, One)

Mutex (EHLD, 0x00)

Scope (\)

{

Device (CHUB)

{

Name (_HID, EisaId ("INT339B")) // _HID: Hardware ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (CHEN, One))

{

Return (0x0F)

}

Return (Zero)

}

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Zero, ToInteger (Arg1)))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

If (LEqual (_T_0, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_1)

If (LEqual (_T_1, Zero)) {}

Break

}

Break

}

Return (Zero)

}

Return (Zero)

}

Return (Zero)

}

Scope (_SB)

{

OperationRegion (ITSS, SystemMemory, 0xFDC43100, 0x0208)

Field (ITSS, ByteAcc, NoLock, Preserve)

{

PARC, 8,

PBRC, 8,

PCRC, 8,

PDRC, 8,

PERC, 8,

PFRC, 8,

PGRC, 8,

PHRC, 8,

Offset (0x200),

, 1,

SCGE, 1

}

Mutex (MUTX, 0x00)

OperationRegion (PRT0, SystemIO, 0x80, 0x04)

Field (PRT0, DWordAcc, Lock, Preserve)

{

P80H, 32

}

Method (P8XH, 2, Serialized)

{

If (LEqual (Arg0, Zero))

{

Store (Or (And (P80D, 0xFFFFFF00), Arg1), P80D)

}

If (LEqual (Arg0, One))

{

Store (Or (And (P80D, 0xFFFF00FF), ShiftLeft (Arg1, 0x08)

), P80D)

}

If (LEqual (Arg0, 0x02))

{

Store (Or (And (P80D, 0xFF00FFFF), ShiftLeft (Arg1, 0x10)

), P80D)

}

If (LEqual (Arg0, 0x03))

{

Store (Or (And (P80D, 0x00FFFFFF), ShiftLeft (Arg1, 0x18)

), P80D)

}

Store (P80D, P80H)

}

Method (ADBG, 1, Serialized)

{

If (CondRefOf (MDBG))

{

Return (MDBG)

Arg0

}

Return (Zero)

}

OperationRegion (SPRT, SystemIO, 0xB2, 0x02)

Field (SPRT, ByteAcc, Lock, Preserve)

{

SSMP, 8

}

Name (WAKP, Package (0x02)

{

Zero,

Zero

})

Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model

{

Store (Arg0, GPIC)

Store (Arg0, PICM)

If (Arg0)

{

P8XH (Zero, 0xAA)

}

Else

{

P8XH (Zero, 0xAC)

}

Method (RPTS, 1, NotSerialized)

{

Store (Zero, P80D)

P8XH (Zero, Arg0)

ADBG (Concatenate ("_PTS=", ToHexString (Arg0)))

If (LEqual (Arg0, 0x03))

{

If (CondRefOf (\_PR.DTSE))

{

If (LAnd (\_PR.DTSE, LGreater (TCNT, One)))

{

TRAP (0x02, 0x1E)

}

If (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04)))

{

If (LAnd (CondRefOf (\_SB.PCI0.LPCB.H_EC.PB10), ECON))

{

If (\_SB.PCI0.LPCB.H_EC.ECAV)

{

If (\_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.PB10)))

{

Or (PB1E, 0x80, PB1E)

}

Else

{

And (PB1E, 0x7F, PB1E)

}

If (CondRefOf (\_SB.TPM.PTS))

{

\_SB.TPM.PTS (Arg0)

}

If (LOr (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04)), LEqual (

Arg0, 0x05)))

{

If (LEqual (PFLV, 0x02))

{

\_SB.SGOV (0x02010003, One)

}

Method (RWAK, 1, Serialized)

{

P8XH (One, 0xAB)

P8XH (Zero, ShiftLeft (Arg0, 0x04))

ADBG ("_WAK")

If (LEqual (S0ID, One))

{

Store (One, \_SB.SCGE)

}

If (NEXP)

{

If (And (OSCC, 0x02))

{

\_SB.PCI0.NHPG ()

}

If (And (OSCC, 0x04))

{

\_SB.PCI0.NPME ()

}

If (LEqual (Arg0, 0x03))

{

If (LEqual (Zero, ACTT))

{

If (LEqual (ECON, One))

{

\_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.CFAN))

}

If (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04)))

{

If (LAnd (CondRefOf (\_SB.PCI0.LPCB.H_EC.PB10), ECON))

{

If (And (PB1E, 0x80))

{

\_SB.PCI0.LPCB.H_EC.ECWT (One, RefOf (\_SB.PCI0.LPCB.H_EC.PB10))

}

If (And (GBSX, 0x40))

{

\_SB.PCI0.GFX0.IUEH (0x06)

}

If (And (GBSX, 0x80))

{

\_SB.PCI0.GFX0.IUEH (0x07)

}

If (CondRefOf (\_PR.DTSE))

{

If (LAnd (\_PR.DTSE, LGreater (TCNT, One)))

{

TRAP (0x02, 0x14)

}

If (LNotEqual (\_SB.PCI0.RP01.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP01, Zero)

}

If (LNotEqual (\_SB.PCI0.RP02.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP02, Zero)

}

If (LNotEqual (\_SB.PCI0.RP03.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP03, Zero)

}

If (LNotEqual (\_SB.PCI0.RP04.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP04, Zero)

}

If (LNotEqual (\_SB.PCI0.RP05.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP05, Zero)

}

If (LNotEqual (\_SB.PCI0.RP06.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP06, Zero)

}

If (LNotEqual (\_SB.PCI0.RP07.VDID, 0xFFFFFFFF))

{

If (LEqual (DSTS, Zero))

{

Notify (\_SB.PCI0.RP07, Zero)

}

If (LNotEqual (\_SB.PCI0.RP08.VDID, 0xFFFFFFFF))

{

If (LEqual (DSTS, Zero))

{

Notify (\_SB.PCI0.RP08, Zero)

}

If (LNotEqual (\_SB.PCI0.RP09.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP09, Zero)

}

If (LNotEqual (\_SB.PCI0.RP10.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP10, Zero)

}

If (LNotEqual (\_SB.PCI0.RP11.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP11, Zero)

}

If (LNotEqual (\_SB.PCI0.RP12.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP12, Zero)

}

If (LNotEqual (\_SB.PCI0.RP13.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP13, Zero)

}

If (LNotEqual (\_SB.PCI0.RP14.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP14, Zero)

}

If (LNotEqual (\_SB.PCI0.RP15.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP15, Zero)

}

If (LNotEqual (\_SB.PCI0.RP16.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP16, Zero)

}

If (LNotEqual (\_SB.PCI0.RP17.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP17, Zero)

}

If (LNotEqual (\_SB.PCI0.RP18.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP18, Zero)

}

If (LNotEqual (\_SB.PCI0.RP19.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP19, Zero)

}

If (LNotEqual (\_SB.PCI0.RP20.VDID, 0xFFFFFFFF))

{

Notify (\_SB.PCI0.RP20, Zero)

}

If (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04)))

{

If (LEqual (\_SB.PWRB.PBST, One))

{

If (PBSS)

{

Notify (\_SB.PWRB, 0x02)

Store (One, PBSS)

}

Return (Package (0x02)

{

Zero,

Zero

})

}

Method (GETB, 3, Serialized)

{

Multiply (Arg0, 0x08, Local0)

Multiply (Arg1, 0x08, Local1)

CreateField (Arg2, Local0, Local1, TBF3)

Return (TBF3)

}

Method (PNOT, 0, Serialized)

{

If (LGreater (TCNT, One))

{

If (And (PDC0, 0x08))

{

Notify (\_PR.CPU0, 0x80)

}

If (And (PDC1, 0x08))

{

Notify (\_PR.CPU1, 0x80)

}

If (And (PDC2, 0x08))

{

Notify (\_PR.CPU2, 0x80)

}

If (And (PDC3, 0x08))

{

Notify (\_PR.CPU3, 0x80)

}

If (And (PDC4, 0x08))

{

Notify (\_PR.CPU4, 0x80)

}

If (And (PDC5, 0x08))

{

Notify (\_PR.CPU5, 0x80)

}

If (And (PDC6, 0x08))

{

Notify (\_PR.CPU6, 0x80)

}

If (And (PDC7, 0x08))

{

Notify (\_PR.CPU7, 0x80)

}

Else

{

Notify (\_PR.CPU0, 0x80)

}

If (LGreater (TCNT, One))

{

If (LAnd (And (PDC0, 0x08), And (PDC0, 0x10)))

{

Notify (\_PR.CPU0, 0x81)

}

If (LAnd (And (PDC1, 0x08), And (PDC1, 0x10)))

{

Notify (\_PR.CPU1, 0x81)

}

If (LAnd (And (PDC2, 0x08), And (PDC2, 0x10)))

{

Notify (\_PR.CPU2, 0x81)

}

If (LAnd (And (PDC3, 0x08), And (PDC3, 0x10)))

{

Notify (\_PR.CPU3, 0x81)

}

If (LAnd (And (PDC4, 0x08), And (PDC4, 0x10)))

{

Notify (\_PR.CPU4, 0x81)

}

If (LAnd (And (PDC5, 0x08), And (PDC5, 0x10)))

{

Notify (\_PR.CPU5, 0x81)

}

If (LAnd (And (PDC6, 0x08), And (PDC6, 0x10)))

{

Notify (\_PR.CPU6, 0x81)

}

If (LAnd (And (PDC7, 0x08), And (PDC7, 0x10)))

{

Notify (\_PR.CPU7, 0x81)

}

Else

{

Notify (\_PR.CPU0, 0x81)

}

If (LEqual (ECON, One))

{

Store (\_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.B1CC)), B1SC)

Store (\_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.B1ST)), B1SS)

Store (\_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.B2CC)), B2SC)

Store (\_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.B2ST)), B2SS)

Notify (\_SB.PCI0.LPCB.H_EC.BAT0, 0x81)

Notify (\_SB.PCI0.LPCB.H_EC.BAT1, 0x81)

Notify (\_SB.PCI0.LPCB.H_EC.BAT2, 0x81)

}

If (LEqual (DPTF, One))

{

Notify (\_SB.IETM, 0x86)

If (LEqual (CHGE, One))

{

Notify (\_SB.PCI0.LPCB.H_EC.CHRG, 0x80)

}

OperationRegion (MBAR, SystemMemory, Add (\_SB.PCI0.GMHB (), 0x5000), 0x1000)

Field (MBAR, ByteAcc, NoLock, Preserve)

{

Offset (0x938),

PWRU, 4,

Offset (0x9A0),

PPL1, 15,

PL1E, 1,

CLP1, 1

}

Name (CLMP, Zero)

Name (PLEN, Zero)

Name (PLSV, 0x8000)

Name (CSEM, Zero)

Method (SPL1, 0, Serialized)

{

Name (PPUU, Zero)

If (LEqual (CSEM, One))

{

Return (Zero)

}

Store (One, CSEM)

Store (PPL1, PLSV)

Store (PL1E, PLEN)

Store (CLP1, CLMP)

If (LEqual (PWRU, Zero))

{

Store (One, PPUU)

}

Else

{

ShiftLeft (Decrement (PWRU), 0x02, PPUU)

}

Multiply (PLVL, PPUU, Local0)

Divide (Local0, 0x03E8, , Local1)

Store (Local1, PPL1)

Store (One, PL1E)

Store (One, CLP1)

}

Method (RPL1, 0, Serialized)

{

Store (PLSV, PPL1)

Store (PLEN, PL1E)

Store (CLMP, CLP1)

Store (Zero, CSEM)

}

Name (UAMS, Zero)

Name (GLCK, Zero)

Method (GUAM, 1, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LGreater (OSYS, 0x07D0))

{

Add (PWRV, 0xFC, Local0)

ADBG ("Loc 0")

ADBG (Local0)

OperationRegion (ACTC, SystemMemory, Local0, 0x04)

Field (ACTC, DWordAcc, NoLock, Preserve)

{

, 1,

ACTD, 1

}

While (One)

{

Store (ToInteger (Arg0), _T_0)

If (LEqual (_T_0, Zero))

{

If (LEqual (GLCK, One))

{

Store (Zero, GLCK)

P8XH (Zero, 0xC5)

P8XH (One, 0xAB)

ADBG ("Exit CS")

If (LEqual (ECNO, One))

{

ADBG ("EC Notify")

Store (Acquire (EHLD, 0xFFFF), Local0)

If (LEqual (Local0, Zero))

{

\_SB.PCI0.LPCB.H_EC.ECMD (0x2D)

If (LEqual (ECLP, One))

{

Store (One, ECUP)

}

Release (EHLD)

}

If (LEqual (ECDB, One))

{

ADBG ("EC Debug")

\_SB.PCI0.LPCB.H_EC.ECWT (Zero, RefOf (\_SB.PCI0.LPCB.H_EC.DLED))

}

If (LGreaterEqual (OSYS, 0x07DF))

{

Store (Zero, ACTD)

}

If (PSCP)

{

If (CondRefOf (\_PR.CPU0._PPC))

{

Store (Zero, \_PR.CPPC)

PNOT ()

}

If (PLCS)

{

RPL1 ()

}

Else

{

If (LEqual (_T_0, One))

{

If (LEqual (GLCK, Zero))

{

Store (One, GLCK)

P8XH (Zero, 0xC5)

P8XH (One, Zero)

ADBG ("Enter CS")

If (LEqual (ECNO, One))

{

ADBG ("EC Notify")

If (LEqual (ECDB, One))

{

ADBG ("EC Debug")

\_SB.PCI0.LPCB.H_EC.ECWT (One, RefOf (\_SB.PCI0.LPCB.H_EC.DLED))

}

\_SB.PCI0.LPCB.H_EC.ECMD (0x2C)

If (LEqual (ECLP, One))

{

Store (Zero, ECUP)

}

If (LGreaterEqual (OSYS, 0x07DF))

{

Store (One, ACTD)

}

If (PSCP)

{

If (LAnd (CondRefOf (\_PR.CPU0._PSS), CondRefOf (\_PR.CPU0._PPC)))

{

If (And (PDC0, 0x0400))

{

Subtract (SizeOf (\_PR.CPU0.TPSS), One, \_PR.CPPC)

}

Else

{

Subtract (SizeOf (\_PR.CPU0.LPSS), One, \_PR.CPPC)

}

PNOT ()

}

If (PLCS)

{

SPL1 ()

}

Else

{

Return (Zero)

}

Break

}

Store (LAnd (Arg0, LNot (PWRS)), UAMS)

P_CS ()

}

Method (P_CS, 0, Serialized)

{

If (CondRefOf (\_SB.PCI0.PAUD.PUAM))

{

\_SB.PCI0.PAUD.PUAM ()

}

If (LEqual (OSYS, 0x07DC))

{

If (CondRefOf (\_SB.PCI0.XHC.DUAM))

{

\_SB.PCI0.XHC.DUAM ()

}

Scope (\)

{

OperationRegion (IO_H, SystemIO, 0x1000, 0x04)

Field (IO_H, ByteAcc, NoLock, Preserve)

{

TRPH, 8

}

Method (TRAP, 2, Serialized)

{

Store (Arg1, SMIF)

If (LEqual (Arg0, 0x02))

{

Store (Arg1, \_PR.DTSF)

Store (Zero, \_PR.TRPD)

Return (\_PR.DTSF)

}

If (LEqual (Arg0, 0x03))

{

Store (Zero, TRPH)

}

If (LEqual (Arg0, 0x04))

{

Store (Zero, \_PR.TRPF)

}

Return (SMIF)

}

Scope (_SB.PCI0)

{

Method (PTMA, 0, NotSerialized)

{

Return (\_PR.BGMA)

}

Method (PTMS, 0, NotSerialized)

{

Return (\_PR.BGMS)

}

Method (PTIA, 0, NotSerialized)

{

Return (\_PR.BGIA)

}

Method (_INI, 0, Serialized) // _INI: Initialize

{

Store (0x07D0, OSYS)

If (CondRefOf (\OOSI, Local0))

{

If (OOSI ("Linux"))

{

Store (0x03E8, OSYS)

}

If (OOSI ("Windows 2001"))

{

Store (0x07D1, OSYS)

}

If (OOSI ("Windows 2001 SP1"))

{

Store (0x07D1, OSYS)

}

If (OOSI ("Windows 2001 SP2"))

{

Store (0x07D2, OSYS)

}

If (OOSI ("Windows 2001.1"))

{

Store (0x07D3, OSYS)

}

If (OOSI ("Windows 2006"))

{

Store (0x07D6, OSYS)

}

If (OOSI ("Windows 2009"))

{

Store (0x07D9, OSYS)

}

If (OOSI ("Windows 2012"))

{

Store (0x07DC, OSYS)

}

If (OOSI ("Windows 2013"))

{

Store (0x07DD, OSYS)

}

If (OOSI ("Windows 2015"))

{

Store (0x07DF, OSYS)

}

If (CondRefOf (\_PR.DTSE))

{

If (LGreaterEqual (\_PR.DTSE, One))

{

Store (One, \_PR.DSAE)

}

Method (NHPG, 0, Serialized)

{

Store (Zero, ^RP01.HPEX)

Store (Zero, ^RP02.HPEX)

Store (Zero, ^RP03.HPEX)

Store (Zero, ^RP04.HPEX)

Store (Zero, ^RP05.HPEX)

Store (Zero, ^RP06.HPEX)

Store (Zero, ^RP07.HPEX)

Store (Zero, ^RP08.HPEX)

Store (Zero, ^RP09.HPEX)

Store (Zero, ^RP10.HPEX)

Store (Zero, ^RP11.HPEX)

Store (Zero, ^RP12.HPEX)

Store (Zero, ^RP13.HPEX)

Store (Zero, ^RP14.HPEX)

Store (Zero, ^RP15.HPEX)

Store (Zero, ^RP16.HPEX)

Store (Zero, ^RP17.HPEX)

Store (Zero, ^RP18.HPEX)

Store (Zero, ^RP19.HPEX)

Store (Zero, ^RP20.HPEX)

Store (One, ^RP01.HPSX)

Store (One, ^RP02.HPSX)

Store (One, ^RP03.HPSX)

Store (One, ^RP04.HPSX)

Store (One, ^RP05.HPSX)

Store (One, ^RP06.HPSX)

Store (One, ^RP07.HPSX)

Store (One, ^RP08.HPSX)

Store (One, ^RP09.HPSX)

Store (One, ^RP10.HPSX)

Store (One, ^RP11.HPSX)

Store (One, ^RP12.HPSX)

Store (One, ^RP13.HPSX)

Store (One, ^RP14.HPSX)

Store (One, ^RP15.HPSX)

Store (One, ^RP16.HPSX)

Store (One, ^RP17.HPSX)

Store (One, ^RP18.HPSX)

Store (One, ^RP19.HPSX)

Store (One, ^RP20.HPSX)

}

Method (NPME, 0, Serialized)

{

Store (Zero, ^RP01.PMEX)

Store (Zero, ^RP02.PMEX)

Store (Zero, ^RP03.PMEX)

Store (Zero, ^RP04.PMEX)

Store (Zero, ^RP05.PMEX)

Store (Zero, ^RP06.PMEX)

Store (Zero, ^RP07.PMEX)

Store (Zero, ^RP08.PMEX)

Store (Zero, ^RP09.PMEX)

Store (Zero, ^RP10.PMEX)

Store (Zero, ^RP11.PMEX)

Store (Zero, ^RP12.PMEX)

Store (Zero, ^RP13.PMEX)

Store (Zero, ^RP14.PMEX)

Store (Zero, ^RP15.PMEX)

Store (Zero, ^RP16.PMEX)

Store (Zero, ^RP17.PMEX)

Store (Zero, ^RP18.PMEX)

Store (Zero, ^RP19.PMEX)

Store (Zero, ^RP20.PMEX)

Store (One, ^RP01.PMSX)

Store (One, ^RP02.PMSX)

Store (One, ^RP03.PMSX)

Store (One, ^RP04.PMSX)

Store (One, ^RP05.PMSX)

Store (One, ^RP06.PMSX)

Store (One, ^RP07.PMSX)

Store (One, ^RP08.PMSX)

Store (One, ^RP09.PMSX)

Store (One, ^RP10.PMSX)

Store (One, ^RP11.PMSX)

Store (One, ^RP12.PMSX)

Store (One, ^RP13.PMSX)

Store (One, ^RP14.PMSX)

Store (One, ^RP15.PMSX)

Store (One, ^RP16.PMSX)

Store (One, ^RP17.PMSX)

Store (One, ^RP18.PMSX)

Store (One, ^RP19.PMSX)

Store (One, ^RP20.PMSX)

}

Scope (\)

{

Name (PICM, Zero)

Name (PRWP, Package (0x02)

{

Zero,

Zero

})

Method (GPRW, 2, NotSerialized)

{

Store (Arg0, Index (PRWP, Zero))

Store (ShiftLeft (SS1, One), Local0)

Or (Local0, ShiftLeft (SS2, 0x02), Local0)

Or (Local0, ShiftLeft (SS3, 0x03), Local0)

Or (Local0, ShiftLeft (SS4, 0x04), Local0)

If (And (ShiftLeft (One, Arg1), Local0))

{

Store (Arg1, Index (PRWP, One))

}

Else

{

ShiftRight (Local0, One, Local0)

FindSetLeftBit (Local0, Index (PRWP, One))

}

Return (PRWP)

}

Scope (_SB)

{

Name (OSCI, Zero)

Name (OSCO, Zero)

Name (OSCP, Zero)

Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities

{

CreateDWordField (Arg3, Zero, STS0)

CreateDWordField (Arg3, 0x04, CAP0)

If (LEqual (S0ID, One))

{

Store (One, SCGE)

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x6E, 0xB0, 0x11, 0x08, 0x27, 0x4A, 0xF9, 0x44,

/* 0008 */ 0x8D, 0x60, 0x3C, 0xBB, 0xC2, 0x2E, 0x7B, 0x48

}))

{

If (LEqual (Arg1, One))

{

Store (CAP0, OSCP)

If (And (CAP0, 0x04))

{

Store (0x04, OSCO)

If (LNotEqual (And (SGMD, 0x0F), 0x02))

{

If (LEqual (RTD3, Zero))

{

And (CAP0, 0x3B, CAP0)

Or (STS0, 0x10, STS0)

}

Else

{

And (STS0, 0xFFFFFF00, STS0)

Or (STS0, 0x0A, STS0)

}

Else

{

And (STS0, 0xFFFFFF00, STS0)

Or (STS0, 0x06, STS0)

}

Return (Arg3)

}

Device (EPC)

{

Name (_HID, EisaId ("INT0E0C")) // _HID: Hardware ID

Name (_STR, Unicode ("Enclave Page Cache 1.0")) // _STR: Description String

Name (_MLS, Package (0x01) // _MLS: Multiple Language String

{

Package (0x02)

{

"en",

Unicode ("Enclave Page Cache 1.0")

}

})

Name (RBUF, ResourceTemplate ()

{

QWordMemory (ResourceConsumer, PosDecode, MinNotFixed, MaxNotFixed, NonCacheable, ReadWrite,

0x0000000000000000, // Granularity

0x0000000000000000, // Range Minimum

0x0000000000000000, // Range Maximum

0x0000000000000000, // Translation Offset

0x0000000000000001, // Length

,, _Y36, AddressRangeMemory, TypeStatic)

})

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

CreateQWordField (RBUF, \_SB.EPC._Y36._MIN, EMIN) // _MIN: Minimum Base Address

CreateQWordField (RBUF, \_SB.EPC._Y36._MAX, EMAX) // _MAX: Maximum Base Address

CreateQWordField (RBUF, \_SB.EPC._Y36._LEN, ELEN) // _LEN: Length

Store (\_PR.EMNA, EMIN)

Store (\_PR.ELNG, ELEN)

Subtract (Add (\_PR.EMNA, \_PR.ELNG), One, EMAX)

Return (RBUF)

}

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

Name (BUFX, Package (0x09)

{

0x80000000,

0x80000000

})

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x0C, 0xAC, 0x0F, 0xC6, 0x9E, 0xFD, 0x73, 0x42,

/* 0008 */ 0x9A, 0x3F, 0x93, 0x8F, 0x23, 0x27, 0x03, 0x5E

}))

{

If (LEqual (Zero, ToInteger (Arg1)))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Return (Buffer (One)

{

0x02

})

}

Else

{

If (LEqual (_T_0, One))

{

Store (SEC0, Index (BUFX, Zero))

Store (SEC1, Index (BUFX, One))

Store (SEC2, Index (BUFX, 0x02))

Store (SEC3, Index (BUFX, 0x03))

Store (SEC4, Index (BUFX, 0x04))

Store (SEC5, Index (BUFX, 0x05))

Store (SEC6, Index (BUFX, 0x06))

Store (SEC7, Index (BUFX, 0x07))

Store (SEC8, Index (BUFX, 0x08))

Return (BUFX)

}

Break

}

Return (Zero)

}

Return (Zero)

}

Return (Zero)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LNotEqual (\_PR.EPCS, Zero))

{

Return (0x0F)

}

Return (Zero)

}

Scope (_SB)

{

Device (BTKL)

{

Name (_HID, "INT3420") // _HID: Hardware ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (Zero)

}

Method (_PS0, 0, Serialized) // _PS0: Power State 0

{

}

Method (_PS3, 0, Serialized) // _PS3: Power State 3

{

}

Method (PSTS, 0, NotSerialized)

{

}

Scope (_SB)

{

Device (SLPB)

{

Name (_HID, EisaId ("PNP0C0E")) // _HID: Hardware ID

Name (_STA, 0x0B) // _STA: Status

}

OperationRegion (_SB.PCI0.LPCB.LPCR, PCI_Config, 0x80, 0x04)

Field (\_SB.PCI0.LPCB.LPCR, ByteAcc, NoLock, Preserve)

{

CARN, 3,

, 1,

CBDR, 3,

Offset (0x01),

LTDR, 2,

, 2,

FDDR, 1,

Offset (0x02),

CALE, 1,

CBLE, 1,

LTLE, 1,

FDLE, 1,

Offset (0x03),

GLLE, 1,

GHLE, 1,

KCLE, 1,

MCLE, 1,

C1LE, 1,

C2LE, 1,

Offset (0x04)

}

Method (UXDV, 1, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

Store (0xFF, Local0)

While (One)

{

Store (Add (Arg0, Zero), _T_0)

If (LEqual (_T_0, 0x03F8))

{

Store (Zero, Local0)

}

Else

{

If (LEqual (_T_0, 0x02F8))

{

Store (One, Local0)

}

Else

{

If (LEqual (_T_0, 0x0220))

{

Store (0x02, Local0)

}

Else

{

If (LEqual (_T_0, 0x0228))

{

Store (0x03, Local0)

}

Else

{

If (LEqual (_T_0, 0x0238))

{

Store (0x04, Local0)

}

Else

{

If (LEqual (_T_0, 0x02E8))

{

Store (0x05, Local0)

}

Else

{

If (LEqual (_T_0, 0x0338))

{

Store (0x06, Local0)

}

Else

{

If (LEqual (_T_0, 0x03E8))

{

Store (0x07, Local0)

}

Break

}

Return (Local0)

}

Method (RRIO, 4, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

While (One)

{

Store (Add (Arg0, Zero), _T_0)

If (LEqual (_T_0, Zero))

{

Store (Zero, CALE)

Store (UXDV (Arg2), Local0)

If (LNotEqual (Local0, 0xFF))

{

Store (Local0, CARN)

}

If (Arg1)

{

Store (One, CALE)

}

Else

{

If (LEqual (_T_0, One))

{

Store (Zero, CBLE)

Store (UXDV (Arg2), Local0)

If (LNotEqual (Local0, 0xFF))

{

Store (Local0, CBDR)

}

If (Arg1)

{

Store (One, CBLE)

}

Else

{

If (LEqual (_T_0, 0x02))

{

Store (Zero, LTLE)

If (LEqual (Arg2, 0x0378))

{

Store (Zero, LTDR)

}

If (LEqual (Arg2, 0x0278))

{

Store (One, LTDR)

}

If (LEqual (Arg2, 0x03BC))

{

Store (0x02, LTDR)

}

If (Arg1)

{

Store (One, LTLE)

}

Else

{

If (LEqual (_T_0, 0x03))

{

Store (Zero, FDLE)

If (LEqual (Arg2, 0x03F0))

{

Store (Zero, FDDR)

}

If (LEqual (Arg2, 0x0370))

{

Store (One, FDDR)

}

If (Arg1)

{

Store (One, FDLE)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (Arg2, 0x0200))

{

If (Arg1)

{

Store (One, GLLE)

}

Else

{

Store (Zero, GLLE)

}

If (LEqual (Arg2, 0x0208))

{

If (Arg1)

{

Store (One, GHLE)

}

Else

{

Store (Zero, GHLE)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (Arg2, 0x0200))

{

If (Arg1)

{

Store (One, GLLE)

}

Else

{

Store (Zero, GLLE)

}

If (LEqual (Arg2, 0x0208))

{

If (Arg1)

{

Store (One, GHLE)

}

Else

{

Store (Zero, GHLE)

}

Else

{

If (LEqual (_T_0, 0x0A))

{

If (LOr (LEqual (Arg2, 0x60), LEqual (Arg2, 0x64)))

{

If (Arg1)

{

Store (One, KCLE)

}

Else

{

Store (Zero, KCLE)

}

Else

{

If (LEqual (_T_0, 0x0B))

{

If (LOr (LEqual (Arg2, 0x62), LEqual (Arg2, 0x66)))

{

If (Arg1)

{

Store (One, MCLE)

}

Else

{

Store (Zero, MCLE)

}

Else

{

If (LEqual (_T_0, 0x0C))

{

If (LEqual (Arg2, 0x2E))

{

If (Arg1)

{

Store (One, C1LE)

}

Else

{

Store (Zero, C1LE)

}

If (LEqual (Arg2, 0x4E))

{

If (Arg1)

{

Store (One, C2LE)

}

Else

{

Store (Zero, C2LE)

}

Else

{

If (LEqual (_T_0, 0x0D))

{

If (LEqual (Arg2, 0x2E))

{

If (Arg1)

{

Store (One, C1LE)

}

Else

{

Store (Zero, C1LE)

}

If (LEqual (Arg2, 0x4E))

{

If (Arg1)

{

Store (One, C2LE)

}

Else

{

Store (Zero, C2LE)

}

Break

}

Method (RDMA, 3, NotSerialized)

{

}

Scope (_GPE)

{

Method (_L69, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

If (LNotEqual (\_SB.PCI0.RP01.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP01.HPME ()

Notify (\_SB.PCI0.RP01, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP02.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP02.HPME ()

Notify (\_SB.PCI0.RP02, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP03.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP03.HPME ()

Notify (\_SB.PCI0.RP03, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP04.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP04.HPME ()

Notify (\_SB.PCI0.RP04, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP05.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP05.HPME ()

Notify (\_SB.PCI0.RP05, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP06.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP06.HPME ()

Notify (\_SB.PCI0.RP06, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP07.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP07.HPME ()

Notify (\_SB.PCI0.RP07, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP08.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP08.HPME ()

Notify (\_SB.PCI0.RP08, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP09.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP09.HPME ()

Notify (\_SB.PCI0.RP09, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP10.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP10.HPME ()

Notify (\_SB.PCI0.RP10, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP11.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP11.HPME ()

Notify (\_SB.PCI0.RP11, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP12.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP12.HPME ()

Notify (\_SB.PCI0.RP12, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP13.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP13.HPME ()

Notify (\_SB.PCI0.RP13, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP14.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP14.HPME ()

Notify (\_SB.PCI0.RP14, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP15.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP15.HPME ()

Notify (\_SB.PCI0.RP15, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP16.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP16.HPME ()

Notify (\_SB.PCI0.RP16, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP17.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP17.HPME ()

Notify (\_SB.PCI0.RP17, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP18.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP18.HPME ()

Notify (\_SB.PCI0.RP18, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP19.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP19.HPME ()

Notify (\_SB.PCI0.RP19, 0x02)

}

If (LNotEqual (\_SB.PCI0.RP20.VDID, 0xFFFFFFFF))

{

\_SB.PCI0.RP20.HPME ()

Notify (\_SB.PCI0.RP20, 0x02)

}

If (LEqual (D1F0, One))

{

\_SB.PCI0.PEG0.HPME ()

Notify (\_SB.PCI0.PEG0, 0x02)

Notify (\_SB.PCI0.PEG0.PEGP, 0x02)

}

If (LEqual (D1F1, One))

{

\_SB.PCI0.PEG1.HPME ()

Notify (\_SB.PCI0.PEG1, 0x02)

}

If (LEqual (D1F2, One))

{

\_SB.PCI0.PEG2.HPME ()

Notify (\_SB.PCI0.PEG2, 0x02)

}

Method (_L61, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

Add (L01C, One, L01C)

P8XH (Zero, One)

P8XH (One, L01C)

If (LAnd (LNotEqual (\_SB.PCI0.RP01.VDID, 0xFFFFFFFF), \_SB.PCI0.RP01.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, One)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP01.PDCX)

{

Store (One, \_SB.PCI0.RP01.PDCX)

Store (One, \_SB.PCI0.RP01.HPSX)

If (LNot (\_SB.PCI0.RP01.PDSX))

{

Store (Zero, \_SB.PCI0.RP01.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, One)))

{

Notify (\_SB.PCI0.RP01, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP01.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP02.VDID, 0xFFFFFFFF), \_SB.PCI0.RP02.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x02)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP02.PDCX)

{

Store (One, \_SB.PCI0.RP02.PDCX)

Store (One, \_SB.PCI0.RP02.HPSX)

If (LNot (\_SB.PCI0.RP02.PDSX))

{

Store (Zero, \_SB.PCI0.RP02.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x02)))

{

Notify (\_SB.PCI0.RP02, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP02.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP03.VDID, 0xFFFFFFFF), \_SB.PCI0.RP03.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x03)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP03.PDCX)

{

Store (One, \_SB.PCI0.RP03.PDCX)

Store (One, \_SB.PCI0.RP03.HPSX)

If (LNot (\_SB.PCI0.RP03.PDSX))

{

Store (Zero, \_SB.PCI0.RP03.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x03)))

{

Notify (\_SB.PCI0.RP03, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP03.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP04.VDID, 0xFFFFFFFF), \_SB.PCI0.RP04.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x04)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP04.PDCX)

{

Store (One, \_SB.PCI0.RP04.PDCX)

Store (One, \_SB.PCI0.RP04.HPSX)

If (LNot (\_SB.PCI0.RP04.PDSX))

{

Store (Zero, \_SB.PCI0.RP04.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x04)))

{

Notify (\_SB.PCI0.RP04, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP04.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP05.VDID, 0xFFFFFFFF), \_SB.PCI0.RP05.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x05)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP05.PDCX)

{

Store (One, \_SB.PCI0.RP05.PDCX)

Store (One, \_SB.PCI0.RP05.HPSX)

If (LNot (\_SB.PCI0.RP05.PDSX))

{

Store (Zero, \_SB.PCI0.RP05.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x05)))

{

Notify (\_SB.PCI0.RP05, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP05.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP06.VDID, 0xFFFFFFFF), \_SB.PCI0.RP06.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x06)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP06.PDCX)

{

Store (One, \_SB.PCI0.RP06.PDCX)

Store (One, \_SB.PCI0.RP06.HPSX)

If (LNot (\_SB.PCI0.RP06.PDSX))

{

Store (Zero, \_SB.PCI0.RP06.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x06)))

{

Notify (\_SB.PCI0.RP06, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP06.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP07.VDID, 0xFFFFFFFF), \_SB.PCI0.RP07.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x07)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP07.PDCX)

{

Store (One, \_SB.PCI0.RP07.PDCX)

Store (One, \_SB.PCI0.RP07.HPSX)

If (LNot (\_SB.PCI0.RP07.PDSX))

{

Store (Zero, \_SB.PCI0.RP07.L0SE)

}

If (LEqual (PFLV, 0x02))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x07)))

{

Notify (\_SB.PCI0.RP07, Zero)

}

Else

{

If (ECON)

{

If (LEqual (\_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.DOCK)), Zero))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x07)))

{

Notify (\_SB.PCI0.RP07, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP07.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP08.VDID, 0xFFFFFFFF), \_SB.PCI0.RP08.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x08)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP08.PDCX)

{

Store (One, \_SB.PCI0.RP08.PDCX)

Store (One, \_SB.PCI0.RP08.HPSX)

If (LNot (\_SB.PCI0.RP08.PDSX))

{

Store (Zero, \_SB.PCI0.RP08.L0SE)

}

If (LEqual (PFLV, 0x02))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x08)))

{

Notify (\_SB.PCI0.RP08, Zero)

}

Else

{

If (ECON)

{

If (LEqual (\_SB.PCI0.LPCB.H_EC.ECRD (RefOf (\_SB.PCI0.LPCB.H_EC.DOCK)), Zero))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x08)))

{

Notify (\_SB.PCI0.RP08, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP08.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP09.VDID, 0xFFFFFFFF), \_SB.PCI0.RP09.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x09)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP09.PDCX)

{

Store (One, \_SB.PCI0.RP09.PDCX)

Store (One, \_SB.PCI0.RP09.HPSX)

If (LNot (\_SB.PCI0.RP09.PDSX))

{

Store (Zero, \_SB.PCI0.RP09.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x09)))

{

Notify (\_SB.PCI0.RP09, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP09.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP10.VDID, 0xFFFFFFFF), \_SB.PCI0.RP10.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0A)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP10.PDCX)

{

Store (One, \_SB.PCI0.RP10.PDCX)

Store (One, \_SB.PCI0.RP10.HPSX)

If (LNot (\_SB.PCI0.RP10.PDSX))

{

Store (Zero, \_SB.PCI0.RP10.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0A)))

{

Notify (\_SB.PCI0.RP10, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP10.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP11.VDID, 0xFFFFFFFF), \_SB.PCI0.RP11.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0B)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP11.PDCX)

{

Store (One, \_SB.PCI0.RP11.PDCX)

Store (One, \_SB.PCI0.RP11.HPSX)

If (LNot (\_SB.PCI0.RP11.PDSX))

{

Store (Zero, \_SB.PCI0.RP11.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0B)))

{

Notify (\_SB.PCI0.RP11, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP11.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP12.VDID, 0xFFFFFFFF), \_SB.PCI0.RP12.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0C)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP12.PDCX)

{

Store (One, \_SB.PCI0.RP12.PDCX)

Store (One, \_SB.PCI0.RP12.HPSX)

If (LNot (\_SB.PCI0.RP12.PDSX))

{

Store (Zero, \_SB.PCI0.RP12.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0C)))

{

Notify (\_SB.PCI0.RP12, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP12.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP13.VDID, 0xFFFFFFFF), \_SB.PCI0.RP13.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0D)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP13.PDCX)

{

Store (One, \_SB.PCI0.RP13.PDCX)

Store (One, \_SB.PCI0.RP13.HPSX)

If (LNot (\_SB.PCI0.RP13.PDSX))

{

Store (Zero, \_SB.PCI0.RP13.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0D)))

{

Notify (\_SB.PCI0.RP13, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP13.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP14.VDID, 0xFFFFFFFF), \_SB.PCI0.RP14.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0E)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP14.PDCX)

{

Store (One, \_SB.PCI0.RP14.PDCX)

Store (One, \_SB.PCI0.RP14.HPSX)

If (LNot (\_SB.PCI0.RP14.PDSX))

{

Store (Zero, \_SB.PCI0.RP14.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0E)))

{

Notify (\_SB.PCI0.RP14, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP14.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP15.VDID, 0xFFFFFFFF), \_SB.PCI0.RP15.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0F)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP15.PDCX)

{

Store (One, \_SB.PCI0.RP15.PDCX)

Store (One, \_SB.PCI0.RP15.HPSX)

If (LNot (\_SB.PCI0.RP15.PDSX))

{

Store (Zero, \_SB.PCI0.RP15.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x0F)))

{

Notify (\_SB.PCI0.RP15, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP15.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP16.VDID, 0xFFFFFFFF), \_SB.PCI0.RP16.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x10)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP16.PDCX)

{

Store (One, \_SB.PCI0.RP16.PDCX)

Store (One, \_SB.PCI0.RP16.HPSX)

If (LNot (\_SB.PCI0.RP16.PDSX))

{

Store (Zero, \_SB.PCI0.RP16.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x10)))

{

Notify (\_SB.PCI0.RP16, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP16.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP17.VDID, 0xFFFFFFFF), \_SB.PCI0.RP17.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x11)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP17.PDCX)

{

Store (One, \_SB.PCI0.RP17.PDCX)

Store (One, \_SB.PCI0.RP17.HPSX)

If (LNot (\_SB.PCI0.RP17.PDSX))

{

Store (Zero, \_SB.PCI0.RP17.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x11)))

{

Notify (\_SB.PCI0.RP17, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP17.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP18.VDID, 0xFFFFFFFF), \_SB.PCI0.RP18.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x12)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP18.PDCX)

{

Store (One, \_SB.PCI0.RP18.PDCX)

Store (One, \_SB.PCI0.RP18.HPSX)

If (LNot (\_SB.PCI0.RP18.PDSX))

{

Store (Zero, \_SB.PCI0.RP18.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x12)))

{

Notify (\_SB.PCI0.RP18, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP18.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP19.VDID, 0xFFFFFFFF), \_SB.PCI0.RP19.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x13)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP19.PDCX)

{

Store (One, \_SB.PCI0.RP19.PDCX)

Store (One, \_SB.PCI0.RP19.HPSX)

If (LNot (\_SB.PCI0.RP19.PDSX))

{

Store (Zero, \_SB.PCI0.RP19.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x13)))

{

Notify (\_SB.PCI0.RP19, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP19.HPSX)

}

If (LAnd (LNotEqual (\_SB.PCI0.RP20.VDID, 0xFFFFFFFF), \_SB.PCI0.RP20.HPSX))

{

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x14)))

{

Sleep (0x64)

}

If (\_SB.PCI0.RP20.PDCX)

{

Store (One, \_SB.PCI0.RP20.PDCX)

Store (One, \_SB.PCI0.RP20.HPSX)

If (LNot (\_SB.PCI0.RP20.PDSX))

{

Store (Zero, \_SB.PCI0.RP20.L0SE)

}

If (LOr (LNotEqual (TBTS, One), LNotEqual (TBSE, 0x14)))

{

Notify (\_SB.PCI0.RP20, Zero)

}

Else

{

Store (One, \_SB.PCI0.RP20.HPSX)

}

Method (_L62, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

Store (Zero, GPEC)

If (CondRefOf (\_PR.DTSE))

{

If (LGreaterEqual (\_PR.DTSE, One)) {}

}

If (CondRefOf (\_GPE.HLVT))

{

HLVT

}

Method (_L66, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

If (LAnd (\_SB.PCI0.GFX0.GSSE, LNot (GSMI)))

{

\_SB.PCI0.GFX0.GSCI ()

}

Method (_L67, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

Store (0x20, \_SB.PCI0.SBUS.HSTS)

}

Name (PRES, One)

Method (_L6F, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

\_SB.UGPS ()

If (LEqual (RTD3, One))

{

If (CondRefOf (\_GPE.AL6F))

{

AL6F

}

If (LEqual (PGRT, One))

{

If (LEqual (SGGP, One))

{

If (CondRefOf (\_GPE.P0L6))

{

P0L6 ()

\_SB.CAGS (P0WK)

}

If (LEqual (P1GP, One))

{

If (CondRefOf (\_GPE.P1L6))

{

P1L6 ()

\_SB.CAGS (P1WK)

}

If (LEqual (P2GP, One))

{

If (CondRefOf (\_GPE.P2L6))

{

P2L6 ()

\_SB.CAGS (P2WK)

}

\_SB.CGLS ()

}

If (LEqual (CAMT, Zero))

{

Scope (_SB)

{

Device (ICAM)

{

Name (_HID, "INT33A3") // _HID: Hardware ID

Name (IDFU, Zero)

Name (IPWR, Zero)

Method (_STA, 0, Serialized) // _STA: Status

{

If (LEqual (IVDF, One))

{

Return (0x0F)

}

Return (Zero)

}

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xF7, 0x0F, 0xCF, 0xF5, 0x60, 0x5D, 0x42, 0x48,

/* 0008 */ 0x82, 0xC0, 0xFA, 0x1A, 0x61, 0xD8, 0x73, 0xF2

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

If (LEqual (ToInteger (Arg1), Zero))

{

Return (Buffer (One)

{

0x07

})

}

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_0, One))

{

If (LEqual (DerefOf (Index (Arg3, Zero)), Zero))

{

If (LEqual (BID, 0x20))

{

SGOV (0x02040000, Zero)

Store (Zero, IDFU)

}

If (LOr (LOr (LOr (LEqual (BID, 0x04), LEqual (BID, 0x14)),

LEqual (BID, 0x0B)), LEqual (BID, 0x1B)))

{

If (CondRefOf (\_SB.PCI0.GEXP.SGEP))

{

^^PCI0.GEXP.SGEP (Zero, 0x12, Zero)

Store (Zero, IDFU)

}

Else

{

If (LEqual (BID, 0x20))

{

SGOV (0x02040000, One)

Store (One, IDFU)

}

If (LOr (LOr (LOr (LEqual (BID, 0x04), LEqual (BID, 0x14)),

LEqual (BID, 0x0B)), LEqual (BID, 0x1B)))

{

If (CondRefOf (\_SB.PCI0.GEXP.SGEP))

{

^^PCI0.GEXP.SGEP (Zero, 0x12, One)

Store (One, IDFU)

}

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x02))

{

If (LEqual (DerefOf (Index (Arg3, Zero)), Zero))

{

If (LEqual (BID, 0x20))

{

SGOV (0x02010002, Zero)

Store (One, IPWR)

}

If (LOr (LOr (LOr (LEqual (BID, 0x04), LEqual (BID, 0x14)),

LEqual (BID, 0x0B)), LEqual (BID, 0x1B)))

{

If (CondRefOf (\_SB.PCI0.GEXP.SGEP))

{

^^PCI0.GEXP.SGEP (Zero, 0x11, Zero)

Store (One, IPWR)

}

Else

{

If (LEqual (BID, 0x20))

{

SGOV (0x02010002, One)

Store (Zero, IPWR)

}

If (LOr (LOr (LOr (LEqual (BID, 0x04), LEqual (BID, 0x14)),

LEqual (BID, 0x0B)), LEqual (BID, 0x1B)))

{

If (CondRefOf (\_SB.PCI0.GEXP.SGEP))

{

^^PCI0.GEXP.SGEP (Zero, 0x11, One)

Store (Zero, IPWR)

}

Return (Zero)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (PCHV (), SPTL))

{

If (LNotEqual (SDWE, Zero))

{

Scope (_SB.PCI0.PSDC)

{

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

If (LLess (OSYS, 0x07DC))

{

Return (ResourceTemplate ()

{

})

}

Name (RBUF, ResourceTemplate ()

{

GpioInt (Edge, ActiveHigh, SharedAndWake, PullNone, 0x2710,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0000

}

GpioIo (Shared, PullDefault, 0x0000, 0x0000, IoRestrictionInputOnly,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0x0000

}

})

CreateWordField (RBUF, 0x17, SDIP)

CreateWordField (RBUF, 0x3F, SDGP)

If (LEqual (SDWE, One))

{

Store (GNUM (0x02010011), SDIP)

Store (GNUM (0x02010011), SDGP)

}

If (LEqual (SDWE, 0x02))

{

Store (GNUM (0x02060005), SDIP)

Store (GNUM (0x02060005), SDGP)

}

Return (RBUF)

}

If (CondRefOf (\_SB.PCI0.RP01.PXSX))

{

Scope (_SB.PCI0.RP01.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP02.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP03.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP04.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

If (CondRefOf (\_SB.PCI0.RP05.PXSX))

{

Scope (_SB.PCI0.RP05.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP06.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP07.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP08.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

If (CondRefOf (\_SB.PCI0.RP09.PXSX))

{

Scope (_SB.PCI0.RP09.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP10.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP11.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP12.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP13.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP14.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP15.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP16.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP17.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP18.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP19.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0.RP20.PXSX)

{

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (PCIC (Arg0))

{

Return (PCID (Arg0, Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x1D, 0xE7, 0x30, 0x17, 0xDD, 0xE5, 0x34, 0x4A,

/* 0008 */ 0xBE, 0x57, 0x4D, 0x76, 0xB6, 0xA2, 0xFE, 0x37

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg2, One))

{

While (One)

{

Store (DerefOf (Index (Arg3, Zero)), _T_0)

If (LEqual (_T_0, Zero)) {}

Else

{

If (LEqual (_T_0, One))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x80)

}

Else

{

If (LEqual (_T_0, 0x02)) {}

Else

{

If (LEqual (_T_0, 0x03)) {}

Else

{

If (LEqual (_T_0, 0x04))

{

If (CondRefOf (\_SB.SLPB))

{

Notify (SLPB, 0x02)

}

Break

}

Return (Zero)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x17, 0xEB, 0x74, 0x75, 0xA2, 0xD1, 0xC2, 0x4C,

/* 0008 */ 0x99, 0x29, 0x4A, 0x08, 0xFC, 0xC2, 0x91, 0x07

}))

{

While (One)

{

Store (Arg2, _T_1)

If (LEqual (_T_1, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Else

{

If (LEqual (_T_1, One))

{

Return (WHIT ())

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return (SELF ())

}

Else

{

Return (Buffer (One)

{

0x00

})

}

Break

}

Else

{

Return (Buffer (One)

{

0x00

})

}

OperationRegion (RPXX, PCI_Config, Zero, 0x10)

Field (RPXX, AnyAcc, NoLock, Preserve)

{

VDID, 32

}

OperationRegion (FLDR, PCI_Config, 0x44, 0x06)

Field (FLDR, ByteAcc, NoLock, Preserve)

{

DCAP, 32,

DCTR, 16

}

Name (SPLX, Package (0x04)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (SPLC, 0, Serialized)

{

Store (DOM1, Index (DerefOf (Index (SPLX, One)), Zero))

Store (LIM1, Index (DerefOf (Index (SPLX, One)), One))

Store (TIM1, Index (DerefOf (Index (SPLX, One)), 0x02))

Store (DOM2, Index (DerefOf (Index (SPLX, 0x02)), Zero))

Store (LIM2, Index (DerefOf (Index (SPLX, 0x02)), One))

Store (TIM2, Index (DerefOf (Index (SPLX, 0x02)), 0x02))

Store (DOM3, Index (DerefOf (Index (SPLX, 0x03)), Zero))

Store (LIM3, Index (DerefOf (Index (SPLX, 0x03)), One))

Store (TIM3, Index (DerefOf (Index (SPLX, 0x03)), 0x02))

Return (SPLX)

}

PowerResource (WRST, 0x05, 0x0000)

{

Method (_STA, 0, NotSerialized) // _STA: Status

{

ADBG ("PXSX _STA")

}

Method (_ON, 0, NotSerialized) // _ON_: Power On

{

ADBG ("PXSX _ON")

}

Method (_OFF, 0, NotSerialized) // _OFF: Power Off

{

ADBG ("PXSX _OFF")

}

Method (_RST, 0, NotSerialized)

{

ADBG ("PXSX _RST")

If (And (DCAP, 0x10000000))

{

Store (DCTR, Local0)

Or (Local0, 0x8000, Local0)

Store (Local0, DCTR)

}

Name (_PRR, Package (0x01)

{

WRST

})

Name (WANX, Package (0x03)

{

Zero,

Package (0x03)

{

0x80000000,

0x80000000

Package (0x03)

{

0x80000000,

0x80000000

}

})

Method (WAND, 0, Serialized)

{

Store (Zero, Index (DerefOf (Index (WANX, One)), Zero))

Store (TRD0, Index (DerefOf (Index (WANX, One)), One))

Store (TRL0, Index (DerefOf (Index (WANX, One)), 0x02))

Store (One, Index (DerefOf (Index (WANX, 0x02)), Zero))

Store (TRD1, Index (DerefOf (Index (WANX, 0x02)), One))

Store (TRL1, Index (DerefOf (Index (WANX, 0x02)), 0x02))

Return (WANX)

}

Name (WRDX, Package (0x03)

{

Zero,

Package (0x02)

{

0x80000000,

0x8000

Package (0x02)

{

0x80000000,

0x8000

}

})

Method (WRDD, 0, Serialized)

{

Store (WDM1, Index (DerefOf (Index (WRDX, One)), Zero))

Store (CID1, Index (DerefOf (Index (WRDX, One)), One))

Store (WDM2, Index (DerefOf (Index (WRDX, 0x02)), Zero))

Store (CID2, Index (DerefOf (Index (WRDX, 0x02)), One))

Return (WRDX)

}

Method (WIST, 0, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (CondRefOf (VDID))

{

While (One)

{

Store (VDID, _T_0)

If (LEqual (_T_0, 0x095A8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x095B8086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31658086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x31668086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B18086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B28086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08B48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F38086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F48086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F58086))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x24F68086))

{

Return (One)

}

Else

{

Return (Zero)

}

Break

}

Else

{

Return (Zero)

}

Scope (_SB.PCI0)

{

Method (WHIT, 0, NotSerialized)

{

Return (Package (0x01)

{

Package (0x05)

{

"DockOemId",

"DockSkuId",

Zero,

0x02,

0x02

}

})

}

Method (SELF, 0, NotSerialized)

{

Return (Package (0x02)

{

"PcOemId",

"PcSkuId"

})

}

Scope (_SB.PCI0.GFX0)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)))

{

Return (Package (0x01)

{

PEPD

})

}

Else

{

Return (Package (0x00) {})

}

Scope (_SB.PCI0.SAT0)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LNotEqual (And (PEPC, 0x03), Zero)))

{

Return (Package (0x01)

{

PEPD

})

}

Else

{

Return (Package (0x00) {})

}

If (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)))

{

Scope (_SB.PCI0.I2C0)

{

Name (_DEP, Package (0x01) // _DEP: Dependencies

{

PEPD

})

}

Scope (_SB.PCI0.I2C1)

{

Name (_DEP, Package (0x01) // _DEP: Dependencies

{

PEPD

})

}

Scope (_SB.PCI0.I2C2)

{

Name (_DEP, Package (0x01) // _DEP: Dependencies

{

PEPD

})

}

Scope (_SB.PCI0.I2C3)

{

Name (_DEP, Package (0x01) // _DEP: Dependencies

{

PEPD

})

}

Scope (_SB.PCI0.I2C4)

{

Name (_DEP, Package (0x01) // _DEP: Dependencies

{

PEPD

})

}

Scope (_SB.PCI0.I2C5)

{

Name (_DEP, Package (0x01) // _DEP: Dependencies

{

PEPD

})

}

Scope (_SB.PCI0.SPI0)

{

Name (_DEP, Package (0x01) // _DEP: Dependencies

{

PEPD

})

}

Scope (_SB.PCI0.SPI1)

{

Name (_DEP, Package (0x01) // _DEP: Dependencies

{

PEPD

})

}

Scope (_SB.PCI0.UA00)

{

Name (_DEP, Package (0x01) // _DEP: Dependencies

{

PEPD

})

}

Scope (_SB.PCI0.UA01)

{

Name (_DEP, Package (0x01) // _DEP: Dependencies

{

PEPD

})

}

Scope (_SB.PCI0.UA02)

{

Name (_DEP, Package (0x01) // _DEP: Dependencies

{

PEPD

})

}

Scope (_SB.PCI0.XHC)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)))

{

Return (Package (0x01)

{

PEPD

})

}

Else

{

Return (Package (0x00) {})

}

If (CondRefOf (\_SB.PCI0.RP01.PXSX))

{

Scope (_SB.PCI0.RP01.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP02.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP03.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP04.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

If (CondRefOf (\_SB.PCI0.RP05.PXSX))

{

Scope (_SB.PCI0.RP05.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP06.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP07.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP08.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

If (CondRefOf (\_SB.PCI0.RP09.PXSX))

{

Scope (_SB.PCI0.RP09.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP10.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP11.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP12.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP13.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP14.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP15.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP16.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP17.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP18.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP19.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_SB.PCI0.RP20.PXSX)

{

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (LOr (PAHC (), PNVM ()))

{

If (LAnd (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)),

LOr (LEqual (And (PEPC, 0x0400), 0x0400), LEqual (And (PEPC, 0x0800

), 0x0800))))

{

Return (Package (0x01)

{

PEPD

})

}

Return (Package (0x00) {})

}

OperationRegion (PCCX, PCI_Config, 0x09, 0x04)

Field (PCCX, ByteAcc, NoLock, Preserve)

{

PIXX, 8,

SCCX, 8,

BCCX, 8

}

Method (PAHC, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x06))

{

If (LEqual (PIXX, One))

{

Return (One)

}

Return (Zero)

}

Method (PNVM, 0, Serialized)

{

If (LEqual (BCCX, One))

{

If (LEqual (SCCX, 0x08))

{

If (LEqual (PIXX, 0x02))

{

Return (One)

}

Return (Zero)

}

Scope (_PR.CPU0)

{

Method (XDEP, 0, NotSerialized)

{

ADBG ("CPU0 DEP Call")

If (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)))

{

ADBG ("CPU0 DEP")

Return (Package (0x01)

{

\_SB.PEPD

})

}

Else

{

ADBG ("CPU0 DEP NULL")

Return (Package (0x00) {})

}

Scope (_PR.CPU1)

{

Method (XDEP, 0, NotSerialized)

{

ADBG ("CPU1 DEP Call")

If (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)))

{

ADBG ("CPU1 DEP")

Return (Package (0x01)

{

\_SB.PEPD

})

}

Else

{

ADBG ("CPU1 DEP NULL")

Return (Package (0x00) {})

}

Scope (_PR.CPU2)

{

Method (XDEP, 0, NotSerialized)

{

ADBG ("CPU2 DEP Call")

If (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)))

{

ADBG ("CPU2 DEP")

Return (Package (0x01)

{

\_SB.PEPD

})

}

Else

{

ADBG ("CPU2 DEP NULL")

Return (Package (0x00) {})

}

Scope (_PR.CPU3)

{

Method (XDEP, 0, NotSerialized)

{

ADBG ("CPU3 DEP Call")

If (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)))

{

ADBG ("CPU3 DEP")

Return (Package (0x01)

{

\_SB.PEPD

})

}

Else

{

ADBG ("CPU3 DEP NULL")

Return (Package (0x00) {})

}

Scope (_PR.CPU4)

{

Method (XDEP, 0, NotSerialized)

{

ADBG ("CPU4 DEP Call")

If (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)))

{

ADBG ("CPU4 DEP")

Return (Package (0x01)

{

\_SB.PEPD

})

}

Else

{

ADBG ("CPU4 DEP NULL")

Return (Package (0x00) {})

}

Scope (_PR.CPU5)

{

Method (XDEP, 0, NotSerialized)

{

ADBG ("CPU5 DEP Call")

If (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)))

{

ADBG ("CPU5 DEP")

Return (Package (0x01)

{

\_SB.PEPD

})

}

Else

{

ADBG ("CPU5 DEP NULL")

Return (Package (0x00) {})

}

Scope (_PR.CPU6)

{

Method (XDEP, 0, NotSerialized)

{

ADBG ("CPU6 DEP Call")

If (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)))

{

ADBG ("CPU6 DEP")

Return (Package (0x01)

{

\_SB.PEPD

})

}

Else

{

ADBG ("CPU6 DEP NULL")

Return (Package (0x00) {})

}

Scope (_PR.CPU7)

{

Method (XDEP, 0, NotSerialized)

{

ADBG ("CPU7 DEP Call")

If (LOr (LEqual (S0ID, One), LGreaterEqual (OSYS, 0x07DF)))

{

ADBG ("CPU7 DEP")

Return (Package (0x01)

{

\_SB.PEPD

})

}

Else

{

ADBG ("CPU7 DEP NULL")

Return (Package (0x00) {})

}

Scope (_SB)

{

Device (PEPD)

{

Name (_HID, "INT33A1") // _HID: Hardware ID

Name (_CID, EisaId ("PNP0D80")) // _CID: Compatible ID

Name (_UID, One) // _UID: Unique ID

Name (DEVY, Package (0x29)

{

Package (0x03)

{

"\\_PR.CPU0",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

Zero

}

Package (0x03)

{

"\\_PR.CPU1",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

Zero

}

Package (0x03)

{

"\\_PR.CPU2",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

Zero

}

Package (0x03)

{

"\\_PR.CPU3",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

Zero

}

Package (0x03)

{

"\\_SB.PCI0.GFX0",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.SAT0",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.UA00",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.UA01",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.I2C0",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.I2C1",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.XHC",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"INTELAUDIO\\FUNC_01&VEN_10EC*",

One,

Package (0x03)

{

Zero,

Package (0x02)

{

Zero,

Zero

Package (0x02)

{

One,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.PEMC",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.PSDC",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.I2C2",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.I2C3",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.I2C4",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.I2C5",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.UA02",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.SPI0",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.SPI1",

One,

Package (0x02)

{

Zero,

Package (0x02)

{

0xFF,

0x03

}

Package (0x03)

{

"\\_SB.PCI0.RP01.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP02.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP03.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP04.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP05.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP06.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP07.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP08.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP09.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP10.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP11.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP12.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP13.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP14.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP15.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP16.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP17.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP18.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP19.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

Package (0x03)

{

"\\_SB.PCI0.RP20.PXSX",

Zero,

Package (0x02)

{

Zero,

Package (0x03)

{

0xFF,

Zero,

0x81

}

})

Name (BCCD, Package (0x19)

{

Package (0x02)

{

"\\_SB.PCI0.SAT0",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x3E80

}

Package (0x02)

{

"\\_SB.PCI0.SAT0.PRT0",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x3E80

}

Package (0x02)

{

"\\_SB.PCI0.SAT0.PRT1",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x3E80

}

Package (0x02)

{

"\\_SB.PCI0.SAT0.PRT2",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x3E80

}

Package (0x02)

{

"\\_SB.PCI0.SAT0.PRT3",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x3E80

}

Package (0x02)

{

"\\_SB.PCI0.RP01.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP02.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP03.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP04.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP05.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP06.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP07.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP08.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP09.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP10.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP11.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP12.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP13.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP14.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP15.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP16.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP17.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP18.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP19.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

Package (0x02)

{

"\\_SB.PCI0.RP20.PXSX",

Package (0x01)

{

Package (0x03)

{

Package (0x05)

{

One,

0x08,

Zero,

One,

0xB2

Package (0x03)

{

Zero,

0xCD,

One

0x000186A0

}

})

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LOr (LGreaterEqual (OSYS, 0x07DF), LAnd (LGreaterEqual (OSYS,

0x07DC), LEqual (S0ID, One))))

{

Return (0x0F)

}

Return (Zero)

}

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

ADBG (Concatenate ("PEPC = ", ToHexString (PEPC)))

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xA0, 0x40, 0xEB, 0xC4, 0xD2, 0x6C, 0xE2, 0x11,

/* 0008 */ 0xBC, 0xFD, 0x08, 0x00, 0x20, 0x0C, 0x9A, 0x66

}))

{

If (LEqual (Arg2, Zero))

{

Return (Buffer (One)

{

0x7F

})

}

If (LEqual (Arg2, One))

{

If (LEqual (S0ID, Zero))

{

Return (Package (0x00) {})

}

If (LEqual (And (PEPC, 0x03), One))

{

If (And (SPST, 0x0F))

{

Store (One, Index (DerefOf (Index (DEVY, 0x05)), One))

}

If (CondRefOf (\_SB.PCI0.RP01.PXSX))

{

If (LOr (^^PCI0.RP01.PXSX.PAHC (), ^^PCI0.RP01.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x15)), One))

}

If (LOr (^^PCI0.RP02.PXSX.PAHC (), ^^PCI0.RP02.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x16)), One))

}

If (LOr (^^PCI0.RP03.PXSX.PAHC (), ^^PCI0.RP03.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x17)), One))

}

If (LOr (^^PCI0.RP04.PXSX.PAHC (), ^^PCI0.RP04.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x18)), One))

}

If (CondRefOf (\_SB.PCI0.RP05.PXSX))

{

If (LOr (^^PCI0.RP05.PXSX.PAHC (), ^^PCI0.RP05.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x19)), One))

}

If (LOr (^^PCI0.RP06.PXSX.PAHC (), ^^PCI0.RP06.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x1A)), One))

}

If (LOr (^^PCI0.RP07.PXSX.PAHC (), ^^PCI0.RP07.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x1B)), One))

}

If (LOr (^^PCI0.RP08.PXSX.PAHC (), ^^PCI0.RP08.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x1C)), One))

}

If (CondRefOf (\_SB.PCI0.RP09.PXSX))

{

If (LOr (^^PCI0.RP09.PXSX.PAHC (), ^^PCI0.RP09.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x1D)), One))

}

If (LOr (^^PCI0.RP10.PXSX.PAHC (), ^^PCI0.RP10.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x1E)), One))

}

If (LOr (^^PCI0.RP11.PXSX.PAHC (), ^^PCI0.RP11.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x1F)), One))

}

If (LOr (^^PCI0.RP12.PXSX.PAHC (), ^^PCI0.RP12.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x20)), One))

}

If (LOr (^^PCI0.RP13.PXSX.PAHC (), ^^PCI0.RP13.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x21)), One))

}

If (LOr (^^PCI0.RP14.PXSX.PAHC (), ^^PCI0.RP14.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x22)), One))

}

If (LOr (^^PCI0.RP15.PXSX.PAHC (), ^^PCI0.RP15.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x23)), One))

}

If (LOr (^^PCI0.RP16.PXSX.PAHC (), ^^PCI0.RP16.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x24)), One))

}

If (LOr (^^PCI0.RP17.PXSX.PAHC (), ^^PCI0.RP17.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x25)), One))

}

If (LOr (^^PCI0.RP18.PXSX.PAHC (), ^^PCI0.RP18.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x26)), One))

}

If (LOr (^^PCI0.RP19.PXSX.PAHC (), ^^PCI0.RP19.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x27)), One))

}

If (LOr (^^PCI0.RP20.PXSX.PAHC (), ^^PCI0.RP20.PXSX.PNVM ()))

{

Store (One, Index (DerefOf (Index (DEVY, 0x28)), One))

}

If (LEqual (And (PEPC, 0x04), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x06)), One))

}

If (LEqual (And (PEPC, 0x08), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x07)), One))

}

If (LEqual (And (PEPC, 0x10), Zero)) {}

If (LEqual (And (PEPC, 0x20), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x08)), One))

}

If (LEqual (And (PEPC, 0x40), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x09)), One))

}

If (LEqual (And (PEPC, 0x80), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x0A)), One))

}

If (LEqual (And (PEPC, 0x0100), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x0B)), One))

}

If (LEqual (And (PEPC, 0x0200), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x04)), One))

}

If (LEqual (And (PEPC, 0x0400), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, Zero)), One))

Store (Zero, Index (DerefOf (Index (DEVY, One)), One))

Store (Zero, Index (DerefOf (Index (DEVY, 0x02)), One))

Store (Zero, Index (DerefOf (Index (DEVY, 0x03)), One))

}

If (LEqual (And (PEPC, 0x0800), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x0C)), One))

}

If (LEqual (And (PEPC, 0x1000), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x0D)), One))

}

If (LEqual (And (PEPC, 0x2000), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x0E)), One))

}

If (LEqual (And (PEPC, 0x4000), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x0F)), One))

}

If (LEqual (And (PEPC, 0x8000), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x10)), One))

}

If (LEqual (And (PEPC, 0x00010000), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x11)), One))

}

If (LEqual (And (PEPC, 0x00020000), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x12)), One))

}

If (LEqual (And (PEPC, 0x00040000), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x13)), One))

}

If (LEqual (And (PEPC, 0x00080000), Zero))

{

Store (Zero, Index (DerefOf (Index (DEVY, 0x14)), One))

}

If (LGreaterEqual (OSYS, 0x07DF))

{

If (CondRefOf (\_SB.PCI0.RP01.PXSX))

{

If (^^PCI0.RP01.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x15)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x15)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x15)), One))

}

If (^^PCI0.RP02.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x16)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x16)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x16)), One))

}

If (^^PCI0.RP03.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x17)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x17)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x17)), One))

}

If (^^PCI0.RP04.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x18)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x18)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x18)), One))

}

If (CondRefOf (\_SB.PCI0.RP05.PXSX))

{

If (^^PCI0.RP05.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x19)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x19)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x19)), One))

}

If (^^PCI0.RP06.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1A)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1A)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x1A)), One))

}

If (^^PCI0.RP07.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1B)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1B)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x1B)), One))

}

If (^^PCI0.RP08.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1C)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1C)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x1C)), One))

}

If (CondRefOf (\_SB.PCI0.RP09.PXSX))

{

If (^^PCI0.RP09.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1D)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1D)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x1D)), One))

}

If (^^PCI0.RP10.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1E)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1E)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x1E)), One))

}

If (^^PCI0.RP11.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1F)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x1F)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x1F)), One))

}

If (^^PCI0.RP12.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x20)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x20)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x20)), One))

}

If (^^PCI0.RP13.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x21)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x21)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x21)), One))

}

If (^^PCI0.RP14.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x22)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x22)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x22)), One))

}

If (^^PCI0.RP15.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x23)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x23)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x23)), One))

}

If (^^PCI0.RP16.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x24)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x24)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x24)), One))

}

If (^^PCI0.RP17.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x25)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x25)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x25)), One))

}

If (^^PCI0.RP18.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x26)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x26)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x26)), One))

}

If (^^PCI0.RP19.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x27)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x27)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x27)), One))

}

If (^^PCI0.RP20.PXSX.WIST ())

{

Store (0x03, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x28)), 0x02)), One)), One))

Store (Zero, Index (DerefOf (Index (DerefOf (Index (DerefOf (Index (DEVY,

0x28)), 0x02)), One)), 0x02))

Store (One, Index (DerefOf (Index (DEVY, 0x28)), One))

}

Return (DEVY)

}

If (LEqual (Arg2, 0x02))

{

Return (BCCD)

}

If (LEqual (Arg2, 0x03)) {}

If (LEqual (Arg2, 0x04)) {}

If (LEqual (Arg2, 0x05))

{

If (LEqual (S0ID, One))

{

GUAM (One)

}

If (LEqual (Arg2, 0x06))

{

If (LEqual (S0ID, One))

{

GUAM (Zero)

}

Return (One)

}

Scope (_SB.PCI0)

{

Method (IICB, 2, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

While (One)

{

Store (Arg1, _T_0)

If (LEqual (_T_0, Zero))

{

Name (IIC0, ResourceTemplate ()

{

I2cSerialBus (0x0000, ControllerInitiated, 0x00061A80,

AddressingMode7Bit, "\\_SB.PCI0.I2C0",

0x00, ResourceConsumer, _Y37,

)

})

CreateWordField (IIC0, \_SB.PCI0.IICB._Y37._ADR, DAD0) // _ADR: Address

Store (Arg0, DAD0)

Return (IIC0)

}

Else

{

If (LEqual (_T_0, One))

{

Name (IIC1, ResourceTemplate ()

{

I2cSerialBus (0x0000, ControllerInitiated, 0x00061A80,

AddressingMode7Bit, "\\_SB.PCI0.I2C1",

0x00, ResourceConsumer, _Y38,

)

})

CreateWordField (IIC1, \_SB.PCI0.IICB._Y38._ADR, DAD1) // _ADR: Address

Store (Arg0, DAD1)

Return (IIC1)

}

Else

{

If (LEqual (_T_0, 0x02))

{

Name (IIC2, ResourceTemplate ()

{

I2cSerialBus (0x0000, ControllerInitiated, 0x00061A80,

AddressingMode7Bit, "\\_SB.PCI0.I2C2",

0x00, ResourceConsumer, _Y39,

)

})

CreateWordField (IIC2, \_SB.PCI0.IICB._Y39._ADR, DAD2) // _ADR: Address

Store (Arg0, DAD2)

Return (IIC2)

}

Else

{

If (LEqual (_T_0, 0x03))

{

Name (IIC3, ResourceTemplate ()

{

I2cSerialBus (0x0000, ControllerInitiated, 0x00061A80,

AddressingMode7Bit, "\\_SB.PCI0.I2C3",

0x00, ResourceConsumer, _Y3A,

)

})

CreateWordField (IIC3, \_SB.PCI0.IICB._Y3A._ADR, DAD3) // _ADR: Address

Store (Arg0, DAD3)

Return (IIC3)

}

Else

{

If (LEqual (_T_0, 0x04))

{

Name (IIC4, ResourceTemplate ()

{

I2cSerialBus (0x0000, ControllerInitiated, 0x00061A80,

AddressingMode7Bit, "\\_SB.PCI0.I2C4",

0x00, ResourceConsumer, _Y3B,

)

})

CreateWordField (IIC4, \_SB.PCI0.IICB._Y3B._ADR, DAD4) // _ADR: Address

Store (Arg0, DAD4)

Return (IIC4)

}

Else

{

Name (IIC5, ResourceTemplate ()

{

I2cSerialBus (0x0000, ControllerInitiated, 0x00061A80,

AddressingMode7Bit, "\\_SB.PCI0.I2C5",

0x00, ResourceConsumer, _Y3C,

)

})

CreateWordField (IIC5, \_SB.PCI0.IICB._Y3C._ADR, DAD5) // _ADR: Address

Store (Arg0, DAD5)

Return (IIC5)

}

Break

}

Method (PINR, 2, Serialized)

{

Name (GPIR, ResourceTemplate ()

{

GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,

"\\_SB.PCI0.GPI0", 0x00, ResourceConsumer, ,

)

{ // Pin list

0xFFFF

}

})

CreateWordField (GPIR, 0x17, PINF)

Store (Add (Multiply (0x18, Arg1), Arg0), PINF)

Return (GPIR)

}

Method (DSMI, 4, Serialized)

{

ShiftLeft (Arg3, 0x18, Local3)

ShiftLeft (Arg2, 0x10, Local2)

ShiftLeft (Arg1, 0x08, Local1)

Or (Local1, Arg0, Local0)

Or (Local0, Local2, Local0)

Or (Local0, Local3, Local0)

Return (Local0)

}

Method (GPPI, 4, Serialized)

{

ShiftLeft (Arg3, 0x18, Local3)

ShiftLeft (Arg2, 0x10, Local2)

ShiftLeft (Arg1, 0x08, Local1)

Or (Local1, Arg0, Local0)

Or (Local0, Local2, Local0)

Or (Local0, Local3, Local0)

Return (Local0)

}

Method (GRID, 1, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

Name (BUF, Buffer (0x09) {})

While (One)

{

Store (Arg0, _T_0)

If (LEqual (_T_0, Zero))

{

Store (L0H0, Index (BUF, Zero))

Store (L0H1, Index (BUF, One))

Store (L0H2, Index (BUF, 0x02))

Store (L0H3, Index (BUF, 0x03))

Store (L0H4, Index (BUF, 0x04))

Store (L0H5, Index (BUF, 0x05))

Store (L0H6, Index (BUF, 0x06))

Store (L0H7, Index (BUF, 0x07))

Store (L0H8, Index (BUF, 0x08))

}

Else

{

If (LEqual (_T_0, One))

{

Store (L1H0, Index (BUF, Zero))

Store (L1H1, Index (BUF, One))

Store (L1H2, Index (BUF, 0x02))

Store (L1H3, Index (BUF, 0x03))

Store (L1H4, Index (BUF, 0x04))

Store (L1H5, Index (BUF, 0x05))

Store (L1H6, Index (BUF, 0x06))

Store (L1H7, Index (BUF, 0x07))

Store (L1H8, Index (BUF, 0x08))

}

Else

{

If (LEqual (_T_0, 0x02))

{

Store (L2H0, Index (BUF, Zero))

Store (L2H1, Index (BUF, One))

Store (L2H2, Index (BUF, 0x02))

Store (L2H3, Index (BUF, 0x03))

Store (L2H4, Index (BUF, 0x04))

Store (L2H5, Index (BUF, 0x05))

Store (L2H6, Index (BUF, 0x06))

Store (L2H7, Index (BUF, 0x07))

Store (L2H8, Index (BUF, 0x08))

}

Else

{

Store (L3H0, Index (BUF, Zero))

Store (L3H1, Index (BUF, One))

Store (L3H2, Index (BUF, 0x02))

Store (L3H3, Index (BUF, 0x03))

Store (L3H4, Index (BUF, 0x04))

Store (L3H5, Index (BUF, 0x05))

Store (L3H6, Index (BUF, 0x06))

Store (L3H7, Index (BUF, 0x07))

Store (L3H8, Index (BUF, 0x08))

}

Break

}

Return (ToString (BUF, Ones))

}

Method (HCID, 1, Serialized)

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

While (One)

{

Store (Arg0, _T_0)

If (LEqual (_T_0, Zero))

{

Store (L0SM, Local0)

}

Else

{

If (LEqual (_T_0, One))

{

Store (L1SM, Local0)

}

Else

{

If (LEqual (_T_0, 0x02))

{

Store (L2SM, Local0)

}

Else

{

Store (L3SM, Local0)

}

Break

}

While (One)

{

Store (Local0, _T_1)

If (LEqual (_T_1, Zero))

{

Return ("INT3471")

}

Else

{

If (LEqual (_T_1, One))

{

Return ("INT33BE")

}

Else

{

If (LEqual (_T_1, 0x02))

{

Return ("INT3476")

}

Else

{

If (LEqual (_T_1, 0x03))

{

Return ("INT3477")

}

Else

{

If (LEqual (_T_1, 0x04))

{

Return ("INT3474")

}

Else

{

If (LEqual (_T_1, 0x05))

{

Return ("INT3473")

}

Else

{

If (LEqual (_T_1, 0x06))

{

Return ("INT3475")

}

Else

{

If (LEqual (_T_1, 0x07))

{

Return ("INT3478")

}

Else

{

If (LEqual (_T_1, 0x08))

{

Return ("INT3479")

}

Else

{

If (LEqual (_T_1, 0x09))

{

Return ("INT347A")

}

Else

{

If (LEqual (_T_1, 0x0A))

{

Return ("INT347B")

}

Else

{

Return (GRID (Arg0))

}

Break

}

Device (DSC0)

{

Name (_ADR, Zero) // _ADR: Address

Name (_HID, "INT3472") // _HID: Hardware ID

Name (_CID, "INT3472") // _CID: Compatible ID

Name (_DDN, "PMIC-CRDG") // _DDN: DOS Device Name

Name (_UID, Zero) // _UID: Unique ID

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

If (LGreater (C0GP, Zero))

{

Store (PINR (C0P0, C0G0), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C0GP, One))

{

Store (PINR (C0P1, C0G1), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C0GP, 0x02))

{

Store (PINR (C0P2, C0G2), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C0GP, 0x03))

{

Store (PINR (C0P3, C0G3), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

Return (Local0)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (CL00)

{

If (LEqual (C0TP, One))

{

Return (0x0F)

}

Return (Zero)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

If (LGreater (C0GP, Zero))

{

Add (ShiftLeft (C0G0, 0x10), C0P0, Local0)

SHPO (Local0, One)

SPMV (Local0, Zero)

}

If (LGreater (C0GP, One))

{

Add (ShiftLeft (C0G1, 0x10), C0P1, Local0)

SHPO (Local0, One)

SPMV (Local0, Zero)

}

If (LGreater (C0GP, 0x02))

{

Add (ShiftLeft (C0G2, 0x10), C0P2, Local0)

SHPO (Local0, One)

SPMV (Local0, Zero)

}

If (LGreater (C0GP, 0x03))

{

Add (ShiftLeft (C0G3, 0x10), C0P3, Local0)

SHPO (Local0, One)

SPMV (Local0, Zero)

}

Method (CLDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x20)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

Store (C0TP, Index (PAR, One))

Store (C0CV, Index (PAR, 0x03))

Return (PAR)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x40, 0x46, 0x23, 0x79, 0x10, 0x9E, 0xEA, 0x4F,

/* 0008 */ 0xA5, 0xC1, 0xB5, 0xAA, 0x8B, 0x19, 0x75, 0x6F

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (C0GP)

}

If (LEqual (Arg2, 0x02))

{

Return (GPPI (C0F0, Add (Multiply (0x18, C0G0), C0P0),

C0I0, C0A0))

}

If (LEqual (Arg2, 0x03))

{

Return (GPPI (C0F1, Add (Multiply (0x18, C0G1), C0P1),

C0I1, C0A1))

}

If (LEqual (Arg2, 0x04))

{

Return (GPPI (C0F2, Add (Multiply (0x18, C0G2), C0P2),

C0I2, C0A2))

}

If (LEqual (Arg2, 0x05))

{

Return (GPPI (C0F3, Add (Multiply (0x18, C0G3), C0P3),

C0I3, C0A3))

}

Device (DSC1)

{

Name (_ADR, Zero) // _ADR: Address

Name (_HID, "INT3472") // _HID: Hardware ID

Name (_CID, "INT3472") // _CID: Compatible ID

Name (_DDN, "PMIC-CRDG") // _DDN: DOS Device Name

Name (_UID, One) // _UID: Unique ID

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

If (LGreater (C1GP, Zero))

{

Store (PINR (C1P0, C1G0), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C1GP, One))

{

Store (PINR (C1P1, C1G1), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C1GP, 0x02))

{

Store (PINR (C1P2, C1G2), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C1GP, 0x03))

{

Store (PINR (C1P3, C1G3), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

Return (Local0)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (CL01)

{

If (LEqual (C1TP, One))

{

Return (0x0F)

}

Return (Zero)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

If (LGreater (C1GP, Zero))

{

Add (ShiftLeft (C1G0, 0x10), C1P0, Local0)

SHPO (Local0, One)

SPMV (Local0, Zero)

}

If (LGreater (C1GP, One))

{

Add (ShiftLeft (C1G1, 0x10), C1P1, Local0)

SHPO (Local0, One)

SPMV (Local0, Zero)

}

If (LGreater (C1GP, 0x02))

{

Add (ShiftLeft (C1G2, 0x10), C1P2, Local0)

SHPO (Local0, One)

SPMV (Local0, Zero)

}

If (LGreater (C1GP, 0x03))

{

Add (ShiftLeft (C1G3, 0x10), C1P3, Local0)

SHPO (Local0, One)

SPMV (Local0, Zero)

}

Method (CLDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x20)

{

/* 0000 */ 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

Store (C1TP, Index (PAR, One))

Store (C1CV, Index (PAR, 0x03))

Return (PAR)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x40, 0x46, 0x23, 0x79, 0x10, 0x9E, 0xEA, 0x4F,

/* 0008 */ 0xA5, 0xC1, 0xB5, 0xAA, 0x8B, 0x19, 0x75, 0x6F

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (C1GP)

}

If (LEqual (Arg2, 0x02))

{

Return (GPPI (C1F0, Add (Multiply (0x18, C1G0), C1P0),

C1I0, C1A0))

}

If (LEqual (Arg2, 0x03))

{

Return (GPPI (C1F1, Add (Multiply (0x18, C1G1), C1P1),

C1I1, C1A1))

}

If (LEqual (Arg2, 0x04))

{

Return (GPPI (C1F2, Add (Multiply (0x18, C1G2), C1P2),

C1I2, C1A2))

}

If (LEqual (Arg2, 0x05))

{

Return (GPPI (C1F3, Add (Multiply (0x18, C1G3), C1P3),

C1I3, C1A3))

}

Device (DSC2)

{

Name (_ADR, Zero) // _ADR: Address

Name (_HID, "INT3472") // _HID: Hardware ID

Name (_CID, "INT3472") // _CID: Compatible ID

Name (_DDN, "PMIC-CRDG") // _DDN: DOS Device Name

Name (_UID, 0x02) // _UID: Unique ID

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

If (LGreater (C2GP, Zero))

{

Store (PINR (C2P0, C2G0), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C2GP, One))

{

Store (PINR (C2P1, C2G1), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C2GP, 0x02))

{

Store (PINR (C2P2, C2G2), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C2GP, 0x03))

{

Store (PINR (C2P3, C2G3), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

Return (Local0)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (CL02)

{

If (LEqual (C2TP, One))

{

Return (0x0F)

}

Return (Zero)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

If (LGreater (C2GP, Zero))

{

Add (ShiftLeft (C2G0, 0x10), C2P0, Local0)

SHPO (Local0, One)

SPMV (Local0, Zero)

}

If (LGreater (C2GP, One))

{

Add (ShiftLeft (C2G1, 0x10), C2P1, Local0)

SHPO (Local0, One)

SPMV (Local0, Zero)

}

If (LGreater (C2GP, 0x02))

{

Add (ShiftLeft (C2G2, 0x10), C2P2, Local0)

SHPO (Local0, One)

SPMV (Local0, Zero)

}

If (LGreater (C2GP, 0x03))

{

Add (ShiftLeft (C2G3, 0x10), C2P3, Local0)

SHPO (Local0, One)

SPMV (Local0, Zero)

}

Method (CLDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x20)

{

/* 0000 */ 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

Store (C2TP, Index (PAR, One))

Store (C2CV, Index (PAR, 0x03))

Return (PAR)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x40, 0x46, 0x23, 0x79, 0x10, 0x9E, 0xEA, 0x4F,

/* 0008 */ 0xA5, 0xC1, 0xB5, 0xAA, 0x8B, 0x19, 0x75, 0x6F

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (C2GP)

}

If (LEqual (Arg2, 0x02))

{

Return (GPPI (C2F0, Add (Multiply (0x18, C2G0), C2P0),

C2I0, C2A0))

}

If (LEqual (Arg2, 0x03))

{

Return (GPPI (C2F1, Add (Multiply (0x18, C2G1), C2P1),

C2I1, C2A1))

}

If (LEqual (Arg2, 0x04))

{

Return (GPPI (C2F2, Add (Multiply (0x18, C2G2), C2P2),

C2I2, C2A2))

}

If (LEqual (Arg2, 0x05))

{

Return (GPPI (C2F3, Add (Multiply (0x18, C2G3), C2P3),

C2I3, C2A3))

}

Device (DSC3)

{

Name (_ADR, Zero) // _ADR: Address

Name (_HID, "INT3472") // _HID: Hardware ID

Name (_CID, "INT3472") // _CID: Compatible ID

Name (_DDN, "PMIC-CRDG") // _DDN: DOS Device Name

Name (_UID, 0x03) // _UID: Unique ID

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

If (LGreater (C3GP, Zero))

{

Store (PINR (C3P0, C3G0), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C3GP, One))

{

Store (PINR (C3P1, C3G1), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C3GP, 0x02))

{

Store (PINR (C3P2, C3G2), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (C3GP, 0x03))

{

Store (PINR (C3P3, C3G3), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

Return (Local0)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (CL03)

{

If (LEqual (C3TP, One))

{

Return (0x0F)

}

Return (Zero)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

If (LGreater (C3GP, Zero))

{

Add (ShiftLeft (C3G0, 0x10), C3P0, Local0)

SHPO (Local0, One)

SPMV (Local0, Zero)

}

If (LGreater (C3GP, One))

{

Add (ShiftLeft (C3G1, 0x10), C3P1, Local0)

SHPO (Local0, One)

SPMV (Local0, Zero)

}

If (LGreater (C3GP, 0x02))

{

Add (ShiftLeft (C3G2, 0x10), C3P2, Local0)

SHPO (Local0, One)

SPMV (Local0, Zero)

}

If (LGreater (C3GP, 0x03))

{

Add (ShiftLeft (C3G3, 0x10), C3P3, Local0)

SHPO (Local0, One)

SPMV (Local0, Zero)

}

Method (CLDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x20)

{

/* 0000 */ 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

Store (C3TP, Index (PAR, One))

Store (C3CV, Index (PAR, 0x03))

Return (PAR)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x40, 0x46, 0x23, 0x79, 0x10, 0x9E, 0xEA, 0x4F,

/* 0008 */ 0xA5, 0xC1, 0xB5, 0xAA, 0x8B, 0x19, 0x75, 0x6F

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (C3GP)

}

If (LEqual (Arg2, 0x02))

{

Return (GPPI (C3F0, Add (Multiply (0x18, C3G0), C3P0),

C3I0, C3A0))

}

If (LEqual (Arg2, 0x03))

{

Return (GPPI (C3F1, Add (Multiply (0x18, C3G1), C3P1),

C3I1, C3A1))

}

If (LEqual (Arg2, 0x04))

{

Return (GPPI (C3F2, Add (Multiply (0x18, C3G2), C3P2),

C3I2, C3A2))

}

If (LEqual (Arg2, 0x05))

{

Return (GPPI (C3F3, Add (Multiply (0x18, C3G3), C3P3),

C3I3, C3A3))

}

Device (CLP0)

{

Name (_ADR, Zero) // _ADR: Address

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (CL00)

{

If (LEqual (C0IB, 0x02))

{

Return (Package (0x01)

{

I2C2

})

}

If (LEqual (C0IB, 0x03))

{

Return (Package (0x01)

{

I2C3

})

}

Return (Package (0x01)

{

PCI0

})

}

Name (_UID, Zero) // _UID: Unique ID

Name (_HID, "INT3472") // _HID: Hardware ID

Name (_CID, "INT3472") // _CID: Compatible ID

Name (_DDN, "PMIC-CRDG") // _DDN: DOS Device Name

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

ConcatenateResTemplate (Local0, IICB (C0IA, C0IB), Local0)

Return (Local0)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (CL00)

{

If (LGreater (C0TP, One))

{

Return (0x0F)

}

Return (Zero)

}

Method (CLDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x20)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

Store (C0TP, Index (PAR, One))

Store (C0CV, Index (PAR, 0x03))

Return (PAR)

}

Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device

{

Name (PLDB, Package (0x01)

{

Buffer (0x14)

{

/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x29, 0x0D, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,

/* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF

}

})

CreateByteField (DerefOf (Index (PLDB, Zero)), 0x08, BPOS)

Store (C0PL, BPOS)

Return (PLDB)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x49, 0x75, 0x25, 0x26, 0x71, 0x92, 0xA4, 0x4C,

/* 0008 */ 0xBB, 0x43, 0xC4, 0x89, 0x9D, 0x5A, 0x48, 0x81

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (One)

}

If (LEqual (Arg2, 0x02))

{

Return (DSMI (0x0B, C0IA, Zero, C0IB))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xC8, 0xC5, 0x15, 0x58, 0x7D, 0xC4, 0x7B, 0x47,

/* 0008 */ 0x9A, 0x8D, 0x76, 0x17, 0x31, 0x76, 0x41, 0x4B

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (DSMB, Buffer (0x34) {})

CreateDWordField (DSMB, Zero, I2CC)

CreateDWordField (DSMB, 0x04, DEV0)

Store (One, I2CC)

Store (DSMI (0x0B, C0IA, Zero, C0IB), DEV0)

Return (DSMB)

}

Return (Buffer (One)

{

0x00

})

}

Device (CLP1)

{

Name (_ADR, Zero) // _ADR: Address

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (CL01)

{

If (LEqual (C1IB, 0x02))

{

Return (Package (0x01)

{

I2C2

})

}

If (LEqual (C1IB, 0x03))

{

Return (Package (0x01)

{

I2C3

})

}

Return (Package (0x01)

{

PCI0

})

}

Name (_HID, "INT3472") // _HID: Hardware ID

Name (_CID, "INT3472") // _CID: Compatible ID

Name (_DDN, "PMIC-CRDG") // _DDN: DOS Device Name

Name (_UID, One) // _UID: Unique ID

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

ConcatenateResTemplate (Local0, IICB (C1IA, C1IB), Local0)

Return (Local0)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (CL01)

{

If (LGreater (C1TP, One))

{

Return (0x0F)

}

Return (Zero)

}

Method (CLDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x20)

{

/* 0000 */ 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

Store (C1TP, Index (PAR, One))

Store (C1CV, Index (PAR, 0x03))

Return (PAR)

}

Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device

{

Name (PLDB, Package (0x01)

{

Buffer (0x14)

{

/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x29, 0x0D, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,

/* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF

}

})

CreateByteField (DerefOf (Index (PLDB, Zero)), 0x08, BPOS)

Store (C1PL, BPOS)

Return (PLDB)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x49, 0x75, 0x25, 0x26, 0x71, 0x92, 0xA4, 0x4C,

/* 0008 */ 0xBB, 0x43, 0xC4, 0x89, 0x9D, 0x5A, 0x48, 0x81

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (One)

}

If (LEqual (Arg2, 0x02))

{

Return (DSMI (0x0B, C1IA, Zero, C1IB))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xC8, 0xC5, 0x15, 0x58, 0x7D, 0xC4, 0x7B, 0x47,

/* 0008 */ 0x9A, 0x8D, 0x76, 0x17, 0x31, 0x76, 0x41, 0x4B

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (DSMB, Buffer (0x34) {})

CreateDWordField (DSMB, Zero, I2CC)

CreateDWordField (DSMB, 0x04, DEV0)

Store (One, I2CC)

Store (DSMI (0x0B, C1IA, Zero, C1IB), DEV0)

Return (DSMB)

}

Return (Buffer (One)

{

0x00

})

}

Device (CLP2)

{

Name (_ADR, Zero) // _ADR: Address

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (CL02)

{

If (LEqual (C2IB, 0x02))

{

Return (Package (0x01)

{

I2C2

})

}

If (LEqual (C2IB, 0x03))

{

Return (Package (0x01)

{

I2C3

})

}

Return (Package (0x01)

{

PCI0

})

}

Name (_HID, "INT3472") // _HID: Hardware ID

Name (_CID, "INT3472") // _CID: Compatible ID

Name (_DDN, "PMIC-CRDG") // _DDN: DOS Device Name

Name (_UID, 0x02) // _UID: Unique ID

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

ConcatenateResTemplate (Local0, IICB (C2IA, C2IB), Local0)

Return (Local0)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (CL02)

{

If (LGreater (C2TP, One))

{

Return (0x0F)

}

Return (Zero)

}

Method (CLDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x20)

{

/* 0000 */ 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

Store (C2TP, Index (PAR, One))

Store (C2CV, Index (PAR, 0x03))

Return (PAR)

}

Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device

{

Name (PLDB, Package (0x01)

{

Buffer (0x14)

{

/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x29, 0x0D, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,

/* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF

}

})

CreateByteField (DerefOf (Index (PLDB, Zero)), 0x08, BPOS)

Store (C2PL, BPOS)

Return (PLDB)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x49, 0x75, 0x25, 0x26, 0x71, 0x92, 0xA4, 0x4C,

/* 0008 */ 0xBB, 0x43, 0xC4, 0x89, 0x9D, 0x5A, 0x48, 0x81

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (One)

}

If (LEqual (Arg2, 0x02))

{

Return (DSMI (0x0B, C2IA, Zero, C2IB))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xC8, 0xC5, 0x15, 0x58, 0x7D, 0xC4, 0x7B, 0x47,

/* 0008 */ 0x9A, 0x8D, 0x76, 0x17, 0x31, 0x76, 0x41, 0x4B

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (DSMB, Buffer (0x34) {})

CreateDWordField (DSMB, Zero, I2CC)

CreateDWordField (DSMB, 0x04, DEV0)

Store (One, I2CC)

Store (DSMI (0x0B, C2IA, Zero, C2IB), DEV0)

Return (DSMB)

}

Return (Buffer (One)

{

0x00

})

}

Device (CLP3)

{

Name (_ADR, Zero) // _ADR: Address

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (CL03)

{

If (LEqual (C3IB, 0x02))

{

Return (Package (0x01)

{

I2C2

})

}

If (LEqual (C3IB, 0x03))

{

Return (Package (0x01)

{

I2C3

})

}

Return (Package (0x01)

{

PCI0

})

}

Name (_HID, "INT3472") // _HID: Hardware ID

Name (_CID, "INT3472") // _CID: Compatible ID

Name (_DDN, "PMIC-CRDG") // _DDN: DOS Device Name

Name (_UID, 0x03) // _UID: Unique ID

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

ConcatenateResTemplate (Local0, IICB (C3IA, C3IB), Local0)

Return (Local0)

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (CL03)

{

If (LGreater (C3TP, One))

{

Return (0x0F)

}

Return (Zero)

}

Method (CLDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x20)

{

/* 0000 */ 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

Store (C3TP, Index (PAR, One))

Store (C3CV, Index (PAR, 0x03))

Return (PAR)

}

Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device

{

Name (PLDB, Package (0x01)

{

Buffer (0x14)

{

/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x29, 0x0D, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,

/* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF

}

})

CreateByteField (DerefOf (Index (PLDB, Zero)), 0x08, BPOS)

Store (C3PL, BPOS)

Return (PLDB)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x49, 0x75, 0x25, 0x26, 0x71, 0x92, 0xA4, 0x4C,

/* 0008 */ 0xBB, 0x43, 0xC4, 0x89, 0x9D, 0x5A, 0x48, 0x81

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x07

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (One)

}

If (LEqual (Arg2, 0x02))

{

Return (DSMI (0x0B, C3IA, Zero, C3IB))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xC8, 0xC5, 0x15, 0x58, 0x7D, 0xC4, 0x7B, 0x47,

/* 0008 */ 0x9A, 0x8D, 0x76, 0x17, 0x31, 0x76, 0x41, 0x4B

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (DSMB, Buffer (0x34) {})

CreateDWordField (DSMB, Zero, I2CC)

CreateDWordField (DSMB, 0x04, DEV0)

Store (One, I2CC)

Store (DSMI (0x0B, C3IA, Zero, C3IB), DEV0)

Return (DSMB)

}

Return (Buffer (One)

{

0x00

})

}

Device (LNK0)

{

Name (_ADR, Zero) // _ADR: Address

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (L0EN)

{

If (LEqual (L0CL, Zero))

{

If (LGreater (C0TP, One))

{

Return (Package (0x01)

{

CLP0

})

}

If (LEqual (L0CL, One))

{

If (LGreater (C1TP, One))

{

Return (Package (0x01)

{

CLP1

})

}

If (LEqual (L0CL, 0x02))

{

If (LGreater (C2TP, One))

{

Return (Package (0x01)

{

CLP2

})

}

If (LEqual (L0CL, 0x03))

{

If (LGreater (C3TP, One))

{

Return (Package (0x01)

{

CLP3

})

}

Return (Package (0x01)

{

PCI0

})

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (L0EN)

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Name (_UID, Zero) // _UID: Unique ID

Method (_HID, 0, NotSerialized) // _HID: Hardware ID

{

Return (HCID (Zero))

}

Method (_CID, 0, NotSerialized) // _CID: Compatible ID

{

Return (HCID (Zero))

}

Method (_DDN, 0, NotSerialized) // _DDN: DOS Device Name

{

Name (BUF, Buffer (0x10) {})

Store (L0M0, Index (BUF, Zero))

Store (L0M1, Index (BUF, One))

Store (L0M2, Index (BUF, 0x02))

Store (L0M3, Index (BUF, 0x03))

Store (L0M4, Index (BUF, 0x04))

Store (L0M5, Index (BUF, 0x05))

Store (L0M6, Index (BUF, 0x06))

Store (L0M7, Index (BUF, 0x07))

Store (L0M8, Index (BUF, 0x08))

Store (L0M9, Index (BUF, 0x09))

Store (L0MA, Index (BUF, 0x0A))

Store (L0MB, Index (BUF, 0x0B))

Store (L0MC, Index (BUF, 0x0C))

Store (L0MD, Index (BUF, 0x0D))

Store (L0ME, Index (BUF, 0x0E))

Store (L0MF, Index (BUF, 0x0F))

Return (ToString (BUF, Ones))

}

Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device

{

Name (PLDB, Package (0x01)

{

Buffer (0x14)

{

/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x69, 0x0E, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,

/* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF

}

})

CreateByteField (DerefOf (Index (PLDB, Zero)), 0x08, BPOS)

Store (L0PL, BPOS)

Return (PLDB)

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

If (LGreater (L0DI, Zero))

{

Store (IICB (L0A0, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L0DI, One))

{

Store (IICB (L0A1, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L0DI, 0x02))

{

Store (IICB (L0A2, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L0DI, 0x03))

{

Store (IICB (L0A3, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L0DI, 0x04))

{

Store (IICB (L0A4, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L0DI, 0x05))

{

Store (IICB (L0A5, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L0DI, 0x06))

{

Store (IICB (L0A6, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L0DI, 0x07))

{

Store (IICB (L0A7, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L0DI, 0x08))

{

Store (IICB (L0A8, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L0DI, 0x09))

{

Store (IICB (L0A9, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L0DI, 0x0A))

{

Store (IICB (L0AA, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L0DI, 0x0B))

{

Store (IICB (L0AB, L0BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

Return (Local0)

}

Method (SSDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x6C)

{

/* 0000 */ 0x00, 0x00, 0x69, 0x56, 0x39, 0x8A, 0xF7, 0x11,

/* 0008 */ 0xA9, 0x4E, 0x9C, 0x7D, 0x20, 0xEE, 0x0A, 0xB5,

/* 0010 */ 0xCA, 0x40, 0xA3, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0050 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,

/* 0058 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0060 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0068 */ 0x00, 0x00, 0x00, 0x00

})

Store (L0DV, Index (PAR, Zero))

Store (L0CV, Index (PAR, One))

Store (CDIV, Index (PAR, 0x18))

Store (L0LU, Index (PAR, 0x1C))

Store (L0NL, Index (PAR, 0x1D))

Store (L0EE, Index (PAR, 0x4E))

Store (L0VC, Index (PAR, 0x4F))

Store (L0FS, Index (PAR, 0x52))

Store (L0DG, Index (PAR, 0x54))

CreateDWordField (PAR, 0x56, DAT)

Store (L0CK, DAT)

Store (L0CL, Index (PAR, 0x5A))

Return (PAR)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x8F, 0xCE, 0x2A, 0x82, 0x14, 0x28, 0x74, 0x41,

/* 0008 */ 0xA5, 0x6B, 0x5F, 0x02, 0x9F, 0xE0, 0x79, 0xEE

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (BUF, Buffer (0x10) {})

Store (L0M0, Index (BUF, Zero))

Store (L0M1, Index (BUF, One))

Store (L0M2, Index (BUF, 0x02))

Store (L0M3, Index (BUF, 0x03))

Store (L0M4, Index (BUF, 0x04))

Store (L0M5, Index (BUF, 0x05))

Store (L0M6, Index (BUF, 0x06))

Store (L0M7, Index (BUF, 0x07))

Store (L0M8, Index (BUF, 0x08))

Store (L0M9, Index (BUF, 0x09))

Store (L0MA, Index (BUF, 0x0A))

Store (L0MB, Index (BUF, 0x0B))

Store (L0MC, Index (BUF, 0x0C))

Store (L0MD, Index (BUF, 0x0D))

Store (L0ME, Index (BUF, 0x0E))

Store (L0MF, Index (BUF, 0x0F))

Return (ToString (BUF, Ones))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xC8, 0xC5, 0x15, 0x58, 0x7D, 0xC4, 0x7B, 0x47,

/* 0008 */ 0x9A, 0x8D, 0x76, 0x17, 0x31, 0x76, 0x41, 0x4B

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (DSMB, Buffer (0x34) {})

CreateDWordField (DSMB, Zero, I2CC)

CreateDWordField (DSMB, 0x04, DEV0)

CreateDWordField (DSMB, 0x08, DEV1)

CreateDWordField (DSMB, 0x0C, DEV2)

CreateDWordField (DSMB, 0x10, DEV3)

CreateDWordField (DSMB, 0x14, DEV4)

CreateDWordField (DSMB, 0x18, DEV5)

CreateDWordField (DSMB, 0x1C, DEV6)

CreateDWordField (DSMB, 0x20, DEV7)

CreateDWordField (DSMB, 0x24, DEV8)

CreateDWordField (DSMB, 0x28, DEV9)

CreateDWordField (DSMB, 0x2C, DEVA)

CreateDWordField (DSMB, 0x30, DEVB)

Store (L0DI, I2CC)

Store (DSMI (L0D0, L0A0, Zero, L0BS), DEV0)

Store (DSMI (L0D1, L0A1, Zero, L0BS), DEV1)

Store (DSMI (L0D2, L0A2, Zero, L0BS), DEV2)

Store (DSMI (L0D3, L0A3, Zero, L0BS), DEV3)

Store (DSMI (L0D4, L0A4, Zero, L0BS), DEV4)

Store (DSMI (L0D5, L0A5, Zero, L0BS), DEV5)

Store (DSMI (L0D6, L0A6, Zero, L0BS), DEV6)

Store (DSMI (L0D7, L0A7, Zero, L0BS), DEV7)

Store (DSMI (L0D8, L0A8, Zero, L0BS), DEV8)

Store (DSMI (L0D9, L0A9, Zero, L0BS), DEV9)

Store (DSMI (L0DA, L0AA, Zero, L0BS), DEVA)

Store (DSMI (L0DB, L0AB, Zero, L0BS), DEVB)

Return (DSMB)

}

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x49, 0x75, 0x25, 0x26, 0x71, 0x92, 0xA4, 0x4C,

/* 0008 */ 0xBB, 0x43, 0xC4, 0x89, 0x9D, 0x5A, 0x48, 0x81

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (0x02)

{

0xFF, 0x1F

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (L0DI)

}

If (LEqual (Arg2, 0x02))

{

If (LGreater (L0DI, Zero))

{

Return (DSMI (L0D0, L0A0, Zero, L0BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x03))

{

If (LGreater (L0DI, One))

{

Return (DSMI (L0D1, L0A1, Zero, L0BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x04))

{

If (LGreater (L0DI, 0x02))

{

Return (DSMI (L0D2, L0A2, Zero, L0BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x05))

{

If (LGreater (L0DI, 0x03))

{

Return (DSMI (L0D3, L0A3, Zero, L0BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x06))

{

If (LGreater (L0DI, 0x04))

{

Return (DSMI (L0D4, L0A4, Zero, L0BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x07))

{

If (LGreater (L0DI, 0x05))

{

Return (DSMI (L0D5, L0A5, Zero, L0BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x08))

{

If (LGreater (L0DI, 0x06))

{

Return (DSMI (L0D6, L0A6, Zero, L0BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x08))

{

If (LGreater (L0DI, 0x07))

{

Return (DSMI (L0D7, L0A7, Zero, L0BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x09))

{

If (LGreater (L0DI, 0x08))

{

Return (DSMI (L0D8, L0A8, Zero, L0BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0A))

{

If (LGreater (L0DI, 0x09))

{

Return (DSMI (L0D9, L0A9, Zero, L0BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0B))

{

If (LGreater (L0DI, 0x0A))

{

Return (DSMI (L0DA, L0AA, Zero, L0BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0C))

{

If (LGreater (L0DI, 0x0B))

{

Return (DSMI (L0DB, L0AB, Zero, L0BS))

}

Else

{

Return (Zero)

}

Return (Zero)

}

Device (LNK1)

{

Name (_ADR, Zero) // _ADR: Address

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (L1EN)

{

If (LEqual (L1CL, Zero))

{

If (LGreater (C0TP, One))

{

Return (Package (0x01)

{

CLP0

})

}

If (LEqual (L1CL, One))

{

If (LGreater (C1TP, One))

{

Return (Package (0x01)

{

CLP1

})

}

If (LEqual (L1CL, 0x02))

{

If (LGreater (C2TP, One))

{

Return (Package (0x01)

{

CLP2

})

}

If (LEqual (L1CL, 0x03))

{

If (LGreater (C3TP, One))

{

Return (Package (0x01)

{

CLP3

})

}

Return (Package (0x01)

{

PCI0

})

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (L1EN)

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Name (_UID, One) // _UID: Unique ID

Method (_HID, 0, NotSerialized) // _HID: Hardware ID

{

Return (HCID (One))

}

Method (_CID, 0, NotSerialized) // _CID: Compatible ID

{

Return (HCID (One))

}

Method (_DDN, 0, NotSerialized) // _DDN: DOS Device Name

{

Name (BUF, Buffer (0x10) {})

Store (L1M0, Index (BUF, Zero))

Store (L1M1, Index (BUF, One))

Store (L1M2, Index (BUF, 0x02))

Store (L1M3, Index (BUF, 0x03))

Store (L1M4, Index (BUF, 0x04))

Store (L1M5, Index (BUF, 0x05))

Store (L1M6, Index (BUF, 0x06))

Store (L1M7, Index (BUF, 0x07))

Store (L1M8, Index (BUF, 0x08))

Store (L1M9, Index (BUF, 0x09))

Store (L1MA, Index (BUF, 0x0A))

Store (L1MB, Index (BUF, 0x0B))

Store (L1MC, Index (BUF, 0x0C))

Store (L1MD, Index (BUF, 0x0D))

Store (L1ME, Index (BUF, 0x0E))

Store (L1MF, Index (BUF, 0x0F))

Return (ToString (BUF, Ones))

}

Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device

{

Name (PLDB, Package (0x01)

{

Buffer (0x14)

{

/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x69, 0x0E, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,

/* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF

}

})

CreateByteField (DerefOf (Index (PLDB, Zero)), 0x08, BPOS)

Store (L1PL, BPOS)

Return (PLDB)

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

If (LGreater (L1DI, Zero))

{

Store (IICB (L1A0, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L1DI, One))

{

Store (IICB (L1A1, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L1DI, 0x02))

{

Store (IICB (L1A2, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L1DI, 0x03))

{

Store (IICB (L1A3, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L1DI, 0x04))

{

Store (IICB (L1A4, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L1DI, 0x05))

{

Store (IICB (L1A5, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L1DI, 0x06))

{

Store (IICB (L1A6, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L1DI, 0x07))

{

Store (IICB (L1A7, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L1DI, 0x08))

{

Store (IICB (L1A8, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L1DI, 0x09))

{

Store (IICB (L1A9, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L1DI, 0x0A))

{

Store (IICB (L1AA, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L1DI, 0x0B))

{

Store (IICB (L1AB, L1BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

Return (Local0)

}

Method (SSDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x6C)

{

/* 0000 */ 0x00, 0x00, 0x69, 0x56, 0x39, 0x8A, 0xF7, 0x11,

/* 0008 */ 0xA9, 0x4E, 0x9C, 0x7D, 0x20, 0xEE, 0x0A, 0xB5,

/* 0010 */ 0xCA, 0x40, 0xA3, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0050 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,

/* 0058 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0060 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0068 */ 0x00, 0x00, 0x00, 0x00

})

Store (L1DV, Index (PAR, Zero))

Store (L1CV, Index (PAR, One))

Store (CDIV, Index (PAR, 0x18))

Store (L1LU, Index (PAR, 0x1C))

Store (L1NL, Index (PAR, 0x1D))

Store (L1EE, Index (PAR, 0x4E))

Store (L1VC, Index (PAR, 0x4F))

Store (L1FS, Index (PAR, 0x52))

Store (L1DG, Index (PAR, 0x54))

CreateDWordField (PAR, 0x56, DAT)

Store (L1CK, DAT)

Store (L1CL, Index (PAR, 0x5A))

Return (PAR)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x8F, 0xCE, 0x2A, 0x82, 0x14, 0x28, 0x74, 0x41,

/* 0008 */ 0xA5, 0x6B, 0x5F, 0x02, 0x9F, 0xE0, 0x79, 0xEE

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (BUF, Buffer (0x10) {})

Store (L1M0, Index (BUF, Zero))

Store (L1M1, Index (BUF, One))

Store (L1M2, Index (BUF, 0x02))

Store (L1M3, Index (BUF, 0x03))

Store (L1M4, Index (BUF, 0x04))

Store (L1M5, Index (BUF, 0x05))

Store (L1M6, Index (BUF, 0x06))

Store (L1M7, Index (BUF, 0x07))

Store (L1M8, Index (BUF, 0x08))

Store (L1M9, Index (BUF, 0x09))

Store (L1MA, Index (BUF, 0x0A))

Store (L1MB, Index (BUF, 0x0B))

Store (L1MC, Index (BUF, 0x0C))

Store (L1MD, Index (BUF, 0x0D))

Store (L1ME, Index (BUF, 0x0E))

Store (L1MF, Index (BUF, 0x0F))

Return (ToString (BUF, Ones))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xC8, 0xC5, 0x15, 0x58, 0x7D, 0xC4, 0x7B, 0x47,

/* 0008 */ 0x9A, 0x8D, 0x76, 0x17, 0x31, 0x76, 0x41, 0x4B

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (DSMB, Buffer (0x34) {})

CreateDWordField (DSMB, Zero, I2CC)

CreateDWordField (DSMB, 0x04, DEV0)

CreateDWordField (DSMB, 0x08, DEV1)

CreateDWordField (DSMB, 0x0C, DEV2)

CreateDWordField (DSMB, 0x10, DEV3)

CreateDWordField (DSMB, 0x14, DEV4)

CreateDWordField (DSMB, 0x18, DEV5)

CreateDWordField (DSMB, 0x1C, DEV6)

CreateDWordField (DSMB, 0x20, DEV7)

CreateDWordField (DSMB, 0x24, DEV8)

CreateDWordField (DSMB, 0x28, DEV9)

CreateDWordField (DSMB, 0x2C, DEVA)

CreateDWordField (DSMB, 0x30, DEVB)

Store (L1DI, I2CC)

Store (DSMI (L1D0, L1A0, Zero, L1BS), DEV0)

Store (DSMI (L1D1, L1A1, Zero, L1BS), DEV1)

Store (DSMI (L1D2, L1A2, Zero, L1BS), DEV2)

Store (DSMI (L1D3, L1A3, Zero, L1BS), DEV3)

Store (DSMI (L1D4, L1A4, Zero, L1BS), DEV4)

Store (DSMI (L1D5, L1A5, Zero, L1BS), DEV5)

Store (DSMI (L1D6, L1A6, Zero, L1BS), DEV6)

Store (DSMI (L1D7, L1A7, Zero, L1BS), DEV7)

Store (DSMI (L1D8, L1A8, Zero, L1BS), DEV8)

Store (DSMI (L1D9, L1A9, Zero, L1BS), DEV9)

Store (DSMI (L1DA, L1AA, Zero, L1BS), DEVA)

Store (DSMI (L1DB, L1AB, Zero, L1BS), DEVB)

Return (DSMB)

}

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x49, 0x75, 0x25, 0x26, 0x71, 0x92, 0xA4, 0x4C,

/* 0008 */ 0xBB, 0x43, 0xC4, 0x89, 0x9D, 0x5A, 0x48, 0x81

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (0x02)

{

0xFF, 0x1F

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (L1DI)

}

If (LEqual (Arg2, 0x02))

{

If (LGreater (L1DI, Zero))

{

Return (DSMI (L1D0, L1A0, Zero, L1BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x03))

{

If (LGreater (L1DI, One))

{

Return (DSMI (L1D1, L1A1, Zero, L1BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x04))

{

If (LGreater (L1DI, 0x02))

{

Return (DSMI (L1D2, L1A2, Zero, L1BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x05))

{

If (LGreater (L1DI, 0x03))

{

Return (DSMI (L1D3, L1A3, Zero, L1BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x06))

{

If (LGreater (L1DI, 0x04))

{

Return (DSMI (L1D4, L1A4, Zero, L1BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x07))

{

If (LGreater (L1DI, 0x05))

{

Return (DSMI (L1D5, L1A5, Zero, L1BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x08))

{

If (LGreater (L1DI, 0x06))

{

Return (DSMI (L1D6, L1A6, Zero, L1BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x08))

{

If (LGreater (L1DI, 0x07))

{

Return (DSMI (L1D7, L1A7, Zero, L1BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x09))

{

If (LGreater (L1DI, 0x08))

{

Return (DSMI (L1D8, L1A8, Zero, L1BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0A))

{

If (LGreater (L1DI, 0x09))

{

Return (DSMI (L1D9, L1A9, Zero, L1BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0B))

{

If (LGreater (L1DI, 0x0A))

{

Return (DSMI (L1DA, L1AA, Zero, L1BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0C))

{

If (LGreater (L1DI, 0x0B))

{

Return (DSMI (L1DB, L1AB, Zero, L1BS))

}

Else

{

Return (Zero)

}

Return (Zero)

}

Device (LNK2)

{

Name (_ADR, Zero) // _ADR: Address

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (L2EN)

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (L2EN)

{

If (LEqual (L2CL, Zero))

{

If (LGreater (C0TP, One))

{

Return (Package (0x01)

{

CLP0

})

}

If (LEqual (L2CL, One))

{

If (LGreater (C1TP, One))

{

Return (Package (0x01)

{

CLP1

})

}

If (LEqual (L2CL, 0x02))

{

If (LGreater (C2TP, One))

{

Return (Package (0x01)

{

CLP2

})

}

If (LEqual (L2CL, 0x03))

{

If (LGreater (C3TP, One))

{

Return (Package (0x01)

{

CLP3

})

}

Return (Package (0x01)

{

PCI0

})

}

Name (_UID, 0x02) // _UID: Unique ID

Method (_HID, 0, NotSerialized) // _HID: Hardware ID

{

Return (HCID (0x02))

}

Method (_CID, 0, NotSerialized) // _CID: Compatible ID

{

Return (HCID (0x02))

}

Method (_DDN, 0, NotSerialized) // _DDN: DOS Device Name

{

Name (BUF, Buffer (0x10) {})

Store (L2M0, Index (BUF, Zero))

Store (L2M1, Index (BUF, One))

Store (L2M2, Index (BUF, 0x02))

Store (L2M3, Index (BUF, 0x03))

Store (L2M4, Index (BUF, 0x04))

Store (L2M5, Index (BUF, 0x05))

Store (L2M6, Index (BUF, 0x06))

Store (L2M7, Index (BUF, 0x07))

Store (L2M8, Index (BUF, 0x08))

Store (L2M9, Index (BUF, 0x09))

Store (L2MA, Index (BUF, 0x0A))

Store (L2MB, Index (BUF, 0x0B))

Store (L2MC, Index (BUF, 0x0C))

Store (L2MD, Index (BUF, 0x0D))

Store (L2ME, Index (BUF, 0x0E))

Store (L2MF, Index (BUF, 0x0F))

Return (ToString (BUF, Ones))

}

Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device

{

Name (PLDB, Package (0x01)

{

Buffer (0x14)

{

/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x69, 0x0E, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,

/* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF

}

})

CreateByteField (DerefOf (Index (PLDB, Zero)), 0x08, BPOS)

Store (L2PL, BPOS)

Return (PLDB)

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

If (LGreater (L2DI, Zero))

{

Store (IICB (L2A0, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L2DI, One))

{

Store (IICB (L2A1, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L2DI, 0x02))

{

Store (IICB (L2A2, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L2DI, 0x03))

{

Store (IICB (L2A3, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L2DI, 0x04))

{

Store (IICB (L2A4, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L2DI, 0x05))

{

Store (IICB (L2A5, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L2DI, 0x06))

{

Store (IICB (L2A6, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L2DI, 0x07))

{

Store (IICB (L2A7, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L2DI, 0x08))

{

Store (IICB (L2A8, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L2DI, 0x09))

{

Store (IICB (L2A9, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L2DI, 0x0A))

{

Store (IICB (L2AA, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L2DI, 0x0B))

{

Store (IICB (L2AB, L2BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

Return (Local0)

}

Method (SSDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x6C)

{

/* 0000 */ 0x00, 0x00, 0x69, 0x56, 0x39, 0x8A, 0xF7, 0x11,

/* 0008 */ 0xA9, 0x4E, 0x9C, 0x7D, 0x20, 0xEE, 0x0A, 0xB5,

/* 0010 */ 0xCA, 0x40, 0xA3, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0050 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,

/* 0058 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0060 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0068 */ 0x00, 0x00, 0x00, 0x00

})

Store (L2DV, Index (PAR, Zero))

Store (L2CV, Index (PAR, One))

Store (CDIV, Index (PAR, 0x18))

Store (L2LU, Index (PAR, 0x1C))

Store (L2NL, Index (PAR, 0x1D))

Store (L2EE, Index (PAR, 0x4E))

Store (L2VC, Index (PAR, 0x4F))

Store (L2FS, Index (PAR, 0x52))

Store (L2DG, Index (PAR, 0x54))

CreateDWordField (PAR, 0x56, DAT)

Store (L2CK, DAT)

Store (L2CL, Index (PAR, 0x5A))

Return (PAR)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x8F, 0xCE, 0x2A, 0x82, 0x14, 0x28, 0x74, 0x41,

/* 0008 */ 0xA5, 0x6B, 0x5F, 0x02, 0x9F, 0xE0, 0x79, 0xEE

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (BUF, Buffer (0x10) {})

Store (L2M0, Index (BUF, Zero))

Store (L2M1, Index (BUF, One))

Store (L2M2, Index (BUF, 0x02))

Store (L2M3, Index (BUF, 0x03))

Store (L2M4, Index (BUF, 0x04))

Store (L2M5, Index (BUF, 0x05))

Store (L2M6, Index (BUF, 0x06))

Store (L2M7, Index (BUF, 0x07))

Store (L2M8, Index (BUF, 0x08))

Store (L2M9, Index (BUF, 0x09))

Store (L2MA, Index (BUF, 0x0A))

Store (L2MB, Index (BUF, 0x0B))

Store (L2MC, Index (BUF, 0x0C))

Store (L2MD, Index (BUF, 0x0D))

Store (L2ME, Index (BUF, 0x0E))

Store (L2MF, Index (BUF, 0x0F))

Return (ToString (BUF, Ones))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xC8, 0xC5, 0x15, 0x58, 0x7D, 0xC4, 0x7B, 0x47,

/* 0008 */ 0x9A, 0x8D, 0x76, 0x17, 0x31, 0x76, 0x41, 0x4B

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (DSMB, Buffer (0x34) {})

CreateDWordField (DSMB, Zero, I2CC)

CreateDWordField (DSMB, 0x04, DEV0)

CreateDWordField (DSMB, 0x08, DEV1)

CreateDWordField (DSMB, 0x0C, DEV2)

CreateDWordField (DSMB, 0x10, DEV3)

CreateDWordField (DSMB, 0x14, DEV4)

CreateDWordField (DSMB, 0x18, DEV5)

CreateDWordField (DSMB, 0x1C, DEV6)

CreateDWordField (DSMB, 0x20, DEV7)

CreateDWordField (DSMB, 0x24, DEV8)

CreateDWordField (DSMB, 0x28, DEV9)

CreateDWordField (DSMB, 0x2C, DEVA)

CreateDWordField (DSMB, 0x30, DEVB)

Store (L2DI, I2CC)

Store (DSMI (L2D0, L2A0, Zero, L2BS), DEV0)

Store (DSMI (L2D1, L2A1, Zero, L2BS), DEV1)

Store (DSMI (L2D2, L2A2, Zero, L2BS), DEV2)

Store (DSMI (L2D3, L2A3, Zero, L2BS), DEV3)

Store (DSMI (L2D4, L2A4, Zero, L2BS), DEV4)

Store (DSMI (L2D5, L2A5, Zero, L2BS), DEV5)

Store (DSMI (L2D6, L2A6, Zero, L2BS), DEV6)

Store (DSMI (L2D7, L2A7, Zero, L2BS), DEV7)

Store (DSMI (L2D8, L2A8, Zero, L2BS), DEV8)

Store (DSMI (L2D9, L2A9, Zero, L2BS), DEV9)

Store (DSMI (L2DA, L2AA, Zero, L2BS), DEVA)

Store (DSMI (L2DB, L2AB, Zero, L2BS), DEVB)

Return (DSMB)

}

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x49, 0x75, 0x25, 0x26, 0x71, 0x92, 0xA4, 0x4C,

/* 0008 */ 0xBB, 0x43, 0xC4, 0x89, 0x9D, 0x5A, 0x48, 0x81

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (0x02)

{

0xFF, 0x1F

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (L2DI)

}

If (LEqual (Arg2, 0x02))

{

If (LGreater (L2DI, Zero))

{

Return (DSMI (L2D0, L2A0, Zero, L2BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x03))

{

If (LGreater (L2DI, One))

{

Return (DSMI (L2D1, L2A1, Zero, L2BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x04))

{

If (LGreater (L2DI, 0x02))

{

Return (DSMI (L2D2, L2A2, Zero, L2BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x05))

{

If (LGreater (L2DI, 0x03))

{

Return (DSMI (L2D3, L2A3, Zero, L2BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x06))

{

If (LGreater (L2DI, 0x04))

{

Return (DSMI (L2D4, L2A4, Zero, L2BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x07))

{

If (LGreater (L2DI, 0x05))

{

Return (DSMI (L2D5, L2A5, Zero, L2BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x08))

{

If (LGreater (L2DI, 0x06))

{

Return (DSMI (L2D6, L2A6, Zero, L2BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x08))

{

If (LGreater (L2DI, 0x07))

{

Return (DSMI (L2D7, L2A7, Zero, L2BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x09))

{

If (LGreater (L2DI, 0x08))

{

Return (DSMI (L2D8, L2A8, Zero, L2BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0A))

{

If (LGreater (L2DI, 0x09))

{

Return (DSMI (L2D9, L2A9, Zero, L2BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0B))

{

If (LGreater (L2DI, 0x0A))

{

Return (DSMI (L2DA, L2AA, Zero, L2BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0C))

{

If (LGreater (L2DI, 0x0B))

{

Return (DSMI (L2DB, L2AB, Zero, L2BS))

}

Else

{

Return (Zero)

}

Return (Zero)

}

Device (LNK3)

{

Name (_ADR, Zero) // _ADR: Address

Method (_DEP, 0, NotSerialized) // _DEP: Dependencies

{

If (L3EN)

{

If (LEqual (L3CL, Zero))

{

If (LGreater (C0TP, One))

{

Return (Package (0x01)

{

CLP0

})

}

If (LEqual (L3CL, One))

{

If (LGreater (C1TP, One))

{

Return (Package (0x01)

{

CLP1

})

}

If (LEqual (L3CL, 0x02))

{

If (LGreater (C2TP, One))

{

Return (Package (0x01)

{

CLP2

})

}

If (LEqual (L3CL, 0x03))

{

If (LGreater (C3TP, One))

{

Return (Package (0x01)

{

CLP3

})

}

Return (Package (0x01)

{

PCI0

})

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (L3EN)

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Name (_UID, 0x03) // _UID: Unique ID

Method (_HID, 0, NotSerialized) // _HID: Hardware ID

{

Return (HCID (0x03))

}

Method (_CID, 0, NotSerialized) // _CID: Compatible ID

{

Return (HCID (0x03))

}

Method (_DDN, 0, NotSerialized) // _DDN: DOS Device Name

{

Name (BUF, Buffer (0x10) {})

Store (L3M0, Index (BUF, Zero))

Store (L3M1, Index (BUF, One))

Store (L3M2, Index (BUF, 0x02))

Store (L3M3, Index (BUF, 0x03))

Store (L3M4, Index (BUF, 0x04))

Store (L3M5, Index (BUF, 0x05))

Store (L3M6, Index (BUF, 0x06))

Store (L3M7, Index (BUF, 0x07))

Store (L3M8, Index (BUF, 0x08))

Store (L3M9, Index (BUF, 0x09))

Store (L3MA, Index (BUF, 0x0A))

Store (L3MB, Index (BUF, 0x0B))

Store (L3MC, Index (BUF, 0x0C))

Store (L3MD, Index (BUF, 0x0D))

Store (L3ME, Index (BUF, 0x0E))

Store (L3MF, Index (BUF, 0x0F))

Return (ToString (BUF, Ones))

}

Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device

{

Name (PLDB, Package (0x01)

{

Buffer (0x14)

{

/* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x69, 0x0E, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,

/* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF

}

})

CreateByteField (DerefOf (Index (PLDB, Zero)), 0x08, BPOS)

Store (L3PL, BPOS)

Return (PLDB)

}

Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings

{

Store (ResourceTemplate ()

{

}, Local0)

If (LGreater (L3DI, Zero))

{

Store (IICB (L3A0, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L3DI, One))

{

Store (IICB (L3A1, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L3DI, 0x02))

{

Store (IICB (L3A2, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L3DI, 0x03))

{

Store (IICB (L3A3, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L3DI, 0x04))

{

Store (IICB (L3A4, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L3DI, 0x05))

{

Store (IICB (L3A5, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L3DI, 0x06))

{

Store (IICB (L3A6, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L3DI, 0x07))

{

Store (IICB (L3A7, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L3DI, 0x08))

{

Store (IICB (L3A8, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L3DI, 0x09))

{

Store (IICB (L3A9, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L3DI, 0x0A))

{

Store (IICB (L3AA, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

If (LGreater (L3DI, 0x0B))

{

Store (IICB (L3AB, L3BS), Local1)

ConcatenateResTemplate (Local0, Local1, Local0)

}

Return (Local0)

}

Method (SSDB, 0, NotSerialized)

{

Name (PAR, Buffer (0x6C)

{

/* 0000 */ 0x00, 0x00, 0x69, 0x56, 0x39, 0x8A, 0xF7, 0x11,

/* 0008 */ 0xA9, 0x4E, 0x9C, 0x7D, 0x20, 0xEE, 0x0A, 0xB5,

/* 0010 */ 0xCA, 0x40, 0xA3, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0050 */ 0x09, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,

/* 0058 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0060 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0068 */ 0x00, 0x00, 0x00, 0x00

})

Store (L3DV, Index (PAR, Zero))

Store (L3CV, Index (PAR, One))

Store (CDIV, Index (PAR, 0x18))

Store (L3LU, Index (PAR, 0x1C))

Store (L3NL, Index (PAR, 0x1D))

Store (L3EE, Index (PAR, 0x4E))

Store (L3VC, Index (PAR, 0x4F))

Store (L3FS, Index (PAR, 0x52))

Store (L3DG, Index (PAR, 0x54))

CreateDWordField (PAR, 0x56, DAT)

Store (L3CK, DAT)

Store (L3CL, Index (PAR, 0x5A))

Return (PAR)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x8F, 0xCE, 0x2A, 0x82, 0x14, 0x28, 0x74, 0x41,

/* 0008 */ 0xA5, 0x6B, 0x5F, 0x02, 0x9F, 0xE0, 0x79, 0xEE

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (BUF, Buffer (0x10) {})

Store (L3M0, Index (BUF, Zero))

Store (L3M1, Index (BUF, One))

Store (L3M2, Index (BUF, 0x02))

Store (L3M3, Index (BUF, 0x03))

Store (L3M4, Index (BUF, 0x04))

Store (L3M5, Index (BUF, 0x05))

Store (L3M6, Index (BUF, 0x06))

Store (L3M7, Index (BUF, 0x07))

Store (L3M8, Index (BUF, 0x08))

Store (L3M9, Index (BUF, 0x09))

Store (L3MA, Index (BUF, 0x0A))

Store (L3MB, Index (BUF, 0x0B))

Store (L3MC, Index (BUF, 0x0C))

Store (L3MD, Index (BUF, 0x0D))

Store (L3ME, Index (BUF, 0x0E))

Store (L3MF, Index (BUF, 0x0F))

Return (ToString (BUF, Ones))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xC8, 0xC5, 0x15, 0x58, 0x7D, 0xC4, 0x7B, 0x47,

/* 0008 */ 0x9A, 0x8D, 0x76, 0x17, 0x31, 0x76, 0x41, 0x4B

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Name (DSMB, Buffer (0x34) {})

CreateDWordField (DSMB, Zero, I2CC)

CreateDWordField (DSMB, 0x04, DEV0)

CreateDWordField (DSMB, 0x08, DEV1)

CreateDWordField (DSMB, 0x0C, DEV2)

CreateDWordField (DSMB, 0x10, DEV3)

CreateDWordField (DSMB, 0x14, DEV4)

CreateDWordField (DSMB, 0x18, DEV5)

CreateDWordField (DSMB, 0x1C, DEV6)

CreateDWordField (DSMB, 0x20, DEV7)

CreateDWordField (DSMB, 0x24, DEV8)

CreateDWordField (DSMB, 0x28, DEV9)

CreateDWordField (DSMB, 0x2C, DEVA)

CreateDWordField (DSMB, 0x30, DEVB)

Store (L3DI, I2CC)

Store (DSMI (L3D0, L3A0, Zero, L3BS), DEV0)

Store (DSMI (L3D1, L3A1, Zero, L3BS), DEV1)

Store (DSMI (L3D2, L3A2, Zero, L3BS), DEV2)

Store (DSMI (L3D3, L3A3, Zero, L3BS), DEV3)

Store (DSMI (L3D4, L3A4, Zero, L3BS), DEV4)

Store (DSMI (L3D5, L3A5, Zero, L3BS), DEV5)

Store (DSMI (L3D6, L3A6, Zero, L3BS), DEV6)

Store (DSMI (L3D7, L3A7, Zero, L3BS), DEV7)

Store (DSMI (L3D8, L3A8, Zero, L3BS), DEV8)

Store (DSMI (L3D9, L3A9, Zero, L3BS), DEV9)

Store (DSMI (L3DA, L3AA, Zero, L3BS), DEVA)

Store (DSMI (L3DB, L3AB, Zero, L3BS), DEVB)

Return (DSMB)

}

Return (Buffer (One)

{

0x00

})

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0x49, 0x75, 0x25, 0x26, 0x71, 0x92, 0xA4, 0x4C,

/* 0008 */ 0xBB, 0x43, 0xC4, 0x89, 0x9D, 0x5A, 0x48, 0x81

}))

{

If (LEqual (Arg2, Zero))

{

If (LEqual (Arg1, Zero))

{

Return (Buffer (0x02)

{

0xFF, 0x1F

})

}

Else

{

Return (Buffer (One)

{

0x01

})

}

If (LEqual (Arg2, One))

{

Return (L3DI)

}

If (LEqual (Arg2, 0x02))

{

If (LGreater (L3DI, Zero))

{

Return (DSMI (L3D0, L3A0, Zero, L3BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x03))

{

If (LGreater (L3DI, One))

{

Return (DSMI (L3D1, L3A1, Zero, L3BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x04))

{

If (LGreater (L3DI, 0x02))

{

Return (DSMI (L3D2, L3A2, Zero, L3BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x05))

{

If (LGreater (L3DI, 0x03))

{

Return (DSMI (L3D3, L3A3, Zero, L3BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x06))

{

If (LGreater (L3DI, 0x04))

{

Return (DSMI (L3D4, L3A4, Zero, L3BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x07))

{

If (LGreater (L3DI, 0x05))

{

Return (DSMI (L3D5, L3A5, Zero, L3BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x08))

{

If (LGreater (L3DI, 0x06))

{

Return (DSMI (L3D6, L3A6, Zero, L3BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x08))

{

If (LGreater (L3DI, 0x07))

{

Return (DSMI (L3D7, L3A7, Zero, L3BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x09))

{

If (LGreater (L3DI, 0x08))

{

Return (DSMI (L3D8, L3A8, Zero, L3BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0A))

{

If (LGreater (L3DI, 0x09))

{

Return (DSMI (L3D9, L3A9, Zero, L3BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0B))

{

If (LGreater (L3DI, 0x0A))

{

Return (DSMI (L3DA, L3AA, Zero, L3BS))

}

Else

{

Return (Zero)

}

If (LEqual (Arg2, 0x0C))

{

If (LGreater (L3DI, 0x0B))

{

Return (DSMI (L3DB, L3AB, Zero, L3BS))

}

Else

{

Return (Zero)

}

Return (Zero)

}

Scope (_SB)

{

Device (WCT0)

{

Name (_HID, EisaId ("IWC0001")) // _HID: Hardware ID

Name (_UID, Zero) // _UID: Unique ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (WIFC, One))

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Method (PCMD, 1, NotSerialized)

{

Store (Arg0, ^^PCI0.LPCB.H_EC.IWCW)

^^PCI0.LPCB.H_EC.ECMD (0xE1)

}

Method (ITPW, 1, NotSerialized)

{

Store (Arg0, ^^PCI0.LPCB.H_EC.IWCW)

^^PCI0.LPCB.H_EC.ECMD (0xE1)

}

Method (ITPR, 0, NotSerialized)

{

Return (^^PCI0.LPCB.H_EC.IWCR)

}

Scope (_SB.PCI0.LPCB)

{

Device (FWHD)

{

Name (_HID, EisaId ("INT0800")) // _HID: Hardware ID

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

Memory32Fixed (ReadOnly,

0xFF000000, // Address Base

0x01000000, // Address Length

)

})

}

Device (HPET)

{

Name (_HID, EisaId ("PNP0103")) // _HID: Hardware ID

Name (_CID, EisaId ("PNP0C01")) // _CID: Compatible ID

Name (_STA, 0x0F) // _STA: Status

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

IRQNoFlags ()

{0,8,11}

Memory32Fixed (ReadWrite,

0xFED00000, // Address Base

0x00000400, // Address Length

)

})

}

Device (IPIC)

{

Name (_HID, EisaId ("PNP0000")) // _HID: Hardware ID

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

IO (Decode16,

0x0020, // Range Minimum

0x0020, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x0024, // Range Minimum

0x0024, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x0028, // Range Minimum

0x0028, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x002C, // Range Minimum

0x002C, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x0030, // Range Minimum

0x0030, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x0034, // Range Minimum

0x0034, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x0038, // Range Minimum

0x0038, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x003C, // Range Minimum

0x003C, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00A0, // Range Minimum

0x00A0, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00A4, // Range Minimum

0x00A4, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00A8, // Range Minimum

0x00A8, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00AC, // Range Minimum

0x00AC, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00B0, // Range Minimum

0x00B0, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00B4, // Range Minimum

0x00B4, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00B8, // Range Minimum

0x00B8, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00BC, // Range Minimum

0x00BC, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x04D0, // Range Minimum

0x04D0, // Range Maximum

0x01, // Alignment

0x02, // Length

)

})

}

Device (MATH)

{

Name (_HID, EisaId ("PNP0C04")) // _HID: Hardware ID

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

IO (Decode16,

0x00F0, // Range Minimum

0x00F0, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IRQNoFlags ()

{13}

})

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (PCHV (), SPTH))

{

Return (0x1F)

}

Else

{

Return (Zero)

}

Device (LDRC)

{

Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID

Name (_UID, 0x02) // _UID: Unique ID

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

IO (Decode16,

0x002E, // Range Minimum

0x002E, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x004E, // Range Minimum

0x004E, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x0061, // Range Minimum

0x0061, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0x0063, // Range Minimum

0x0063, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0x0065, // Range Minimum

0x0065, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0x0067, // Range Minimum

0x0067, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0x0070, // Range Minimum

0x0070, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0x0080, // Range Minimum

0x0080, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0x0092, // Range Minimum

0x0092, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0x00B2, // Range Minimum

0x00B2, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x0680, // Range Minimum

0x0680, // Range Maximum

0x01, // Alignment

0x20, // Length

)

IO (Decode16,

0xFFFF, // Range Minimum

0xFFFF, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0xFFFF, // Range Minimum

0xFFFF, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0xFFFF, // Range Minimum

0xFFFF, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0x1800, // Range Minimum

0x1800, // Range Maximum

0x01, // Alignment

0xFF, // Length

)

IO (Decode16,

0x164E, // Range Minimum

0x164E, // Range Maximum

0x01, // Alignment

0x02, // Length

)

})

}

Device (LDR2)

{

Name (_HID, EisaId ("PNP0C02")) // _HID: Hardware ID

Name (_UID, 0x05) // _UID: Unique ID

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

IO (Decode16,

0x0800, // Range Minimum

0x0800, // Range Maximum

0x01, // Alignment

0x80, // Length

)

})

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (PCHV (), SPTH))

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Device (RTC)

{

Name (_HID, EisaId ("PNP0B00")) // _HID: Hardware ID

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

IO (Decode16,

0x0070, // Range Minimum

0x0070, // Range Maximum

0x00, // Alignment

0x02, // Length

)

})

}

Device (TIMR)

{

Name (_HID, EisaId ("PNP0100")) // _HID: Hardware ID

Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings

{

IO (Decode16,

0x0040, // Range Minimum

0x0040, // Range Maximum

0x01, // Alignment

0x04, // Length

)

IO (Decode16,

0x0050, // Range Minimum

0x0050, // Range Maximum

0x10, // Alignment

0x04, // Length

)

})

}

Device (CWDT)

{

Name (_HID, EisaId ("INT3F0D")) // _HID: Hardware ID

Name (_CID, EisaId ("PNP0C02")) // _CID: Compatible ID

Name (BUF0, ResourceTemplate ()

{

IO (Decode16,

0x1854, // Range Minimum

0x1854, // Range Maximum

0x04, // Alignment

0x04, // Length

)

})

Method (_STA, 0, Serialized) // _STA: Status

{

Return (0x0F)

}

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

Return (BUF0)

}

Device (ALSD)

{

Name (_HID, "ACPI0008") // _HID: Hardware ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (ALSE, 0x02))

{

Return (0x0B)

}

Return (Zero)

}

Method (_ALI, 0, NotSerialized) // _ALI: Ambient Light Illuminance

{

Return (Or (ShiftLeft (LHIH, 0x08), LLOW))

}

Name (_ALR, Package (0x05) // _ALR: Ambient Light Response

{

Package (0x02)

{

0x46,

Zero

Package (0x02)

{

0x49,

0x0A

Package (0x02)

{

0x55,

0x50

Package (0x02)

{

0x64,

0x012C

Package (0x02)

{

0x96,

0x03E8

}

})

}

Scope (_SB)

{

Device (PNLF)

{

Name (_HID, EisaId ("APP0002")) // _HID: Hardware ID

Name (_CID, "backlight") // _CID: Compatible ID

Name (_UID, 0x0A) // _UID: Unique ID

Name (_STA, 0x0B) // _STA: Status

}

Device (PWRB)

{

Name (_HID, EisaId ("PNP0C0C")) // _HID: Hardware ID

Name (PBST, One)

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (0x0F)

}

Scope (_SB.PCI0.LPCB)

{

Device (H_EC)

{

Name (_HID, EisaId ("PNP0C09")) // _HID: Hardware ID

Name (_UID, One) // _UID: Unique ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Store (0x03, ^^^GFX0.CLID)

Return (Zero)

}

Name (B1CC, Zero)

Name (B1ST, Zero)

Name (B2CC, Zero)

Name (B2ST, Zero)

Name (CFAN, Zero)

Name (CMDR, Zero)

Name (DOCK, Zero)

Name (EJET, Zero)

Name (MCAP, Zero)

Name (PLMX, Zero)

Name (PECH, Zero)

Name (PECL, Zero)

Name (PENV, Zero)

Name (PINV, Zero)

Name (PPSH, Zero)

Name (PPSL, Zero)

Name (PSTP, Zero)

Name (RPWR, Zero)

Name (LIDS, Zero)

Name (LSTE, Zero)

Name (SLPC, Zero)

Name (VPWR, Zero)

Name (WTMS, Zero)

Name (AWT2, Zero)

Name (AWT1, Zero)

Name (AWT0, Zero)

Name (DLED, Zero)

Name (IBT1, Zero)

Name (ECAV, Zero)

Name (SPT2, Zero)

Name (PB10, Zero)

Name (IWCW, Zero)

Name (IWCR, Zero)

Method (ECMD, 1, Serialized)

{

If (ECON)

{

While (CMDR)

{

Stall (0x14)

}

Store (Arg0, CMDR)

}

Method (ECRD, 1, Serialized)

{

Return (DerefOf (Arg0))

}

Method (ECWT, 2, Serialized)

{

Store (Arg0, Arg1)

}

Device (BAT0)

{

Name (_HID, EisaId ("PNP0C0A")) // _HID: Hardware ID

Name (_UID, Zero) // _UID: Unique ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (Zero)

}

Scope (\)

{

Field (GNVS, AnyAcc, Lock, Preserve)

{

Offset (0x1E),

BNUM, 8,

Offset (0x20),

B1SC, 8,

Offset (0x23),

B1SS, 8

}

Device (BAT1)

{

Name (_HID, EisaId ("PNP0C0A")) // _HID: Hardware ID

Name (_UID, One) // _UID: Unique ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (Zero)

}

Scope (\)

{

Field (GNVS, AnyAcc, Lock, Preserve)

{

Offset (0x21),

B2SC, 8,

Offset (0x24),

B2SS, 8

}

Device (BAT2)

{

Name (_HID, EisaId ("PNP0C0A")) // _HID: Hardware ID

Name (_UID, 0x02) // _UID: Unique ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (Zero)

}

Device (_SB.PCI0.DOCK)

{

Name (_HID, "ABCD0000") // _HID: Hardware ID

Name (_CID, EisaId ("PNP0C15")) // _CID: Compatible ID

Name (_UID, 0x02) // _UID: Unique ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (Zero)

}

Scope (_SB)

{

Method (PWPR, 0, Serialized)

{

}

Method (PWRR, 0, Serialized)

{

}

Device (LID0)

{

Name (_HID, EisaId ("PNP0C0D")) // _HID: Hardware ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

Return (Zero)

}

Device (_SB.TPM)

{

Method (_HID, 0, NotSerialized) // _HID: Hardware ID

{

If (TCMF)

{

Return (0x01013469)

}

Else

{

If (LEqual (TTDP, Zero))

{

Return (0x310CD041)

}

Else

{

Return ("MSFT0101")

}

Method (_STR, 0, NotSerialized) // _STR: Description String

{

If (LEqual (TTDP, Zero))

{

Return (Unicode ("TPM 1.2 Device"))

}

Else

{

Return (Unicode ("TPM 2.0 Device"))

}

Name (_UID, One) // _UID: Unique ID

Name (CRST, ResourceTemplate ()

{

Memory32Fixed (ReadOnly,

0x00000000, // Address Base

0x00001000, // Address Length

_Y3D)

Memory32Fixed (ReadOnly,

0xFED70000, // Address Base

0x00001000, // Address Length

_Y3E)

})

Name (CRSD, ResourceTemplate ()

{

Memory32Fixed (ReadOnly,

0xFED40000, // Address Base

0x00001000, // Address Length

_Y3F)

})

Name (CRSI, ResourceTemplate ()

{

Memory32Fixed (ReadOnly,

0xFED40000, // Address Base

0x00001000, // Address Length

_Y40)

})

Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings

{

If (LEqual (AMDT, One))

{

CreateDWordField (CRST, \_SB.TPM._Y3D._BAS, MTFB) // _BAS: Base Address

CreateDWordField (CRST, \_SB.TPM._Y3D._LEN, LTFB) // _LEN: Length

Store (TPMB, MTFB)

Store (0x1000, LTFB)

CreateDWordField (CRST, \_SB.TPM._Y3E._BAS, MTFC) // _BAS: Base Address

CreateDWordField (CRST, \_SB.TPM._Y3E._LEN, LTFC) // _LEN: Length

Store (TPMC, MTFC)

Store (0x1000, LTFC)

Return (CRST)

}

Else

{

If (LEqual (DTPT, One))

{

CreateDWordField (CRSD, \_SB.TPM._Y3F._BAS, MTFE) // _BAS: Base Address

CreateDWordField (CRSD, \_SB.TPM._Y3F._LEN, LTFE) // _LEN: Length

Store (0xFED40000, MTFE)

Store (0x0880, LTFE)

Return (CRSD)

}

Else

{

If (LEqual (TTPF, One))

{

CreateDWordField (CRSI, \_SB.TPM._Y40._BAS, MTFD) // _BAS: Base Address

CreateDWordField (CRSI, \_SB.TPM._Y40._LEN, LTFD) // _LEN: Length

Store (0xFED40000, MTFD)

Store (0x5000, LTFD)

Return (CRSI)

}

Else

{

If (LEqual (TTPF, Zero))

{

CreateDWordField (CRSI, \_SB.TPM._Y40._BAS, MTFF) // _BAS: Base Address

Store (TPMM, MTFF)

Return (CRSI)

}

OperationRegion (TMMB, SystemMemory, 0xFED40000, 0x5000)

Field (TMMB, ByteAcc, Lock, Preserve)

{

Offset (0x04),

LCST, 32,

Offset (0x40),

CREQ, 32,

CSTS, 32,

Offset (0x4C),

SCMD, 32

}

OperationRegion (CRBD, SystemMemory, TPMM, 0x48)

Field (CRBD, AnyAcc, NoLock, Preserve)

{

Offset (0x04),

HERR, 32,

Offset (0x40),

HCMD, 32,

HSTS, 32

}

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (TTDP, Zero))

{

If (TPMF)

{

Return (0x0F)

}

Return (Zero)

}

Else

{

If (LEqual (TTDP, One))

{

If (TPMF)

{

Return (0x0F)

}

Return (Zero)

}

Method (STRT, 3, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

OperationRegion (TPMR, SystemMemory, FTPM, 0x1000)

Field (TPMR, AnyAcc, NoLock, Preserve)

{

Offset (0x04),

FERR, 32,

Offset (0x0C),

BEGN, 32

}

Name (TIMR, Zero)

While (One)

{

Store (ToInteger (Arg1), _T_0)

If (LEqual (_T_0, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

If (LEqual (_T_0, One))

{

Store (Zero, TIMR)

If (LEqual (AMDT, One))

{

While (LAnd (LEqual (BEGN, One), LLess (TIMR, 0x0200)))

{

If (LEqual (BEGN, One))

{

Sleep (One)

Increment (TIMR)

}

Return (Zero)

}

Else

{

If (LEqual (Or (And (HSTS, 0x02), And (HSTS, One

)), 0x03))

{

Store (One, HCMD)

}

Else

{

Store (One, FERR)

Store (Zero, BEGN)

}

Return (Zero)

}

Break

}

Return (One)

}

Method (CRYF, 3, Serialized)

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

While (One)

{

Store (ToInteger (Arg1), _T_0)

If (LEqual (_T_0, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

If (LEqual (_T_0, One))

{

Name (TPMV, Package (0x02)

{

One,

Package (0x02)

{

One,

0x20

}

})

If (LEqual (_STA (), Zero))

{

Return (Package (0x01)

{

Zero

})

}

Return (TPMV)

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Scope (_SB.TPM)

{

OperationRegion (ASMI, SystemIO, SMIA, One)

Field (ASMI, ByteAcc, NoLock, Preserve)

{

INQ, 8

}

OperationRegion (BSMI, SystemIO, SMIB, One)

Field (BSMI, ByteAcc, NoLock, Preserve)

{

DAT, 8

}

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xA6, 0xFA, 0xDD, 0x3D, 0x1B, 0x36, 0xB4, 0x4E,

/* 0008 */ 0xA4, 0x24, 0x8D, 0x10, 0x08, 0x9D, 0x16, 0x53

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Return (Buffer (0x02)

{

0xFF, 0x01

})

}

Else

{

If (LEqual (_T_0, One))

{

Return ("1.2")

}

Else

{

If (LEqual (_T_0, 0x02))

{

ToInteger (DerefOf (Index (Arg3, Zero)), TMF2)

Store (0x12, TMF1)

Store (TMF1, DAT)

Store (OFST, INQ)

If (LEqual (DAT, 0xFF))

{

Return (0x02)

}

Store (TMF2, DAT)

Store (OFST, INQ)

If (LEqual (DAT, 0xFF))

{

Return (0x02)

}

If (LEqual (DAT, 0xF1))

{

Return (One)

}

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x03))

{

Name (PPI1, Package (0x02)

{

Zero,

Zero

})

Store (0x11, DAT)

Store (OFST, INQ)

If (LEqual (DAT, 0xFF))

{

Return (One)

}

Store (DAT, Index (PPI1, One))

Return (PPI1)

}

Else

{

If (LEqual (_T_0, 0x04))

{

Return (TRST)

}

Else

{

If (LEqual (_T_0, 0x05))

{

Name (PPI2, Package (0x03)

{

Zero,

Zero

})

Store (0x21, DAT)

Store (OFST, INQ)

Store (DAT, Index (PPI2, One))

If (LEqual (DAT, 0xFF))

{

Return (0x02)

}

Store (0x31, DAT)

Store (OFST, INQ)

If (LEqual (DAT, 0xFF))

{

Return (0x02)

}

If (LEqual (DAT, 0xF0))

{

Store (0x51, DAT)

Store (OFST, INQ)

If (LEqual (DAT, 0xFF))

{

Store (0xFFFFFFF0, Index (PPI2, 0x02))

Return (PPI2)

}

Else

{

If (LEqual (DAT, 0xF1))

{

Store (0x51, DAT)

Store (OFST, INQ)

If (LEqual (DAT, 0xFF))

{

Store (0xFFFFFFF1, Index (PPI2, 0x02))

Return (PPI2)

}

Else

{

Store (DAT, Index (PPI2, 0x02))

}

Return (PPI2)

}

Else

{

If (LEqual (_T_0, 0x06))

{

Return (0x03)

}

Else

{

If (LEqual (_T_0, 0x07))

{

ToInteger (DerefOf (Index (Arg3, Zero)), TMF2)

Store (0x12, TMF1)

Store (TMF1, DAT)

Store (OFST, INQ)

If (LEqual (DAT, 0xFF))

{

Return (0x02)

}

Store (TMF2, DAT)

Store (OFST, INQ)

If (LEqual (DAT, 0xFF))

{

Return (0x02)

}

If (LEqual (DAT, 0xF1))

{

Return (One)

}

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

ToInteger (DerefOf (Index (Arg3, Zero)), TMF2)

Store (0x43, TMF1)

Store (TMF1, DAT)

Store (OFST, INQ)

Store (TMF2, DAT)

Store (OFST, INQ)

Return (DAT)

}

Else

{

}

Break

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xED, 0x54, 0x60, 0x37, 0x13, 0xCC, 0x75, 0x46,

/* 0008 */ 0x90, 0x1C, 0x47, 0x56, 0xD7, 0xF2, 0xD4, 0x5D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_1)

If (LEqual (_T_1, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Else

{

If (LEqual (_T_1, One))

{

Store (0x22, TMF1)

Store (TMF1, DAT)

Store (OFST, INQ)

If (LEqual (DAT, 0xFF))

{

Return (0x02)

}

ToInteger (DerefOf (Index (Arg3, Zero)), TMF1)

Store (TMF1, DAT)

Store (OFST, INQ)

If (LEqual (DAT, 0xFF))

{

Return (0x02)

}

Return (Zero)

}

Else

{

}

Break

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xA5, 0x16, 0x8E, 0xCF, 0xE8, 0xC1, 0x25, 0x4E,

/* 0008 */ 0xB7, 0x12, 0x4F, 0x54, 0xA9, 0x67, 0x02, 0xC8

}))

{

Return (CRYF (Arg1, Arg2, Arg3))

}

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xAB, 0x6C, 0xBF, 0x6B, 0x63, 0x54, 0x14, 0x47,

/* 0008 */ 0xB7, 0xCD, 0xF0, 0x20, 0x3C, 0x03, 0x68, 0xD4

}))

{

Return (STRT (Arg1, Arg2, Arg3))

}

Return (Buffer (One)

{

0x00

})

}

Name (GNLD, 0x02)

Name (OBDP, 0x02)

Method (DBGL, 1, NotSerialized)

{

If (LEqual (Arg0, One))

{

\_SB.PCI0.LPCB.SIO1.ENFG (0x08)

Or (\_SB.PCI0.LPCB.SIO1.SCFF, 0x02, \_SB.PCI0.LPCB.SIO1.SCFF)

\_SB.PCI0.LPCB.SIO1.EXFG ()

}

Else

{

\_SB.PCI0.LPCB.SIO1.ENFG (0x08)

And (\_SB.PCI0.LPCB.SIO1.SCFF, 0xFD, \_SB.PCI0.LPCB.SIO1.SCFF)

\_SB.PCI0.LPCB.SIO1.EXFG ()

}

Method (SYSL, 1, NotSerialized)

{

If (LEqual (Arg0, One))

{

\_SB.PCI0.LPCB.SIO1.ENFG (0x08)

And (\_SB.PCI0.LPCB.SIO1.OPT0, 0x7F, \_SB.PCI0.LPCB.SIO1.OPT0)

\_SB.PCI0.LPCB.SIO1.EXFG ()

}

Else

{

\_SB.PCI0.LPCB.SIO1.ENFG (0x08)

Or (\_SB.PCI0.LPCB.SIO1.OPT0, 0x80, \_SB.PCI0.LPCB.SIO1.OPT0)

\_SB.PCI0.LPCB.SIO1.EXFG ()

}

Method (LEDS, 1, NotSerialized)

{

If (LEqual (OBDP, 0x02))

{

DBGL (One)

Store (Arg0, P80H)

}

If (LEqual (GNLD, One))

{

\_SB.PCI0.LPCB.SIO1.ENFG (0x0B)

And (\_SB.PCI0.LPCB.SIO1.OPT7, Zero, \_SB.PCI0.LPCB.SIO1.OPT7)

\_SB.PCI0.LPCB.SIO1.EXFG ()

}

Method (LEDW, 1, NotSerialized)

{

If (LEqual (OBDP, 0x02))

{

DBGL (Zero)

ShiftLeft (Arg0, 0x04, P80H)

}

If (LEqual (GNLD, 0x02))

{

SYSL (Zero)

\_SB.PCI0.LPCB.SIO1.ENFG (0x0B)

And (\_SB.PCI0.LPCB.SIO1.OPT7, Zero, \_SB.PCI0.LPCB.SIO1.OPT7)

Or (\_SB.PCI0.LPCB.SIO1.OPT7, 0x87, \_SB.PCI0.LPCB.SIO1.OPT7)

\_SB.PCI0.LPCB.SIO1.ENFG (0x09)

Or (\_SB.PCI0.LPCB.SIO1.ACTR, 0x14, \_SB.PCI0.LPCB.SIO1.ACTR)

\_SB.PCI0.LPCB.SIO1.EXFG ()

}

If (LEqual (GNLD, One))

{

\_SB.PCI0.LPCB.SIO1.ENFG (0x0B)

And (\_SB.PCI0.LPCB.SIO1.OPT7, Zero, \_SB.PCI0.LPCB.SIO1.OPT7)

\_SB.PCI0.LPCB.SIO1.EXFG ()

}

Scope (_GPE)

{

Method (_L17, 0, NotSerialized) // _Lxx: Level-Triggered GPE

{

Notify (\_SB.PWRB, 0x02)

}

Method (SIOS, 1, NotSerialized)

{

}

Method (SIOW, 1, NotSerialized)

{

Notify (\_SB.PWRB, 0x02)

}

Scope (_SB.PCI0)

{

Name (SLIC, Buffer (0x9E)

{

})

Device (WMI1)

{

Name (_HID, "PNP0C14") // _HID: Hardware ID

Name (_UID, "MXM2") // _UID: Unique ID

Name (_WDG, Buffer (0x14)

{

/* 0000 */ 0x3C, 0x5C, 0xCB, 0xF6, 0xAE, 0x9C, 0xBD, 0x4E,

/* 0008 */ 0xB5, 0x77, 0x93, 0x1E, 0xA3, 0x2A, 0x2C, 0xC0,

/* 0010 */ 0x4D, 0x58, 0x01, 0x02

})

Method (WMMX, 3, NotSerialized)

{

CreateDWordField (Arg2, Zero, FUNC)

If (LEqual (FUNC, 0x41494C53))

{

Return (SLIC)

}

Return (Zero)

}

Method (DTGP, 5, NotSerialized)

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xC6, 0xB7, 0xB5, 0xA0, 0x18, 0x13, 0x1C, 0x44,

/* 0008 */ 0xB0, 0xC9, 0xFE, 0x69, 0x5E, 0xAF, 0x94, 0x9B

}))

{

If (LEqual (Arg1, One))

{

If (LEqual (Arg2, Zero))

{

Store (Buffer (One)

{

0x03

}, Arg4)

Return (One)

}

If (LEqual (Arg2, One))

{

Return (One)

}

Store (Buffer (One)

{

0x00

}, Arg4)

Return (Zero)

}

Fixed ACPI Description Table

View File FACP.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [FACP]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]

[004h 0004 4] Table Length : 000000F4

[008h 0008 1] Revision : 04

[009h 0009 1] Checksum : BC

[00Ah 0010 6] Oem ID : "Apple "

[010h 0016 8] Oem Table ID : "A M I "

[018h 0024 4] Oem Revision : 01072009

[01Ch 0028 4] Asl Compiler ID : "AMI "

[020h 0032 4] Asl Compiler Revision : 00010013

[024h 0036 4] FACS Address : 87F99F80

[028h 0040 4] DSDT Address : 87FB9000

[02Ch 0044 1] Model : 00

[02Dh 0045 1] PM Profile : 01 [Desktop]

[02Eh 0046 2] SCI Interrupt : 0009

[030h 0048 4] SMI Command Port : 000000B2

[034h 0052 1] ACPI Enable Value : A0

[035h 0053 1] ACPI Disable Value : A1

[036h 0054 1] S4BIOS Command : 00

[037h 0055 1] P-State Control : 00

[038h 0056 4] PM1A Event Block Address : 00001800

[03Ch 0060 4] PM1B Event Block Address : 00000000

[040h 0064 4] PM1A Control Block Address : 00001804

[044h 0068 4] PM1B Control Block Address : 00000000

[048h 0072 4] PM2 Control Block Address : 00001850

[04Ch 0076 4] PM Timer Block Address : 00001808

[050h 0080 4] GPE0 Block Address : 00001880

[054h 0084 4] GPE1 Block Address : 00000000

[058h 0088 1] PM1 Event Block Length : 04

[059h 0089 1] PM1 Control Block Length : 02

[05Ah 0090 1] PM2 Control Block Length : 01

[05Bh 0091 1] PM Timer Block Length : 04

[05Ch 0092 1] GPE0 Block Length : 20

[05Dh 0093 1] GPE1 Block Length : 00

[05Eh 0094 1] GPE1 Base Offset : 10

[05Fh 0095 1] _CST Support : 85

[060h 0096 2] C2 Latency : 0065

[062h 0098 2] C3 Latency : 00FA

[064h 0100 2] CPU Cache Size : 0400

[066h 0102 2] Cache Flush Stride : 0010

[068h 0104 1] Duty Cycle Offset : 00

[069h 0105 1] Duty Cycle Width : 00

[06Ah 0106 1] RTC Day Alarm Index : 0D

[06Bh 0107 1] RTC Month Alarm Index : 00

[06Ch 0108 1] RTC Century Index : 32

[06Dh 0109 2] Boot Flags (decoded below) : 0003

Legacy Devices Supported (V2) : 1

8042 Present on ports 60/64 (V2) : 1

VGA Not Present (V4) : 0

MSI Not Supported (V4) : 0

PCIe ASPM Not Supported (V4) : 0

CMOS RTC Not Present (V5) : 0

[06Fh 0111 1] Reserved : 00

[070h 0112 4] Flags (decoded below) : 000384A5

WBINVD instruction is operational (V1) : 1

WBINVD flushes all caches (V1) : 0

All CPUs support C1 (V1) : 1

C2 works on MP system (V1) : 0

Control Method Power Button (V1) : 0

Control Method Sleep Button (V1) : 1

RTC wake not in fixed reg space (V1) : 0

RTC can wake system from S4 (V1) : 1

32-bit PM Timer (V1) : 0

Docking Supported (V1) : 0

Reset Register Supported (V2) : 1

Sealed Case (V3) : 0

Headless - No Video (V3) : 0

Use native instr after SLP_TYPx (V3) : 0

PCIEXP_WAK Bits Supported (V4) : 0

Use Platform Timer (V4) : 1

RTC_STS valid on S4 wake (V4) : 1

Remote Power-on capable (V4) : 1

Use APIC Cluster Model (V4) : 0

Use APIC Physical Destination Mode (V4) : 0

Hardware Reduced (V5) : 0

Low Power S0 Idle (V5) : 0

[074h 0116 12] Reset Register : [Generic Address Structure]

[074h 0116 1] Space ID : 01 [SystemIO]

[075h 0117 1] Bit Width : 08

[076h 0118 1] Bit Offset : 00

[077h 0119 1] Encoded Access Width : 01 [Byte Access:8]

[078h 0120 8] Address : 0000000000000CF9

[080h 0128 1] Value to cause reset : 06

[081h 0129 3] Reserved : 000000

[084h 0132 8] FACS Address : 0000000087F99F80

[08Ch 0140 8] DSDT Address : 0000000087FB9000

[094h 0148 12] PM1A Event Block : [Generic Address Structure]

[094h 0148 1] Space ID : 01 [SystemIO]

[095h 0149 1] Bit Width : 20

[096h 0150 1] Bit Offset : 00

[097h 0151 1] Encoded Access Width : 03 [DWord Access:32]

[098h 0152 8] Address : 0000000000001800

[0A0h 0160 12] PM1B Event Block : [Generic Address Structure]

[0A0h 0160 1] Space ID : 01 [SystemIO]

[0A1h 0161 1] Bit Width : 00

[0A2h 0162 1] Bit Offset : 00

[0A3h 0163 1] Encoded Access Width : 00 [Undefined/Legacy]

[0A4h 0164 8] Address : 0000000000000000

[0ACh 0172 12] PM1A Control Block : [Generic Address Structure]

[0ACh 0172 1] Space ID : 01 [SystemIO]

[0ADh 0173 1] Bit Width : 10

[0AEh 0174 1] Bit Offset : 00

[0AFh 0175 1] Encoded Access Width : 02 [Word Access:16]

[0B0h 0176 8] Address : 0000000000001804

[0B8h 0184 12] PM1B Control Block : [Generic Address Structure]

[0B8h 0184 1] Space ID : 01 [SystemIO]

[0B9h 0185 1] Bit Width : 00

[0BAh 0186 1] Bit Offset : 00

[0BBh 0187 1] Encoded Access Width : 00 [Undefined/Legacy]

[0BCh 0188 8] Address : 0000000000000000

[0C4h 0196 12] PM2 Control Block : [Generic Address Structure]

[0C4h 0196 1] Space ID : 01 [SystemIO]

[0C5h 0197 1] Bit Width : 08

[0C6h 0198 1] Bit Offset : 00

[0C7h 0199 1] Encoded Access Width : 00 [Undefined/Legacy]

[0C8h 0200 8] Address : 0000000000001850

[0D0h 0208 12] PM Timer Block : [Generic Address Structure]

[0D0h 0208 1] Space ID : 01 [SystemIO]

[0D1h 0209 1] Bit Width : 20

[0D2h 0210 1] Bit Offset : 00

[0D3h 0211 1] Encoded Access Width : 03 [DWord Access:32]

[0D4h 0212 8] Address : 0000000000001808

[0DCh 0220 12] GPE0 Block : [Generic Address Structure]

[0DCh 0220 1] Space ID : 01 [SystemIO]

[0DDh 0221 1] Bit Width : 80

[0DEh 0222 1] Bit Offset : 00

[0DFh 0223 1] Encoded Access Width : 04 [QWord Access:64]

[0E0h 0224 8] Address : 0000000000001880

[0E8h 0232 12] GPE1 Block : [Generic Address Structure]

[0E8h 0232 1] Space ID : 01 [SystemIO]

[0E9h 0233 1] Bit Width : 00

[0EAh 0234 1] Bit Offset : 00

[0EBh 0235 1] Encoded Access Width : 04 [QWord Access:64]

[0ECh 0236 8] Address : 0000000000000000

Raw Table Data: Length 244 (0xF4)

0000: 46 41 43 50 F4 00 00 00 04 BC 41 70 70 6C 65 20 FACP......Apple

0010: 41 20 4D 20 49 20 00 00 09 20 07 01 41 4D 49 20 A M I ... ..AMI

0020: 13 00 01 00 80 9F F9 87 00 90 FB 87 00 01 09 00 ................

0030: B2 00 00 00 A0 A1 00 00 00 18 00 00 00 00 00 00 ................

0040: 04 18 00 00 00 00 00 00 50 18 00 00 08 18 00 00 ........P.......

0050: 80 18 00 00 00 00 00 00 04 02 01 04 20 00 10 85 ............ ...

0060: 65 00 FA 00 00 04 10 00 00 00 0D 00 32 03 00 00 e...........2...

0070: A5 84 03 00 01 08 00 01 F9 0C 00 00 00 00 00 00 ................

0080: 06 00 00 00 80 9F F9 87 00 00 00 00 00 90 FB 87 ................

0090: 00 00 00 00 01 20 00 03 00 18 00 00 00 00 00 00 ..... ..........

00A0: 01 00 00 00 00 00 00 00 00 00 00 00 01 10 00 02 ................

00B0: 04 18 00 00 00 00 00 00 01 00 00 00 00 00 00 00 ................

00C0: 00 00 00 00 01 08 00 00 50 18 00 00 00 00 00 00 ........P.......

00D0: 01 20 00 03 08 18 00 00 00 00 00 00 01 80 00 04 . ..............

00E0: 80 18 00 00 00 00 00 00 01 00 00 04 00 00 00 00 ................

00F0: 00 00 00 00 ....

Firmware ACPI Control Structure

View File FACS.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [FACS]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "FACS"

[004h 0004 4] Length : 00000040

[008h 0008 4] Hardware Signature : 3E8764FD

[00Ch 0012 4] 32 Firmware Waking Vector : 00000000

[010h 0016 4] Global Lock : 00000000

[014h 0020 4] Flags (decoded below) : 00000000

S4BIOS Support Present : 0

64-bit Wake Supported (V2) : 0

[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000

[020h 0032 1] Version : 02

[021h 0033 3] Reserved : 000000

[024h 0036 4] OspmFlags (decoded below) : 00000000

64-bit Wake Env Required (V2) : 0

Raw Table Data: Length 64 (0x40)

0000: 46 41 43 53 40 00 00 00 FD 64 87 3E 00 00 00 00 FACS@....d.>....

0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

0020: 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

Unknown table description.

View File FIDT.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [FIDT]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "FIDT"

[004h 0004 4] Table Length : 0000009C

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : 33

[00Ah 0010 6] Oem ID : "ALASKA"

[010h 0016 8] Oem Table ID : "A M I "

[018h 0024 4] Oem Revision : 01072009

[01Ch 0028 4] Asl Compiler ID : "AMI "

[020h 0032 4] Asl Compiler Revision : 00010013

**** Unknown ACPI table type [FIDT]

Raw Table Data: Length 156 (0x9C)

0000: 46 49 44 54 9C 00 00 00 01 33 41 4C 41 53 4B 41 FIDT.....3ALASKA

0010: 41 20 4D 20 49 20 00 00 09 20 07 01 41 4D 49 20 A M I ... ..AMI

0020: 13 00 01 00 24 46 49 44 04 78 00 41 31 34 36 34 ....$FID.x.A1464

0030: 31 30 37 00 DF FC 99 3E A2 51 03 54 47 F6 16 1E 107....>.Q.TG...

0040: 47 CC 52 8B 30 35 00 31 31 00 30 31 00 30 37 00 G.R.05.11.01.07.

0050: 00 00 00 00 00 00 00 FF FF 41 4C 41 53 4B 41 41 .........ALASKAA

0060: 20 4D 20 49 20 00 00 00 00 00 00 00 00 00 00 00 M I ...........

0070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

0080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

0090: 00 00 00 00 00 00 00 00 00 00 00 00 ............

Firmware Performance Data Table

View File FPDT.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [FPDT]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "FPDT" [Firmware Performance Data Table]

[004h 0004 4] Table Length : 00000044

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : AE

[00Ah 0010 6] Oem ID : "ALASKA"

[010h 0016 8] Oem Table ID : "A M I "

[018h 0024 4] Oem Revision : 01072009

[01Ch 0028 4] Asl Compiler ID : "AMI "

[020h 0032 4] Asl Compiler Revision : 00010013

[024h 0036 2] Subtable Type : 0001

[026h 0038 1] Length : 10

[027h 0039 1] Revision : 01

[028h 0040 4] Reserved : 00000000

[02Ch 0044 8] S3PT Address : 000000008752B530

[034h 0052 2] Subtable Type : 0000

[036h 0054 1] Length : 10

[037h 0055 1] Revision : 01

[038h 0056 4] Reserved : 00000000

[03Ch 0060 8] Reset End : 000000008752B550

**** ACPI table terminates in the middle of a data structure!

Raw Table Data: Length 68 (0x44)

0000: 46 50 44 54 44 00 00 00 01 AE 41 4C 41 53 4B 41 FPDTD.....ALASKA

0010: 41 20 4D 20 49 20 00 00 09 20 07 01 41 4D 49 20 A M I ... ..AMI

0020: 13 00 01 00 01 00 10 01 00 00 00 00 30 B5 52 87 ............0.R.

0030: 00 00 00 00 00 00 10 01 00 00 00 00 50 B5 52 87 ............P.R.

0040: 00 00 00 00 ....

High Precision Event Timer Table

View File HPET.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [HPET]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]

[004h 0004 4] Table Length : 00000038

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : AB

[00Ah 0010 6] Oem ID : "ALASKA"

[010h 0016 8] Oem Table ID : "A M I"

[018h 0024 4] Oem Revision : 01072009

[01Ch 0028 4] Asl Compiler ID : "AMI."

[020h 0032 4] Asl Compiler Revision : 0005000B

[024h 0036 4] Hardware Block ID : 8086A701

[028h 0040 12] Timer Block Register : [Generic Address Structure]

[028h 0040 1] Space ID : 00 [SystemMemory]

[029h 0041 1] Bit Width : 40

[02Ah 0042 1] Bit Offset : 00

[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy]

[02Ch 0044 8] Address : 00000000FED00000

[034h 0052 1] Sequence Number : 00

[035h 0053 2] Minimum Clock Ticks : 37EE

[037h 0055 1] Flags (decoded below) : 00

4K Page Protect : 0

64K Page Protect : 0

Raw Table Data: Length 56 (0x38)

0000: 48 50 45 54 38 00 00 00 01 AB 41 4C 41 53 4B 41 HPET8.....ALASKA

0010: 41 20 4D 20 49 00 00 00 09 20 07 01 41 4D 49 2E A M I.... ..AMI.

0020: 0B 00 05 00 01 A7 86 80 00 40 00 00 00 00 D0 FE .........@......

0030: 00 00 00 00 00 EE 37 00 ......7.

Low Power Idle Table

View File LPIT.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [LPIT]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "LPIT"

[004h 0004 4] Table Length : 00000094

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : 20

[00Ah 0010 6] Oem ID : "INTEL "

[010h 0016 8] Oem Table ID : "SKL"

[018h 0024 4] Oem Revision : 00000000

[01Ch 0028 4] Asl Compiler ID : "MSFT"

[020h 0032 4] Asl Compiler Revision : 0000005F

**** Unknown ACPI table type [LPIT]

Raw Table Data: Length 148 (0x94)

0000: 4C 50 49 54 94 00 00 00 01 20 49 4E 54 45 4C 20 LPIT..... INTEL

0010: 53 4B 4C 00 00 00 00 00 00 00 00 00 4D 53 46 54 SKL.........MSFT

0020: 5F 00 00 00 00 00 00 00 38 00 00 00 00 00 00 00 _.......8.......

0030: 00 00 00 00 7F 01 02 00 60 00 00 00 00 00 00 00 ........`.......

0040: 30 75 00 00 B8 0B 00 00 7F 40 00 00 32 06 00 00 0u.......@..2...

0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

0060: 38 00 00 00 01 00 00 00 00 00 00 00 7F 01 02 00 8...............

0070: 60 00 00 00 00 00 00 00 30 75 00 00 B8 0B 00 00 `.......0u......

0080: 7F 40 00 00 32 06 00 00 00 00 00 00 00 00 00 00 .@..2...........

0090: 00 00 00 00 ....

PCI Express memory mapped configuration space base address Description Table

View File MCFG.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [MCFG]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]

[004h 0004 4] Table Length : 0000003C

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : 01

[00Ah 0010 6] Oem ID : "ALASKA"

[010h 0016 8] Oem Table ID : "A M I"

[018h 0024 4] Oem Revision : 01072009

[01Ch 0028 4] Asl Compiler ID : "MSFT"

[020h 0032 4] Asl Compiler Revision : 00000097

[024h 0036 8] Reserved : 0000000000000000

[02Ch 0044 8] Base Address : 00000000E0000000

[034h 0052 2] Segment Group Number : 0000

[036h 0054 1] Start Bus Number : 00

[037h 0055 1] End Bus Number : FF

[038h 0056 4] Reserved : 00000000

Raw Table Data: Length 60 (0x3C)

0000: 4D 43 46 47 3C 00 00 00 01 01 41 4C 41 53 4B 41 MCFG<.....ALASKA

0010: 41 20 4D 20 49 00 00 00 09 20 07 01 4D 53 46 54 A M I.... ..MSFT

0020: 97 00 00 00 00 00 00 00 00 00 00 00 00 00 00 E0 ................

0030: 00 00 00 00 00 00 00 FF 00 00 00 00 ............

Root System Description Table

View File RSDT.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [XSDT]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "XSDT" [Extended System Description Table]

[004h 0004 4] Table Length : 000000BC

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : 93

[00Ah 0010 6] Oem ID : "ALASKA"

[010h 0016 8] Oem Table ID : "A M I "

[018h 0024 4] Oem Revision : 01072009

[01Ch 0028 4] Asl Compiler ID : "AMI "

[020h 0032 4] Asl Compiler Revision : 00010013

[024h 0036 8] ACPI Table Address 0 : 0000000087FDE000

[02Ch 0044 8] ACPI Table Address 1 : 0000000087F7BD50

[034h 0052 8] ACPI Table Address 2 : 0000000087F7BDD8

[03Ch 0060 8] ACPI Table Address 3 : 0000000087F7BE20

[044h 0068 8] ACPI Table Address 4 : 0000000087F7BEC0

[04Ch 0076 8] ACPI Table Address 5 : 0000000087F7BF00

[054h 0084 8] ACPI Table Address 6 : 0000000087FB7000

[05Ch 0092 8] ACPI Table Address 7 : 0000000087F7C2A8

[064h 0100 8] ACPI Table Address 8 : 0000000087F7C340

[06Ch 0108 8] ACPI Table Address 9 : 0000000087F7C378

[074h 0116 8] ACPI Table Address 10 : 0000000087FB5000

[07Ch 0124 8] ACPI Table Address 11 : 0000000087F7C9C0

[084h 0132 8] ACPI Table Address 12 : 0000000087FAE000

[08Ch 0140 8] ACPI Table Address 13 : 0000000087F81E78

[094h 0148 8] ACPI Table Address 14 : 0000000087FAC000

[09Ch 0156 8] ACPI Table Address 15 : 0000000087F82D18

[0A4h 0164 8] ACPI Table Address 16 : 0000000087F82D50

[0ACh 0172 8] ACPI Table Address 17 : 0000000087FAB000

[0B4h 0180 8] ACPI Table Address 18 : 0000000087FAA000

Raw Table Data: Length 188 (0xBC)

0000: 58 53 44 54 BC 00 00 00 01 93 41 4C 41 53 4B 41 XSDT......ALASKA

0010: 41 20 4D 20 49 20 00 00 09 20 07 01 41 4D 49 20 A M I ... ..AMI

0020: 13 00 01 00 00 E0 FD 87 00 00 00 00 50 BD F7 87 ............P...

0030: 00 00 00 00 D8 BD F7 87 00 00 00 00 20 BE F7 87 ............ ...

0040: 00 00 00 00 C0 BE F7 87 00 00 00 00 00 BF F7 87 ................

0050: 00 00 00 00 00 70 FB 87 00 00 00 00 A8 C2 F7 87 .....p..........

0060: 00 00 00 00 40 C3 F7 87 00 00 00 00 78 C3 F7 87 ....@.......x...

0070: 00 00 00 00 00 50 FB 87 00 00 00 00 C0 C9 F7 87 .....P..........

0080: 00 00 00 00 00 E0 FA 87 00 00 00 00 78 1E F8 87 ............x...

0090: 00 00 00 00 00 C0 FA 87 00 00 00 00 18 2D F8 87 .............-..

00A0: 00 00 00 00 50 2D F8 87 00 00 00 00 00 B0 FA 87 ....P-..........

00B0: 00 00 00 00 00 A0 FA 87 00 00 00 00 ............

Secondary System Description Table

View File SSDT-1.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* Original Table Header:

* Signature "SSDT"

* Length 0x000005EF (1519)

* Revision 0x02

* Checksum 0x5D

* OEM ID "INTEL"

* OEM Table ID "xh_rvp08"

* OEM Revision 0x00000000 (0)

* Compiler ID "INTL"

* Compiler Version 0x20120913 (538052883)

DefinitionBlock ("/Volumes/El Capitan/Users/dima/Downloads/DarwinDumper_v2.9.9.2/DarwinDumperReports/001_2016-03-11_19-07-15_MacPro3,1/DarwinDumper_2.9.9.2_AMI_X64_3358_Cap_dima/ACPI Tables/AML/SSDT-1.aml", "SSDT", 2, "INTEL", "xh_rvp08", 0x00000000)

{

External (_SB_.PCI0.XHC_.RHUB, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS01, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS02, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS03, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS04, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS05, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS06, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS07, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS08, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS09, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS10, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS11, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS12, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS13, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.HS14, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.SS01, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.SS02, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.SS03, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.SS04, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.SS05, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.SS06, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.SS07, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.SS08, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.SS09, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.SS10, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.USR1, DeviceObj)

External (_SB_.PCI0.XHC_.RHUB.USR2, DeviceObj)

Scope (\_SB.PCI0.XHC.RHUB)

{

Method (GPLD, 2, Serialized)

{

Name (PCKG, Package (0x01)

{

Buffer (0x10) {}

})

CreateField (DerefOf (Index (PCKG, Zero)), Zero, 0x07, REV)

Store (One, REV)

CreateField (DerefOf (Index (PCKG, Zero)), 0x40, One, VISI)

Store (Arg0, VISI)

CreateField (DerefOf (Index (PCKG, Zero)), 0x57, 0x08, GPOS)

Store (Arg1, GPOS)

Return (PCKG)

}

Method (GUPC, 1, Serialized)

{

Name (PCKG, Package (0x04)

{

Zero,

0xFF,

Zero,

Zero

})

Store (Arg0, Index (PCKG, Zero))

Return (PCKG)

}

Scope (\_SB.PCI0.XHC.RHUB.HS01)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, One))

}

Scope (\_SB.PCI0.XHC.RHUB.HS02)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x02))

}

Scope (\_SB.PCI0.XHC.RHUB.HS03)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x03))

}

Scope (\_SB.PCI0.XHC.RHUB.HS04)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x04))

}

Scope (\_SB.PCI0.XHC.RHUB.HS05)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x05))

}

Scope (\_SB.PCI0.XHC.RHUB.HS06)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x06))

}

Scope (\_SB.PCI0.XHC.RHUB.HS07)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x07))

}

Scope (\_SB.PCI0.XHC.RHUB.HS08)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x08))

}

Scope (\_SB.PCI0.XHC.RHUB.HS09)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x09))

}

Scope (\_SB.PCI0.XHC.RHUB.HS10)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x0A))

}

Scope (\_SB.PCI0.XHC.RHUB.HS11)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x0B))

}

Scope (\_SB.PCI0.XHC.RHUB.HS12)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x0C))

}

Scope (\_SB.PCI0.XHC.RHUB.HS13)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (Zero))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (Zero, Zero))

}

Scope (\_SB.PCI0.XHC.RHUB.HS14)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (Zero))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (Zero, Zero))

}

Scope (\_SB.PCI0.XHC.RHUB.USR1)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (Zero))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (Zero, Zero))

}

Scope (\_SB.PCI0.XHC.RHUB.USR2)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (Zero))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (Zero, Zero))

}

Scope (\_SB.PCI0.XHC.RHUB.SS01)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x09))

}

Scope (\_SB.PCI0.XHC.RHUB.SS02)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x0A))

}

Scope (\_SB.PCI0.XHC.RHUB.SS03)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x07))

}

Scope (\_SB.PCI0.XHC.RHUB.SS04)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x08))

}

Scope (\_SB.PCI0.XHC.RHUB.SS05)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (One))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x05))

}

Scope (\_SB.PCI0.XHC.RHUB.SS06)

{

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x06))

}

Scope (\_SB.PCI0.XHC.RHUB.SS07)

{

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x0B))

}

Scope (\_SB.PCI0.XHC.RHUB.SS08)

{

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (One, 0x0C))

}

Scope (\_SB.PCI0.XHC.RHUB.SS09)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (Zero))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (Zero, Zero))

}

Scope (\_SB.PCI0.XHC.RHUB.SS10)

{

Method (_UPC, 0, NotSerialized) // _UPC: USB Port Capabilities

{

Return (GUPC (Zero))

}

Method (_PLD, 0, NotSerialized) // _PLD: Physical Location of Device

{

Return (GPLD (Zero, Zero))

}

Secondary System Description Table

View File SSDT-2.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* Original Table Header:

* Signature "SSDT"

* Length 0x000051E8 (20968)

* Revision 0x02

* Checksum 0x7A

* OEM ID "SaSsdt"

* OEM Table ID "SaSsdt "

* OEM Revision 0x00003000 (12288)

* Compiler ID "INTL"

* Compiler Version 0x20120913 (538052883)

DefinitionBlock ("/Volumes/El Capitan/Users/dima/Downloads/DarwinDumper_v2.9.9.2/DarwinDumperReports/001_2016-03-11_19-07-15_MacPro3,1/DarwinDumper_2.9.9.2_AMI_X64_3358_Cap_dima/ACPI Tables/AML/SSDT-2.aml", "SSDT", 2, "SaSsdt", "SaSsdt ", 0x00003000)

{

* iASL Warning: There were 10 external control methods found during

* disassembly, but only 8 were resolved (2 unresolved). Additional

* ACPI tables are required to properly disassemble the code. This

* resulting disassembler output file may not compile because the

* disassembler did not know how many arguments to assign to the

* unresolved methods.

External (HDOS, MethodObj) // Warning: Unresolved Method, guessing 0 arguments (may be incorrect, see warning above)

External (HNOT, MethodObj) // Warning: Unresolved Method, guessing 1 arguments (may be incorrect, see warning above)

External (_SB_.GGOV, MethodObj) // 1 Arguments

External (_SB_.ISME, MethodObj) // 1 Arguments

External (_SB_.PCI0, DeviceObj)

External (_SB_.PCI0.GFX0, DeviceObj)

External (_SB_.PCI0.PEG0, DeviceObj)

External (_SB_.PCI0.PEG0.PEGP, DeviceObj)

External (_SB_.PCI0.PEG1, DeviceObj)

External (_SB_.PCI0.PEG1.PEGP, DeviceObj)

External (_SB_.PCI0.PEG2, DeviceObj)

External (_SB_.PCI0.PEG2.PEGP, DeviceObj)

External (_SB_.SGOV, MethodObj) // 2 Arguments

External (_SB_.SHPO, MethodObj) // 2 Arguments

External (CPSC, FieldUnitObj)

External (DSEN, FieldUnitObj)

External (ECR1, FieldUnitObj)

External (GPRW, MethodObj) // 2 Arguments

External (GUAM, MethodObj) // 1 Arguments

External (OSYS, FieldUnitObj)

External (PCRA, MethodObj) // 3 Arguments

External (PCRO, MethodObj) // 3 Arguments

External (S0ID, FieldUnitObj)

External (SNXD)

OperationRegion (SANV, SystemMemory, 0x87F86D98, 0x0135)

Field (SANV, AnyAcc, Lock, Preserve)

{

ASLB, 32,

IMON, 8,

IGDS, 8,

IBTT, 8,

IPAT, 8,

IPSC, 8,

IBIA, 8,

ISSC, 8,

IDMS, 8,

IF1E, 8,

HVCO, 8,

GSMI, 8,

PAVP, 8,

CADL, 8,

CSTE, 16,

NSTE, 16,

NDID, 8,

DID1, 32,

DID2, 32,

DID3, 32,

DID4, 32,

DID5, 32,

DID6, 32,

DID7, 32,

DID8, 32,

DID9, 32,

DIDA, 32,

DIDB, 32,

DIDC, 32,

DIDD, 32,

DIDE, 32,

DIDF, 32,

DIDX, 32,

NXD1, 32,

NXD2, 32,

NXD3, 32,

NXD4, 32,

NXD5, 32,

NXD6, 32,

NXD7, 32,

NXD8, 32,

NXDX, 32,

LIDS, 8,

KSV0, 32,

KSV1, 8,

BRTL, 8,

ALSE, 8,

ALAF, 8,

LLOW, 8,

LHIH, 8,

ALFP, 8,

IMTP, 8,

EDPV, 8,

SGMD, 8,

SGFL, 8,

SGGP, 8,

HRE0, 8,

HRG0, 32,

HRA0, 8,

PWE0, 8,

PWG0, 32,

PWA0, 8,

P1GP, 8,

HRE1, 8,

HRG1, 32,

HRA1, 8,

PWE1, 8,

PWG1, 32,

PWA1, 8,

P2GP, 8,

HRE2, 8,

HRG2, 32,

HRA2, 8,

PWE2, 8,

PWG2, 32,

PWA2, 8,

DLPW, 16,

DLHR, 16,

EECP, 8,

XBAS, 32,

GBAS, 16,

NVGA, 32,

NVHA, 32,

AMDA, 32,

LTRX, 8,

OBFX, 8,

LTRY, 8,

OBFY, 8,

LTRZ, 8,

OBFZ, 8,

SMSL, 16,

SNSL, 16,

P0UB, 8,

P1UB, 8,

P2UB, 8,

PCSL, 8,

PBGE, 8,

M64B, 64,

M64L, 64,

CPEX, 32,

EEC1, 8,

EEC2, 8,

SBN0, 8,

SBN1, 8,

SBN2, 8,

M32B, 32,

M32L, 32,

P0WK, 32,

P1WK, 32,

P2WK, 32,

MXD1, 32,

MXD2, 32,

MXD3, 32,

MXD4, 32,

MXD5, 32,

MXD6, 32,

MXD7, 32,

MXD8, 32,

PXFD, 8,

EBAS, 32,

DGVS, 32,

DGVB, 32,

HYSS, 32

}

Scope (\_SB.PCI0)

{

Name (LTRS, Zero)

Name (OBFS, Zero)

}

Scope (\_GPE)

{

Method (P0L6, 0, NotSerialized)

{

If (\_SB.ISME (P0WK))

{

\_SB.SHPO (P0WK, One)

Notify (\_SB.PCI0.PEG0, 0x02)

}

Method (P1L6, 0, NotSerialized)

{

If (\_SB.ISME (P1WK))

{

\_SB.SHPO (P1WK, One)

Notify (\_SB.PCI0.PEG1, 0x02)

}

Method (P2L6, 0, NotSerialized)

{

If (\_SB.ISME (P2WK))

{

\_SB.SHPO (P2WK, One)

Notify (\_SB.PCI0.PEG2, 0x02)

}

Scope (\_SB.PCI0.PEG0)

{

Name (WKEN, Zero)

OperationRegion (PEGR, PCI_Config, 0xC0, 0x30)

Field (PEGR, DWordAcc, NoLock, Preserve)

{

Offset (0x02),

PSTS, 1,

Offset (0x2C),

GENG, 1,

, 1,

PMEG, 1

}

OperationRegion (MSID, SystemMemory, EBAS, 0x50)

Field (MSID, DWordAcc, Lock, Preserve)

{

VEID, 16,

Offset (0x40),

NVID, 32,

Offset (0x4C),

ATID, 32

}

OperationRegion (RPCX, SystemMemory, Add (\XBAS, 0x8000), 0x0100)

Field (RPCX, ByteAcc, NoLock, Preserve)

{

Offset (0x04),

CMDR, 8,

Offset (0x84),

D0ST, 2

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (HPME, 0, Serialized)

{

Store (One, PSTS)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTRX, LTRS)

Store (OBFX, OBFS)

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Store (Zero, Local0)

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRS)

{

Or (Local0, 0x40, Local0)

}

If (OBFS)

{

Or (Local0, 0x10, Local0)

}

If (LGreaterEqual (Arg1, 0x03))

{

If (ECR1)

{

Or (Local0, 0x0100, Local0)

}

If (ECR1)

{

Or (Local0, 0x0200, Local0)

}

If (LNotEqual (Local0, Zero))

{

Or (Local0, One, Local0)

}

Return (Local0)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFS)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRS)

{

Store (And (ShiftRight (SMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (SMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (SNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (SNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake

{

If (Arg1)

{

Store (Zero, WKEN)

}

Else

{

If (LAnd (Arg0, Arg2))

{

Store (One, WKEN)

}

Else

{

Store (Zero, WKEN)

}

Method (P0EW, 0, NotSerialized)

{

If (WKEN)

{

If (LNotEqual (SGGP, Zero))

{

If (LEqual (SGGP, One))

{

\_SB.SGOV (P0WK, One)

\_SB.SHPO (P0WK, Zero)

}

Method (_S0W, 0, NotSerialized) // _S0W: S0 Device Wake State

{

Return (0x04)

}

Scope (\_SB.PCI0.PEG0.PEGP)

{

OperationRegion (PCIS, PCI_Config, Zero, 0x0100)

Field (PCIS, AnyAcc, NoLock, Preserve)

{

PVID, 16,

PDID, 16

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Scope (\_SB.PCI0.PEG1)

{

Name (WKEN, Zero)

OperationRegion (PEGR, PCI_Config, 0xC0, 0x30)

Field (PEGR, DWordAcc, NoLock, Preserve)

{

Offset (0x02),

PSTS, 1,

Offset (0x2C),

GENG, 1,

, 1,

PMEG, 1

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (HPME, 0, Serialized)

{

Store (One, PSTS)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTRY, LTRS)

Store (OBFY, OBFS)

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Store (Zero, Local0)

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRS)

{

Or (Local0, 0x40, Local0)

}

If (OBFS)

{

Or (Local0, 0x10, Local0)

}

If (LGreaterEqual (Arg1, 0x03))

{

If (ECR1)

{

Or (Local0, 0x0100, Local0)

}

If (ECR1)

{

Or (Local0, 0x0200, Local0)

}

If (LNotEqual (Local0, Zero))

{

Or (Local0, One, Local0)

}

Return (Local0)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFS)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRS)

{

Store (And (ShiftRight (SMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (SMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (SNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (SNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake

{

If (Arg1)

{

Store (Zero, WKEN)

}

Else

{

If (LAnd (Arg0, Arg2))

{

Store (One, WKEN)

}

Else

{

Store (Zero, WKEN)

}

Method (P1EW, 0, NotSerialized)

{

If (WKEN)

{

If (LNotEqual (P1GP, Zero))

{

If (LEqual (P1GP, One))

{

\_SB.SGOV (P1WK, One)

\_SB.SHPO (P1WK, Zero)

}

Method (_S0W, 0, NotSerialized) // _S0W: S0 Device Wake State

{

Return (0x04)

}

Scope (\_SB.PCI0.PEG1.PEGP)

{

OperationRegion (PCIS, PCI_Config, Zero, 0x0100)

Field (PCIS, AnyAcc, NoLock, Preserve)

{

PVID, 16,

PDID, 16

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Scope (\_SB.PCI0.PEG2)

{

Name (WKEN, Zero)

OperationRegion (PEGR, PCI_Config, 0xC0, 0x30)

Field (PEGR, DWordAcc, NoLock, Preserve)

{

Offset (0x02),

PSTS, 1,

Offset (0x2C),

GENG, 1,

, 1,

PMEG, 1

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Method (HPME, 0, Serialized)

{

Store (One, PSTS)

}

Method (_INI, 0, NotSerialized) // _INI: Initialize

{

Store (LTRZ, LTRS)

Store (OBFZ, OBFS)

}

Name (LTRV, Package (0x04)

{

Zero,

Zero

})

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,

/* 0008 */ 0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

Store (Zero, Local0)

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRS)

{

Or (Local0, 0x40, Local0)

}

If (OBFS)

{

Or (Local0, 0x10, Local0)

}

If (LGreaterEqual (Arg1, 0x03))

{

If (ECR1)

{

Or (Local0, 0x0100, Local0)

}

If (ECR1)

{

Or (Local0, 0x0200, Local0)

}

If (LNotEqual (Local0, Zero))

{

Or (Local0, One, Local0)

}

Return (Local0)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (OBFS)

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

Return (Buffer (0x10)

{

/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

})

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LGreaterEqual (Arg1, 0x02))

{

If (LTRS)

{

Store (And (ShiftRight (SMSL, 0x0A), 0x07), Index (LTRV,

Zero))

Store (And (SMSL, 0x03FF), Index (LTRV, One))

Store (And (ShiftRight (SNSL, 0x0A), 0x07), Index (LTRV,

0x02))

Store (And (SNSL, 0x03FF), Index (LTRV, 0x03))

Return (LTRV)

}

Else

{

Return (Zero)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (ECR1, One))

{

If (LGreaterEqual (Arg1, 0x03))

{

Return (Package (0x05)

{

0xC350,

Ones,

0xC350,

Ones

})

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake

{

If (Arg1)

{

Store (Zero, WKEN)

}

Else

{

If (LAnd (Arg0, Arg2))

{

Store (One, WKEN)

}

Else

{

Store (Zero, WKEN)

}

Method (P2EW, 0, NotSerialized)

{

If (WKEN)

{

If (LNotEqual (P2GP, Zero))

{

If (LEqual (P2GP, One))

{

\_SB.SGOV (P2WK, One)

\_SB.SHPO (P2WK, Zero)

}

Method (_S0W, 0, NotSerialized) // _S0W: S0 Device Wake State

{

Return (0x04)

}

Scope (\_SB.PCI0.PEG2.PEGP)

{

OperationRegion (PCIS, PCI_Config, Zero, 0x0100)

Field (PCIS, AnyAcc, NoLock, Preserve)

{

PVID, 16,

PDID, 16

}

Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake

{

Return (GPRW (0x69, 0x04))

}

Scope (\_SB.PCI0.GFX0)

{

Method (_DOS, 1, NotSerialized) // _DOS: Disable Output Switching

{

Store (And (Arg0, 0x07), DSEN)

If (LEqual (And (Arg0, 0x03), Zero))

{

If (CondRefOf (HDOS))

{

HDOS ()

}

Method (_DOD, 0, NotSerialized) // _DOD: Display Output Devices

{

If (LEqual (IMTP, One))

{

Store (One, NDID)

}

Else

{

Store (Zero, NDID)

}

If (LNotEqual (DIDL, Zero))

{

Store (SDDL (DIDL), DID1)

}

If (LNotEqual (DDL2, Zero))

{

Store (SDDL (DDL2), DID2)

}

If (LNotEqual (DDL3, Zero))

{

Store (SDDL (DDL3), DID3)

}

If (LNotEqual (DDL4, Zero))

{

Store (SDDL (DDL4), DID4)

}

If (LNotEqual (DDL5, Zero))

{

Store (SDDL (DDL5), DID5)

}

If (LNotEqual (DDL6, Zero))

{

Store (SDDL (DDL6), DID6)

}

If (LNotEqual (DDL7, Zero))

{

Store (SDDL (DDL7), DID7)

}

If (LNotEqual (DDL8, Zero))

{

Store (SDDL (DDL8), DID8)

}

If (LNotEqual (DDL9, Zero))

{

Store (SDDL (DDL9), DID9)

}

If (LNotEqual (DD10, Zero))

{

Store (SDDL (DD10), DIDA)

}

If (LNotEqual (DD11, Zero))

{

Store (SDDL (DD11), DIDB)

}

If (LNotEqual (DD12, Zero))

{

Store (SDDL (DD12), DIDC)

}

If (LNotEqual (DD13, Zero))

{

Store (SDDL (DD13), DIDD)

}

If (LNotEqual (DD14, Zero))

{

Store (SDDL (DD14), DIDE)

}

If (LNotEqual (DD15, Zero))

{

Store (SDDL (DD15), DIDF)

}

If (LEqual (NDID, One))

{

Name (TMP1, Package (0x01)

{

0xFFFFFFFF

})

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMP1, Zero))

}

Else

{

Store (Or (0x00010000, DID1), Index (TMP1, Zero))

}

Return (TMP1)

}

If (LEqual (NDID, 0x02))

{

Name (TMP2, Package (0x02)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP2, Zero))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMP2, One))

}

Else

{

Store (Or (0x00010000, DID2), Index (TMP2, One))

}

Return (TMP2)

}

If (LEqual (NDID, 0x03))

{

Name (TMP3, Package (0x03)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP3, Zero))

Store (Or (0x00010000, DID2), Index (TMP3, One))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMP3, 0x02))

}

Else

{

Store (Or (0x00010000, DID3), Index (TMP3, 0x02))

}

Return (TMP3)

}

If (LEqual (NDID, 0x04))

{

Name (TMP4, Package (0x04)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP4, Zero))

Store (Or (0x00010000, DID2), Index (TMP4, One))

Store (Or (0x00010000, DID3), Index (TMP4, 0x02))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMP4, 0x03))

}

Else

{

Store (Or (0x00010000, DID4), Index (TMP4, 0x03))

}

Return (TMP4)

}

If (LEqual (NDID, 0x05))

{

Name (TMP5, Package (0x05)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP5, Zero))

Store (Or (0x00010000, DID2), Index (TMP5, One))

Store (Or (0x00010000, DID3), Index (TMP5, 0x02))

Store (Or (0x00010000, DID4), Index (TMP5, 0x03))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMP5, 0x04))

}

Else

{

Store (Or (0x00010000, DID5), Index (TMP5, 0x04))

}

Return (TMP5)

}

If (LEqual (NDID, 0x06))

{

Name (TMP6, Package (0x06)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP6, Zero))

Store (Or (0x00010000, DID2), Index (TMP6, One))

Store (Or (0x00010000, DID3), Index (TMP6, 0x02))

Store (Or (0x00010000, DID4), Index (TMP6, 0x03))

Store (Or (0x00010000, DID5), Index (TMP6, 0x04))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMP6, 0x05))

}

Else

{

Store (Or (0x00010000, DID6), Index (TMP6, 0x05))

}

Return (TMP6)

}

If (LEqual (NDID, 0x07))

{

Name (TMP7, Package (0x07)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP7, Zero))

Store (Or (0x00010000, DID2), Index (TMP7, One))

Store (Or (0x00010000, DID3), Index (TMP7, 0x02))

Store (Or (0x00010000, DID4), Index (TMP7, 0x03))

Store (Or (0x00010000, DID5), Index (TMP7, 0x04))

Store (Or (0x00010000, DID6), Index (TMP7, 0x05))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMP7, 0x06))

}

Else

{

Store (Or (0x00010000, DID7), Index (TMP7, 0x06))

}

Return (TMP7)

}

If (LEqual (NDID, 0x08))

{

Name (TMP8, Package (0x08)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP8, Zero))

Store (Or (0x00010000, DID2), Index (TMP8, One))

Store (Or (0x00010000, DID3), Index (TMP8, 0x02))

Store (Or (0x00010000, DID4), Index (TMP8, 0x03))

Store (Or (0x00010000, DID5), Index (TMP8, 0x04))

Store (Or (0x00010000, DID6), Index (TMP8, 0x05))

Store (Or (0x00010000, DID7), Index (TMP8, 0x06))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMP8, 0x07))

}

Else

{

Store (Or (0x00010000, DID8), Index (TMP8, 0x07))

}

Return (TMP8)

}

If (LEqual (NDID, 0x09))

{

Name (TMP9, Package (0x09)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP9, Zero))

Store (Or (0x00010000, DID2), Index (TMP9, One))

Store (Or (0x00010000, DID3), Index (TMP9, 0x02))

Store (Or (0x00010000, DID4), Index (TMP9, 0x03))

Store (Or (0x00010000, DID5), Index (TMP9, 0x04))

Store (Or (0x00010000, DID6), Index (TMP9, 0x05))

Store (Or (0x00010000, DID7), Index (TMP9, 0x06))

Store (Or (0x00010000, DID8), Index (TMP9, 0x07))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMP9, 0x08))

}

Else

{

Store (Or (0x00010000, DID9), Index (TMP9, 0x08))

}

Return (TMP9)

}

If (LEqual (NDID, 0x0A))

{

Name (TMPA, Package (0x0A)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMPA, Zero))

Store (Or (0x00010000, DID2), Index (TMPA, One))

Store (Or (0x00010000, DID3), Index (TMPA, 0x02))

Store (Or (0x00010000, DID4), Index (TMPA, 0x03))

Store (Or (0x00010000, DID5), Index (TMPA, 0x04))

Store (Or (0x00010000, DID6), Index (TMPA, 0x05))

Store (Or (0x00010000, DID7), Index (TMPA, 0x06))

Store (Or (0x00010000, DID8), Index (TMPA, 0x07))

Store (Or (0x00010000, DID9), Index (TMPA, 0x08))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMPA, 0x09))

}

Else

{

Store (Or (0x00010000, DIDA), Index (TMPA, 0x09))

}

Return (TMPA)

}

If (LEqual (NDID, 0x0B))

{

Name (TMPB, Package (0x0B)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMPB, Zero))

Store (Or (0x00010000, DID2), Index (TMPB, One))

Store (Or (0x00010000, DID3), Index (TMPB, 0x02))

Store (Or (0x00010000, DID4), Index (TMPB, 0x03))

Store (Or (0x00010000, DID5), Index (TMPB, 0x04))

Store (Or (0x00010000, DID6), Index (TMPB, 0x05))

Store (Or (0x00010000, DID7), Index (TMPB, 0x06))

Store (Or (0x00010000, DID8), Index (TMPB, 0x07))

Store (Or (0x00010000, DID9), Index (TMPB, 0x08))

Store (Or (0x00010000, DIDA), Index (TMPB, 0x09))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMPB, 0x0A))

}

Else

{

Store (Or (0x00010000, DIDB), Index (TMPB, 0x0A))

}

Return (TMPB)

}

If (LEqual (NDID, 0x0C))

{

Name (TMPC, Package (0x0C)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMPC, Zero))

Store (Or (0x00010000, DID2), Index (TMPC, One))

Store (Or (0x00010000, DID3), Index (TMPC, 0x02))

Store (Or (0x00010000, DID4), Index (TMPC, 0x03))

Store (Or (0x00010000, DID5), Index (TMPC, 0x04))

Store (Or (0x00010000, DID6), Index (TMPC, 0x05))

Store (Or (0x00010000, DID7), Index (TMPC, 0x06))

Store (Or (0x00010000, DID8), Index (TMPC, 0x07))

Store (Or (0x00010000, DID9), Index (TMPC, 0x08))

Store (Or (0x00010000, DIDA), Index (TMPC, 0x09))

Store (Or (0x00010000, DIDB), Index (TMPC, 0x0A))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMPC, 0x0B))

}

Else

{

Store (Or (0x00010000, DIDC), Index (TMPC, 0x0B))

}

Return (TMPC)

}

If (LEqual (NDID, 0x0D))

{

Name (TMPD, Package (0x0D)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMPD, Zero))

Store (Or (0x00010000, DID2), Index (TMPD, One))

Store (Or (0x00010000, DID3), Index (TMPD, 0x02))

Store (Or (0x00010000, DID4), Index (TMPD, 0x03))

Store (Or (0x00010000, DID5), Index (TMPD, 0x04))

Store (Or (0x00010000, DID6), Index (TMPD, 0x05))

Store (Or (0x00010000, DID7), Index (TMPD, 0x06))

Store (Or (0x00010000, DID8), Index (TMPD, 0x07))

Store (Or (0x00010000, DID9), Index (TMPD, 0x08))

Store (Or (0x00010000, DIDA), Index (TMPD, 0x09))

Store (Or (0x00010000, DIDB), Index (TMPD, 0x0A))

Store (Or (0x00010000, DIDC), Index (TMPD, 0x0B))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMPD, 0x0C))

}

Else

{

Store (Or (0x00010000, DIDD), Index (TMPD, 0x0C))

}

Return (TMPD)

}

If (LEqual (NDID, 0x0E))

{

Name (TMPE, Package (0x0E)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMPE, Zero))

Store (Or (0x00010000, DID2), Index (TMPE, One))

Store (Or (0x00010000, DID3), Index (TMPE, 0x02))

Store (Or (0x00010000, DID4), Index (TMPE, 0x03))

Store (Or (0x00010000, DID5), Index (TMPE, 0x04))

Store (Or (0x00010000, DID6), Index (TMPE, 0x05))

Store (Or (0x00010000, DID7), Index (TMPE, 0x06))

Store (Or (0x00010000, DID8), Index (TMPE, 0x07))

Store (Or (0x00010000, DID9), Index (TMPE, 0x08))

Store (Or (0x00010000, DIDA), Index (TMPE, 0x09))

Store (Or (0x00010000, DIDB), Index (TMPE, 0x0A))

Store (Or (0x00010000, DIDC), Index (TMPE, 0x0B))

Store (Or (0x00010000, DIDD), Index (TMPE, 0x0C))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMPE, 0x0D))

}

Else

{

Store (Or (0x00010000, DIDE), Index (TMPE, 0x0D))

}

Return (TMPE)

}

If (LEqual (NDID, 0x0F))

{

Name (TMPF, Package (0x0F)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMPF, Zero))

Store (Or (0x00010000, DID2), Index (TMPF, One))

Store (Or (0x00010000, DID3), Index (TMPF, 0x02))

Store (Or (0x00010000, DID4), Index (TMPF, 0x03))

Store (Or (0x00010000, DID5), Index (TMPF, 0x04))

Store (Or (0x00010000, DID6), Index (TMPF, 0x05))

Store (Or (0x00010000, DID7), Index (TMPF, 0x06))

Store (Or (0x00010000, DID8), Index (TMPF, 0x07))

Store (Or (0x00010000, DID9), Index (TMPF, 0x08))

Store (Or (0x00010000, DIDA), Index (TMPF, 0x09))

Store (Or (0x00010000, DIDB), Index (TMPF, 0x0A))

Store (Or (0x00010000, DIDC), Index (TMPF, 0x0B))

Store (Or (0x00010000, DIDD), Index (TMPF, 0x0C))

Store (Or (0x00010000, DIDE), Index (TMPF, 0x0D))

If (LEqual (IMTP, One))

{

Store (0x0002CA00, Index (TMPF, 0x0E))

}

Else

{

Store (Or (0x00010000, DIDF), Index (TMPF, 0x0E))

}

Return (TMPF)

}

If (LEqual (NDID, 0x10))

{

Name (TMPG, Package (0x10)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMPG, Zero))

Store (Or (0x00010000, DID2), Index (TMPG, One))

Store (Or (0x00010000, DID3), Index (TMPG, 0x02))

Store (Or (0x00010000, DID4), Index (TMPG, 0x03))

Store (Or (0x00010000, DID5), Index (TMPG, 0x04))

Store (Or (0x00010000, DID6), Index (TMPG, 0x05))

Store (Or (0x00010000, DID7), Index (TMPG, 0x06))

Store (Or (0x00010000, DID8), Index (TMPG, 0x07))

Store (Or (0x00010000, DID9), Index (TMPG, 0x08))

Store (Or (0x00010000, DIDA), Index (TMPG, 0x09))

Store (Or (0x00010000, DIDB), Index (TMPG, 0x0A))

Store (Or (0x00010000, DIDC), Index (TMPG, 0x0B))

Store (Or (0x00010000, DIDD), Index (TMPG, 0x0C))

Store (Or (0x00010000, DIDE), Index (TMPG, 0x0D))

Store (Or (0x00010000, DIDF), Index (TMPG, 0x0E))

Store (0x0002CA00, Index (TMPG, 0x0F))

Return (TMPG)

}

Return (Package (0x01)

{

0x0400

})

}

Device (DD01)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DID1), 0x0400))

{

Store (One, EDPV)

Store (NXD1, NXDX)

Store (DID1, DIDX)

Return (One)

}

If (LEqual (DID1, Zero))

{

Return (One)

}

Else

{

Return (And (0xFFFF, DID1))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

Return (CDDS (DID1))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD1)

}

Return (NDDS (DID1))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD02)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DID2), 0x0400))

{

Store (0x02, EDPV)

Store (NXD2, NXDX)

Store (DID2, DIDX)

Return (0x02)

}

If (LEqual (DID2, Zero))

{

Return (0x02)

}

Else

{

Return (And (0xFFFF, DID2))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (LIDS, Zero))

{

Return (Zero)

}

Return (CDDS (DID2))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD2)

}

Return (NDDS (DID2))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD03)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DID3), 0x0400))

{

Store (0x03, EDPV)

Store (NXD3, NXDX)

Store (DID3, DIDX)

Return (0x03)

}

If (LEqual (DID3, Zero))

{

Return (0x03)

}

Else

{

Return (And (0xFFFF, DID3))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DID3, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DID3))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD3)

}

Return (NDDS (DID3))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD04)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DID4), 0x0400))

{

Store (0x04, EDPV)

Store (NXD4, NXDX)

Store (DID4, DIDX)

Return (0x04)

}

If (LEqual (DID4, Zero))

{

Return (0x04)

}

Else

{

Return (And (0xFFFF, DID4))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DID4, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DID4))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD4)

}

Return (NDDS (DID4))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD05)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DID5), 0x0400))

{

Store (0x05, EDPV)

Store (NXD5, NXDX)

Store (DID5, DIDX)

Return (0x05)

}

If (LEqual (DID5, Zero))

{

Return (0x05)

}

Else

{

Return (And (0xFFFF, DID5))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DID5, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DID5))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD5)

}

Return (NDDS (DID5))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD06)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DID6), 0x0400))

{

Store (0x06, EDPV)

Store (NXD6, NXDX)

Store (DID6, DIDX)

Return (0x06)

}

If (LEqual (DID6, Zero))

{

Return (0x06)

}

Else

{

Return (And (0xFFFF, DID6))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DID6, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DID6))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD6)

}

Return (NDDS (DID6))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD07)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DID7), 0x0400))

{

Store (0x07, EDPV)

Store (NXD7, NXDX)

Store (DID7, DIDX)

Return (0x07)

}

If (LEqual (DID7, Zero))

{

Return (0x07)

}

Else

{

Return (And (0xFFFF, DID7))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DID7, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DID7))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD7)

}

Return (NDDS (DID7))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD08)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DID8), 0x0400))

{

Store (0x08, EDPV)

Store (NXD8, NXDX)

Store (DID8, DIDX)

Return (0x08)

}

If (LEqual (DID8, Zero))

{

Return (0x08)

}

Else

{

Return (And (0xFFFF, DID8))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DID8, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DID8))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD8)

}

Return (NDDS (DID8))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD09)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DID9), 0x0400))

{

Store (0x09, EDPV)

Store (NXD8, NXDX)

Store (DID9, DIDX)

Return (0x09)

}

If (LEqual (DID9, Zero))

{

Return (0x09)

}

Else

{

Return (And (0xFFFF, DID9))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DID9, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DID9))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD8)

}

Return (NDDS (DID9))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD0A)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DIDA), 0x0400))

{

Store (0x0A, EDPV)

Store (NXD8, NXDX)

Store (DIDA, DIDX)

Return (0x0A)

}

If (LEqual (DIDA, Zero))

{

Return (0x0A)

}

Else

{

Return (And (0xFFFF, DIDA))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DIDA, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DIDA))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD8)

}

Return (NDDS (DIDA))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD0B)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DIDB), 0x0400))

{

Store (0x0B, EDPV)

Store (NXD8, NXDX)

Store (DIDB, DIDX)

Return (0x0B)

}

If (LEqual (DIDB, Zero))

{

Return (0x0B)

}

Else

{

Return (And (0xFFFF, DIDB))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DIDB, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DIDB))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD8)

}

Return (NDDS (DIDB))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD0C)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DIDC), 0x0400))

{

Store (0x0C, EDPV)

Store (NXD8, NXDX)

Store (DIDC, DIDX)

Return (0x0C)

}

If (LEqual (DIDC, Zero))

{

Return (0x0C)

}

Else

{

Return (And (0xFFFF, DIDC))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DIDC, Zero))

{

Return (0x0C)

}

Else

{

Return (CDDS (DIDC))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD8)

}

Return (NDDS (DIDC))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD0D)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DIDD), 0x0400))

{

Store (0x0D, EDPV)

Store (NXD8, NXDX)

Store (DIDD, DIDX)

Return (0x0D)

}

If (LEqual (DIDD, Zero))

{

Return (0x0D)

}

Else

{

Return (And (0xFFFF, DIDD))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DIDD, Zero))

{

Return (0x0D)

}

Else

{

Return (CDDS (DIDD))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD8)

}

Return (NDDS (DIDD))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD0E)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DIDE), 0x0400))

{

Store (0x0E, EDPV)

Store (NXD8, NXDX)

Store (DIDE, DIDX)

Return (0x0E)

}

If (LEqual (DIDE, Zero))

{

Return (0x0E)

}

Else

{

Return (And (0xFFFF, DIDE))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DIDE, Zero))

{

Return (0x0E)

}

Else

{

Return (CDDS (DIDE))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD8)

}

Return (NDDS (DIDE))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD0F)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (And (0x0F00, DIDF), 0x0400))

{

Store (0x0F, EDPV)

Store (NXD8, NXDX)

Store (DIDF, DIDX)

Return (0x0F)

}

If (LEqual (DIDF, Zero))

{

Return (0x0F)

}

Else

{

Return (And (0xFFFF, DIDF))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (DIDC, Zero))

{

Return (0x0F)

}

Else

{

Return (CDDS (DIDF))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXD8)

}

Return (NDDS (DIDF))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Device (DD1F)

{

Method (_ADR, 0, Serialized) // _ADR: Address

{

If (LEqual (EDPV, Zero))

{

Return (0x1F)

}

Else

{

Return (And (0xFFFF, DIDX))

}

Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status

{

If (LEqual (EDPV, Zero))

{

Return (Zero)

}

Else

{

Return (CDDS (DIDX))

}

Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State

{

If (LAnd (LEqual (And (SGMD, 0x7F), One), CondRefOf (SNXD

)))

{

Return (NXDX)

}

Return (NDDS (DIDX))

}

Method (_DSS, 1, NotSerialized) // _DSS: Device Set State

{

DSST (Arg0)

}

Method (_BCL, 0, NotSerialized) // _BCL: Brightness Control Levels

{

Return (Package (0x67)

{

0x50,

0x32,

Zero,

One,

0x02,

0x03,

0x04,

0x05,

0x06,

0x07,

0x08,

0x09,

0x0A,

0x0B,

0x0C,

0x0D,

0x0E,

0x0F,

0x10,

0x11,

0x12,

0x13,

0x14,

0x15,

0x16,

0x17,

0x18,

0x19,

0x1A,

0x1B,

0x1C,

0x1D,

0x1E,

0x1F,

0x20,

0x21,

0x22,

0x23,

0x24,

0x25,

0x26,

0x27,

0x28,

0x29,

0x2A,

0x2B,

0x2C,

0x2D,

0x2E,

0x2F,

0x30,

0x31,

0x32,

0x33,

0x34,

0x35,

0x36,

0x37,

0x38,

0x39,

0x3A,

0x3B,

0x3C,

0x3D,

0x3E,

0x3F,

0x40,

0x41,

0x42,

0x43,

0x44,

0x45,

0x46,

0x47,

0x48,

0x49,

0x4A,

0x4B,

0x4C,

0x4D,

0x4E,

0x4F,

0x50,

0x51,

0x52,

0x53,

0x54,

0x55,

0x56,

0x57,

0x58,

0x59,

0x5A,

0x5B,

0x5C,

0x5D,

0x5E,

0x5F,

0x60,

0x61,

0x62,

0x63,

0x64

})

}

Method (_BCM, 1, NotSerialized) // _BCM: Brightness Control Method

{

If (LAnd (LGreaterEqual (Arg0, Zero), LLessEqual (Arg0, 0x64)))

{

\_SB.PCI0.GFX0.AINT (One, Arg0)

Store (Arg0, BRTL)

}

Method (_BQC, 0, NotSerialized) // _BQC: Brightness Query Current

{

Return (BRTL)

}

Method (SDDL, 1, NotSerialized)

{

Increment (NDID)

Store (And (Arg0, 0x0F0F), Local0)

Or (0x80000000, Local0, Local1)

If (LEqual (DIDL, Local0))

{

Return (Local1)

}

If (LEqual (DDL2, Local0))

{

Return (Local1)

}

If (LEqual (DDL3, Local0))

{

Return (Local1)

}

If (LEqual (DDL4, Local0))

{

Return (Local1)

}

If (LEqual (DDL5, Local0))

{

Return (Local1)

}

If (LEqual (DDL6, Local0))

{

Return (Local1)

}

If (LEqual (DDL7, Local0))

{

Return (Local1)

}

If (LEqual (DDL8, Local0))

{

Return (Local1)

}

If (LEqual (DDL9, Local0))

{

Return (Local1)

}

If (LEqual (DD10, Local0))

{

Return (Local1)

}

If (LEqual (DD11, Local0))

{

Return (Local1)

}

If (LEqual (DD12, Local0))

{

Return (Local1)

}

If (LEqual (DD13, Local0))

{

Return (Local1)

}

If (LEqual (DD14, Local0))

{

Return (Local1)

}

If (LEqual (DD15, Local0))

{

Return (Local1)

}

Return (Zero)

}

Method (CDDS, 1, NotSerialized)

{

Store (And (Arg0, 0x0F0F), Local0)

If (LEqual (Zero, Local0))

{

Return (0x1D)

}

If (LEqual (CADL, Local0))

{

Return (0x1F)

}

If (LEqual (CAL2, Local0))

{

Return (0x1F)

}

If (LEqual (CAL3, Local0))

{

Return (0x1F)

}

If (LEqual (CAL4, Local0))

{

Return (0x1F)

}

If (LEqual (CAL5, Local0))

{

Return (0x1F)

}

If (LEqual (CAL6, Local0))

{

Return (0x1F)

}

If (LEqual (CAL7, Local0))

{

Return (0x1F)

}

If (LEqual (CAL8, Local0))

{

Return (0x1F)

}

Return (0x1D)

}

Method (NDDS, 1, NotSerialized)

{

Store (And (Arg0, 0x0F0F), Local0)

If (LEqual (Zero, Local0))

{

Return (Zero)

}

If (LEqual (NADL, Local0))

{

Return (One)

}

If (LEqual (NDL2, Local0))

{

Return (One)

}

If (LEqual (NDL3, Local0))

{

Return (One)

}

If (LEqual (NDL4, Local0))

{

Return (One)

}

If (LEqual (NDL5, Local0))

{

Return (One)

}

If (LEqual (NDL6, Local0))

{

Return (One)

}

If (LEqual (NDL7, Local0))

{

Return (One)

}

If (LEqual (NDL8, Local0))

{

Return (One)

}

Return (Zero)

}

Method (DSST, 1, NotSerialized)

{

If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))

{

Store (NSTE, CSTE)

}

Scope (\_SB.PCI0)

{

OperationRegion (MCHP, PCI_Config, 0x40, 0xC0)

Field (MCHP, AnyAcc, NoLock, Preserve)

{

Offset (0x14),

AUDE, 8,

Offset (0x60),

TASM, 10,

Offset (0x62)

}

OperationRegion (IGDP, PCI_Config, 0x40, 0xC0)

Field (IGDP, AnyAcc, NoLock, Preserve)

{

Offset (0x10),

, 1,

GIVD, 1,

, 2,

GUMA, 3,

Offset (0x12),

Offset (0x14),

, 4,

GMFN, 1,

Offset (0x18),

Offset (0xA4),

ASLE, 8,

Offset (0xA8),

GSSE, 1,

GSSB, 14,

GSES, 1,

Offset (0xB0),

, 12,

CDVL, 1,

Offset (0xB2),

Offset (0xB5),

LBPC, 8,

Offset (0xBC),

ASLS, 32

}

OperationRegion (IGDM, SystemMemory, ASLB, 0x2000)

Field (IGDM, AnyAcc, NoLock, Preserve)

{

SIGN, 128,

SIZE, 32,

OVER, 32,

SVER, 256,

VVER, 128,

GVER, 128,

MBOX, 32,

DMOD, 32,

PCON, 32,

DVER, 64,

Offset (0x100),

DRDY, 32,

CSTS, 32,

CEVT, 32,

Offset (0x120),

DIDL, 32,

DDL2, 32,

DDL3, 32,

DDL4, 32,

DDL5, 32,

DDL6, 32,

DDL7, 32,

DDL8, 32,

CPDL, 32,

CPL2, 32,

CPL3, 32,

CPL4, 32,

CPL5, 32,

CPL6, 32,

CPL7, 32,

CPL8, 32,

CADL, 32,

CAL2, 32,

CAL3, 32,

CAL4, 32,

CAL5, 32,

CAL6, 32,

CAL7, 32,

CAL8, 32,

NADL, 32,

NDL2, 32,

NDL3, 32,

NDL4, 32,

NDL5, 32,

NDL6, 32,

NDL7, 32,

NDL8, 32,

ASLP, 32,

TIDX, 32,

CHPD, 32,

CLID, 32,

CDCK, 32,

SXSW, 32,

EVTS, 32,

CNOT, 32,

NRDY, 32,

DDL9, 32,

DD10, 32,

DD11, 32,

DD12, 32,

DD13, 32,

DD14, 32,

DD15, 32,

CPL9, 32,

CP10, 32,

CP11, 32,

CP12, 32,

CP13, 32,

CP14, 32,

CP15, 32,

Offset (0x200),

SCIE, 1,

GEFC, 4,

GXFC, 3,

GESF, 8,

Offset (0x204),

PARM, 32,

DSLP, 32,

Offset (0x300),

ARDY, 32,

ASLC, 32,

TCHE, 32,

ALSI, 32,

BCLP, 32,

PFIT, 32,

CBLV, 32,

BCLM, 320,

CPFM, 32,

EPFM, 32,

PLUT, 592,

PFMB, 32,

CCDV, 32,

PCFT, 32,

SROT, 32,

IUER, 32,

FDSP, 64,

FDSS, 32,

STAT, 32,

Offset (0x400),

GVD1, 49152,

PHED, 32,

BDDC, 2048

}

Name (DBTB, Package (0x15)

{

Zero,

0x07,

0x38,

0x01C0,

0x0E00,

0x3F,

0x01C7,

0x0E07,

0x01F8,

0x0E38,

0x0FC0,

Zero,

0x7000,

0x7007,

0x7038,

0x71C0,

0x7E00

})

Name (CDCT, Package (0x05)

{

Package (0x02)

{

0xE4,

0x0140

Package (0x02)

{

0xDE,

0x014D

Package (0x02)

{

0xDE,

0x014D

Package (0x02)

{

Zero,

Zero

Package (0x02)

{

0xDE,

0x014D

}

})

Name (SUCC, One)

Name (NVLD, 0x02)

Name (CRIT, 0x04)

Name (NCRT, 0x06)

Method (GSCI, 0, Serialized)

{

Method (GBDA, 0, Serialized)

{

If (LEqual (GESF, Zero))

{

Store (0x0659, PARM)

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GESF, One))

{

Store (0x00300482, PARM)

If (LEqual (S0ID, One))

{

Or (PARM, 0x0100, PARM)

}

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GESF, 0x04))

{

And (PARM, 0xEFFF0000, PARM)

And (PARM, ShiftLeft (DerefOf (Index (DBTB, IBTT)), 0x10),

PARM)

Or (IBTT, PARM, PARM)

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GESF, 0x05))

{

Store (IPSC, PARM)

Or (PARM, ShiftLeft (IPAT, 0x08), PARM)

Add (PARM, 0x0100, PARM)

Or (PARM, ShiftLeft (LIDS, 0x10), PARM)

Add (PARM, 0x00010000, PARM)

Or (PARM, ShiftLeft (IBIA, 0x14), PARM)

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GESF, 0x07))

{

Store (GIVD, PARM)

XOr (PARM, One, PARM)

Or (PARM, ShiftLeft (GMFN, One), PARM)

Or (PARM, 0x1800, PARM)

Or (PARM, ShiftLeft (IDMS, 0x11), PARM)

Or (ShiftLeft (DerefOf (Index (DerefOf (Index (CDCT, HVCO)), CDVL

)), 0x15), PARM, PARM)

Store (One, GESF)

Return (SUCC)

}

If (LEqual (GESF, 0x0A))

{

Store (Zero, PARM)

If (ISSC)

{

Or (PARM, 0x03, PARM)

}

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GESF, 0x0B))

{

Store (KSV0, PARM)

Store (KSV1, GESF)

Return (SUCC)

}

Store (Zero, GESF)

Return (CRIT)

}

Method (SBCB, 0, Serialized)

{

If (LEqual (GESF, Zero))

{

Store (Zero, PARM)

Store (0x000F87DD, PARM)

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GESF, One))

{

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x03))

{

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x04))

{

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x05))

{

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x07))

{

If (LAnd (LEqual (S0ID, One), LLess (OSYS, 0x07DF)))

{

If (LEqual (And (PARM, 0xFF), One))

{

\GUAM (One)

}

If (LEqual (PARM, Zero))

{

Store (CLID, Local0)

If (And (0x80000000, Local0))

{

And (CLID, 0x0F, CLID)

GLID (CLID)

}

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x08))

{

If (LAnd (LEqual (S0ID, One), LLess (OSYS, 0x07DF)))

{

Store (And (ShiftRight (PARM, 0x08), 0xFF), Local0)

If (LEqual (Local0, Zero))

{

\GUAM (Zero)

}

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x09))

{

And (PARM, 0xFF, IBTT)

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x0A))

{

And (PARM, 0xFF, IPSC)

If (And (ShiftRight (PARM, 0x08), 0xFF))

{

And (ShiftRight (PARM, 0x08), 0xFF, IPAT)

Decrement (IPAT)

}

And (ShiftRight (PARM, 0x14), 0x07, IBIA)

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x0B))

{

And (ShiftRight (PARM, One), One, IF1E)

If (And (PARM, 0x0001E000))

{

And (ShiftRight (PARM, 0x0D), 0x0F, IDMS)

}

Else

{

And (ShiftRight (PARM, 0x11), 0x0F, IDMS)

}

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x10))

{

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x11))

{

Store (ShiftLeft (LIDS, 0x08), PARM)

Add (PARM, 0x0100, PARM)

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GESF, 0x12))

{

If (And (PARM, One))

{

If (LEqual (ShiftRight (PARM, One), One))

{

Store (One, ISSC)

}

Else

{

Store (Zero, GESF)

Return (CRIT)

}

Else

{

Store (Zero, ISSC)

}

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x13))

{

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x14))

{

And (PARM, 0x0F, PAVP)

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GEFC, 0x04))

{

Store (GBDA (), GXFC)

}

If (LEqual (GEFC, 0x06))

{

Store (SBCB (), GXFC)

}

Store (Zero, GEFC)

Store (One, CPSC)

Store (Zero, GSSE)

Store (Zero, SCIE)

Return (Zero)

}

Method (PDRD, 0, NotSerialized)

{

Return (LNot (DRDY))

}

Method (PSTS, 0, NotSerialized)

{

If (LGreater (CSTS, 0x02))

{

Sleep (ASLP)

}

Return (LEqual (CSTS, 0x03))

}

Method (GNOT, 2, NotSerialized)

{

If (PDRD ())

{

Return (One)

}

Store (Arg0, CEVT)

Store (0x03, CSTS)

If (LAnd (LEqual (CHPD, Zero), LEqual (Arg1, Zero)))

{

Notify (\_SB.PCI0.GFX0, Arg1)

}

If (CondRefOf (HNOT))

{

HNOT (Arg0)

}

Else

{

Notify (\_SB.PCI0.GFX0, 0x80)

}

Return (Zero)

}

Method (GHDS, 1, NotSerialized)

{

Store (Arg0, TIDX)

Return (GNOT (One, Zero))

}

Method (GLID, 1, NotSerialized)

{

If (LEqual (Arg0, One))

{

Store (0x03, CLID)

}

Else

{

Store (Arg0, CLID)

}

If (GNOT (0x02, Zero))

{

Or (CLID, 0x80000000, CLID)

Return (One)

}

Return (Zero)

}

Method (GDCK, 1, NotSerialized)

{

Store (Arg0, CDCK)

Return (GNOT (0x04, Zero))

}

Method (PARD, 0, NotSerialized)

{

If (LNot (ARDY))

{

Sleep (ASLP)

}

Return (LNot (ARDY))

}

Method (IUEH, 1, Serialized)

{

And (IUER, 0xC0, IUER)

XOr (IUER, ShiftLeft (One, Arg0), IUER)

If (LLessEqual (Arg0, 0x04))

{

Return (AINT (0x05, Zero))

}

Else

{

Return (AINT (Arg0, Zero))

}

Method (AINT, 2, NotSerialized)

{

If (LNot (And (TCHE, ShiftLeft (One, Arg0))))

{

Return (One)

}

If (PARD ())

{

Return (One)

}

If (LAnd (LGreaterEqual (Arg0, 0x05), LLessEqual (Arg0, 0x07)))

{

Store (ShiftLeft (One, Arg0), ASLC)

Store (One, ASLE)

Store (Zero, Local2)

While (LAnd (LLess (Local2, 0xFA), LNotEqual (ASLC, Zero)))

{

Sleep (0x04)

Increment (Local2)

}

Return (Zero)

}

If (LEqual (Arg0, 0x02))

{

If (CPFM)

{

And (CPFM, 0x0F, Local0)

And (EPFM, 0x0F, Local1)

If (LEqual (Local0, One))

{

If (And (Local1, 0x06))

{

Store (0x06, PFIT)

}

Else

{

If (And (Local1, 0x08))

{

Store (0x08, PFIT)

}

Else

{

Store (One, PFIT)

}

If (LEqual (Local0, 0x06))

{

If (And (Local1, 0x08))

{

Store (0x08, PFIT)

}

Else

{

If (And (Local1, One))

{

Store (One, PFIT)

}

Else

{

Store (0x06, PFIT)

}

If (LEqual (Local0, 0x08))

{

If (And (Local1, One))

{

Store (One, PFIT)

}

Else

{

If (And (Local1, 0x06))

{

Store (0x06, PFIT)

}

Else

{

Store (0x08, PFIT)

}

Else

{

XOr (PFIT, 0x07, PFIT)

}

Or (PFIT, 0x80000000, PFIT)

Store (0x04, ASLC)

}

Else

{

If (LEqual (Arg0, One))

{

Store (Divide (Multiply (Arg1, 0xFF), 0x64, ), BCLP)

Or (BCLP, 0x80000000, BCLP)

Store (0x02, ASLC)

}

Else

{

If (LEqual (Arg0, Zero))

{

Store (Arg1, ALSI)

Store (One, ASLC)

}

Else

{

Return (One)

}

Store (One, ASLE)

Return (Zero)

}

Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method

{

Name (_T_0, Zero) // _T_x: Emitted by ASL Compiler

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xC6, 0x41, 0x5B, 0x3E, 0x1D, 0xEB, 0x60, 0x42,

/* 0008 */ 0x9D, 0x15, 0xC7, 0x1F, 0xBA, 0xDA, 0xE4, 0x14

}))

{

While (One)

{

Store (ToInteger (Arg2), _T_0)

If (LEqual (_T_0, Zero))

{

If (LEqual (Arg1, One))

{

Store ("iGfx Supported Functions Bitmap ", Debug)

Return (0x0001E7FF)

}

Else

{

If (LEqual (_T_0, One))

{

If (LEqual (Arg1, One))

{

Store (" Adapter Power State Notification ", Debug)

If (LAnd (LEqual (S0ID, One), LLess (OSYS, 0x07DF)))

{

If (LEqual (And (DerefOf (Index (Arg3, Zero)), 0xFF),

One))

{

\GUAM (One)

}

If (LEqual (DerefOf (Index (Arg3, Zero)), Zero))

{

Store (CLID, Local0)

If (And (0x80000000, Local0))

{

And (CLID, 0x0F, CLID)

GLID (CLID)

}

Return (One)

}

Else

{

If (LEqual (_T_0, 0x02))

{

If (LEqual (Arg1, One))

{

Store ("Display Power State Notification ", Debug)

If (LAnd (LEqual (S0ID, One), LLess (OSYS, 0x07DF)))

{

Store (And (DerefOf (Index (Arg3, One)), 0xFF), Local0)

If (LEqual (Local0, Zero))

{

\GUAM (Zero)

}

Return (One)

}

Else

{

If (LEqual (_T_0, 0x03))

{

If (LEqual (Arg1, One))

{

Store ("BIOS POST Completion Notification ", Debug)

Return (One)

}

Else

{

If (LEqual (_T_0, 0x04))

{

If (LEqual (Arg1, One))

{

Store ("Pre-Hires Set Mode ", Debug)

Return (One)

}

Else

{

If (LEqual (_T_0, 0x05))

{

If (LEqual (Arg1, One))

{

Store ("Post-Hires Set Mode ", Debug)

Return (One)

}

Else

{

If (LEqual (_T_0, 0x06))

{

If (LEqual (Arg1, One))

{

Store ("SetDisplayDeviceNotification", Debug)

Return (One)

}

Else

{

If (LEqual (_T_0, 0x07))

{

If (LEqual (Arg1, One))

{

Store ("SetBootDevicePreference ", Debug)

And (DerefOf (Index (Arg3, Zero)), 0xFF, IBTT)

Return (One)

}

Else

{

If (LEqual (_T_0, 0x08))

{

If (LEqual (Arg1, One))

{

Store ("SetPanelPreference ", Debug)

And (DerefOf (Index (Arg3, Zero)), 0xFF, IPSC)

If (And (DerefOf (Index (Arg3, One)), 0xFF))

{

And (DerefOf (Index (Arg3, One)), 0xFF, IPAT)

Decrement (IPAT)

}

And (ShiftRight (DerefOf (Index (Arg3, 0x02)), 0x04), 0x07,

IBIA)

Return (One)

}

Else

{

If (LEqual (_T_0, 0x09))

{

If (LEqual (Arg1, One))

{

Store ("FullScreenDOS ", Debug)

Return (One)

}

Else

{

If (LEqual (_T_0, 0x0A))

{

If (LEqual (Arg1, One))

{

Store ("APM Complete ", Debug)

Store (ShiftLeft (LIDS, 0x08), Local0)

Add (Local0, 0x0100, Local0)

Return (Local0)

}

Else

{

If (LEqual (_T_0, 0x0D))

{

If (LEqual (Arg1, One))

{

Store ("GetBootDisplayPreference ", Debug)

Or (ShiftLeft (DerefOf (Index (Arg3, 0x03)), 0x18), ShiftLeft (

DerefOf (Index (Arg3, 0x02)), 0x10), Local0)

And (Local0, 0xEFFF0000, Local0)

And (Local0, ShiftLeft (DerefOf (Index (DBTB, IBTT)), 0x10),

Local0)

Or (IBTT, Local0, Local0)

Return (Local0)

}

Else

{

If (LEqual (_T_0, 0x0E))

{

If (LEqual (Arg1, One))

{

Store ("GetPanelDetails ", Debug)

Store (IPSC, Local0)

Or (Local0, ShiftLeft (IPAT, 0x08), Local0)

Add (Local0, 0x0100, Local0)

Or (Local0, ShiftLeft (LIDS, 0x10), Local0)

Add (Local0, 0x00010000, Local0)

Or (Local0, ShiftLeft (IBIA, 0x14), Local0)

Return (Local0)

}

Else

{

If (LEqual (_T_0, 0x0F))

{

If (LEqual (Arg1, One))

{

Store ("GetInternalGraphics ", Debug)

Store (GIVD, Local0)

XOr (Local0, One, Local0)

Or (Local0, ShiftLeft (GMFN, One), Local0)

Or (Local0, 0x1800, Local0)

Or (Local0, ShiftLeft (IDMS, 0x11), Local0)

Or (ShiftLeft (DerefOf (Index (DerefOf (Index (CDCT, HVCO)), CDVL

)), 0x15), Local0, Local0)

Return (Local0)

}

Else

{

If (LEqual (_T_0, 0x10))

{

If (LEqual (Arg1, One))

{

Store ("GetAKSV ", Debug)

Name (KSVP, Package (0x02)

{

0x80000000,

0x8000

})

Store (KSV0, Index (KSVP, Zero))

Store (KSV1, Index (KSVP, One))

Return (KSVP)

}

Break

}

Return (Buffer (One)

{

0x00

})

}

Scope (\_SB)

{

Device (SKC0)

{

Name (_HID, "INT3470") // _HID: Hardware ID

Name (_CID, EisaId ("PNP0C02")) // _CID: Compatible ID

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (IMTP, 0x02))

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Scope (\_SB.PCI0.GFX0)

{

Device (SKC0)

{

Name (_ADR, 0xCA00) // _ADR: Address

Method (_STA, 0, NotSerialized) // _STA: Status

{

If (LEqual (IMTP, One))

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Scope (\_SB.PCI0)

{

Name (HBRB, Zero)

Name (HBRD, Zero)

Name (HBRF, Zero)

Name (IVID, 0xFFFF)

Name (PEBA, Zero)

Name (PION, Zero)

Name (PIOF, Zero)

Name (PBUS, Zero)

Name (PDEV, Zero)

Name (PFUN, Zero)

Name (EBUS, Zero)

Name (EDEV, Zero)

Name (EFN0, Zero)

Name (EFN1, One)

Name (INDX, Zero)

Name (POFF, Zero)

Name (PLEN, Zero)

Name (VIOF, Zero)

Name (DSOF, 0x06)

Name (CPOF, 0x34)

Name (SBOF, 0x19)

Name (ELC0, Zero)

Name (ECP0, 0xFFFFFFFF)

Name (H0VI, Zero)

Name (H0DI, Zero)

Name (ELC1, Zero)

Name (ECP1, 0xFFFFFFFF)

Name (H1VI, Zero)

Name (H1DI, Zero)

Name (ELC2, Zero)

Name (ECP2, 0xFFFFFFFF)

Name (H2VI, Zero)

Name (H2DI, Zero)

Name (TIDX, Zero)

Name (OTSD, Zero)

Name (MXPG, 0x03)

Name (FBDL, Zero)

Name (CBDL, Zero)

Name (MBDL, Zero)

Name (HSTR, Zero)

Name (LREV, Zero)

Name (TCNT, Zero)

Name (LDLY, 0x012C)

OperationRegion (OPG0, SystemMemory, Add (XBAS, 0x8000), 0x1000)

Field (OPG0, AnyAcc, NoLock, Preserve)

{

P0VI, 16,

P0DI, 16,

Offset (0x06),

DSO0, 16,

Offset (0x34),

CPO0, 8,

Offset (0xB0),

, 4,

P0LD, 1,

Offset (0xBC),

, 5,

P0L2, 1,

P0L0, 1,

Offset (0x11A),

, 1,

P0VC, 1,

Offset (0x214),

Offset (0x216),

P0LS, 4,

Offset (0x248),

, 7,

Q0L2, 1,

Q0L0, 1,

Offset (0x504),

HST0, 32,

P0TR, 1,

Offset (0x91C),

, 31,

BSP1, 1,

Offset (0x93C),

, 31,

BSP2, 1,

Offset (0x95C),

, 31,

BSP3, 1,

Offset (0x97C),

, 31,

BSP4, 1,

Offset (0x99C),

, 31,

BSP5, 1,

Offset (0x9BC),

, 31,

BSP6, 1,

Offset (0x9DC),

, 31,

BSP7, 1,

Offset (0x9FC),

, 31,

BSP8, 1,

Offset (0xC20),

, 4,

P0AP, 2,

Offset (0xC38),

, 3,

P0RM, 1,

Offset (0xC74),

P0LT, 4,

Offset (0xD0C),

LRV0, 32

}

OperationRegion (PCS0, SystemMemory, Add (XBAS, ShiftLeft (SBN0, 0x14)), 0xF0)

Field (PCS0, DWordAcc, Lock, Preserve)

{

D0VI, 16,

Offset (0x2C),

S0VI, 16,

S0DI, 16

}

OperationRegion (CAP0, SystemMemory, Add (Add (XBAS, ShiftLeft (SBN0, 0x14)), EECP

), 0x14)

Field (CAP0, DWordAcc, NoLock, Preserve)

{

Offset (0x0C),

LCP0, 32,

LCT0, 16

}

OperationRegion (OPG1, SystemMemory, Add (XBAS, 0x9000), 0x1000)

Field (OPG1, AnyAcc, NoLock, Preserve)

{

P1VI, 16,

P1DI, 16,

Offset (0x06),

DSO1, 16,

Offset (0x34),

CPO1, 8,

Offset (0xB0),

, 4,

P1LD, 1,

Offset (0xBC),

, 5,

P1L2, 1,

P1L0, 1,

Offset (0x11A),

, 1,

P1VC, 1,

Offset (0x214),

Offset (0x216),

P1LS, 4,

Offset (0x248),

, 7,

Q1L2, 1,

Q1L0, 1,

Offset (0x504),

HST1, 32,

P1TR, 1,

Offset (0xC20),

, 4,

P1AP, 2,

Offset (0xC38),

, 3,

P1RM, 1,

Offset (0xC74),

P1LT, 4,

Offset (0xD0C),

LRV1, 32

}

OperationRegion (PCS1, SystemMemory, Add (XBAS, ShiftLeft (SBN1, 0x14)), 0xF0)

Field (PCS1, DWordAcc, Lock, Preserve)

{

D1VI, 16,

Offset (0x2C),

S1VI, 16,

S1DI, 16

}

OperationRegion (CAP1, SystemMemory, Add (Add (XBAS, ShiftLeft (SBN1, 0x14)), EEC1

), 0x14)

Field (CAP1, DWordAcc, NoLock, Preserve)

{

Offset (0x0C),

LCP1, 32,

LCT1, 16

}

OperationRegion (OPG2, SystemMemory, Add (XBAS, 0xA000), 0x1000)

Field (OPG2, AnyAcc, NoLock, Preserve)

{

P2VI, 16,

P2DI, 16,

Offset (0x06),

DSO2, 16,

Offset (0x34),

CPO2, 8,

Offset (0xB0),

, 4,

P2LD, 1,

Offset (0xBC),

, 5,

P2L2, 1,

P2L0, 1,

Offset (0x11A),

, 1,

P2VC, 1,

Offset (0x214),

Offset (0x216),

P2LS, 4,

Offset (0x248),

, 7,

Q2L2, 1,

Q2L0, 1,

Offset (0x504),

HST2, 32,

P2TR, 1,

Offset (0xC20),

, 4,

P2AP, 2,

Offset (0xC38),

, 3,

P2RM, 1,

Offset (0xC74),

P2LT, 4,

Offset (0xD0C),

LRV2, 32

}

OperationRegion (PCS2, SystemMemory, Add (XBAS, ShiftLeft (SBN2, 0x14)), 0xF0)

Field (PCS2, DWordAcc, Lock, Preserve)

{

D2VI, 16,

Offset (0x2C),

S2VI, 16,

S2DI, 16

}

OperationRegion (CAP2, SystemMemory, Add (Add (XBAS, ShiftLeft (SBN2, 0x14)), EEC2

), 0x14)

Field (CAP2, DWordAcc, NoLock, Preserve)

{

Offset (0x0C),

LCP2, 32,

LCT2, 16

}

OperationRegion (MCD0, SystemMemory, XBAS, 0xF0)

Field (MCD0, DWordAcc, NoLock, Preserve)

{

Offset (0x02),

MODI, 16

}

Method (PEGS, 0, Serialized)

{

Store (Zero, Local0)

If (LEqual (And (CPEX, 0x0FFF0FF0), 0x000506E0))

{

If (LNotEqual (And (MODI, 0x06), 0x04))

{

Store (One, Local0)

}

Return (Local0)

}

Method (PGON, 1, Serialized)

{

Store (Arg0, PION)

If (LEqual (PION, Zero))

{

If (LEqual (SGGP, Zero))

{

Return (Zero)

}

Else

{

If (LEqual (PION, One))

{

If (LEqual (P1GP, Zero))

{

Return (Zero)

}

Else

{

If (LEqual (PION, 0x02))

{

If (LEqual (P2GP, Zero))

{

Return (Zero)

}

Store (\XBAS, PEBA)

Store (GDEV (PION), PDEV)

Store (GFUN (PION), PFUN)

Name (SCLK, Package (0x03)

{

One,

0x0100,

Zero

})

If (LNotEqual (DerefOf (Index (SCLK, Zero)), Zero))

{

PCRA (0xDC, 0x100C, Not (DerefOf (Index (SCLK, One))))

Sleep (0x10)

}

If (LEqual (CCHK (PION, One), Zero))

{

Return (Zero)

}

GPPR (PION, One)

If (LEqual (OSYS, 0x07D9))

{

If (LEqual (PION, Zero))

{

Store (Zero, P0AP)

Store (Zero, P0RM)

}

Else

{

If (LEqual (PION, One))

{

Store (Zero, P1AP)

Store (Zero, P1RM)

}

Else

{

If (LEqual (PION, 0x02))

{

Store (Zero, P2AP)

Store (Zero, P2RM)

}

If (LNotEqual (PBGE, Zero))

{

If (SBDL (PION))

{

PUAB (PION)

Store (GUBC (PION), CBDL)

Store (GMXB (PION), MBDL)

If (LGreater (CBDL, MBDL))

{

Store (MBDL, CBDL)

}

PDUB (PION, CBDL)

}

If (LEqual (PION, Zero))

{

Store (Zero, P0LD)

Store (One, P0TR)

Store (Zero, TCNT)

While (LLess (TCNT, LDLY))

{

If (LEqual (P0VC, Zero))

{

Break

}

Sleep (0x10)

Add (TCNT, 0x10, TCNT)

}

Else

{

If (LEqual (PION, One))

{

Store (Zero, P1LD)

Store (One, P1TR)

Store (Zero, TCNT)

While (LLess (TCNT, LDLY))

{

If (LEqual (P1VC, Zero))

{

Break

}

Sleep (0x10)

Add (TCNT, 0x10, TCNT)

}

Else

{

If (LEqual (PION, 0x02))

{

Store (Zero, P2LD)

Store (One, P2TR)

Store (Zero, TCNT)

While (LLess (TCNT, LDLY))

{

If (LEqual (P2VC, Zero))

{

Break

}

Sleep (0x10)

Add (TCNT, 0x10, TCNT)

}

Else

{

LKEN (PION)

}

If (LEqual (PION, Zero))

{

Store (H0VI, S0VI)

Store (H0DI, S0DI)

Or (And (ELC0, 0x43), And (LCT0, 0xFFBC), LCT0)

}

Else

{

If (LEqual (PION, One))

{

Store (H1VI, S1VI)

Store (H1DI, S1DI)

Or (And (ELC1, 0x43), And (LCT1, 0xFFBC), LCT1)

}

Else

{

If (LEqual (PION, 0x02))

{

Store (H2VI, S2VI)

Store (H2DI, S2DI)

Or (And (ELC2, 0x43), And (LCT2, 0xFFBC), LCT2)

}

Return (Zero)

}

Method (PGOF, 1, Serialized)

{

Store (Arg0, PIOF)

If (LEqual (PIOF, Zero))

{

If (LEqual (SGGP, Zero))

{

Return (Zero)

}

Else

{

If (LEqual (PIOF, One))

{

If (LEqual (P1GP, Zero))

{

Return (Zero)

}

Else

{

If (LEqual (PIOF, 0x02))

{

If (LEqual (P2GP, Zero))

{

Return (Zero)

}

Store (\XBAS, PEBA)

Store (GDEV (PIOF), PDEV)

Store (GFUN (PIOF), PFUN)

Name (SCLK, Package (0x03)

{

One,

0x0100,

Zero

})

If (LEqual (CCHK (PIOF, Zero), Zero))

{

Return (Zero)

}

If (LEqual (Arg0, Zero))

{

Store (LCT0, ELC0)

Store (S0VI, H0VI)

Store (S0DI, H0DI)

Store (LCP0, ECP0)

}

Else

{

If (LEqual (Arg0, One))

{

Store (LCT1, ELC1)

Store (S1VI, H1VI)

Store (S1DI, H1DI)

Store (LCP1, ECP1)

}

Else

{

If (LEqual (Arg0, 0x02))

{

Store (LCT2, ELC2)

Store (S2VI, H2VI)

Store (S2DI, H2DI)

Store (LCP2, ECP2)

}

If (LEqual (OSYS, 0x07D9))

{

If (LEqual (PIOF, Zero))

{

Store (One, P0LD)

Store (Zero, TCNT)

While (LLess (TCNT, LDLY))

{

If (LEqual (P0LT, 0x08))

{

Break

}

Sleep (0x10)

Add (TCNT, 0x10, TCNT)

}

Store (One, P0RM)

Store (0x03, P0AP)

}

Else

{

If (LEqual (PIOF, One))

{

Store (One, P1LD)

Store (Zero, TCNT)

While (LLess (TCNT, LDLY))

{

If (LEqual (P1LT, 0x08))

{

Break

}

Sleep (0x10)

Add (TCNT, 0x10, TCNT)

}

Store (One, P1RM)

Store (0x03, P1AP)

}

Else

{

If (LEqual (PIOF, 0x02))

{

Store (One, P2LD)

Store (Zero, TCNT)

While (LLess (TCNT, LDLY))

{

If (LEqual (P2LT, 0x08))

{

Break

}

Sleep (0x10)

Add (TCNT, 0x10, TCNT)

}

Store (One, P2RM)

Store (0x03, P2AP)

}

If (LNotEqual (PBGE, Zero))

{

If (SBDL (PIOF))

{

Store (GMXB (PIOF), MBDL)

PDUB (PIOF, MBDL)

}

Else

{

LKDS (PIOF)

}

If (LNotEqual (DerefOf (Index (SCLK, Zero)), Zero))

{

PCRO (0xDC, 0x100C, DerefOf (Index (SCLK, One)))

Sleep (0x10)

}

GPPR (PIOF, Zero)

If (LNotEqual (OSYS, 0x07D9))

{

DIWK (PIOF)

}

Return (Zero)

}

Method (MMRB, 5, NotSerialized)

{

Store (Arg0, Local7)

Or (Local7, ShiftLeft (Arg1, 0x14), Local7)

Or (Local7, ShiftLeft (Arg2, 0x0F), Local7)

Or (Local7, ShiftLeft (Arg3, 0x0C), Local7)

Or (Local7, Arg4, Local7)

OperationRegion (PCI0, SystemMemory, Local7, One)

Field (PCI0, ByteAcc, NoLock, Preserve)

{

TEMP, 8

}

Return (TEMP)

}

Method (MMWB, 6, NotSerialized)

{

Store (Arg0, Local7)

Or (Local7, ShiftLeft (Arg1, 0x14), Local7)

Or (Local7, ShiftLeft (Arg2, 0x0F), Local7)

Or (Local7, ShiftLeft (Arg3, 0x0C), Local7)

Or (Local7, Arg4, Local7)

OperationRegion (PCI0, SystemMemory, Local7, One)

Field (PCI0, ByteAcc, NoLock, Preserve)

{

TEMP, 8

}

Store (Arg5, TEMP)

}

Method (MMRW, 5, NotSerialized)

{

Store (Arg0, Local7)

Or (Local7, ShiftLeft (Arg1, 0x14), Local7)

Or (Local7, ShiftLeft (Arg2, 0x0F), Local7)

Or (Local7, ShiftLeft (Arg3, 0x0C), Local7)

Or (Local7, Arg4, Local7)

OperationRegion (PCI0, SystemMemory, Local7, 0x02)

Field (PCI0, ByteAcc, NoLock, Preserve)

{

TEMP, 16

}

Return (TEMP)

}

Method (MMWW, 6, NotSerialized)

{

Store (Arg0, Local7)

Or (Local7, ShiftLeft (Arg1, 0x14), Local7)

Or (Local7, ShiftLeft (Arg2, 0x0F), Local7)

Or (Local7, ShiftLeft (Arg3, 0x0C), Local7)

Or (Local7, Arg4, Local7)

OperationRegion (PCI0, SystemMemory, Local7, 0x02)

Field (PCI0, ByteAcc, NoLock, Preserve)

{

TEMP, 16

}

Store (Arg5, TEMP)

}

Method (MMRD, 5, NotSerialized)

{

Store (Arg0, Local7)

Or (Local7, ShiftLeft (Arg1, 0x14), Local7)

Or (Local7, ShiftLeft (Arg2, 0x0F), Local7)

Or (Local7, ShiftLeft (Arg3, 0x0C), Local7)

Or (Local7, Arg4, Local7)

OperationRegion (PCI0, SystemMemory, Local7, 0x04)

Field (PCI0, ByteAcc, NoLock, Preserve)

{

TEMP, 32

}

Return (TEMP)

}

Method (MMWD, 6, NotSerialized)

{

Store (Arg0, Local7)

Or (Local7, ShiftLeft (Arg1, 0x14), Local7)

Or (Local7, ShiftLeft (Arg2, 0x0F), Local7)

Or (Local7, ShiftLeft (Arg3, 0x0C), Local7)

Or (Local7, Arg4, Local7)

OperationRegion (PCI0, SystemMemory, Local7, 0x04)

Field (PCI0, ByteAcc, NoLock, Preserve)

{

TEMP, 32

}

Store (Arg5, TEMP)

}

Method (GULC, 1, NotSerialized)

{

Store (MMRD (PEBA, PBUS, PDEV, PFUN, 0xAC), Local7)

ShiftRight (Local7, 0x04, Local7)

And (Local7, 0x3F, Local7)

Store (Arg0, Local6)

ShiftRight (Local6, 0x04, Local6)

And (Local6, 0x3F, Local6)

If (LGreater (Local7, Local6))

{

Subtract (Local7, Local6, Local0)

}

Else

{

Store (Zero, Local0)

}

Return (Local0)

}

Method (GMXB, 1, NotSerialized)

{

If (LEqual (Arg0, Zero))

{

Store (HST0, HSTR)

}

Else

{

If (LEqual (Arg0, One))

{

Store (HST1, HSTR)

}

Else

{

If (LEqual (Arg0, 0x02))

{

Store (HST2, HSTR)

}

ShiftRight (HSTR, 0x10, HSTR)

And (HSTR, 0x03, HSTR)

If (LEqual (Arg0, Zero))

{

If (LEqual (HSTR, 0x03))

{

Store (0x08, Local0)

}

Else

{

Store (0x04, Local0)

}

Else

{

If (LEqual (Arg0, One))

{

If (LEqual (HSTR, 0x02))

{

Store (0x04, Local0)

}

Else

{

If (LEqual (HSTR, Zero))

{

Store (0x02, Local0)

}

Else

{

If (LEqual (Arg0, 0x02))

{

If (LEqual (HSTR, Zero))

{

Store (0x02, Local0)

}

Return (Local0)

}

Method (PUAB, 1, NotSerialized)

{

Store (Zero, FBDL)

Store (Zero, CBDL)

If (LEqual (Arg0, Zero))

{

Store (HST0, HSTR)

Store (LRV0, LREV)

}

Else

{

If (LEqual (Arg0, One))

{

Store (HST1, HSTR)

Store (LRV1, LREV)

}

Else

{

If (LEqual (Arg0, 0x02))

{

Store (HST2, HSTR)

Store (LRV2, LREV)

}

ShiftRight (HSTR, 0x10, HSTR)

And (HSTR, 0x03, HSTR)

ShiftRight (LREV, 0x14, LREV)

And (LREV, One, LREV)

If (LEqual (Arg0, Zero))

{

If (LEqual (HSTR, 0x03))

{

Store (Zero, FBDL)

Store (0x08, CBDL)

}

Else

{

If (LEqual (LREV, Zero))

{

Store (Zero, FBDL)

Store (0x04, CBDL)

}

Else

{

Store (0x04, FBDL)

Store (0x04, CBDL)

}

Else

{

If (LEqual (Arg0, One))

{

If (LEqual (HSTR, 0x02))

{

If (LEqual (LREV, Zero))

{

Store (0x04, FBDL)

Store (0x04, CBDL)

}

Else

{

Store (Zero, FBDL)

Store (0x04, CBDL)

}

Else

{

If (LEqual (HSTR, Zero))

{

If (LEqual (LREV, Zero))

{

Store (0x04, FBDL)

Store (0x02, CBDL)

}

Else

{

Store (0x02, FBDL)

Store (0x02, CBDL)

}

Else

{

If (LEqual (Arg0, 0x02))

{

If (LEqual (HSTR, Zero))

{

If (LEqual (LREV, Zero))

{

Store (0x06, FBDL)

Store (0x02, CBDL)

}

Else

{

Store (Zero, FBDL)

Store (0x02, CBDL)

}

Store (One, INDX)

If (LNotEqual (CBDL, Zero))

{

While (LLessEqual (INDX, CBDL))

{

If (LEqual (P0VI, IVID)) {}

Else

{

If (LNotEqual (P0VI, IVID))

{

If (LEqual (FBDL, Zero))

{

Store (Zero, BSP1)

}

If (LEqual (FBDL, One))

{

Store (Zero, BSP2)

}

If (LEqual (FBDL, 0x02))

{

Store (Zero, BSP3)

}

If (LEqual (FBDL, 0x03))

{

Store (Zero, BSP4)

}

If (LEqual (FBDL, 0x04))

{

Store (Zero, BSP5)

}

If (LEqual (FBDL, 0x05))

{

Store (Zero, BSP6)

}

If (LEqual (FBDL, 0x06))

{

Store (Zero, BSP7)

}

If (LEqual (FBDL, 0x07))

{

Store (Zero, BSP8)

}

Increment (FBDL)

Increment (INDX)

}

Method (PDUB, 2, NotSerialized)

{

Store (Zero, FBDL)

Store (Arg1, CBDL)

If (LEqual (CBDL, Zero))

{

Return (Zero)

}

If (LEqual (Arg0, Zero))

{

Store (HST0, HSTR)

Store (LRV0, LREV)

}

Else

{

If (LEqual (Arg0, One))

{

Store (HST1, HSTR)

Store (LRV1, LREV)

}

Else

{

If (LEqual (Arg0, 0x02))

{

Store (HST2, HSTR)

Store (LRV2, LREV)

}

ShiftRight (HSTR, 0x10, HSTR)

And (HSTR, 0x03, HSTR)

ShiftRight (LREV, 0x14, LREV)

And (LREV, One, LREV)

If (LEqual (Arg0, Zero))

{

If (LEqual (HSTR, 0x03))

{

If (LEqual (LREV, Zero))

{

Store (Subtract (0x08, CBDL), FBDL)

}

Else

{

Store (Zero, FBDL)

}

Else

{

If (LEqual (LREV, Zero))

{

Store (Subtract (0x04, CBDL), FBDL)

}

Else

{

Store (0x04, FBDL)

}

Else

{

If (LEqual (Arg0, One))

{

If (LEqual (HSTR, 0x02))

{

If (LEqual (LREV, Zero))

{

Store (Subtract (0x08, CBDL), FBDL)

}

Else

{

Store (Zero, FBDL)

}

Else

{

If (LEqual (HSTR, Zero))

{

If (LEqual (LREV, Zero))

{

Store (Subtract (0x06, CBDL), FBDL)

}

Else

{

Store (0x02, FBDL)

}

Else

{

If (LEqual (Arg0, 0x02))

{

If (LEqual (HSTR, Zero))

{

If (LEqual (LREV, Zero))

{

Store (Subtract (0x08, CBDL), FBDL)

}

Else

{

Store (Zero, FBDL)

}

Store (One, INDX)

While (LLessEqual (INDX, CBDL))

{

If (LEqual (P0VI, IVID)) {}

Else

{

If (LNotEqual (P0VI, IVID))

{

If (LEqual (FBDL, Zero))

{

Store (One, BSP1)

}

If (LEqual (FBDL, One))

{

Store (One, BSP2)

}

If (LEqual (FBDL, 0x02))

{

Store (One, BSP3)

}

If (LEqual (FBDL, 0x03))

{

Store (One, BSP4)

}

If (LEqual (FBDL, 0x04))

{

Store (One, BSP5)

}

If (LEqual (FBDL, 0x05))

{

Store (One, BSP6)

}

If (LEqual (FBDL, 0x06))

{

Store (One, BSP7)

}

If (LEqual (FBDL, 0x07))

{

Store (One, BSP8)

}

Increment (FBDL)

Increment (INDX)

}

Method (SBDL, 1, NotSerialized)

{

If (LEqual (Arg0, Zero))

{

If (LEqual (P0UB, Zero))

{

Return (Zero)

}

Else

{

If (LEqual (Arg0, One))

{

If (LEqual (P1UB, Zero))

{

Return (Zero)

}

Else

{

If (LEqual (Arg0, 0x02))

{

If (LEqual (P2UB, Zero))

{

Return (Zero)

}

Else

{

Return (Zero)

}

Return (One)

}

Method (GUBC, 1, NotSerialized)

{

Store (Zero, Local7)

If (LEqual (Arg0, Zero))

{

Store (LCP0, Local6)

}

Else

{

If (LEqual (Arg0, One))

{

Store (LCP1, Local6)

}

Else

{

If (LEqual (Arg0, 0x02))

{

Store (LCP2, Local6)

}

If (LEqual (Arg0, Zero))

{

If (LEqual (P0UB, 0xFF))

{

Store (GULC (Local6), Local5)

Store (Divide (Local5, 0x02, ), Local7)

}

Else

{

If (LNotEqual (P0UB, Zero))

{

Store (P0UB, Local7)

}

Else

{

If (LEqual (Arg0, One))

{

If (LEqual (P1UB, 0xFF))

{

Store (GULC (Local6), Local5)

Store (Divide (Local5, 0x02, ), Local7)

}

Else

{

If (LNotEqual (P1UB, Zero))

{

Store (P1UB, Local7)

}

Else

{

If (LEqual (Arg0, 0x02))

{

If (LEqual (P2UB, 0xFF))

{

Store (GULC (Local6), Local5)

Store (Divide (Local5, 0x02, ), Local7)

}

Else

{

If (LNotEqual (P2UB, Zero))

{

Store (P2UB, Local7)

}

Return (Local7)

}

Method (LKEN, 1, NotSerialized)

{

And (CPEX, 0x0F, Local3)

If (LEqual (Local3, Zero))

{

If (LEqual (Arg0, Zero))

{

Store (One, P0L0)

Sleep (0x10)

Store (Zero, Local0)

While (P0L0)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Else

{

If (LEqual (Arg0, One))

{

Store (One, P1L0)

Sleep (0x10)

Store (Zero, Local0)

While (P0L0)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Else

{

If (LEqual (Arg0, 0x02))

{

Store (One, P2L0)

Sleep (0x10)

Store (Zero, Local0)

While (P0L0)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Else

{

If (LNotEqual (Local3, Zero))

{

If (LEqual (Arg0, Zero))

{

Store (One, Q0L0)

Sleep (0x10)

Store (Zero, Local0)

While (Q0L0)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Else

{

If (LEqual (Arg0, One))

{

Store (One, Q1L0)

Sleep (0x10)

Store (Zero, Local0)

While (Q1L0)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Else

{

If (LEqual (Arg0, 0x02))

{

Store (One, Q2L0)

Sleep (0x10)

Store (Zero, Local0)

While (Q2L0)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Method (LKDS, 1, NotSerialized)

{

And (CPEX, 0x0F, Local3)

If (LEqual (Local3, Zero))

{

If (LEqual (Arg0, Zero))

{

Store (One, P0L2)

Sleep (0x10)

Store (Zero, Local0)

While (P0L2)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Else

{

If (LEqual (Arg0, One))

{

Store (One, P1L2)

Sleep (0x10)

Store (Zero, Local0)

While (P1L2)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Else

{

If (LEqual (Arg0, 0x02))

{

Store (One, P2L2)

Sleep (0x10)

Store (Zero, Local0)

While (P2L2)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Else

{

If (LNotEqual (Local3, Zero))

{

If (LEqual (Arg0, Zero))

{

Store (One, Q0L2)

Sleep (0x10)

Store (Zero, Local0)

While (Q0L2)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Else

{

If (LEqual (Arg0, One))

{

Store (One, Q1L2)

Sleep (0x10)

Store (Zero, Local0)

While (Q1L2)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Else

{

If (LEqual (Arg0, 0x02))

{

Store (One, Q2L2)

Sleep (0x10)

Store (Zero, Local0)

While (Q2L2)

{

If (LGreater (Local0, 0x04))

{

Break

}

Sleep (0x10)

Increment (Local0)

}

Method (DIWK, 1, NotSerialized)

{

If (LEqual (Arg0, Zero))

{

\_SB.PCI0.PEG0.P0EW ()

}

Else

{

If (LEqual (Arg0, One))

{

\_SB.PCI0.PEG1.P1EW ()

}

Else

{

If (LEqual (Arg0, 0x02))

{

\_SB.PCI0.PEG2.P2EW ()

}

Method (GDEV, 1, NotSerialized)

{

If (LEqual (Arg0, Zero))

{

Store (One, Local0)

}

Else

{

If (LEqual (Arg0, One))

{

Store (One, Local0)

}

If (LEqual (Arg0, 0x02))

{

Store (One, Local0)

}

Return (Local0)

}

Method (GFUN, 1, NotSerialized)

{

If (LEqual (Arg0, Zero))

{

Store (Zero, Local0)

}

Else

{

If (LEqual (Arg0, One))

{

Store (One, Local0)

}

If (LEqual (Arg0, 0x02))

{

Store (0x02, Local0)

}

Return (Local0)

}

Method (CCHK, 2, NotSerialized)

{

If (LEqual (Arg0, Zero))

{

Store (P0VI, Local7)

}

Else

{

If (LEqual (Arg0, One))

{

Store (P1VI, Local7)

}

Else

{

If (LEqual (Arg0, 0x02))

{

Store (P2VI, Local7)

}

If (LEqual (Local7, IVID))

{

Return (Zero)

}

If (LNotEqual (Arg0, Zero))

{

Store (P0VI, Local7)

If (LEqual (Local7, IVID))

{

Return (Zero)

}

If (LEqual (Arg1, Zero))

{

If (LEqual (Arg0, Zero))

{

If (LEqual (SGPI (SGGP, PWE0, PWG0, PWA0), Zero))

{

Return (Zero)

}

If (LEqual (Arg0, One))

{

If (LEqual (SGPI (P1GP, PWE1, PWG1, PWA1), Zero))

{

Return (Zero)

}

If (LEqual (Arg0, 0x02))

{

If (LEqual (SGPI (P2GP, PWE2, PWG2, PWA2), Zero))

{

Return (Zero)

}

Else

{

If (LEqual (Arg1, One))

{

If (LEqual (Arg0, Zero))

{

If (LEqual (SGPI (SGGP, PWE0, PWG0, PWA0), One))

{

Return (Zero)

}

If (LEqual (Arg0, One))

{

If (LEqual (SGPI (P1GP, PWE1, PWG1, PWA1), One))

{

Return (Zero)

}

If (LEqual (Arg0, 0x02))

{

If (LEqual (SGPI (P2GP, PWE2, PWG2, PWA2), One))

{

Return (Zero)

}

Return (One)

}

Method (NTFY, 2, NotSerialized)

{

If (LEqual (Arg0, Zero))

{

Notify (\_SB.PCI0.PEG0, Arg1)

}

Else

{

If (LEqual (Arg0, One))

{

Notify (\_SB.PCI0.PEG1, Arg1)

}

Else

{

If (LEqual (Arg0, 0x02))

{

Notify (\_SB.PCI0.PEG2, Arg1)

}

Method (GPPR, 2, NotSerialized)

{

If (LEqual (Arg1, Zero))

{

If (LEqual (Arg0, Zero))

{

SGPO (SGGP, HRE0, HRG0, HRA0, One)

SGPO (SGGP, PWE0, PWG0, PWA0, Zero)

}

If (LEqual (Arg0, One))

{

SGPO (P1GP, HRE1, HRG1, HRA1, One)

SGPO (P1GP, PWE1, PWG1, PWA1, Zero)

}

If (LEqual (Arg0, 0x02))

{

SGPO (P2GP, HRE2, HRG2, HRA2, One)

SGPO (P2GP, PWE2, PWG2, PWA2, Zero)

}

Else

{

If (LEqual (Arg1, One))

{

If (LEqual (Arg0, Zero))

{

SGPO (SGGP, HRE0, HRG0, HRA0, One)

SGPO (SGGP, PWE0, PWG0, PWA0, One)

Sleep (DLPW)

SGPO (SGGP, HRE0, HRG0, HRA0, Zero)

Sleep (DLHR)

}

If (LEqual (Arg0, One))

{

SGPO (P1GP, HRE1, HRG1, HRA1, One)

SGPO (P1GP, PWE1, PWG1, PWA1, One)

Sleep (DLPW)

SGPO (P1GP, HRE1, HRG1, HRA1, Zero)

Sleep (DLHR)

}

If (LEqual (Arg0, 0x02))

{

SGPO (P2GP, HRE2, HRG2, HRA2, One)

SGPO (P2GP, PWE2, PWG2, PWA2, One)

Sleep (DLPW)

SGPO (P2GP, HRE2, HRG2, HRA2, Zero)

Sleep (DLHR)

}

Method (SGPO, 5, Serialized)

{

If (LEqual (Arg3, Zero))

{

Not (Arg4, Arg4)

And (Arg4, One, Arg4)

}

If (LEqual (Arg0, One))

{

If (CondRefOf (\_SB.SGOV))

{

\_SB.SGOV (Arg2, Arg4)

}

Method (SGPI, 4, Serialized)

{

If (LEqual (Arg0, One))

{

If (CondRefOf (\_SB.GGOV))

{

Store (\_SB.GGOV (Arg2), Local0)

}

If (LEqual (Arg3, Zero))

{

Not (Local0, Local0)

And (Local0, One, Local0)

}

Return (Local0)

}

Secondary System Description Table

View File SSDT-3.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* Original Table Header:

* Signature "SSDT"

* Length 0x00000E58 (3672)

* Revision 0x02

* Checksum 0x53

* OEM ID "CpuRef"

* OEM Table ID "CpuSsdt"

* OEM Revision 0x00003000 (12288)

* Compiler ID "INTL"

* Compiler Version 0x20120913 (538052883)

DefinitionBlock ("/Volumes/El Capitan/Users/dima/Downloads/DarwinDumper_v2.9.9.2/DarwinDumperReports/001_2016-03-11_19-07-15_MacPro3,1/DarwinDumper_2.9.9.2_AMI_X64_3358_Cap_dima/ACPI Tables/AML/SSDT-3.aml", "SSDT", 2, "CpuRef", "CpuSsdt", 0x00003000)

{

External (_PR_.CPU0, ProcessorObj)

External (_PR_.CPU1, ProcessorObj)

External (_PR_.CPU2, ProcessorObj)

External (_PR_.CPU3, ProcessorObj)

External (_PR_.CPU4, ProcessorObj)

External (_PR_.CPU5, ProcessorObj)

External (_PR_.CPU6, ProcessorObj)

External (_PR_.CPU7, ProcessorObj)

External (_SB_.OSCP, IntObj)

Scope (\)

{

Name (SSDT, Package (0x15)

{

"CPU0IST ",

0x87961798,

0x00000726,

"APIST ",

0x87960618,

0x000005AA,

"CPU0CST ",

0x87960C18,

0x0000037F,

"APCST ",

0x87963A98,

0x00000119,

"CPU0HWP ",

0x87961F18,

0x0000008E,

"APHWP ",

0x87963918,

0x00000119,

"HWPLVT ",

0x87963C18,

0x00000130

})

Name (\PDC0, 0x80000000)

Name (\PDC1, 0x80000000)

Name (\PDC2, 0x80000000)

Name (\PDC3, 0x80000000)

Name (\PDC4, 0x80000000)

Name (\PDC5, 0x80000000)

Name (\PDC6, 0x80000000)

Name (\PDC7, 0x80000000)

Name (\SDTL, Zero)

}

Scope (\_PR)

{

Name (CTPC, Zero)

OperationRegion (PNVS, SystemMemory, 0x86977000, 0x006B)

Field (PNVS, AnyAcc, Lock, Preserve)

{

PGRV, 8,

CFGD, 32,

Offset (0x06),

ACRT, 8,

APSV, 8,

AAC0, 8,

CPID, 32,

CPPC, 8,

CCTP, 8,

CLVL, 8,

CBMI, 8,

PL10, 16,

PL20, 16,

PLW0, 8,

CTC0, 8,

TAR0, 8,

PPC0, 8,

PL11, 16,

PL21, 16,

PLW1, 8,

CTC1, 8,

TAR1, 8,

PPC1, 8,

PL12, 16,

PL22, 16,

PLW2, 8,

CTC2, 8,

TAR2, 8,

PPC2, 8,

C3MW, 8,

C6MW, 8,

C7MW, 8,

CDMW, 8,

C3LT, 16,

C6LT, 16,

C7LT, 16,

CDLT, 16,

CDLV, 16,

CDPW, 16,

MPMF, 8,

DTSE, 8,

DTS1, 8,

DTS2, 8,

DTSF, 8,

PDTS, 8,

PKGA, 8,

DTS3, 8,

DTS4, 8,

BGMA, 64,

BGMS, 8,

BGIA, 16,

BGIL, 16,

DSIA, 16,

DSIL, 8,

DSAE, 8,

EPCS, 8,

EMNA, 64,

ELNG, 64,

HWPV, 8,

HWPA, 16,

HWPL, 16,

POWS, 8,

HDCE, 8

}

OperationRegion (IO_D, SystemIO, \_PR.DSIA, \_PR.DSIL)

Field (IO_D, ByteAcc, NoLock, Preserve)

{

TRPD, 8

}

OperationRegion (IO_P, SystemIO, \_PR.BGIA, \_PR.BGIL)

Field (IO_P, ByteAcc, NoLock, Preserve)

{

TRPF, 8

}

Scope (\_PR.CPU0)

{

Name (HI0, Zero)

Name (HC0, Zero)

Name (HW0, Zero)

Name (HW2, Zero)

Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities

{

Store (CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities

{

Store (COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (CPDC, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, REVS)

CreateDWordField (Arg0, 0x04, SIZE)

Store (SizeOf (Arg0), Local0)

Store (Subtract (Local0, 0x08), Local1)

CreateField (Arg0, 0x40, Multiply (Local1, 0x08), TEMP)

Name (STS0, Buffer (0x04)

{

0x00, 0x00, 0x00, 0x00

})

Concatenate (STS0, TEMP, Local2)

Return (COSC (Buffer (0x10)

{

/* 0000 */ 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47,

/* 0008 */ 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53

}, REVS, SIZE, Local2))

}

Method (COSC, 4, NotSerialized)

{

CreateDWordField (Arg3, Zero, STS0)

CreateDWordField (Arg3, 0x04, CAP0)

CreateDWordField (Arg0, Zero, IID0)

CreateDWordField (Arg0, 0x04, IID1)

CreateDWordField (Arg0, 0x08, IID2)

CreateDWordField (Arg0, 0x0C, IID3)

Name (UID0, Buffer (0x10)

{

/* 0000 */ 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47,

/* 0008 */ 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53

})

CreateDWordField (UID0, Zero, EID0)

CreateDWordField (UID0, 0x04, EID1)

CreateDWordField (UID0, 0x08, EID2)

CreateDWordField (UID0, 0x0C, EID3)

If (LNot (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)),

LAnd (LEqual (IID2, EID2), LEqual (IID3, EID3)))))

{

Store (0x06, STS0)

Return (Arg3)

}

If (LNotEqual (Arg1, One))

{

Store (0x0A, STS0)

Return (Arg3)

}

If (Not (And (STS0, One)))

{

If (And (CAP0, 0x2000))

{

Store (Zero, \_PR.HDCE)

}

Else

{

OperationRegion (SMIP, SystemIO, 0xB2, One)

Field (SMIP, ByteAcc, NoLock, Preserve)

{

IOB2, 8

}

Store (0x28, IOB2)

}

Return (Arg3)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS0)

CreateDWordField (Arg0, 0x04, CAP0)

If (LOr (LEqual (STS0, 0x06), LEqual (STS0, 0x0A)))

{

Return (Zero)

}

If (And (STS0, One))

{

And (CAP0, 0x0BFF, CAP0)

Return (Zero)

}

Or (And (PDC0, 0x7FFFFFFF), CAP0, PDC0)

If (And (CFGD, 0x7A))

{

If (LAnd (LAnd (And (CFGD, 0x0200), And (PDC0, 0x18

)), LNot (And (SDTL, 0x02))))

{

Or (SDTL, 0x02, SDTL)

OperationRegion (CST0, SystemMemory, DerefOf (Index (SSDT, 0x07)), DerefOf (Index (SSDT, 0x08

)))

Load (CST0, HC0)

}

If (LAnd (And (CFGD, One), LNot (And (SDTL, 0x08

))))

{

Or (SDTL, 0x08, SDTL)

OperationRegion (IST0, SystemMemory, DerefOf (Index (SSDT, One)), DerefOf (Index (SSDT, 0x02

)))

Load (IST0, HI0)

}

If (LAnd (And (CFGD, 0x00400000), LNot (And (SDTL, 0x40

))))

{

If (And (\_SB.OSCP, 0x20))

{

Or (SDTL, 0x40, SDTL)

OperationRegion (HWP0, SystemMemory, DerefOf (Index (SSDT, 0x0D)), DerefOf (Index (SSDT, 0x0E

)))

Load (HWP0, HW0)

If (And (CFGD, 0x00800000))

{

OperationRegion (HWPL, SystemMemory, DerefOf (Index (SSDT, 0x13)), DerefOf (Index (SSDT, 0x14

)))

Load (HWPL, HW2)

}

If (And (\_SB.OSCP, 0x20))

{

If (LNot (And (\_SB.OSCP, 0x40)))

{

Store (Zero, HWPV)

}

If (And (\_SB.OSCP, 0x40))

{

Store (0x02, HWPV)

}

If (LNot (And (PDC0, 0x1000)))

{

OperationRegion (SMIP, SystemIO, 0xB2, One)

Field (SMIP, ByteAcc, NoLock, Preserve)

{

IOB2, 8

}

Store (0x27, IOB2)

}

Return (Zero)

}

Scope (\_PR.CPU1)

{

Name (HI1, Zero)

Name (HC1, Zero)

Name (HW1, Zero)

Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities

{

Store (\_PR.CPU0.CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities

{

Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS1)

CreateDWordField (Arg0, 0x04, CAP1)

If (LOr (LEqual (STS1, 0x06), LEqual (STS1, 0x0A)))

{

Return (Zero)

}

If (And (STS1, One))

{

And (CAP1, 0x0BFF, CAP1)

Return (Zero)

}

Or (And (PDC1, 0x7FFFFFFF), CAP1, PDC1)

If (LEqual (And (PDC1, 0x09), 0x09))

{

APPT ()

}

If (And (\_SB.OSCP, 0x20))

{

HWPT ()

}

If (And (PDC1, 0x18))

{

APCT ()

}

Store (PDC1, PDC0)

Return (Zero)

}

Method (APCT, 0, NotSerialized)

{

If (LAnd (And (CFGD, 0x7A), LNot (And (SDTL, 0x20

))))

{

Or (SDTL, 0x20, SDTL)

OperationRegion (CST1, SystemMemory, DerefOf (Index (SSDT, 0x0A)), DerefOf (Index (SSDT, 0x0B

)))

Load (CST1, HC1)

}

Method (APPT, 0, NotSerialized)

{

If (LAnd (And (CFGD, One), LNot (And (SDTL, 0x10

))))

{

Or (SDTL, 0x10, SDTL)

OperationRegion (IST1, SystemMemory, DerefOf (Index (SSDT, 0x04)), DerefOf (Index (SSDT, 0x05

)))

Load (IST1, HI1)

}

Method (HWPT, 0, NotSerialized)

{

If (LAnd (And (CFGD, 0x00400000), LNot (And (SDTL, 0x80

))))

{

Or (SDTL, 0x80, SDTL)

OperationRegion (HWP1, SystemMemory, DerefOf (Index (SSDT, 0x10)), DerefOf (Index (SSDT, 0x11

)))

Load (HWP1, HW1)

}

Scope (\_PR.CPU2)

{

Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities

{

Store (\_PR.CPU0.CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities

{

Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS2)

CreateDWordField (Arg0, 0x04, CAP2)

If (LOr (LEqual (STS2, 0x06), LEqual (STS2, 0x0A)))

{

Return (Zero)

}

If (And (STS2, One))

{

And (CAP2, 0x0BFF, CAP2)

Return (Zero)

}

Or (And (PDC2, 0x7FFFFFFF), CAP2, PDC2)

If (LEqual (And (PDC2, 0x09), 0x09))

{

\_PR.CPU1.APPT ()

}

If (And (\_SB.OSCP, 0x20))

{

\_PR.CPU1.HWPT ()

}

If (And (PDC2, 0x18))

{

\_PR.CPU1.APCT ()

}

Store (PDC2, PDC0)

Return (Zero)

}

Scope (\_PR.CPU3)

{

Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities

{

Store (\_PR.CPU0.CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities

{

Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS3)

CreateDWordField (Arg0, 0x04, CAP3)

If (LOr (LEqual (STS3, 0x06), LEqual (STS3, 0x0A)))

{

Return (Zero)

}

If (And (STS3, One))

{

And (CAP3, 0x0BFF, CAP3)

Return (Zero)

}

Or (And (PDC3, 0x7FFFFFFF), CAP3, PDC3)

If (LEqual (And (PDC3, 0x09), 0x09))

{

\_PR.CPU1.APPT ()

}

If (And (\_SB.OSCP, 0x20))

{

\_PR.CPU1.HWPT ()

}

If (And (PDC3, 0x18))

{

\_PR.CPU1.APCT ()

}

Store (PDC3, PDC0)

Return (Zero)

}

Scope (\_PR.CPU4)

{

Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities

{

Store (\_PR.CPU0.CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities

{

Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS4)

CreateDWordField (Arg0, 0x04, CAP4)

If (LOr (LEqual (STS4, 0x06), LEqual (STS4, 0x0A)))

{

Return (Zero)

}

If (And (STS4, One))

{

And (CAP4, 0x0BFF, CAP4)

Return (Zero)

}

Or (And (PDC4, 0x7FFFFFFF), CAP4, PDC4)

If (LEqual (And (PDC4, 0x09), 0x09))

{

\_PR.CPU1.APPT ()

}

If (And (\_SB.OSCP, 0x20))

{

\_PR.CPU1.HWPT ()

}

If (And (PDC4, 0x18))

{

\_PR.CPU1.APCT ()

}

Store (PDC4, PDC0)

Return (Zero)

}

Scope (\_PR.CPU5)

{

Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities

{

Store (\_PR.CPU0.CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities

{

Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS5)

CreateDWordField (Arg0, 0x04, CAP5)

If (LOr (LEqual (STS5, 0x06), LEqual (STS5, 0x0A)))

{

Return (Zero)

}

If (And (STS5, One))

{

And (CAP5, 0x0BFF, CAP5)

Return (Zero)

}

Or (And (PDC5, 0x7FFFFFFF), CAP5, PDC5)

If (LEqual (And (PDC5, 0x09), 0x09))

{

\_PR.CPU1.APPT ()

}

If (And (\_SB.OSCP, 0x20))

{

\_PR.CPU1.HWPT ()

}

If (And (PDC5, 0x18))

{

\_PR.CPU1.APCT ()

}

Store (PDC5, PDC0)

Return (Zero)

}

Scope (\_PR.CPU6)

{

Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities

{

Store (\_PR.CPU0.CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities

{

Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS6)

CreateDWordField (Arg0, 0x04, CAP6)

If (LOr (LEqual (STS6, 0x06), LEqual (STS6, 0x0A)))

{

Return (Zero)

}

If (And (STS6, One))

{

And (CAP6, 0x0BFF, CAP6)

Return (Zero)

}

Or (And (PDC6, 0x7FFFFFFF), CAP6, PDC6)

If (LEqual (And (PDC6, 0x09), 0x09))

{

\_PR.CPU1.APPT ()

}

If (And (\_SB.OSCP, 0x20))

{

\_PR.CPU1.HWPT ()

}

If (And (PDC6, 0x18))

{

\_PR.CPU1.APCT ()

}

Store (PDC6, PDC0)

Return (Zero)

}

Scope (\_PR.CPU7)

{

Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities

{

Store (\_PR.CPU0.CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities

{

Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS7)

CreateDWordField (Arg0, 0x04, CAP7)

If (LOr (LEqual (STS7, 0x06), LEqual (STS7, 0x0A)))

{

Return (Zero)

}

If (And (STS7, One))

{

And (CAP7, 0x0BFF, CAP7)

Return (Zero)

}

Or (And (PDC7, 0x7FFFFFFF), CAP7, PDC7)

If (LEqual (And (PDC7, 0x09), 0x09))

{

\_PR.CPU1.APPT ()

}

If (And (\_SB.OSCP, 0x20))

{

\_PR.CPU1.HWPT ()

}

If (And (PDC7, 0x18))

{

\_PR.CPU1.APCT ()

}

Store (PDC7, PDC0)

Return (Zero)

}

Secondary System Description Table

View File SSDT-4.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* Original Table Header:

* Signature "SSDT"

* Length 0x00000676 (1654)

* Revision 0x01

* Checksum 0x31

* OEM ID "PmRef"

* OEM Table ID "CpuPm"

* OEM Revision 0x00003000 (12288)

* Compiler ID "INTL"

* Compiler Version 0x20120320 (538051360)

DefinitionBlock ("/Volumes/El Capitan/Users/dima/Downloads/DarwinDumper_v2.9.9.2/DarwinDumperReports/001_2016-03-11_19-07-15_MacPro3,1/DarwinDumper_2.9.9.2_AMI_X64_3358_Cap_dima/ACPI Tables/AML/SSDT-4.aml", "SSDT", 1, "PmRef", "CpuPm", 0x00003000)

{

External (_PR_.CPU0, ProcessorObj)

External (_PR_.CPU1, ProcessorObj)

External (_PR_.CPU2, ProcessorObj)

External (_PR_.CPU3, ProcessorObj)

External (_PR_.CPU4, ProcessorObj)

External (_PR_.CPU5, ProcessorObj)

External (_PR_.CPU6, ProcessorObj)

External (_PR_.CPU7, ProcessorObj)

Scope (\_PR.CPU0)

{

Name (PSS, Package (0x1E)

{

Package (0x06)

{

0x00000E74,

0x000073A0,

0x0000000A,

0x00002500,

0x00002500

Package (0x06)

{

0x00000E10,

0x00007080,

0x0000000A,

0x00002400,

0x00002400

Package (0x06)

{

0x00000DAC,

0x00006D60,

0x0000000A,

0x00002300,

0x00002300

Package (0x06)

{

0x00000D48,

0x00006A40,

0x0000000A,

0x00002200,

0x00002200

Package (0x06)

{

0x00000CE4,

0x00006720,

0x0000000A,

0x00002100,

0x00002100

Package (0x06)

{

0x00000C80,

0x00006400,

0x0000000A,

0x00002000,

0x00002000

Package (0x06)

{

0x00000C1C,

0x000060E0,

0x0000000A,

0x00001F00,

0x00001F00

Package (0x06)

{

0x00000BB8,

0x00005DC0,

0x0000000A,

0x00001E00,

0x00001E00

Package (0x06)

{

0x00000B54,

0x00005AA0,

0x0000000A,

0x00001D00,

0x00001D00

Package (0x06)

{

0x00000AF0,

0x00005780,

0x0000000A,

0x00001C00,

0x00001C00

Package (0x06)

{

0x00000A8C,

0x00005460,

0x0000000A,

0x00001B00,

0x00001B00

Package (0x06)

{

0x00000A28,

0x00005140,

0x0000000A,

0x00001A00,

0x00001A00

Package (0x06)

{

0x000009C4,

0x00004E20,

0x0000000A,

0x00001900,

0x00001900

Package (0x06)

{

0x00000960,

0x00004B00,

0x0000000A,

0x00001800,

0x00001800

Package (0x06)

{

0x000008FC,

0x000047E0,

0x0000000A,

0x00001700,

0x00001700

Package (0x06)

{

0x00000898,

0x000044C0,

0x0000000A,

0x00001600,

0x00001600

Package (0x06)

{

0x00000834,

0x000041A0,

0x0000000A,

0x00001500,

0x00001500

Package (0x06)

{

0x000007D0,

0x00003E80,

0x0000000A,

0x00001400,

0x00001400

Package (0x06)

{

0x0000076C,

0x00003B60,

0x0000000A,

0x00001300,

0x00001300

Package (0x06)

{

0x00000708,

0x00003840,

0x0000000A,

0x00001200,

0x00001200

Package (0x06)

{

0x000006A4,

0x00003520,

0x0000000A,

0x00001100,

0x00001100

Package (0x06)

{

0x00000640,

0x00003200,

0x0000000A,

0x00001000,

0x00001000

Package (0x06)

{

0x000005DC,

0x00002EE0,

0x0000000A,

0x00000F00,

0x00000F00

Package (0x06)

{

0x00000578,

0x00002BC0,

0x0000000A,

0x00000E00,

0x00000E00

Package (0x06)

{

0x00000514,

0x000028A0,

0x0000000A,

0x00000D00,

0x00000D00

Package (0x06)

{

0x000004B0,

0x00002580,

0x0000000A,

0x00000C00,

0x00000C00

Package (0x06)

{

0x0000044C,

0x00002260,

0x0000000A,

0x00000B00,

0x00000B00

Package (0x06)

{

0x000003E8,

0x00001F40,

0x0000000A,

0x00000A00,

0x00000A00

Package (0x06)

{

0x00000384,

0x00001C20,

0x0000000A,

0x00000900,

0x00000900

Package (0x06)

{

0x00000320,

0x00001900,

0x0000000A,

0x00000800,

0x00000800

}

})

Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States

{

Return (PSS)

}

Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilites

{

Return (Zero)

}

Name (PCT, Package (0x02)

{

ResourceTemplate ()

{

0x00, // Bit Width

0x00, // Bit Offset

0x0000000000000000, // Address

ResourceTemplate ()

{

0x00, // Bit Width

0x00, // Bit Offset

0x0000000000000000, // Address

}

})

Method (_PCT, 0, NotSerialized) // _PCT: Performance Control

{

Return (PCT)

}

Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method

{

If (LEqual (Arg2, Zero))

{

Return (Buffer (One)

{

0x03

})

}

Return (Package (0x02)

{

"plugin-type",

One

})

}

Name (APSN, Zero)

Name (APLF, Zero)

}

Scope (\_PR.CPU1)

{

Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States

{

Return (\_PR.CPU0.PSS)

}

Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilites

{

Return (Zero)

}

Method (_PCT, 0, NotSerialized) // _PCT: Performance Control

{

Return (\_PR.CPU0.PCT)

}

Scope (\_PR.CPU2)

{

Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States

{

Return (\_PR.CPU0.PSS)

}

Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilites

{

Return (Zero)

}

Method (_PCT, 0, NotSerialized) // _PCT: Performance Control

{

Return (\_PR.CPU0.PCT)

}

Scope (\_PR.CPU3)

{

Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States

{

Return (\_PR.CPU0.PSS)

}

Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilites

{

Return (Zero)

}

Method (_PCT, 0, NotSerialized) // _PCT: Performance Control

{

Return (\_PR.CPU0.PCT)

}

Scope (\_PR.CPU4)

{

Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States

{

Return (\_PR.CPU0.PSS)

}

Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilites

{

Return (Zero)

}

Method (_PCT, 0, NotSerialized) // _PCT: Performance Control

{

Return (\_PR.CPU0.PCT)

}

Scope (\_PR.CPU5)

{

Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States

{

Return (\_PR.CPU0.PSS)

}

Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilites

{

Return (Zero)

}

Method (_PCT, 0, NotSerialized) // _PCT: Performance Control

{

Return (\_PR.CPU0.PCT)

}

Scope (\_PR.CPU6)

{

Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States

{

Return (\_PR.CPU0.PSS)

}

Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilites

{

Return (Zero)

}

Method (_PCT, 0, NotSerialized) // _PCT: Performance Control

{

Return (\_PR.CPU0.PCT)

}

Scope (\_PR.CPU7)

{

Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States

{

Return (\_PR.CPU0.PSS)

}

Method (_PPC, 0, NotSerialized) // _PPC: Performance Present Capabilites

{

Return (Zero)

}

Method (_PCT, 0, NotSerialized) // _PCT: Performance Control

{

Return (\_PR.CPU0.PCT)

}

Secondary System Description Table

View File SSDT-5.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* Original Table Header:

* Signature "SSDT"

* Length 0x000001A2 (418)

* Revision 0x01

* Checksum 0x48

* OEM ID "PmRefA"

* OEM Table ID "CpuCst"

* OEM Revision 0x00003000 (12288)

* Compiler ID "INTL"

* Compiler Version 0x20120320 (538051360)

DefinitionBlock ("/Volumes/El Capitan/Users/dima/Downloads/DarwinDumper_v2.9.9.2/DarwinDumperReports/001_2016-03-11_19-07-15_MacPro3,1/DarwinDumper_2.9.9.2_AMI_X64_3358_Cap_dima/ACPI Tables/AML/SSDT-5.aml", "SSDT", 1, "PmRefA", "CpuCst", 0x00003000)

{

External (_PR_.CPU0, ProcessorObj)

External (_PR_.CPU1, ProcessorObj)

External (_PR_.CPU2, ProcessorObj)

External (_PR_.CPU3, ProcessorObj)

External (_PR_.CPU4, ProcessorObj)

External (_PR_.CPU5, ProcessorObj)

External (_PR_.CPU6, ProcessorObj)

External (_PR_.CPU7, ProcessorObj)

Scope (\_PR.CPU0)

{

Name (CST, Package (0x04)

{

0x03,

Package (0x04)

{

ResourceTemplate ()

{

0x01, // Bit Width

0x02, // Bit Offset

0x0000000000000000, // Address

0x01, // Access Size

)

One,

0x0001,

0x000003E8

Package (0x04)

{

ResourceTemplate ()

{

0x01, // Bit Width

0x02, // Bit Offset

0x0000000000000020, // Address

0x03, // Access Size

)

0x03,

0x00FA,

0x000001F4

Package (0x04)

{

ResourceTemplate ()

{

0x01, // Bit Width

0x02, // Bit Offset

0x0000000000000020, // Address

0x03, // Access Size

)

0x06,

0x00FD,

0x0000015E

}

})

Method (_CST, 0, NotSerialized) // _CST: C-States

{

Return (CST)

}

Scope (\_PR.CPU1)

{

Method (_CST, 0, NotSerialized) // _CST: C-States

{

Return (\_PR.CPU0.CST)

}

Scope (\_PR.CPU2)

{

Method (_CST, 0, NotSerialized) // _CST: C-States

{

Return (\_PR.CPU0.CST)

}

Scope (\_PR.CPU3)

{

Method (_CST, 0, NotSerialized) // _CST: C-States

{

Return (\_PR.CPU0.CST)

}

Scope (\_PR.CPU4)

{

Method (_CST, 0, NotSerialized) // _CST: C-States

{

Return (\_PR.CPU0.CST)

}

Scope (\_PR.CPU5)

{

Method (_CST, 0, NotSerialized) // _CST: C-States

{

Return (\_PR.CPU0.CST)

}

Scope (\_PR.CPU6)

{

Method (_CST, 0, NotSerialized) // _CST: C-States

{

Return (\_PR.CPU0.CST)

}

Scope (\_PR.CPU7)

{

Method (_CST, 0, NotSerialized) // _CST: C-States

{

Return (\_PR.CPU0.CST)

}

Secondary System Description Table

View File SSDT.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* Original Table Header:

* Signature "SSDT"

* Length 0x0000036D (877)

* Revision 0x01

* Checksum 0x3A

* OEM ID "SataRe"

* OEM Table ID "SataTabl"

* OEM Revision 0x00001000 (4096)

* Compiler ID "INTL"

* Compiler Version 0x20120913 (538052883)

DefinitionBlock ("/Volumes/El Capitan/Users/dima/Downloads/DarwinDumper_v2.9.9.2/DarwinDumperReports/001_2016-03-11_19-07-15_MacPro3,1/DarwinDumper_2.9.9.2_AMI_X64_3358_Cap_dima/ACPI Tables/AML/SSDT.aml", "SSDT", 1, "SataRe", "SataTabl", 0x00001000)

{

External (_SB_.PCI0.SAT0, DeviceObj)

External (DSSP, IntObj)

External (FHPP, IntObj)

Scope (\)

{

Name (STFE, Buffer (0x07)

{

0x10, 0x06, 0x00, 0x00, 0x00, 0x00, 0xEF

})

Name (STFD, Buffer (0x07)

{

0x90, 0x06, 0x00, 0x00, 0x00, 0x00, 0xEF

})

Name (FZTF, Buffer (0x07)

{

0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF5

})

Name (DCFL, Buffer (0x07)

{

0xC1, 0x00, 0x00, 0x00, 0x00, 0x00, 0xB1

})

Name (SCBF, Buffer (0x15) {})

Name (CMDC, Zero)

Method (GTFB, 2, Serialized)

{

Multiply (CMDC, 0x38, Local0)

CreateField (SCBF, Local0, 0x38, CMDX)

Multiply (CMDC, 0x07, Local0)

CreateByteField (SCBF, Add (Local0, One), A001)

Store (Arg0, CMDX)

Store (Arg1, A001)

Increment (CMDC)

}

Scope (\_SB.PCI0.SAT0)

{

Name (REGF, One)

Method (_REG, 2, NotSerialized) // _REG: Region Availability

{

If (LEqual (Arg0, 0x02))

{

Store (Arg1, REGF)

}

Name (TMD0, Buffer (0x14) {})

CreateDWordField (TMD0, Zero, PIO0)

CreateDWordField (TMD0, 0x04, DMA0)

CreateDWordField (TMD0, 0x08, PIO1)

CreateDWordField (TMD0, 0x0C, DMA1)

CreateDWordField (TMD0, 0x10, CHNF)

Method (_GTM, 0, NotSerialized) // _GTM: Get Timing Mode

{

Store (0x78, PIO0)

Store (0x14, DMA0)

Store (0x78, PIO1)

Store (0x14, DMA1)

Or (CHNF, 0x05, CHNF)

Return (TMD0)

}

Method (_STM, 3, NotSerialized) // _STM: Set Timing Mode

{

}

Device (SPT0)

{

Name (_ADR, 0xFFFF) // _ADR: Address

Method (_GTF, 0, NotSerialized) // _GTF: Get Task File

{

Store (Zero, CMDC)

If (LOr (DSSP, FHPP))

{

GTFB (STFD, 0x06)

}

Else

{

GTFB (STFE, 0x06)

}

GTFB (FZTF, Zero)

GTFB (DCFL, Zero)

Return (SCBF)

}

Device (SPT1)

{

Name (_ADR, 0x0001FFFF) // _ADR: Address

Method (_GTF, 0, NotSerialized) // _GTF: Get Task File

{

Store (Zero, CMDC)

If (LOr (DSSP, FHPP))

{

GTFB (STFD, 0x06)

}

Else

{

GTFB (STFE, 0x06)

}

GTFB (FZTF, Zero)

GTFB (DCFL, Zero)

Return (SCBF)

}

Device (SPT2)

{

Name (_ADR, 0x0002FFFF) // _ADR: Address

Method (_GTF, 0, NotSerialized) // _GTF: Get Task File

{

Store (Zero, CMDC)

If (LOr (DSSP, FHPP))

{

GTFB (STFD, 0x06)

}

Else

{

GTFB (STFE, 0x06)

}

GTFB (FZTF, Zero)

GTFB (DCFL, Zero)

Return (SCBF)

}

Device (SPT3)

{

Name (_ADR, 0x0003FFFF) // _ADR: Address

Method (_GTF, 0, NotSerialized) // _GTF: Get Task File

{

Store (Zero, CMDC)

If (LOr (DSSP, FHPP))

{

GTFB (STFD, 0x06)

}

Else

{

GTFB (STFE, 0x06)

}

GTFB (FZTF, Zero)

GTFB (DCFL, Zero)

Return (SCBF)

}

Device (SPT4)

{

Name (_ADR, 0x0004FFFF) // _ADR: Address

Method (_GTF, 0, NotSerialized) // _GTF: Get Task File

{

Store (Zero, CMDC)

If (LOr (DSSP, FHPP))

{

GTFB (STFD, 0x06)

}

Else

{

GTFB (STFE, 0x06)

}

GTFB (FZTF, Zero)

GTFB (DCFL, Zero)

Return (SCBF)

}

Device (SPT5)

{

Name (_ADR, 0x0005FFFF) // _ADR: Address

Method (_GTF, 0, NotSerialized) // _GTF: Get Task File

{

Store (Zero, CMDC)

If (LOr (DSSP, FHPP))

{

GTFB (STFD, 0x06)

}

Else

{

GTFB (STFE, 0x06)

}

GTFB (FZTF, Zero)

GTFB (DCFL, Zero)

Return (SCBF)

}

UEFI ACPI Data Table

View File UEFI.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20130823-32 [Sep 16 2013]

* ACPI Data Table [UEFI]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "UEFI" [UEFI Boot Optimization Table]

[004h 0004 4] Table Length : 00000042

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : 0C

[00Ah 0010 6] Oem ID : ""

[010h 0016 8] Oem Table ID : ""

[018h 0024 4] Oem Revision : 00000000

[01Ch 0028 4] Asl Compiler ID : ""

[020h 0032 4] Asl Compiler Revision : 00000000

[024h 0036 16] UUID Identifier : C68ED8E2-9DC6-4CBD-9D94-DB65ACC5C332

[034h 0052 2] Data Offset : 0036

Raw Table Data: Length 66 (0x42)

0000: 55 45 46 49 42 00 00 00 01 0C 00 00 00 00 00 00 UEFIB...........

0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

0020: 00 00 00 00 E2 D8 8E C6 C6 9D BD 4C 9D 94 DB 65 ...........L...e

0030: AC C5 C3 32 36 00 01 00 00 00 00 00 00 00 00 00 ...26...........

0040: 00 00 ..

Dumped using getcodecid by Andy Vandijck. Further developed by InsanelyDeepak, ErmaC and Micky1979.

View File AudioCodecID.txt

----------------------------------------

AppleHDA

Codec: Realtek ALC892 [10ec:0892] Rev.[00100302]

Controller: Intel Corporation Sunrise Point-H HD Audio

----------------------------------------

AppleHDA

Codec: NVidia [Unknown] [10de:0072] Rev.[00100100]

Controller: NVIDIA Corporation

Dumped using VoodooHDA's getdump tool

View File VoodooHDAGetdump.txt

VoodooHDA's getdump tool failed to produce a dump.

NOTE: AppleHDA was loaded when this dump was attempted.

If you wish to get a successful dump using VoodooHDA and it's associated getdump tool then AppleHDA will have to be disabled.

The simplest option to do that will be to add AppleHDADisabler.kext to your system, rebuild caches and reboot. Then try this dump again.

BIOS - System: Flashrom Log

Dumped using Flashrom Darwin Port, v0.9.7 r1786. OS X port by THe KiNG..

View flashrom_log.txt File

flashrom v0.9.7-unknown on Darwin 15.3.0 (x86_64)

flashrom was built with libpci 3.1.9, GCC 4.2.1 (Apple Inc. build 5666) (dot 3), little endian

Command line (6 args): /Applications/Tools/DarwinDumper.app/Contents/Resources/Tools/flashrom -p internal -r /Volumes/El Capitan/Users/dima/Downloads/DarwinDumper_v2.9.9.2/DarwinDumperReports/001_2016-03-11_19-07-15_MacPro3,1/DarwinDumper_2.9.9.2_AMI_X64_3358_Cap_dima/BIOS/System/biosbackup.rom -o /Volumes/El Capitan/Users/dima/Downloads/DarwinDumper_v2.9.9.2/DarwinDumperReports/001_2016-03-11_19-07-15_MacPro3,1/DarwinDumper_2.9.9.2_AMI_X64_3358_Cap_dima/BIOS/System/flashrom_log.txt

Calibrating delay loop... OS timer resolution is 1 usecs, 3315M loops per second, 10 myus = 10 us, 100 myus = 98 us, 1000 myus = 974 us, 10000 myus = 10018 us, 4 myus = 5 us, OK.

Initializing internal programmer

No coreboot table found.

Using Internal DMI decoder.

DMI string chassis-type: "Desktop"

DMI string system-manufacturer: "To Be Filled By O.E.M."

DMI string system-product-name: "To Be Filled By O.E.M."

DMI string system-version: "To Be Filled By O.E.M."

DMI string baseboard-manufacturer: "ASRock"

DMI string baseboard-product-name: "Z170M-ITX/ac"

DMI string baseboard-version: " "

WARNING: No chipset found. Flash detection will most likely fail.

The following protocols are supported: Non-SPI.

Probing for AMD Am29F010A/B, 128 kB: probe_jedec_common: id1 0xeb, id2 0x2e, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for AMD Am29F002(N)BB, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for AMD Am29F002(N)BT, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for AMD Am29F016D, 2048 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for AMD Am29F040B, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for AMD Am29F080B, 1024 kB: probe_jedec_common: id1 0x80, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for AMD Am29LV001BB, 128 kB: probe_jedec_common: id1 0xeb, id2 0x2e, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for AMD Am29LV001BT, 128 kB: probe_jedec_common: id1 0xeb, id2 0x2e, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for AMD Am29LV002BB, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for AMD Am29LV002BT, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for AMD Am29LV004BB, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for AMD Am29LV004BT, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for AMD Am29LV008BB, 1024 kB: probe_jedec_common: id1 0x80, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for AMD Am29LV008BT, 1024 kB: probe_jedec_common: id1 0x80, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0x80, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for AMIC A29040B, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for Atmel AT29C512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Atmel AT29C010A, 128 kB: probe_jedec_common: id1 0xeb, id2 0x2e, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Atmel AT29C020, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Atmel AT29C040A, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for Atmel AT49BV512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Atmel AT49F002(N), 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Atmel AT49F002(N)T, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Atmel AT49(H)F010, 128 kB: probe_jedec_common: id1 0xeb, id2 0x2e, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Atmel AT49F020, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Atmel AT49F040, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for Atmel AT49F080, 1024 kB: probe_jedec_common: id1 0x80, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Atmel AT49F080T, 1024 kB: probe_jedec_common: id1 0x80, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Catalyst CAT28F512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Bright BM29F040, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for ESMT F49B002UA, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Eon EN29F010, 128 kB: probe_jedec_common: id1 0xeb, id2 0x2e, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Eon EN29F002(A)(N)B, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Eon EN29F002(A)(N)T, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Eon EN29LV640B, 8192 kB: probe_en29lv640b: id1 0xffff, id2 0x00ff

Probing for Fujitsu MBM29F004BC, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for Fujitsu MBM29F004TC, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for Fujitsu MBM29F400BC, 512 kB: probe_m29f400bt: id1 0xe0, id2 0xff

Probing for Fujitsu MBM29F400TC, 512 kB: probe_m29f400bt: id1 0xe0, id2 0xff

Probing for Fujitsu MBM29LV160BE, 2048 kB: probe_m29f400bt: id1 0xff, id2 0xff

Probing for Fujitsu MBM29LV160TE, 2048 kB: probe_m29f400bt: id1 0xff, id2 0xff

Probing for Hyundai HY29F002T, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Hyundai HY29F002B, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Hyundai HY29F040A, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for Intel 28F001BN/BX-B, 128 kB: probe_jedec_common: id1 0xeb, id2 0x2e, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Intel 28F001BN/BX-T, 128 kB: probe_jedec_common: id1 0xeb, id2 0x2e, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Intel 28F002BC/BL/BV/BX-T, 256 kB: probe_82802ab: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Intel 28F008S3/S5/SC, 512 kB: probe_82802ab: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for Intel 28F004B5/BE/BV/BX-B, 512 kB: probe_82802ab: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for Intel 28F004B5/BE/BV/BX-T, 512 kB: probe_82802ab: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for Intel 28F400BV/BX/CE/CV-B, 512 kB: probe_82802ab: id1 0xe0, id2 0xff, id1 is normal flash content, id2 is normal flash content

Probing for Intel 28F400BV/BX/CE/CV-T, 512 kB: probe_82802ab: id1 0xe0, id2 0xff, id1 is normal flash content, id2 is normal flash content

Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x80, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Macronix MX29F001B, 128 kB: probe_jedec_common: id1 0xeb, id2 0x2e, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Macronix MX29F001T, 128 kB: probe_jedec_common: id1 0xeb, id2 0x2e, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Macronix MX29F002(N)B, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Macronix MX29F002(N)T, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Macronix MX29F040, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for Macronix MX29LV040, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for MoselVitelic V29C51000B, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for MoselVitelic V29C51000T, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for MoselVitelic V29C51400B, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for MoselVitelic V29C51400T, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for MoselVitelic V29LC51000, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for MoselVitelic V29LC51001, 128 kB: probe_jedec_common: id1 0xeb, id2 0x2e, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for MoselVitelic V29LC51002, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for PMC Pm29F002T, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for PMC Pm29F002B, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for PMC Pm39LV010, 128 kB: probe_jedec_common: id1 0xeb, id2 0x2e, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for PMC Pm39LV020, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for PMC Pm39LV040, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for PMC Pm39LV512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for Sharp LH28F008BJT-BTLZ1, 1024 kB: probe_82802ab: id1 0x80, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x80, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for SST SST28SF040A, 512 kB: probe_82802ab: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for SST SST29EE010, 128 kB: probe_jedec_common: id1 0xeb, id2 0x2e, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for SST SST29LE010, 128 kB: probe_jedec_common: id1 0xeb, id2 0x2e, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for SST SST29EE020A, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for SST SST29LE020, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for SST SST39SF512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for SST SST39SF010A, 128 kB: probe_jedec_common: id1 0xeb, id2 0x2e, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for SST SST39SF020A, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for SST SST39SF040, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for SST SST39VF512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for SST SST39VF010, 128 kB: probe_jedec_common: id1 0xeb, id2 0x2e, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for SST SST39VF020, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for SST SST39VF040, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for SST SST39VF080, 1024 kB: probe_jedec_common: id1 0x80, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0x80, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x80, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF080A, 1024 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x80, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF160C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for ST M29F002B, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for ST M29F002T/NT, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for ST M29F040B, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for ST M29F400BB, 512 kB: probe_m29f400bt: id1 0xe0, id2 0xff

Probing for ST M29F400BT, 512 kB: probe_m29f400bt: id1 0xe0, id2 0xff

Probing for ST M29W010B, 128 kB: probe_jedec_common: id1 0xeb, id2 0x2e, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for ST M29W040B, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for ST M29W512B, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x80, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x80, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x80, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for ST M50LPW080, 1024 kB: probe_82802ab: id1 0x80, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for ST M50LPW116, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 kB: probe_jedec_common: id1 0xeb, id2 0x2e, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 kB: probe_jedec_common: id1 0xeb, id2 0x2e, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for TI TMS29F002RB, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for TI TMS29F002RT, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012-old, 128 kB: Old Winbond W29* probe method disabled because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29C010(M)/W29C011A/W29EE011/W29EE012-old' if you have a board with such a chip.

Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: probe_jedec_common: id1 0xeb, id2 0x2e, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W29C020(C)/W29C022, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W29C040/P, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39F010, 128 kB: probe_jedec_common: id1 0xeb, id2 0x2e, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39L010, 128 kB: probe_jedec_common: id1 0xeb, id2 0x2e, id1 parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39L020, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39L040, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39V040A, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39V040B, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39V040C, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39V080A, 1024 kB: probe_jedec_common: id1 0x80, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W49F002U/N, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W49F020, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W49V002A, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0x02, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0x80, id2 0x00, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xe0, id2 0xfd, id1 is normal flash content, id2 is normal flash content

No EEPROM/flash device found.

Note: flashrom can never write if the flash chip isn't found automatically.

Bootloaders & Disk Sectors

disk0

WDC WD10EZEX-08M2NA0 (4096 byte physical block size) | 1 TB | GUID_partition_scheme | MBR boot code detected: None | View Disk Sectors

DEVICE	TYPE	NAME	SIZE	PBR (Stage1)	BootFile (Stage 2)	UEFI BootFile
disk0s1	EFI	EFI	206 MB	Apple EFI
						/EFI/Boot/BootX64.efi(Clover r3358)
						/EFI/Boot/BootIA32.efi(Clover r3346)
						/EFI/Clover/CloverX64.efi(Clover r3346)
disk0s2	Apple_HFS	El Capitan	499 GB
disk0s3	Apple_Boot	Recovery HD	650 MB
disk0s4	Apple_HFS	Untitled	499 GB

BootloaderConfigs

disk0s1
disk0s1-EFI/EFI/CLOVER/OEM/Z170M
disk0s2

/disk0s1-EFI/EFI/CLOVER/config.plist : Clover

View config.plist

<?xml version="1.0" encoding="UTF-8"?>

<!DOCTYPE plist PUBLIC "-//Apple//DTD PLIST 1.0//EN" "http://www.apple.com/DTDs/PropertyList-1.0.dtd">

<dict>

<dict>

<dict>

<key>Debug</key>

<key>DropOEM_DSM</key>

<key>Fixes</key>

<dict>

<key>AddDTGP_0001</key>

<key>AddHDMI_8000000</key>

<true/>

<key>AddIMEI_80000</key>

<key>AddMCHC_0008</key>

<key>AddPNLF_1000000</key>

<key>DeleteUnused_400000</key>

<key>FIX_INTELGFX_100000</key>

<key>FakeLPC_0020</key>

<key>FixAirport_4000</key>

<key>FixDarwin_0002</key>

<key>FixDisplay_0100</key>

<key>FixFirewire_0800</key>

<key>FixHDA_8000</key>

<key>FixHPET_0010</key>

<key>FixIDE_0200</key>

<key>FixIPIC_0040</key>

<key>FixLAN_2000</key>

<key>FixRegions_10000000</key>

<key>FixSATA_0400</key>

<key>FixSBUS_0080</key>

<key>FixShutdown_0004</key>

<key>FixUSB_1000</key>

<key>NewWay_80000000</key>

<true/>

</dict>

<key>Patches</key>

<array>

<dict>

<key>Comment</key>

<string>change _OSI to XOSI</string>

<data>

X09TSQ==

</data>

<key>Replace</key>

<data>

WE9TSQ==

</data>

</dict>

</array>

<key>ReuseFFFF</key>

</dict>

<dict>

<key>DropOem</key>

<key>Generate</key>

</dict>

<dict>

<key>#Arguments</key>

<key>Arguments</key>

<key>Debug</key>

<key>DefaultVolume</key>

<key>Legacy</key>

<key>Secure</key>

<key>Timeout</key>

<key>XMPDetection</key>

</dict>

<dict>

</dict>

<key>Devices</key>

<dict>

<key>Audio</key>

<dict>

<key>Inject</key>

</dict>

<key>FakeID</key>

<dict>

<key>IntelGFX</key>

<key>NVidia</key>

</dict>

<dict>

<key>FixOwnership</key>

<key>Inject</key>

</dict>

<key>DisableDrivers</key>

<array>

<string>Nothing</string>

</array>

<dict>

<key>#ConsoleMode</key>

<key>#Custom</key>

<dict>

<key>Entries</key>

<array>

<dict>

<key>AddArguments</key>

<key>Arguments</key>

<string>Kernel=mach_kernel</string>

<key>Disabled</key>

<true/>

<key>Hidden</key>

<key>Hotkey</key>

<key>InjectKexts</key>

<key>NoCaches</key>

<string>\EFI\BOOT\BOOTX64.efi</string>

<key>Title</key>

<string>MyCustomEntry</string>

<string>OSXRecovery</string>

<key>Volume</key>

</dict>

<dict>

<key>Hidden</key>

<key>InjectKexts</key>

<key>NoCaches</key>

<key>SubEntries</key>

<array>

<dict>

<key>AddArguments</key>

<key>Title</key>

<string>Boot OS X 10.8.5 (12F36) Mountain Lion in Verbose Mode</string>

</dict>

</array>

<key>Title</key>

<string>OS X 10.8.5 (12F36) Mountain Lion</string>

<key>Volume</key>

</dict>

</array>

<key>Legacy</key>

<array>

<dict>

<key>Disabled</key>

<true/>

<key>Hidden</key>

<key>Hotkey</key>

<key>Title</key>

<string>MyLegacyEntry</string>

<string>Windows</string>

<key>Volume</key>

</dict>

</array>

<array>

<dict>

<key>Arguments</key>

<key>Disabled</key>

<key>Hidden</key>

<key>Hotkey</key>

<string>\EFI\CLOVER\TOOLS\Shell64-v1.efi</string>

<key>Title</key>

<string>MyCustomShell</string>

<key>Volume</key>

</dict>

</array>

</dict>

<key>#CustomIcons</key>

<array>

<string>Windows</string>

<string>BOOTX64.EFI</string>

</array>

<key>#Language</key>

<key>#Mouse</key>

<dict>

<key>DoubleClick</key>

<key>Enabled</key>

<true/>

<key>Mirror</key>

<key>Speed</key>

</dict>

<dict>

<key>Entries</key>

<true/>

<key>Legacy</key>

<true/>

</dict>

<key>#TextOnly</key>

<key>ScreenResolution</key>

<key>Theme</key>

<string>metal</string>

</dict>

<key>Graphics</key>

<dict>

<key>Inject</key>

<dict>

<key>Intel</key>

<key>NVidia</key>

</dict>

<key>KernelAndKextPatches</key>

<dict>

<key>AppleRTC</key>

<true/>

<key>AsusAICPUPM</key>

<true/>

<key>KernelPm</key>

<true/>

<key>KextsToPatch</key>

<array>

<dict>

<key>Comment</key>

<string>t1-HD4600_HDMI_Audio-2of2</string>

<data>

PQwKAAA=

</data>

<string>AppleHDAController</string>

<key>Replace</key>

<data>

PQwMAAA=

</data>

</dict>

<dict>

<key>Comment</key>

<string>t1-HD4600_HDMI_Audio-1of2</string>

<data>

PQsMAAA=

</data>

<string>AppleHDAController</string>

<key>Replace</key>

<data>

PQwMAAA=

</data>

</dict>

<dict>

<key>Comment</key>

<string>t1-10.11-AppleHDA/Realtek ALC...</string>

<data>

gxnUEQ==

</data>

<string>AppleHDA</string>

<key>Replace</key>

<data>

AAAAAA==

</data>

</dict>

<dict>

<key>Comment</key>

<string>t1-10.9-10.11-AppleHDA/Realtek ALC892</string>

<data>

ixnUEQ==

</data>

<string>AppleHDA</string>

<key>Replace</key>

<data>

kgjsEA==

</data>

</dict>

<dict>

<key>Comment</key>

<string>t1-AppleHDA/Resources/xml>zml</string>

<data>

eG1sLnps

</data>

<string>AppleHDA</string>

<key>Replace</key>

<data>

em1sLnps

</data>

</dict>

<dict>

<key>Comment</key>

<string>Skylake Apple APIC Patch</string>

<data>

wegQD7bw

</data>

<string>AppleAPIC</string>

<key>Replace</key>

<data>

vhcAAACQ

</data>

</dict>

<dict>

<key>Comment</key>

<string>10.11-BT4LE-Handoff-Hotspot-lisai9093</string>

<data>

SIX/dEdIiwc=

</data>

<string>IOBluetoothFamily</string>

<key>Replace</key>

<data>

Qb4PAAAA60Q=

</data>

</dict>

<dict>

<key>Comment</key>

<string>10.9-10.11-AppleHDA/Realtek ALC1150</string>

<data>

ixnUEQ==

</data>

<string>AppleHDA</string>

<key>Replace</key>

<data>

AAnsEA==

</data>

</dict>

<dict>

<key>Comment</key>

<string>AppleHDA/Resources/xml>zml</string>

<data>

eG1sLnps

</data>

<string>AppleHDA</string>

<key>Replace</key>

<data>

em1sLnps

</data>

</dict>

<dict>

<key>Comment</key>

<string>Raise USB Port Limit</string>

<data>

g72M/v//EA==

</data>

<string>AppleUSBXHCIPCI</string>

<key>Replace</key>

<data>

g72M/v//FA==

</data>

</dict>

<dict>

<key>Comment</key>

<string>10.11-AppleHDA/Realtek ALC...</string>

<data>

gxnUEQ==

</data>

<string>AppleHDA</string>

<key>Replace</key>

<data>

AAAAAA==

</data>

</dict>

</array>

</dict>

<key>RtVariables</key>

<dict>

<string>UseMacAddr0</string>

</dict>

<key>SMBIOS</key>

<dict>

<key>BiosReleaseDate</key>

<key>BiosVendor</key>

<string>Apple Inc.</string>

<key>BiosVersion</key>

<key>Board-ID</key>

<key>BoardManufacturer</key>

<string>Apple Inc.</string>

<key>BoardType</key>

<key>ChassisAssetTag</key>

<string>iMac-Aluminum</string>

<key>ChassisManufacturer</key>

<string>Apple Inc.</string>

<key>ChassisType</key>

<key>Family</key>

<key>Manufacturer</key>

<string>Apple Inc.</string>

<key>Memory</key>

<dict>

<key>Modules</key>

<array>

<dict>

<key>Frequency</key>

<key>Serial</key>

<key>Vendor</key>

<string>Corsair</string>

</dict>

<dict>

<key>Frequency</key>

<key>Serial</key>

<key>Vendor</key>

<string>Corsair</string>

</dict>

</array>

</dict>

<key>Mobile</key>

<key>ProductName</key>

<key>SerialNumber</key>

<string>C02xxxxxF8JC</string>

<key>Trust</key>

<key>Version</key>

</dict>

<key>SystemParameters</key>

<dict>

<key>InjectKexts</key>

<key>InjectSystemID</key>

<true/>

</dict>

</plist>

/disk0s1-EFI/EFI/CLOVER/OEM/SystemProductName/config.plist : Clover

View config.plist

<?xml version="1.0" encoding="UTF-8"?>

<!DOCTYPE plist PUBLIC "-//Apple//DTD PLIST 1.0//EN" "http://www.apple.com/DTDs/PropertyList-1.0.dtd">

<dict>

<key>KernelAndKextPatches</key>

<dict>

<key>Debug</key>

<key>KernelCpu</key>

<key>AsusAICPUPM</key>

<true/>

<key>AppleRTC</key>

<true/>

<key>KextsToPatch</key>

<array>

<dict>

<string>VoodooHDA</string>

<data>SGVhZHBob25lcwA=</data>

<key>Replace</key>

<data>VGVsZXBob25lcwA=</data>

</dict>

<dict>

<string>AppleAHCIPort</string>

<key>Comment</key>

<string>External icons patch</string>

<data>RXh0ZXJuYWw=</data>

<key>Replace</key>

<data>SW50ZXJuYWw=</data>

</dict>

</array>

</dict>

<dict>

<key>DsdtName</key>

<key>DropOemSSDT</key>

<key>DropAPIC</key>

<key>DropMCFG</key>

<key>DropHPET</key>

<key>DropECDT</key>

<key>DropDMAR</key>

<true/>

<key>DropBGRT</key>

<true/>

<key>GenerateIvyStates</key>

<key>GenerateCStates</key>

<key>GeneratePStates</key>

<key>DoubleFirstState</key>

<key>PLimitDict</key>

<key>UnderVoltStep</key>

</dict>

<key>DisableDrivers</key>

<array>

<string>Nothing</string>

</array>

<key>RtVariables</key>

<dict>

<key>MountEFI</key>

<true/>

<key>LogLineCount</key>

<key>LogEveryBoot</key>

</dict>

<dict>

<key>Theme</key>

<string>metal</string>

<key>Timeout</key>

<key>DefaultBootVolume</key>

<string>SnowHD</string>

<key>DebugLog</key>

<key>Mouse</key>

<dict>

<key>Enabled</key>

<key>Speed</key>

</dict>

<key>Volumes</key>

<dict>

<key>Legacy</key>

<string>First</string>

<array>

<string>VOLUME_NAME</string>

<string>VOLUME_UUID</string>

<string>TODO_HIDE_VOLUME_BY_TYPE/GROUP</string>

</array>

</dict>

<key>HideEntries</key>

<dict>

<key>OSXInstall</key>

<key>Recovery</key>

<key>Duplicate</key>

<key>WindowsEFI</key>

<key>Gentoo</key>

<key>Ubuntu</key>

<key>OpticalUEFI</key>

<key>InternalUEFI</key>

<key>ExternalUEFI</key>

</dict>

<dict>

<key>USBInjection</key>

<true/>

<key>USBFixOwnership</key>

<true/>

<key>InjectClockID</key>

<true/>

</dict>

<key>SystemParameters</key>

<dict>

<string>-v arch=i386 darkwake=0 WithKexts</string>

<key>CustomUUID</key>

<key>InjectSystemID</key>

<true/>

<key>LegacyBoot</key>

</dict>

<key>SMBIOS</key>

<dict>

<key>BiosVendor</key>

<string>Apple Inc.</string>

</dict>

<key>Graphics</key>

<dict>

<key>PatchVBios</key>

</dict>

</plist>

/disk0s1-EFI/EFI/CLOVER/OEM/SystemProductName/UEFI/config.plist : Clover

View config.plist

<?xml version="1.0" encoding="UTF-8"?>

<!DOCTYPE plist PUBLIC "-//Apple//DTD PLIST 1.0//EN" "http://www.apple.com/DTDs/PropertyList-1.0.dtd">

<dict>

<key>KernelAndKextPatches</key>

<dict>

<key>Debug</key>

<key>KernelCpu</key>

<key>AsusAICPUPM</key>

<true/>

<key>AppleRTC</key>

<true/>

<key>KextsToPatch</key>

<array>

<dict>

<string>VoodooHDA</string>

<data>SGVhZHBob25lcwA=</data>

<key>Replace</key>

<data>VGVsZXBob25lcwA=</data>

</dict>

<dict>

<string>AppleAHCIPort</string>

<key>Comment</key>

<string>External icons patch</string>

<data>RXh0ZXJuYWw=</data>

<key>Replace</key>

<data>SW50ZXJuYWw=</data>

</dict>

</array>

</dict>

<dict>

<key>DsdtName</key>

<key>DropOemSSDT</key>

<key>DropAPIC</key>

<key>DropMCFG</key>

<key>DropHPET</key>

<key>DropECDT</key>

<key>DropDMAR</key>

<true/>

<key>DropBGRT</key>

<true/>

<key>GenerateIvyStates</key>

<key>GenerateCStates</key>

<key>GeneratePStates</key>

<key>DoubleFirstState</key>

<key>PLimitDict</key>

<key>UnderVoltStep</key>

</dict>

<key>DisableDrivers</key>

<array>

<string>Nothing</string>

</array>

<key>RtVariables</key>

<dict>

<key>MountEFI</key>

<true/>

<key>LogLineCount</key>

<key>LogEveryBoot</key>

</dict>

<dict>

<key>Theme</key>

<string>metal</string>

<key>Timeout</key>

<key>DefaultBootVolume</key>

<string>SnowHD</string>

<key>DebugLog</key>

<key>Mouse</key>

<dict>

<key>Enabled</key>

<key>Speed</key>

</dict>

<key>Volumes</key>

<dict>

<key>Legacy</key>

<string>First</string>

<array>

<string>VOLUME_NAME</string>

<string>VOLUME_UUID</string>

<string>TODO_HIDE_VOLUME_BY_TYPE/GROUP</string>

</array>

</dict>

<key>HideEntries</key>

<dict>

<key>OSXInstall</key>

<key>Recovery</key>

<key>Duplicate</key>

<key>WindowsEFI</key>

<key>Gentoo</key>

<key>Ubuntu</key>

<key>OpticalUEFI</key>

<key>InternalUEFI</key>

<key>ExternalUEFI</key>

</dict>

<dict>

<key>USBInjection</key>

<true/>

<key>USBFixOwnership</key>

<true/>

<key>InjectClockID</key>

<true/>

</dict>

<key>SystemParameters</key>

<dict>

<string>-v arch=i386 darkwake=0 WithKexts</string>

<key>CustomUUID</key>

<key>InjectSystemID</key>

<true/>

<key>LegacyBoot</key>

</dict>

<key>SMBIOS</key>

<dict>

<key>BiosVendor</key>

<string>Apple Inc.</string>

</dict>

<key>Graphics</key>

<dict>

<key>PatchVBios</key>

</dict>

</plist>

/disk0s1-EFI/EFI/CLOVER/OEM/Z170M-ITX_ac/config.plist : Clover

View config.plist

<?xml version="1.0" encoding="UTF-8"?>

<!DOCTYPE plist PUBLIC "-//Apple//DTD PLIST 1.0//EN" "http://www.apple.com/DTDs/PropertyList-1.0.dtd">

<dict>

<dict>

<dict>

<key>Debug</key>

<key>DropOEM_DSM</key>

<key>Fixes</key>

<dict>

<key>AddDTGP_0001</key>

<true/>

<key>AddPNLF_1000000</key>

<true/>

<key>DeleteUnused_400000</key>

<true/>

<true/>

<true/>

<true/>

<true/>

<true/>

<true/>

<key>FixDarwin_0002</key>

<true/>

<key>FixHPET_0010</key>

<true/>

<key>FixIPIC_0040</key>

<true/>

<key>FixRegions_10000000</key>

<true/>

<key>FixSBUS_0080</key>

<true/>

<key>FixShutdown_0004</key>

<true/>

<key>NewWay_80000000</key>

<true/>

</dict>

<key>Patches</key>

<array>

<dict>

<key>Comment</key>

<string>Rename HDAS to HDEF</string>

<key>Disabled</key>

<data>

SERBUw==

</data>

<key>Replace</key>

<data>

SERFRg==

</data>

</dict>

</array>

<key>ReuseFFFF</key>

</dict>

<key>HaltEnabler</key>

<true/>

<dict>

<key>DropOem</key>

<key>Generate</key>

<true/>

</dict>

<dict>

<key>Arguments</key>

<key>Debug</key>

<key>DefaultVolume</key>

<string>Marcus</string>

<key>Legacy</key>

<key>Secure</key>

<key>Timeout</key>

<key>XMPDetection</key>

</dict>

<key>Devices</key>

<dict>

<key>Audio</key>

<dict>

<key>Inject</key>

</dict>

<key>FakeID</key>

<dict>

<key>IntelGFX</key>

<key>NVidia</key>

</dict>

<dict>

<key>FixOwnership</key>

<true/>

<key>Inject</key>

</dict>

<key>DisableDrivers</key>

<array>

<string>Nothing</string>

</array>

<dict>

<array>

<string>Windows</string>

<string>\EFI\BOOT\BOOTX64.EFI</string>

</array>

<key>Language</key>

<key>Mouse</key>

<dict>

<key>DoubleClick</key>

<key>Enabled</key>

<true/>

<key>Mirror</key>

<key>Speed</key>

</dict>

<dict>

<key>Entries</key>

<true/>

<key>Legacy</key>

<string>First</string>

<true/>

</dict>

<key>ScreenResolution</key>

<key>Theme</key>

<string>bluemac</string>

</dict>

<key>Graphics</key>

<dict>

<key>Inject</key>

<dict>

<key>Intel</key>

<true/>

<key>NVidia</key>

</dict>

<key>NvidiaSingle</key>

</dict>

<key>KernelAndKextPatches</key>

<dict>

<key>AppleRTC</key>

<true/>

<key>AsusAICPUPM</key>

<true/>

<key>Debug</key>

<key>KernelCpu</key>

<true/>

<key>KernelHaswellE</key>

<key>KernelLapic</key>

<key>KernelPm</key>

<true/>

<key>KextsToPatch</key>

<array>

<dict>

<key>Comment</key>

<string>t1-AppleHDA/Resources/xml>zml</string>

<key>Disabled</key>

<data>

eG1sLnps

</data>

<string>AppleHDA</string>

<key>Replace</key>

<data>

em1sLnps

</data>

</dict>

<dict>

<key>Comment</key>

<string>t1-HD4600_HDMI_Audio-1of2</string>

<key>Disabled</key>

<data>

PQsMAAA=

</data>

<string>AppleHDAController</string>

<key>Replace</key>

<data>

PQwMAAA=

</data>

</dict>

<dict>

<key>Comment</key>

<string>Dokterdok Bluetooth binary patch</string>

<key>Disabled</key>

<data>

i4eMAQAA

</data>

<string>IOBluetoothFamily</string>

<key>Replace</key>

<data>

uA8AAACQ

</data>

</dict>

<dict>

<key>Comment</key>

<string>t1-10.11-AppleHDA/Realtek ALC...</string>

<key>Disabled</key>

<data>

gxnUEQ==

</data>

<string>AppleHDA</string>

<key>Replace</key>

<data>

AAAAAA==

</data>

</dict>

<dict>

<key>Comment</key>

<string>Skylake AppleAPIC Patch</string>

<key>Disabled</key>

<data>

wegQD7bw

</data>

<string>AppleAPIC</string>

<key>Replace</key>

<data>

vhEAAACQ

</data>

</dict>

<dict>

<key>Comment</key>

<string>t1-10.9-10.11-AppleHDA/Realtek ALC892</string>

<key>Disabled</key>

<data>

ixnUEQ==

</data>

<string>AppleHDA</string>

<key>Replace</key>

<data>

kgjsEA==

</data>

</dict>

</array>

</dict>

<key>RtVariables</key>

<dict>

<key>BooterConfig</key>

<key>CsrActiveConfig</key>

</dict>

<key>SMBIOS</key>

<dict>

<key>BiosReleaseDate</key>

<key>BiosVendor</key>

<string>Apple Inc.</string>

<key>BiosVersion</key>

<key>Board-ID</key>

<key>BoardManufacturer</key>

<string>Apple Inc.</string>

<key>BoardType</key>

<key>ChassisAssetTag</key>

<string>Pro-Enclosure</string>

<key>ChassisManufacturer</key>

<string>Apple Inc.</string>

<key>ChassisType</key>

<key>Family</key>

<key>Manufacturer</key>

<string>Apple Inc.</string>

<key>Memory</key>

<dict>

<key>Modules</key>

<array>

<dict>

<key>Frequency</key>

<key>Serial</key>

<key>Vendor</key>

<string>Crucial</string>

</dict>

<dict>

<key>Frequency</key>

<key>Serial</key>

<key>Vendor</key>

<string>Crucial</string>

</dict>

</array>

</dict>

<key>ProductName</key>

<string>MacPro3,1</string>

<key>SerialNumber</key>

<key>Trust</key>

<key>Version</key>

</dict>

<key>SystemParameters</key>

<dict>

<key>InjectKexts</key>

<key>InjectSystemID</key>

<true/>

</dict>

</plist>

/disk0s2-El Capitan/Library/Preferences/SystemConfiguration/com.apple.Boot.plist : Apple

/disk0s2-El Capitan/nvram.plist : Clover

Boot Log

Dumped using the bdmesg tool. Created by Kabyl, modified by JrCs from an idea by STLVNUB

View AMI_X64_3358_BootLog.txt File

0:100 0:100 MemLog inited, TSC freq: 3696511080

0:100 0:000 MemLog was calibrated without ACPI PM Timer: ACPI I/O space is not enabled.

0:100 0:000

0:100 0:000 Now is 11.3.2016, 16:32:27 (GMT+2047)

0:100 0:000 Starting Clover rev 3358 on American Megatrends EFI

0:100 0:000 SelfDevicePath=PciRoot(0x0)\Pci(0x17,0x0)\Sata(0x0,0xFFFF,0x0)\HD(1,GPT,F9189C23-8CA6-4A47-BC08-02C0FDBE35A3,0x28,0x64000) @8471A418

0:100 0:000 SelfDirPath = \EFI\BOOT

0:100 0:000 Total Memory Slots Count = 2

0:100 0:000 Type 17 Index = 0

0:100 0:000 SmbiosTable.Type17->Speed = 2133MHz

0:100 0:000 SmbiosTable.Type17->Size = 8192MB

0:100 0:000 SmbiosTable.Type17->Bank/Device = BANK 0 ChannelA-DIMM0

0:100 0:000 Type 17 Index = 1

0:100 0:000 SmbiosTable.Type17->Speed = 2133MHz

0:100 0:000 SmbiosTable.Type17->Size = 8192MB

0:100 0:000 SmbiosTable.Type17->Bank/Device = BANK 2 ChannelB-DIMM0

0:100 0:000 Boot status=0

0:100 0:000 Clover revision: 3358 running on To Be Filled By O.E.M.

0:100 0:000 ... with board Z170M-ITX_ac

0:100 0:000 CPU Vendor = 756E6547 Model=506E3

0:100 0:000 got cores from CPUID_1 = 0

0:100 0:000 The CPU not supported turbo

0:100 0:000 BrandString = Intel(R) Core(TM) i3-6100 CPU @ 3.70GHz

0:100 0:000 TSC/CCC Information Leaf:

0:100 0:000 numerator : 308

0:100 0:000 denominator : 2

0:100 0:000 Calibrated ARTFrequency: 24003318

0:100 0:000 MSR 0xE2 before patch 1E000006

0:100 0:000 MSR 0xE4 00031814

0:100 0:000 MSR 0xCE 00080838_F1012500

0:100 0:000 non-usable FLEX_RATIO = 10000

0:100 0:000 corrected FLEX_RATIO = 0

0:100 0:000 MSR 0x1B0 00000000

0:100 0:000 FSBFrequency=100MHz DMIvalue=100000kHz

0:100 0:000 Corrected FSBFrequency=100MHz

0:100 0:000 Vendor/Model/Stepping: 0x756E6547/0x5E/0x3

0:100 0:000 Family/ExtFamily: 0x6/0x0

0:100 0:000 MaxDiv/MinDiv: 37.0/8

0:100 0:000 Turbo: 37/37/37/37

0:100 0:000 Features: 0xBFEBFBFF

0:100 0:000 Threads: 4

0:100 0:000 Cores: 2

0:100 0:000 FSB: 100 MHz

0:100 0:000 CPU: 3700 MHz

0:100 0:000 TSC: 3700 MHz

0:100 0:000 PIS: 400 MHz

0:100 0:000 PCI (00|00:00.00) : 8086 190F class=060000

0:100 0:000 PCI (00|00:01.00) : 8086 1901 class=060400

0:100 0:000 PCI (00|01:00.00) : 10DE 1402 class=030000

0:100 0:000 Found NVidia model=Zotac GeForce GTX 950

0:100 0:000 PCI (00|01:00.01) : 10DE 0FBA class=040300

0:100 0:000 PCI (00|00:14.00) : 8086 A12F class=0C0330

0:100 0:000 PCI (00|00:14.02) : 8086 A131 class=118000

0:100 0:000 PCI (00|00:16.00) : 8086 A13A class=078000

0:100 0:000 PCI (00|00:17.00) : 8086 A102 class=010601

0:100 0:000 PCI (00|00:1C.00) : 8086 A110 class=060400

0:100 0:000 PCI (00|00:1D.00) : 8086 A118 class=060400

0:100 0:000 PCI (00|00:1D.03) : 8086 A11B class=060400

0:100 0:000 PCI (00|04:00.00) : 10EC 8168 class=020000

0:100 0:000 LAN 0, Vendor=10EC, MMIO=D000

0:100 0:000 PCI (00|00:1F.00) : 8086 A145 class=060100

0:100 0:000 PCI (00|00:1F.02) : 8086 A121 class=058000

0:100 0:000 PCI (00|00:1F.03) : 8086 A170 class=040300

0:100 0:000 PCI (00|00:1F.04) : 8086 A123 class=0C0500

0:101 0:000 Clover load options size = 0 bytes

0:137 0:036 Using OEM config.plist at path: EFI\CLOVER\OEM\Z170M-ITX_ac\config.plist

0:137 0:000 EFI\CLOVER\OEM\Z170M-ITX_ac\config.plist loaded: Success

0:147 0:010 Found theme directory: applestyle

0:157 0:009 Found theme directory: BGM

0:168 0:011 Found theme directory: BGM256

0:188 0:020 Found theme directory: black_green

0:195 0:007 Found theme directory: bluemac

0:196 0:001 Found theme directory: bootcamp

0:199 0:002 Found theme directory: chrome

0:205 0:005 Found theme directory: CloverX

0:210 0:005 Found theme directory: dawn

0:215 0:005 Found theme directory: embedded

0:216 0:001 Found theme directory: gold_clover

0:222 0:006 Found theme directory: iclover

0:226 0:003 Found theme directory: ios7

0:230 0:004 Found theme directory: magnifico

0:235 0:004 Found theme directory: metal

0:242 0:006 Found theme directory: orange

0:243 0:001 Found theme directory: os_box

0:246 0:002 Found theme directory: os_one

0:246 0:000 Found theme directory: random

0:246 0:000 Found theme directory: Shield

0:267 0:020 Found theme directory: sketched

0:277 0:009 Found theme directory: Space

0:287 0:010 Found theme directory: steampunkblack

0:293 0:006 Found theme directory: thinkpad

0:296 0:003 Loading early settings

0:296 0:000 timeout set to 1

0:296 0:000 Custom boot CUSTOM_BOOT_DISABLED (0x0)

0:296 0:000 KextsToPatch: 6 requested

0:296 0:000 KextsToPatch 0: AppleHDA (t1-AppleHDA/Resources/xml>zml) Kext bin patch, data len: 6

0:296 0:000 KextsToPatch 1: AppleHDAController (t1-HD4600_HDMI_Audio-1of2) Kext bin patch, data len: 5

0:296 0:000 KextsToPatch 2: IOBluetoothFamily (Dokterdok Bluetooth binary patch) Kext bin patch, data len: 6

0:296 0:000 KextsToPatch 3: AppleHDA (t1-10.11-AppleHDA/Realtek ALC...) Kext bin patch, data len: 4

0:296 0:000 KextsToPatch 4: AppleAPIC (Skylake AppleAPIC Patch) Kext bin patch, data len: 6

0:296 0:000 KextsToPatch 5: AppleHDA (t1-10.9-10.11-AppleHDA/Realtek ALC892) Kext bin patch, data len: 4

0:296 0:000 Default theme: bluemac

0:297 0:000 Hiding entries with string Windows

0:297 0:000 Hiding entries with string \EFI\BOOT\BOOTX64.EFI

0:297 0:000 LoadDrivers() start

0:298 0:001 Loading FSInject-64.efi status=Success

0:299 0:000 Loading OsxAptioFix2Drv-64.efi status=Success

0:299 0:000 Loading OsxFatBinaryDrv-64.efi status=Success

0:299 0:000 Loading VBoxHfs-64.efi status=Success

0:300 0:000 - driver needs connecting

0:300 0:000 1 drivers needs connecting ...

0:300 0:000 PlatformDriverOverrideProtocol->GetDriver overriden

0:300 0:000 Searching for invalid DiskIo BY_DRIVER connects: not found, all ok

0:455 0:154 LoadDrivers() end

0:455 0:000 Dump SMC keys from NVRAM:

0:462 0:007 SetScreenResolution: 1920x1080 - not found!

0:462 0:000 SetMaxResolution: found best mode 1: 1024x768

0:462 0:000 - already set

0:462 0:000 Console modes reported: 4, available modes:

0:462 0:000 Mode 1: 80x25 (current mode)

0:462 0:000 Mode 2: 128x40

0:462 0:000 Mode 3: 100x31

0:462 0:000 Mode 4: 128x40

0:462 0:000 reinit: self device path=PciRoot(0x0)\Pci(0x17,0x0)\Sata(0x0,0xFFFF,0x0)\HD(1,GPT,F9189C23-8CA6-4A47-BC08-02C0FDBE35A3,0x28,0x64000)

0:463 0:000 ScanSPD() start

0:463 0:000 SMBus CmdReg: 0x3

0:463 0:000 Scanning SMBus [8086:A123], mmio: 0xDF22A004, ioport: 0xF000, hostc: 0x1

0:463 0:000 Slots to scan [8]...

0:490 0:026 SPD[0]: Type 12 @0x50

0:490 0:000 Sorry, DDR4 is not fully implemented! Use settings in config.plist

0:490 0:000 DDR speed 3200MHz

0:490 0:000 Slot: 0 Type 26 4096MB 3200MHz Vendor=NoName PartNo= SerialNo=0200020B000C020B

0:523 0:032 SPD[2]: Type 12 @0x52

0:524 0:000 Sorry, DDR4 is not fully implemented! Use settings in config.plist

0:524 0:000 DDR speed 3200MHz

0:524 0:000 Slot: 2 Type 26 4096MB 3200MHz Vendor=NoName PartNo= SerialNo=0200020B000C020B

0:554 0:030 ScanSPD() end

0:554 0:000 Get Acpi Tables List from RSDT:

0:554 0:000 Found table: FACP A M I len=132

0:554 0:000 Found table: APIC A M I len=132

0:554 0:000 Found table: FPDT A M I len=68

0:554 0:000 Found table: FIDT A M I len=156

0:554 0:000 Found table: MCFG A M I len=60

0:554 0:000 Found table: HPET A M I len=56

0:554 0:000 Found table: SSDT SataTabl len=877

0:554 0:000 Found table: LPIT SKL len=148

0:554 0:000 Found table: DBGP len=52

0:554 0:000 Found table: DBG2 len=84

0:554 0:000 Found table: SSDT xh_rvp08 len=1519

0:554 0:000 Found table: AAFT OEMAAFT len=717

0:554 0:000 Found table: SSDT SaSsdt len=20968

0:554 0:000 Found table: UEFI len=66

0:554 0:000 Found table: SSDT CpuSsdt len=3672

0:554 0:000 Found table: BGRT A M I len=56

0:554 0:000 Found table: ASF! HCG len=165

0:554 0:000 Calibrated TSC frequency =3696511080 =3696MHz

0:554 0:000 Loading main settings

0:554 0:000 USB FixOwnership: true

0:554 0:000 Config set Fixes will override FixMask mask!

0:554 0:000 final mask=97E600D7

0:554 0:000 PatchesDSDT: 1 requested

0:554 0:000 DSDT bin patch #0 lenToFind=4 lenToReplace=4

0:554 0:000 Config set ChassisType=0x6

0:555 0:000 found 5 volumes with blockIO

0:555 0:000 0. Volume:

0:555 0:000 PciRoot(0x0)\Pci(0x17,0x0)\Sata(0x0,0xFFFF,0x0)

0:555 0:000 1. Volume:

0:555 0:000 PciRoot(0x0)\Pci(0x17,0x0)\Sata(0x0,0xFFFF,0x0)\HD(1,GPT,F9189C23-8CA6-4A47-BC08-02C0FDBE35A3,0x28,0x64000)

0:556 0:000 Result of bootcode detection: bootable unknown (legacy)

0:556 0:000 This is SelfVolume !!

0:556 0:000 2. Volume:

0:556 0:000 PciRoot(0x0)\Pci(0x17,0x0)\Sata(0x0,0xFFFF,0x0)\HD(2,GPT,0B3AFAE6-20E9-4AFD-B6CE-474EF5B9E1E9,0x64028,0x3A25CA20)

0:557 0:000 3. Volume:

0:557 0:000 PciRoot(0x0)\Pci(0x17,0x0)\Sata(0x0,0xFFFF,0x0)\HD(3,GPT,410D9CB7-C2A7-4E55-AB30-2C336417F8C8,0x3A2C0A48,0x135F20)

0:557 0:000 4. Volume:

0:557 0:000 PciRoot(0x0)\Pci(0x17,0x0)\Sata(0x0,0xFFFF,0x0)\HD(4,GPT,90173D87-FCB2-4B44-B87D-B6EDC1180C4F,0x3A3F6968,0x3A2D0420)

0:559 0:001 Using theme 'bluemac' (EFI\CLOVER\themes\bluemac)

0:559 0:000 OS main and drive as badge

0:561 0:001 Choosing theme bluemac

0:561 0:000 found boot-args in NVRAM:nvda_drv=1, size=11

0:561 0:000 ...found arg:nvda_drv=1

0:561 0:000 Custom legacy start

0:561 0:000 Custom legacy end

0:561 0:000 Scanning legacy ...

0:561 0:000 0: 'Whole Disc Boot' (legacy) not legacy

0:561 0:000 1: 'EFI' (legacy) not legacy

0:561 0:000 2: 'El Capitan' (legacy) not legacy

0:561 0:000 3: 'Recovery HD' (legacy) not legacy

0:561 0:000 4: 'Untitled' (legacy) not legacy

0:561 0:000 Custom entries start

0:561 0:000 Custom entries finish

0:561 0:000 Scanning loaders...

0:561 0:000 0: 'Whole Disc Boot' no file system

0:561 0:000 1: 'EFI'

0:590 0:029 2: 'El Capitan'

0:616 0:025 AddLoaderEntry for Volume Name=El Capitan

0:624 0:008 Check if volume Is Hibernated:

0:624 0:000 Check sleep image 'by signature':

0:664 0:039 read prefs \Library\Preferences\SystemConfiguration\com.apple.PowerManagement.plist status=Success

0:664 0:000 SleepImage name from pref: ImageVolume = 'El Capitan', ImageName = '\private\var\vm\sleepimage'

0:685 0:021 Reading first 512 bytes of sleepimage ...

0:692 0:006 OurBlockIoRead: Lba=3509890, Offset=6A1312000 (BlockSize=512)

0:692 0:000 sig lion: 0

0:692 0:000 sig snow: 0

0:692 0:000 no valid sleep image offset was found

0:692 0:000 Reading completed -> Success

0:692 0:000 sleepimage offset could not be acquired

0:692 0:000 hibernated: no - sign

0:712 0:020 3: 'Recovery HD'

0:714 0:001 AddLoaderEntry for Volume Name=Recovery HD

0:734 0:020 4: 'Untitled'

0:742 0:007 Custom tool start

0:742 0:000 Custom tool end

0:759 0:017 found tool \EFI\CLOVER\tools\Shell64U.efi

0:759 0:000 Checking EFI partition Volume 1 for Clover

0:759 0:000 Found Clover

0:760 0:000 GetEfiBootDeviceFromNvram: efi-boot-device-data not found

0:760 0:000 EfiBootVolume not found

0:760 0:000 Default boot entry not found

0:760 0:000 DefaultIndex=-1 and MainMenu.EntryCount=8

0:760 0:000 Use anime=rotary_logo_bluemac frames=4

0:800 0:039 Found Mouse device:

0:800 0:000 GUI ready

6:567 5:767 Boot option Boot0000 not found

6:567 0:000 StartLoader() start

6:567 0:000 Entry->Settings: <null string>

6:567 0:000 Finally: Bus=99905kHz CPU=3697MHz

6:567 0:000 Kernel and Kext Patches at 83E0F8F0:

6:567 0:000 Allowed: y

6:567 0:000 Debug: n

6:567 0:000 KernelCpu: y

6:567 0:000 Lapic: n

6:567 0:000 Haswell-E: n

6:567 0:000 AICPUPM: y

6:567 0:000 AppleRTC: y

6:567 0:000 KernelPm: y

6:567 0:000 FakeCPUID: 0x0

6:567 0:000 ATIController: null

6:567 0:000 ATIDataLength: 0

6:567 0:000 0 Kexts to load

6:567 0:000 6 Kexts to patch

6:567 0:000 KextPatch[0]: 6 bytes, AppleHDA

6:567 0:000 KextPatch[1]: 5 bytes, AppleHDAController

6:567 0:000 KextPatch[2]: 6 bytes, IOBluetoothFamily

6:567 0:000 KextPatch[3]: 4 bytes, AppleHDA

6:567 0:000 KextPatch[4]: 6 bytes, AppleAPIC

6:567 0:000 KextPatch[5]: 4 bytes, AppleHDA

6:567 0:000 Loading boot.efi status=Success

6:680 0:112 GetOSVersion: : 10.11.3

6:680 0:000 insert table 9 for dev 0:0

6:680 0:000 insert table 9 for dev 0:1

6:680 0:000 insert table 9 for dev 0:0

6:680 0:000 Injecting user memory modules to SMBIOS

6:680 0:000 Channels: 1

6:680 0:000 Interleave: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

6:680 0:000 DIMM1 2400MHz 8192MB

6:680 0:000 mTotalSystemMemory = 8192

6:680 0:000 DIMM2 EMPTY

6:680 0:000 DIMM3 2400MHz 8192MB

6:680 0:000 mTotalSystemMemory = 16384

6:680 0:000 NumberOfMemoryDevices = 3

6:680 0:000 Type20[0]->End = 0x7FFFFF, Type17[0] = 0x2000

6:680 0:000 Table 131 is present, CPUType=10

6:680 0:000 Change to: 906

6:680 0:000 RSDT 0x87F5B028

6:680 0:000 FADT from RSDT: 0x87F5B150

6:680 0:000 XSDT 0x87F5B098

6:680 0:000 FADT from XSDT: 0x87F7BC40

6:680 0:000 Xsdt reallocation done

6:680 0:000 old FADT length=10C

6:680 0:000 Found OperationRegion(GNVS, SystemMemory, 87F98000, ...)

6:680 0:000 Found OperationRegion(CPSB, SystemMemory, 87970F18, ...)

6:680 0:000 Found OperationRegion(PNVA, SystemMemory, 87F99C98, ...)

6:680 0:000 Unable to determine address for OperationRegion(PDW0, SystemMemory, ...) skipping

6:680 0:000 Unable to determine address for OperationRegion(PDW1, SystemMemory, ...) skipping

6:680 0:000 Unable to determine address for OperationRegion(PDW0, SystemMemory, ...) skipping

6:680 0:000 Unable to determine address for OperationRegion(PREG, SystemMemory, ...) skipping

6:680 0:000 Unable to determine address for OperationRegion(PDW0, SystemMemory, ...) skipping

6:680 0:000 Unable to determine address for OperationRegion(GPPX, SystemMemory, ...) skipping

6:680 0:000 Unable to determine address for OperationRegion(PDW0, SystemMemory, ...) skipping

6:680 0:000 Found OperationRegion(THBA, SystemMemory, FE200000, ...)

6:680 0:000 Unable to determine address for OperationRegion(THBA, SystemMemory, ...) skipping

6:681 0:000 Unable to determine address for OperationRegion(PWMR, SystemMemory, ...) skipping

6:681 0:000 Unable to determine address for OperationRegion(PMST, SystemMemory, ...) skipping

6:681 0:000 Unable to determine address for OperationRegion(PCR0, SystemMemory, ...) skipping

6:681 0:000 Unable to determine address for OperationRegion(PCR1, SystemMemory, ...) skipping

6:681 0:000 Unable to determine address for OperationRegion(XHCP, SystemMemory, ...) skipping

6:681 0:000 Unable to determine address for OperationRegion(MC11, SystemMemory, ...) skipping

6:681 0:000 Unable to determine address for OperationRegion(RPAL, SystemMemory, ...) skipping

6:681 0:000 Unable to determine address for OperationRegion(EPAC, SystemMemory, ...) skipping

6:681 0:000 Unable to determine address for OperationRegion(NCRG, SystemMemory, ...) skipping

6:681 0:000 Unable to determine address for OperationRegion(ICB1, SystemMemory, ...) skipping

6:681 0:000 Unable to determine address for OperationRegion(BAR0, SystemMemory, ...) skipping

6:681 0:000 Unable to determine address for OperationRegion(BAR1, SystemMemory, ...) skipping

6:681 0:000 Found OperationRegion(ITSS, SystemMemory, FDC43100, ...)

6:681 0:000 Unable to determine address for OperationRegion(MBAR, SystemMemory, ...) skipping

6:681 0:000 Unable to determine address for OperationRegion(ACTC, SystemMemory, ...) skipping

6:681 0:000 Found OperationRegion(TMMB, SystemMemory, FED40000, ...)

6:681 0:000 Found OperationRegion(CRBD, SystemMemory, FED40000, ...)

6:681 0:000 Found OperationRegion(TPMR, SystemMemory, FFFFFFFF, ...)

6:705 0:023 Apply DsdtFixMask=0x97E600D7 new way

6:705 0:000 drop _DSM mask=0x0000

6:705 0:000 ========= Auto patch DSDT Starting ========

6:705 0:000 VideoCard devID=0x140210DE

6:705 0:000 DisplayADR1[0] = 0x10000, DisplayADR2[0] = 0x0

6:705 0:000 USBADR[0] = 0x140000 and PCIe = 0xFFFE

6:718 0:013 Audio HDA (addr:0x1F0003) setting specified layout-id=1 (0x1)

6:718 0:000 patch pattern 48444153

6:718 0:000 patched at 9B31

6:718 0:000 patched at 162B

6:718 0:000 patched at 86

6:718 0:000 patched at D

6:718 0:000 patched at A1

6:718 0:000 patched at 6A

6:718 0:000 first CPU found at 8528 offset 852B

6:718 0:000 score candidate at 8524

6:718 0:000 score inserted in acpi_cpu_score _PR_

6:718 0:000 Found ACPI CPU: CPU0 And CPU1 And CPU2 And CPU3 And CPU4 And CPU5 And CPU6 And CPU7

within the score: _PR_

6:719 0:000 Found PCIROOTUID = 0

6:719 0:000 Start RTC Fix

6:719 0:000 found RTC Length not match, Maybe will case CMOS reset will patch it.

6:719 0:000 found RTC had IRQNoFlag will move -3 bytes

6:719 0:000 ...len=20A9E

6:719 0:000 new size written to 1FAB9 shift=0 len=20A9E

6:719 0:000 len after correct outers 20A9E

6:719 0:000 Start TMR Fix

6:719 0:000 Start PIC Fix

6:720 0:000 PIC size=A5 at 1F8E8

6:720 0:000 found CRS at 1F8FC size 8D

6:720 0:000 found PIC had IRQNoFlag will move -3 bytes

6:720 0:000 Fix Device PIC size -3

6:720 0:000 Start HPET Fix

6:721 0:000 Start SBUS Fix PCI=264F len=20A6D

6:721 0:000 device (SBUS) found at 9CF2

6:721 0:000 _DSM already exists, patch SBUS will not be applied

6:721 0:000 Start _WAK Return Fix

6:721 0:000 _WAK Method find return data, don't need to patch.

6:721 0:000 return len=20A7B

6:721 0:000 deleting device CRT_

6:721 0:000 deleting device DVI_

6:722 0:000 deleting device SPKR

6:722 0:000 deleting device ECP_

6:722 0:000 deleting device LPT_

6:723 0:000 deleting device FDC0

6:723 0:000 deleting device ECP1

6:723 0:000 deleting device LPT1

6:724 0:001 Start PNLF Fix

6:725 0:000 found PWRB at 1FBA7

6:725 0:000 Start _S3D Fix

6:725 0:000 indirect name=PNVB

6:725 0:000 OperationRegion (THBA...) corrected to addr=0xFE200000

6:725 0:000 indirect name=TPMM

6:725 0:000 indirect name=FTPM

6:725 0:000 Start ADP1 fix

6:725 0:000 no device(AC) exists

6:726 0:000 Start Darwin Fix

6:726 0:000 Name _OSI present at 0x8851, renaming to OOSI

6:726 0:000 Name _OSI present at 0xFD40, renaming to OOSI

6:726 0:000 Name _OSI present at 0xFD47, renaming to OOSI

6:726 0:000 Name _OSI present at 0xFD5C, renaming to OOSI

6:726 0:000 Name _OSI present at 0xFD78, renaming to OOSI

6:726 0:000 Name _OSI present at 0xFD98, renaming to OOSI

6:726 0:000 Name _OSI present at 0xFDB8, renaming to OOSI

6:726 0:000 Name _OSI present at 0xFDD6, renaming to OOSI

6:726 0:000 Name _OSI present at 0xFDF2, renaming to OOSI

6:726 0:000 Name _OSI present at 0xFE0E, renaming to OOSI

6:726 0:000 Name _OSI present at 0xFE2A, renaming to OOSI

6:726 0:000 Name _OSI present at 0xFE46, renaming to OOSI

6:726 0:000 Start SHUTDOWN Fix len=20B51

6:726 0:000 ========= Auto patch DSDT Finished ========

6:726 0:000 Patch table: SSDT SataTabl

6:726 0:000 SSDT len = 0x36D

6:726 0:000 patch pattern 48444153

6:726 0:000 bin not found

6:726 0:000 Patch table: SSDT xh_rvp08

6:726 0:000 SSDT len = 0x5EF

6:726 0:000 patch pattern 48444153

6:726 0:000 bin not found

6:726 0:000 Patch table: SSDT SaSsdt

6:726 0:000 SSDT len = 0x51E8

6:726 0:000 patch pattern 48444153

6:726 0:000 bin not found

6:726 0:000 Patch table: SSDT CpuSsdt

6:726 0:000 SSDT len = 0xE58

6:726 0:000 patch pattern 48444153

6:726 0:000 bin not found

6:726 0:000 Drop tables from Xsdt, SIGN=XXXX TableID= Length=0

6:726 0:000 Xsdt has tables count=17

6:726 0:000 corrected XSDT length=172

6:726 0:000 CPUBase=0 and ApicCPUBase=1 ApicCPUNum=1

6:726 0:000 Maximum control=0x25

6:726 0:000 P-States: min 0x8, max 0x25

6:726 0:000 SSDT with CPU P-States generated successfully

6:726 0:000 SSDT with CPU C-States generated successfully

6:726 0:000 EdidDiscovered size=0

6:726 0:000 NVidia GFX injection not set

6:726 0:000 LAN Controller [10EC:8168] :: PciRoot(0x0)\Pci(0x1D,0x3)\Pci(0x0,0x0)

6:726 0:000 RCBA disabled; cannot use it

6:726 0:000 HDA Controller [8086:A170] :: PciRoot(0x0)\Pci(0x1F,0x3) => setting specified layout-id=1 (0x1)

6:726 0:000 stringlength = 552

6:727 0:000 CurrentMode: Width=1024 Height=768

6:727 0:000 Beginning FSInjection

FSInjectionInstall ...

- Our FSI_SIMPLE_FILE_SYSTEM_PROTOCOL installed on handle: 8471A118

FSInjectionInstall ...

- Our FSI_SIMPLE_FILE_SYSTEM_PROTOCOL installed on handle: 8471A118

6:733 0:006 MSR 0x1B0 set to 00000000

6:733 0:000 Preparing kexts injection for arch=x86_64 from \EFI\CLOVER\kexts\Other

6:734 0:001 Preparing kexts injection for arch=x86_64 from EFI\CLOVER\OEM\Z170M-ITX_ac\kexts\10.11

6:734 0:000 Extra kext: EFI\CLOVER\OEM\Z170M-ITX_ac\kexts\10.11\realtekALC.kext

6:744 0:009 Extra kext: EFI\CLOVER\OEM\Z170M-ITX_ac\kexts\10.11\RealtekRTL8111.kext

6:747 0:003 Extra kext: EFI\CLOVER\OEM\Z170M-ITX_ac\kexts\10.11\FakeSMC.kext

6:749 0:001 Extra kext: EFI\CLOVER\OEM\Z170M-ITX_ac\kexts\10.11\DummyUSBXHCIPCI.kext

6:751 0:002 Thinning fails

6:751 0:000 Thinning failed: EFI\CLOVER\OEM\Z170M-ITX_ac\kexts\10.11\DummyUSBXHCIPCI.kext

6:766 0:014 Extra kext: EFI\CLOVER\OEM\Z170M-ITX_ac\kexts\10.11\HDMIAudio.kext

6:767 0:001 Extra kext: EFI\CLOVER\OEM\Z170M-ITX_ac\kexts\10.11\LPC_Injector.kext

6:777 0:009 Extra kext: EFI\CLOVER\OEM\Z170M-ITX_ac\kexts\10.11\VoodooTSCSync.kext

6:783 0:005 Removed efi-boot-device-data variable: Not Found

6:783 0:000 Custom boot is disabled

6:783 0:000 Closing log

CPU Information

Dumped using x86info v1.31pre. Written to succeed CPUID by Phil Karn (KA9Q). Compiled by Slice

View cpuinfo.txt File

x86info v1.31pre

Found 4 identical CPUs

Extended Family: 0 Extended Model: 5 Family: 6 Model: 94 Stepping: 3

Type: 0 (Original OEM)

CPU Model (x86info's best guess): Unknown model.

Processor name string (BIOS programmed): Intel(R) Core(TM) i3-6100 CPU @ 3.70GHz

eax in: 0x00000000, eax = 00000016 ebx = 756e6547 ecx = 6c65746e edx = 49656e69

eax in: 0x00000001, eax = 000506e3 ebx = 00100800 ecx = 7ffafbbf edx = bfebfbff

eax in: 0x00000002, eax = 76036301 ebx = 00f0b5ff ecx = 00000000 edx = 00c30000

eax in: 0x00000003, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000

eax in: 0x00000004, eax = 1c004121 ebx = 01c0003f ecx = 0000003f edx = 00000000

eax in: 0x00000005, eax = 00000040 ebx = 00000040 ecx = 00000003 edx = 00142120

eax in: 0x00000006, eax = 000027f5 ebx = 00000002 ecx = 00000009 edx = 00000000

eax in: 0x00000007, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000

eax in: 0x00000008, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000

eax in: 0x00000009, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000

eax in: 0x0000000a, eax = 07300404 ebx = 00000000 ecx = 00000000 edx = 00000603

eax in: 0x0000000b, eax = 00000001 ebx = 00000002 ecx = 00000100 edx = 00000000

eax in: 0x0000000c, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000

eax in: 0x0000000d, eax = 0000001f ebx = 00000340 ecx = 00000440 edx = 00000000

eax in: 0x0000000e, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000

eax in: 0x0000000f, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000

eax in: 0x00000010, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000

eax in: 0x00000011, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000

eax in: 0x00000012, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000

eax in: 0x00000013, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000

eax in: 0x00000014, eax = 00000001 ebx = 0000000f ecx = 00000007 edx = 00000000

eax in: 0x00000015, eax = 00000002 ebx = 00000134 ecx = 00000000 edx = 00000000

eax in: 0x00000016, eax = 00000e74 ebx = 00000e74 ecx = 00000064 edx = 00000000

eax in: 0x80000000, eax = 80000008 ebx = 00000000 ecx = 00000000 edx = 00000000

eax in: 0x80000001, eax = 00000000 ebx = 00000000 ecx = 00000121 edx = 2c100000

eax in: 0x80000002, eax = 65746e49 ebx = 2952286c ecx = 726f4320 edx = 4d542865

eax in: 0x80000003, eax = 33692029 ebx = 3031362d ecx = 50432030 edx = 20402055

eax in: 0x80000004, eax = 30372e33 ebx = 007a4847 ecx = 00000000 edx = 00000000

eax in: 0x80000005, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000000

eax in: 0x80000006, eax = 00000000 ebx = 00000000 ecx = 01006040 edx = 00000000

eax in: 0x80000007, eax = 00000000 ebx = 00000000 ecx = 00000000 edx = 00000100

eax in: 0x80000008, eax = 00003027 ebx = 00000000 ecx = 00000000 edx = 00000000

Cache info

L1 Data Cache: 32KB, 8-way associative, 64 byte line size

TLB info

Instruction TLB: 2M/4M pages, fully associative, 8 entries

Instruction TLB: 4K pages, 8-way associative, 64 entries

Data TLB: 1GB pages, 4-way set associative, 4 entries

Data TLB: 4KB pages, 4-way associative, 64 entries

64 byte prefetching.

Found unknown cache descriptors: c3

Feature flags:

fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflsh ds acpi mmx fxsr sse sse2 ss ht tm pbe sse3 pclmuldq dtes64 monitor ds-cpl vmx est tm2 ssse3 [1:ecx:11] fma cx16 xTPR pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc-deadline aes xsave osxsave avx f16c rdrnd

Extended feature flags:

xd pdpe1gb rdtscp em64t lahf_lm [80000001:ecx:5] [80000001:ecx:8] dts arat pln ecmd ptm [6:eax:7] [6:eax:8] [6:eax:9] [6:eax:10] [6:eax:13] nonstop_tsc

Long NOPs supported: yes

Address sizes : 39 bits physical, 48 bits virtual

3.70GHz processor (estimate).

Total processor threads: 4

This system has 1 dual-core processor with hyper-threading (2 threads per core) running at an estimated 3.70GHz

Device Properties

Dumped using gfxutil v0.71b by McMatrix from 2007

View device-properties.plist File

<?xml version="1.0" encoding="UTF-8"?>

<!DOCTYPE plist PUBLIC "-//Apple//DTD PLIST 1.0//EN" "http://www.apple.com/DTDs/PropertyList-1.0.dtd">

<dict>

<key>PciRoot(0x0)/Pci(0x1d,0x3)/Pci(0x0,0x0)</key>

<dict>

<key>built-in</key>

<data>

AQ==

</data>

<key>device_type</key>

<data>

RXRoZXJuZXQA

</data>

</dict>

<key>PciRoot(0x0)/Pci(0x1f,0x3)</key>

<dict>

<key>MaximumBootBeepVolume</key>

<data>

AA==

</data>

<key>PinConfigurations</key>

<data>

AA==

</data>

<key>layout-id</key>

<data>

AQAAAA==

</data>

</dict>

</plist>

Disk Partition Tables

disk0

WDC WD10EZEX-08M2NA0 (4096 byte physical sectors) | 1.0 TB (1953525168 Blocks * 512 byte sectors)
GUID Partition Table | Disk GUID:724d191c-ff68-4b44-991d-f7b8aaa870c6

Start LBA

MBR Partition Map

GPT Partition Map

Loader

MBR

EFI Protective (ee)

Primary GPT Header

Primary GPT Table

EFI System Partition (209.71MB)

Apple EFI

409640

El Capitan (499.48GB)

975964744

Recovery HD (650.00MB)

977234280

Untitled (499.72GB)

1953262984

1953525135

Backup GPT Table

1953525167

Backup GPT Header

LBA 0

0000000: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000010: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000020: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000030: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000040: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000050: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000060: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000070: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000080: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000090: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000a0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000b0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000c0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000d0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000e0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000f0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000100: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000110: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000120: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000130: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000140: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000150: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000160: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000170: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000180: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000190: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001a0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001b0: 0000 0000 0000 0000 0000 0000 0000 00fe  ................
00001c0: ffff eefe ffff 0100 0000 af6d 7074 0000  ...........mpt..
00001d0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001e0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001f0: 0000 0000 0000 0000 0000 0000 0000 55aa  ..............U.

Details

MBR Windows NT Signature: 00000000
MBR Partition Entry 1: 00feffffeefeffff01000000af6d7074
MBR Partition Entry 2: 00000000000000000000000000000000
MBR Partition Entry 3: 00000000000000000000000000000000
MBR Partition Entry 4: 00000000000000000000000000000000
MBR Signature: aa55

MBR Partition Entry: 00feffffeefeffff01000000af6d7074
=====================================================
MBR Partition Entry Status: 00 (Inactive)
MBR Partition Entry Starting CHS: 1023:254:63
MBR Partition Entry Ending CHS: 1023:254:63
MBR Partition Entry Partition Type: ee (EFI Protective)
MBR Partition Entry LBA of First Sector: 1
MBR Partition Entry No. Sectors in Partition: 1953525167
MBR Partition Size: 1.00TB

LBA 1

0000000: 4546 4920 5041 5254 0000 0100 5c00 0000  EFI PART....\...
0000010: c550 65fc 0000 0000 0100 0000 0000 0000  .Pe.............
0000020: af6d 7074 0000 0000 2200 0000 0000 0000  .mpt....".......
0000030: 8e6d 7074 0000 0000 1c19 4d72 68ff 444b  .mpt......Mrh.DK
0000040: 991d f7b8 aaa8 70c6 0200 0000 0000 0000  ......p.........
0000050: 8000 0000 8000 0000 91e2 aa45 0000 0000  ...........E....
0000060: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000070: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000080: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000090: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000a0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000b0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000c0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000d0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000e0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000f0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000100: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000110: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000120: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000130: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000140: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000150: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000160: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000170: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000180: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000190: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001a0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001b0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001c0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001d0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001e0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001f0: 0000 0000 0000 0000 0000 0000 0000 0000  ................

Details

Partition Table Revision: 00000100
Header Size: 92
Header Checksum: c55065fc
Middle Reserved Section (Should be zero): Yes
Header LBA: 1
Backup LBA: 1953525167
First Logical Block: 34
Last Logical Block: 1953525134
Disk GUID: 724d191c-ff68-4b44-991d-f7b8aaa870c6
Partition Array Starting LBA: 2
Partition Array Entries: 128
Partition Array Structure Size: 128
Partition Entry Array Checksum: 91e2aa45
Ending Reserved Section (Should be zero): Yes

LBA 2

0000000: 2873 2ac1 1ff8 d211 ba4b 00a0 c93e c93b  (s*......K...>.;
0000010: 239c 18f9 a68c 474a bc08 02c0 fdbe 35a3  #.....GJ......5.
0000020: 2800 0000 0000 0000 2740 0600 0000 0000  (.......'@......
0000030: 0000 0000 0000 0000 4500 4600 4900 2000  ........E.F.I. .
0000040: 5300 7900 7300 7400 6500 6d00 2000 5000  S.y.s.t.e.m. .P.
0000050: 6100 7200 7400 6900 7400 6900 6f00 6e00  a.r.t.i.t.i.o.n.
0000060: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000070: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000080: 0053 4648 0000 aa11 aa11 0030 6543 ecac  .SFH.......0eC..
0000090: e6fa 3a0b e920 fd4a b6ce 474e f5b9 e1e9  ..:.. .J..GN....
00000a0: 2840 0600 0000 0000 470a 2c3a 0000 0000  (@......G.,:....
00000b0: 0000 0000 0000 0000 4500 6c00 2000 4300  ........E.l. .C.
00000c0: 6100 7000 6900 7400 6100 6e00 0000 0000  a.p.i.t.a.n.....
00000d0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000e0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000f0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000100: 746f 6f42 0000 aa11 aa11 0030 6543 ecac  tooB.......0eC..
0000110: b79c 0d41 a7c2 554e ab30 2c33 6417 f8c8  ...A..UN.0,3d...
0000120: 480a 2c3a 0000 0000 6769 3f3a 0000 0000  H.,:....gi?:....
0000130: 0000 0000 0000 0200 5200 6500 6300 6f00  ........R.e.c.o.
0000140: 7600 6500 7200 7900 2000 4800 4400 0000  v.e.r.y. .H.D...
0000150: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000160: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000170: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000180: 0053 4648 0000 aa11 aa11 0030 6543 ecac  .SFH.......0eC..
0000190: 873d 1790 b2fc 444b b87d b6ed c118 0c4f  .=....DK.}.....O
00001a0: 6869 3f3a 0000 0000 876d 6c74 0000 0000  hi?:.....mlt....
00001b0: 0000 0000 0000 0000 5500 6e00 7400 6900  ........U.n.t.i.
00001c0: 7400 6c00 6500 6400 0000 0000 0000 0000  t.l.e.d.........
00001d0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001e0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001f0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000200: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000210: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000220: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000230: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000240: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000250: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000260: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000270: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000280: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000290: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00002a0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00002b0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00002c0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00002d0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00002e0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00002f0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000300: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000310: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000320: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000330: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000340: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000350: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000360: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000370: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000380: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000390: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00003a0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00003b0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00003c0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00003d0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00003e0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00003f0: 0000 0000 0000 0000 0000 0000 0000 0000  ................

Details

Array Length:16384 bytes
Array Block Count (512 bytes):32

=====================================================

Partition Type GUID: EFI System Partition
Partition Unique GUID: f9189c23-8ca6-4a47-bc08-02c0fdbe35a3
Partition Starting LBA: 40
Partition Ending LBA: 409639
Partition UEFI Reserved Attributes: 0000000000000000
Partition Name: EFI System Partition
Partition Reserved Byte: OK
Partition Size: 209.71MB
Partition Loader: Apple EFI

=====================================================

Partition Type GUID: HFS+
Partition Unique GUID: 0b3afae6-20e9-4afd-b6ce-474ef5b9e1e9
Partition Starting LBA: 409640
Partition Ending LBA: 975964743
Partition UEFI Reserved Attributes: 0000000000000000
Partition Name: El Capitan
Partition Reserved Byte: OK
Partition Size: 499.48GB

=====================================================

Partition Type GUID: OSX Boot
Partition Unique GUID: 410d9cb7-c2a7-4e55-ab30-2c336417f8c8
Partition Starting LBA: 975964744
Partition Ending LBA: 977234279
Partition UEFI Reserved Attributes: 0000000000000200
Partition Name: Recovery HD
Partition Reserved Byte: OK
Partition Size: 650.00MB

=====================================================

Partition Type GUID: HFS+
Partition Unique GUID: 90173d87-fcb2-4b44-b87d-b6edc1180c4f
Partition Starting LBA: 977234280
Partition Ending LBA: 1953262983
Partition UEFI Reserved Attributes: 0000000000000000
Partition Name: Untitled
Partition Reserved Byte: OK
Partition Size: 499.72GB

LBA 40

0000000: eb58 9042 5344 2020 342e 3400 0201 2000  .X.BSD  4.4... .
0000010: 0200 0000 00f0 0000 2000 1000 0000 0000  ........ .......
0000020: 0040 0600 4f0c 0000 0000 0000 0200 0000  .@..O...........
0000030: 0100 0600 0000 0000 0000 0000 0000 0000  ................
0000040: 0001 29ed 17e3 6745 4649 2020 2020 2020  ..)...gEFI
0000050: 2020 4641 5433 3220 2020 fa31 c08e d0bc    FAT32   .1....
0000060: 007c fb8e d8e8 0000 5e83 c619 bb07 00fc  .|......^.......
0000070: ac84 c074 06b4 0ecd 10eb f530 e4cd 16cd  ...t.......0....
0000080: 190d 0a4e 6f6e 2d73 7973 7465 6d20 6469  ...Non-system di
0000090: 736b 0d0a 5072 6573 7320 616e 7920 6b65  sk..Press any ke
00000a0: 7920 746f 2072 6562 6f6f 740d 0a00 0000  y to reboot.....
00000b0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000c0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000d0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000e0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000f0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000100: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000110: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000120: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000130: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000140: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000150: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000160: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000170: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000180: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000190: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001a0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001b0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001c0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001d0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001e0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001f0: 0000 0000 0000 0000 0000 0000 0000 55aa  ..............U.

Details

LBA 409640

0000000: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000010: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000020: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000030: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000040: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000050: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000060: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000070: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000080: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000090: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000a0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000b0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000c0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000d0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000e0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000f0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000100: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000110: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000120: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000130: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000140: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000150: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000160: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000170: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000180: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000190: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001a0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001b0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001c0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001d0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001e0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001f0: 0000 0000 0000 0000 0000 0000 0000 0000  ................

Details

LBA 975964744

0000000: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000010: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000020: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000030: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000040: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000050: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000060: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000070: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000080: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000090: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000a0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000b0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000c0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000d0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000e0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000f0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000100: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000110: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000120: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000130: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000140: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000150: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000160: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000170: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000180: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000190: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001a0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001b0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001c0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001d0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001e0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001f0: 0000 0000 0000 0000 0000 0000 0000 0000  ................

Details

LBA 977234280

0000000: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000010: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000020: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000030: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000040: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000050: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000060: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000070: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000080: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000090: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000a0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000b0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000c0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000d0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000e0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000f0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000100: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000110: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000120: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000130: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000140: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000150: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000160: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000170: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000180: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000190: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001a0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001b0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001c0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001d0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001e0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001f0: 0000 0000 0000 0000 0000 0000 0000 0000  ................

Details

LBA 1953525135

Details

LBA 1953525167

0000000: 4546 4920 5041 5254 0000 0100 5c00 0000  EFI PART....\...
0000010: 27e8 f85f 0000 0000 af6d 7074 0000 0000  '.._.....mpt....
0000020: 0100 0000 0000 0000 2200 0000 0000 0000  ........".......
0000030: 8e6d 7074 0000 0000 1c19 4d72 68ff 444b  .mpt......Mrh.DK
0000040: 991d f7b8 aaa8 70c6 8f6d 7074 0000 0000  ......p..mpt....
0000050: 8000 0000 8000 0000 91e2 aa45 0000 0000  ...........E....
0000060: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000070: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000080: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000090: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000a0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000b0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000c0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000d0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000e0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00000f0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000100: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000110: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000120: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000130: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000140: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000150: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000160: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000170: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000180: 0000 0000 0000 0000 0000 0000 0000 0000  ................
0000190: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001a0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001b0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001c0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001d0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001e0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00001f0: 0000 0000 0000 0000 0000 0000 0000 0000  ................

Details

Partition Table Revision: 00000100
Header Size: 92
Header Checksum: 27e8f85f
Middle Reserved Section (Should be zero): Yes
Header LBA: 1953525167
Backup LBA: 1
First Logical Block: 34
Last Logical Block: 1953525134
Disk GUID: 724d191c-ff68-4b44-991d-f7b8aaa870c6
Partition Array Starting LBA: 1953525135
Partition Array Entries: 128
Partition Array Structure Size: 128
Partition Entry Array Checksum: 91e2aa45
Ending Reserved Section (Should be zero): Yes

Disk & Volume UIDs

UUID's grabbed from diskutil info. Unique partition GUID's dumped from IOreg.

View UIDs.txt File

Device Name Volume UUID Unique partition GUID

(Example Usage: Kernel flag rd=uuid boot-uuid=) (Example Usage: Clover Hide Volume)

disk0s1 /Volumes/EFI 0E239BC6-F960-3107-89CF-1C97F78BB46B F9189C23-8CA6-4A47-BC08-02C0FDBE35A3

disk0s2 /Volumes/El Capitan 83412E4A-C4A6-3B35-B409-ACEE954F57DA 0B3AFAE6-20E9-4AFD-B6CE-474EF5B9E1E9

disk0s3 /Volumes/Recovery HD B9313135-A419-3AAE-9DB4-710A811DE71B 410D9CB7-C2A7-4E55-AB30-2C336417F8C8

disk0s4 /Volumes/Untitled 6F36F4D9-3E52-3D18-9780-9BE81D2DFBB8 90173D87-FCB2-4B44-B87D-B6EDC1180C4F

DMI Tables

DMI Type 0: BIOS Handle:00000

0000: 00 18 00 00 01 02 00 00 03 df 00 98 8b 3f 01 00

0010: 00 00 03 0d 00 01 ff ff

BIOS Information

Vendor: Apple Inc.

Version: MP31.88Z.006C.B05.0802291410

Release Date: 02/29/08

ROM Size: 14336 kB

Characteristics:

BIOS is upgradeable

BIOS shadowing is allowed

Boot from CD is supported

Selectable boot is supported

BIOS ROM is socketed

EDD is supported

5.25"/1.2 MB floppy services are supported (int 13h)

3.5"/720 kB floppy services are supported (int 13h)

3.5"/2.88 MB floppy services are supported (int 13h)

Print screen service is supported (int 5h)

8042 keyboard services are supported (int 9h)

Serial services are supported (int 14h)

Printer services are supported (int 17h)

ACPI is supported

USB legacy is supported

BIOS boot specification is supported

Targeted content distribution is supported

UEFI is supported

BIOS Revision: 0.1

DMI Type 1: System Handle:00001

0000: 01 1b 01 00 01 02 03 04 00 02 00 03 00 04 00 05

0010: 00 06 00 07 00 08 00 09 06 05 06

System Information

Manufacturer: Apple Inc.

Product Name: MacPro3,1

Version: 1.0

Serial Number: CK943G9QXYL

UUID: 00020003-0004-0005-0006-000700080009

Wake-up Type: Power Switch

SKU Number: Mac-F42C88C8

Family: Mac Pro

DMI Type 2: Base Board Handle:00002

0000: 02 10 02 00 01 02 03 04 05 0d 06 03 00 0b 00 00

0010:

Base Board Information

Manufacturer: Apple Inc.

Product Name: Mac-F42C88C8

Version: MacPro3,1

Serial Number: C02140302D5DMT31M

Asset Tag:

Features:

Board is a hosting board

Board is removable

Board is replaceable

Location In Chassis: Part Component

Chassis Handle: 0x0003

Type: Processor+Memory Module

Contained Object Handles: 0

DMI Type 3: Chassis Handle:00003

0000: 03 19 03 00 01 06 02 03 04 03 03 01 01 00 00 00

0010: 00 00 01 00 00 00 00 00 05

Chassis Information

Manufacturer: Apple Inc.

Type: Mini Tower

Lock: Not Present

Version: Mac-F42C88C8

Serial Number: CK943G9QXYL

Asset Tag: Pro-Enclosure

Boot-up State: Safe

Power Supply State: Safe

Thermal State: Other

Security Status: Other

OEM Information: 0x00000000

Height: Unspecified

Number Of Power Cords: 1

Contained Elements: 0

SKU Number: Not Specified

DMI Type 4: Processor Handle:0000D

0000: 04 2a 0d 00 01 03 ce 02 e3 06 05 00 ff fb eb bf

0010: 03 8a 64 00 71 0e 74 0e 41 01 0a 00 0b 00 0c 00

0020: 04 05 06 02 02 04 fc 00 ce 00

Processor Information

Socket Designation: U2E1

Type: Central Processor

Family: Core i3

Manufacturer: Intel(R) Corporation

ID: E3 06 05 00 FF FB EB BF

Signature: Type 0, Family 6, Model 94, Stepping 3

Flags:

FPU (Floating-point unit on-chip)

VME (Virtual mode extension)

DE (Debugging extension)

PSE (Page size extension)

TSC (Time stamp counter)

MSR (Model specific registers)

PAE (Physical address extension)

MCE (Machine check exception)

CX8 (CMPXCHG8 instruction supported)

APIC (On-chip APIC hardware supported)

SEP (Fast system call)

MTRR (Memory type range registers)

PGE (Page global enable)

MCA (Machine check architecture)

CMOV (Conditional move instruction supported)

PAT (Page attribute table)

PSE-36 (36-bit page size extension)

CLFSH (CLFLUSH instruction supported)

DS (Debug store)

ACPI (ACPI supported)

MMX (MMX technology supported)

FXSR (FXSAVE and FXSTOR instructions supported)

SSE (Streaming SIMD extensions)

SSE2 (Streaming SIMD extensions 2)

SS (Self-snoop)

HTT (Multi-threading)

TM (Thermal monitor supported)

PBE (Pending break enabled)

Version: Intel(R) Core(TM) i3-6100 CPU @ 3.70GHz

Voltage: 1.0 V

External Clock: 100 MHz

Max Speed: 3697 MHz

Current Speed: 3700 MHz

Status: Populated, Enabled

Upgrade: Other

L1 Cache Handle: 0x000A

L2 Cache Handle: 0x000B

L3 Cache Handle: 0x000C

Serial Number: 2D

Asset Tag: Intel(R) Core(TM) i3-6100 CPU @ 3.70GHz

Part Number: To Be Filled By O.E.M.

Core Count: 2

Core Enabled: 2

Thread Count: 4

Characteristics:

64-bit capable

Multi-Core

Hardware Thread

Execute Protection

Enhanced Virtualization

Power/Performance Control

DMI Type 7: Cache Handle:00009

0000: 07 13 09 00 01 80 01 40 00 40 00 20 00 20 00 00

0010: 04 04 07

Cache Information

Socket Designation: L1 Cache

Configuration: Enabled, Not Socketed, Level 1

Operational Mode: Write Back

Location: Internal

Installed Size: 64 kB

Maximum Size: 64 kB

Supported SRAM Types:

Synchronous

Installed SRAM Type: Synchronous

Speed: Unknown

Error Correction Type: Parity

System Type: Data

Associativity: 8-way Set-associative

DMI Type 7: Cache Handle:0000A

0000: 07 13 0a 00 01 80 01 40 00 40 00 20 00 20 00 00

0010: 04 03 07

Cache Information

Socket Designation: L1 Cache

Configuration: Enabled, Not Socketed, Level 1

Operational Mode: Write Back

Location: Internal

Installed Size: 64 kB

Maximum Size: 64 kB

Supported SRAM Types:

Synchronous

Installed SRAM Type: Synchronous

Speed: Unknown

Error Correction Type: Parity

System Type: Instruction

Associativity: 8-way Set-associative

DMI Type 7: Cache Handle:0000B

0000: 07 13 0b 00 01 81 01 00 02 00 02 20 00 20 00 00

0010: 05 05 05

Cache Information

Socket Designation: L2 Cache

Configuration: Enabled, Not Socketed, Level 2

Operational Mode: Write Back

Location: Internal

Installed Size: 512 kB

Maximum Size: 512 kB

Supported SRAM Types:

Synchronous

Installed SRAM Type: Synchronous

Speed: Unknown

Error Correction Type: Single-bit ECC

System Type: Unified

Associativity: 4-way Set-associative

DMI Type 7: Cache Handle:0000C

0000: 07 13 0c 00 01 82 01 00 0c 00 0c 20 00 20 00 00

0010: 06 05 09

Cache Information

Socket Designation: L3 Cache

Configuration: Enabled, Not Socketed, Level 3

Operational Mode: Write Back

Location: Internal

Installed Size: 3072 kB

Maximum Size: 3072 kB

Supported SRAM Types:

Synchronous

Installed SRAM Type: Synchronous

Speed: Unknown

Error Correction Type: Multi-bit ECC

System Type: Unified

Associativity: 12-way Set-associative

DMI Type 9: System Slots Handle:00901

0000: 09 11 01 09 01 aa 08 03 03 01 00 04 02 00 00 01

0010: 00

System Slot Information

Designation: PCI Slot 0

Type: x1 PCI Express x16

Current Usage: Available

Length: Short

ID: 1

Characteristics:

3.3 V is provided

Hot-plug devices are supported

Bus Address: 0000:01:00.0

DMI Type 9: System Slots Handle:00904

0000: 09 11 04 09 01 a8 08 03 03 05 00 04 02 00 00 01

0010: 01

System Slot Information

Designation: HDMI port

Type: x1 PCI Express x4

Current Usage: Available

Length: Short

ID: 5

Characteristics:

3.3 V is provided

Hot-plug devices are supported

Bus Address: 0000:01:00.1

DMI Type 9: System Slots Handle:00905

0000: 09 11 05 09 01 a6 08 03 03 02 00 04 02 00 00 04

0010: 00

System Slot Information

Designation: Ethernet

Type: x1 PCI Express x1

Current Usage: Available

Length: Short

ID: 2

Characteristics:

3.3 V is provided

Hot-plug devices are supported

Bus Address: 0000:04:00.0

DMI Type 16: Physical Memory Array Handle:01000

0000: 10 17 00 10 03 03 03 00 00 00 02 ff ff 03 00 00

0010: 00 00 00 00 00 00 00

Physical Memory Array

Location: System Board Or Motherboard

Use: System Memory

Error Correction Type: None

Maximum Capacity: 32 GB

Error Information Handle: No Error

Number Of Devices: 3

DMI Type 17: Memory Device Handle:01100

0000: 11 1c 00 11 00 10 ff ff ff ff ff ff 00 20 09 01

0010: 01 00 1a 80 00 60 09 02 03 00 04 00

Memory Device

Array Handle: 0x1000

Error Information Handle: No Error

Total Width: Unknown

Data Width: Unknown

Size: 8192 MB

Form Factor: DIMM

Set: 1

Locator: DIMM1

Bank Locator: Not Specified

Type: <OUT OF SPEC>

Type Detail: Synchronous

Speed: 2400 MHz (0.4 ns)

Manufacturer: Crucial

Serial Number: 0200030B000C020B

Asset Tag: Not Specified

Part Number: BLS2K8G4D240FSA

Rank: Unknown

DMI Type 17: Memory Device Handle:01101

0000: 11 1c 01 11 00 10 ff ff ff ff ff ff 00 00 09 02

0010: 01 00 00 80 00 00 00 00 00 00 00 00

Memory Device

Array Handle: 0x1000

Error Information Handle: No Error

Total Width: Unknown

Data Width: Unknown

Size: No Module Installed

Form Factor: DIMM

Set: 2

Locator: DIMM2

Bank Locator: Not Specified

Type: <OUT OF SPEC>

Type Detail: Synchronous

Speed: Unknown

Manufacturer: Not Specified

Serial Number: Not Specified

Asset Tag: Not Specified

Part Number: Not Specified

Rank: Unknown

DMI Type 17: Memory Device Handle:01102

0000: 11 1c 02 11 00 10 ff ff ff ff ff ff 00 20 09 03

0010: 01 00 1a 80 00 60 09 02 03 00 04 00

Memory Device

Array Handle: 0x1000

Error Information Handle: No Error

Total Width: Unknown

Data Width: Unknown

Size: 8192 MB

Form Factor: DIMM

Set: 3

Locator: DIMM3

Bank Locator: Not Specified

Type: <OUT OF SPEC>

Type Detail: Synchronous

Speed: 2400 MHz (0.4 ns)

Manufacturer: Crucial

Serial Number: 0200040B000C020B

Asset Tag: Not Specified

Part Number: BLS2K8G4D240FSA

Rank: Unknown

DMI Type 19: Memory Array Mapped Address Handle:01300

0000: 13 0f 00 13 00 00 00 00 ff ff ff 00 00 10 02

Memory Array Mapped Address

Starting Address: 0x00000000000

Ending Address: 0x003FFFFFFFF

Range Size: 16 GB

Physical Array Handle: 0x1000

Partition Width: 2

DMI Type 20: Memory Device Mapped Address Handle:00012

0000: 14 23 12 00 00 00 00 00 ff ff 7f 00 00 11 00 13

0010: 01 01 01 00 00 00 00 00 00 00 00 00 00 00 00 00

0020: 00 00 00

Memory Device Mapped Address

Starting Address: 0x00000000000

Ending Address: 0x001FFFFFFFF

Range Size: 8 GB

Physical Device Handle: 0x1100

Memory Array Mapped Address Handle: 0x1300

Partition Row Position: 1

Interleave Position: 1

Interleaved Data Depth: 1

DMI Type 20: Memory Device Mapped Address Handle:00013

0000: 14 23 13 00 00 00 80 00 ff ff ff 00 11 00 00 13

0010: 01 02 01 00 00 00 00 00 00 00 00 00 00 00 00 00

0020: 00 00 00

Memory Device Mapped Address

Starting Address: 0x00200000000

Ending Address: 0x003FFFFFFFF

Range Size: 8 GB

Physical Device Handle: 0x0011

Memory Array Mapped Address Handle: 0x1300

Partition Row Position: 1

Interleave Position: 2

Interleaved Data Depth: 1

DMI Type 32: System Boot Handle:00007

0000: 20 14 07 00 00 00 00 00 00 00 00 00 00 00 00 00

0010: 00 00 00 00

System Boot Information

Status: No errors detected

DMI Type 127: End of Table Marker Handle:0007E

0000: 7f 04 7e 00

End Of Table

DMI Type 128: OEM Table - Apple FirmwareVolume Handle:08000

0000: 80 58 00 80 01 00 00 00 37 f5 01 e0 37 ff 03 c0

0010: 02 00 00 00 00 00 00 00 00 00 e0 ff ff ff ef ff

0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

0050: 00 00 00 00 00 00 00 00

Apple specific FirmwareVolume

FirmwareFeatures: e001f537

FirmwareFeaturesMask: c003ff37

Region Type:02 Start:ffe00000 End:ffefffff

DMI Type 130: OEM Table - Apple Memory SPD Handle:00014

0000: 82 14 14 00 24 41 4d 54 00 00 00 00 00 a5 af 02

0010: c0 00 00 00

Apple specific SPD

00008214140024414d540000000000a5af02

0010c0000000000083060083060900008406

00200084000000007f047e00000000000000

003000000000000000000000000000000000

004000000000000000000000000000000000

005000000000000000000000000000000000

006000000000000000000000000000000000

007000000000000000000000000000000000

008000000000000000000000000000000000

009000000000000000000000000000000000

00a000000000000000000000000000000000

00b000000000000000000000000000000000

00c000000000000000000000000000000000

00d000000000000000000000000000000000

00e000000000000000000000000000000000

00f000000000000000000000000000000000

DMI Type 131: OEM Table - Apple Processor Type Handle:08300

0000: 83 06 00 83 06 09

Apple specific Processor Type

cpu=0906

DMI Type 132: OEM Table - Apple Processor Interconnect Speed Handle:08400

0000: 84 06 00 84 00 00

Apple specific Processor Interconnect Speed

0 MT/s

DMI Type 219: OEM Table - Unknown Table Type Handle:00018

0000: db 51 18 00 01 03 01 45 02 00 90 06 03 10 86 00

0010: 00 00 00 00 40 08 00 00 00 00 00 00 00 00 40 02

0020: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff

0030: ff ff ff ff ff ff ff ff 03 00 00 00 80 00 00 00

0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

0050: 00

OEM-specific Type

Header and Data:

DB 51 18 00 01 03 01 45 02 00 90 06 03 10 86 00

00 00 00 00 40 08 00 00 00 00 00 00 00 00 40 02

FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF

FF FF FF FF FF FF FF FF 03 00 00 00 80 00 00 00

00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

Strings:

MEI1

MEI2

MEI3

EDID

Dumped IODisplayEDID from ioreg and decoded using edid-decode by Adam Jackson. Updated by Andy Vandijck.

View EDID.txt File

Extracted contents:

header: 00 ff ff ff ff ff ff 00

serial number: 4c ab 30 00 01 00 00 00 16 19

version: 01 03

basic params: 80 5d 34 78 0a

chroma info: cf 74 a3 57 4c b0 23 09 48 4c

established: 21 08 00

standard: 81 80 45 40 61 40 95 00 01 01 01 01 01 01 01 01

descriptor 1: 04 74 00 30 f2 70 5a 80 b0 58 8a 00 ba 89 21 00 00 1e

descriptor 2: 00 00 00 ff 00 0a 20 20 20 20 20 20 20 20 20 20 20 20

descriptor 3: 00 00 00 fc 00 53 45 34 32 55 4d 53 0a 20 20 20 20 20

descriptor 4: 00 00 00 fd 00 32 4b 1e 50 17 00 0a 20 20 20 20 20 20

extensions: 01

checksum: 4e

Manufacturer: SEK Model 30 Serial Number 1

Made week 22 of 2015

EDID version: 1.3

Digital display

Maximum image size: 93 cm x 52 cm

Gamma: 2.20

Supported color formats: RGB 4:4:4, YCrCb 4:2:2

First detailed timing is preferred timing

Chroma Info:

Red X: 0.639648 Y: 0.339844

Green X: 0.299805 Y: 0.690430

Blue X: 0.137695 Y: 0.038086

White X: 0.282227 Y: 0.296875

Established timings supported:

640x480@60Hz

800x600@60Hz

1024x768@60Hz

Standard timings supported:

1280x1024@60Hz

800x600@60Hz

1024x768@60Hz

1440x900@60Hz

Detailed mode: Clock 297.000 MHz, 698 mm x 393 mm

3840 4016 4104 4400 hborder 0

2160 2168 2178 2250 vborder 0

+hsync +vsync

Serial number:

Monitor name: SE42UMS

Monitor ranges (GTF): 50-75Hz V, 30-80kHz H, max dotclock 230MHz

Has 1 extension blocks

Checksum: 0x4e (valid)

CEA extension block

Extension version: 3

43 bytes of CEA data

Video data block

VIC 01 640x480@60Hz

VIC 03 720x480@60Hz

VIC 04 1280x720@60Hz

VIC 05 1920x1080i@60Hz

VIC 07 1440x480i@60Hz

VIC 16 1920x1080@60Hz (native)

VIC 18 720x576@50Hz

VIC 19 1280x720@50Hz

VIC 20 1920x1080i@50Hz

VIC 22 1440x576i@50Hz

VIC 31 1920x1080@50Hz (native)

VIC 32 1920x1080@24Hz

VIC 34 1920x1080@30Hz

Audio data block

Linear PCM, max channels 1

Supported sample rates (kHz): 48 44.1 32

Supported sample sizes (bits): 24 20 16

AC-3, max channels 1

Supported sample rates (kHz): 96 48 44.1 32

Maximum bit rate: 56 kHz

Speaker allocation data block

Vendor-specific data block, OUI 000c03 (HDMI)

Source physical address 1.0.0.0

Supports_AI

DC_36bit

DC_30bit

DC_Y444

Maximum TMDS clock: 300MHz

Extended HDMI video details:

HDMI VIC 0 3840x2160@30Hz

HDMI VIC 1 3840x2160@25Hz

HDMI VIC 2 3840x2160@24Hz

Extended tag: Reserved video block (0e)

Underscans PC formats by default

Basic audio support

Supports YCbCr 4:4:4

Supports YCbCr 4:2:2

2 native detailed modes

Detailed mode: Clock 27.000 MHz, 708 mm x 398 mm

720 736 798 858 hborder 0

480 489 495 525 vborder 0

-hsync -vsync

Detailed mode: Clock 27.000 MHz, 708 mm x 398 mm

720 732 796 864 hborder 0

576 581 586 625 vborder 0

-hsync -vsync

Detailed mode: Clock 74.250 MHz, 708 mm x 398 mm

1280 1720 1760 1980 hborder 0

720 725 730 750 vborder 0

+hsync +vsync

Checksum: 0x19 (valid)

I/O Kit Registry

This is best viewed in a separate browser window/tab. Click here to load it.

Kernel Logs (Apple System Log / dmesg)

AppleSystemLog
dmesg

Dumped from the log file in /var/log/asl/ created last time this system was booted.

View File AppleSystemLog.txt

Mar 11 17:45:25 localhost kernel[0] <Notice>: Darwin Kernel Version 15.3.0: Thu Dec 10 18:40:58 PST 2015; root:xnu-3248.30.4~1/RELEASE_X86_64

Mar 11 17:45:25 localhost kernel[0] <Notice>: vm_page_bootstrap: 3993640 free pages and -1912872 wired pages

Mar 11 17:45:25 localhost kernel[0] <Notice>: kext submap [0x<ptr> - 0x<ptr>], kernel text [0x<ptr> - 0x<ptr>]

Mar 11 17:45:25 localhost kernel[0] <Notice>: zone leak detection enabled

Mar 11 17:45:25 localhost kernel[0] <Notice>: "vm_compressor_mode" is 4

Mar 11 17:45:25 localhost kernel[0] <Notice>: multiq scheduler config: deep-drain 0, ceiling 47, depth limit 4, band limit 127, sanity check 0

Mar 11 17:45:25 localhost kernel[0] <Notice>: standard timeslicing quantum is 10000 us

Mar 11 17:45:25 localhost kernel[0] <Notice>: standard background quantum is 2500 us

Mar 11 17:45:25 localhost kernel[0] <Notice>: WQ[lt_init]: init linktable with max:262144 elements (8388608 bytes)

Mar 11 17:45:25 localhost kernel[0] <Notice>: WQ[wqp_init]: init prepost table with max:262144 elements (8388608 bytes)

Mar 11 17:45:25 localhost kernel[0] <Notice>: mig_table_max_displ = 15

Mar 11 17:45:25 localhost kernel[0] <Notice>: TSC Deadline Timer supported and enabled

Mar 11 17:45:25 localhost kernel[0] <Notice>: kdp_core zlib memory 0x7000

Mar 11 17:45:25 localhost kernel[0] <Notice>: "name" not a kext

Mar 11 17:45:25 localhost kernel[0] <Notice>: "FailedCLUT" not a kext

Mar 11 17:45:25 localhost kernel[0] <Notice>: "FailedImage" not a kext

Mar 11 17:45:25 localhost kernel[0] <Notice>: Notice - new kext com.apple.driver.RealtekALC, v1.0 matches prelinked kext but can't determine if executables are the same (no UUIDs).

Mar 11 17:45:25 localhost kernel[0] <Notice>: FakeSMCKeyStore: started

Mar 11 17:45:25 localhost kernel[0] <Notice>: AppleACPICPU: ProcessorId=1 LocalApicId=0 Enabled

Mar 11 17:45:25 localhost kernel[0] <Notice>: AppleACPICPU: ProcessorId=2 LocalApicId=2 Enabled

Mar 11 17:45:25 localhost kernel[0] <Notice>: AppleACPICPU: ProcessorId=3 LocalApicId=1 Enabled

Mar 11 17:45:25 localhost kernel[0] <Notice>: AppleACPICPU: ProcessorId=4 LocalApicId=3 Enabled

Mar 11 17:45:25 localhost kernel[0] <Notice>: calling mpo_policy_init for TMSafetyNet

Mar 11 17:45:25 localhost kernel[0] <Notice>: Security policy loaded: Safety net for Time Machine (TMSafetyNet)

Mar 11 17:45:25 localhost kernel[0] <Notice>: calling mpo_policy_init for AMFI

Mar 11 17:45:25 localhost kernel[0] <Notice>: Security policy loaded: Apple Mobile File Integrity (AMFI)

Mar 11 17:45:25 localhost kernel[0] <Notice>: calling mpo_policy_init for Sandbox

Mar 11 17:45:25 localhost kernel[0] <Notice>: Security policy loaded: Seatbelt sandbox policy (Sandbox)

Mar 11 17:45:25 localhost kernel[0] <Notice>: calling mpo_policy_init for Quarantine

Mar 11 17:45:25 localhost kernel[0] <Notice>: Security policy loaded: Quarantine policy (Quarantine)

Mar 11 17:45:25 localhost kernel[0] <Notice>: MAC Framework successfully initialized

Mar 11 17:45:25 localhost kernel[0] <Notice>: using 16384 buffer headers and 10240 cluster IO buffer headers

Mar 11 17:45:25 localhost kernel[0] <Notice>: AppleCredentialManager::start called

Mar 11 17:45:25 localhost kernel[0] <Notice>: AssertMacros: tmpData (value: 0x0), file: /BuildRoot/Library/Caches/com.apple.xbs/Sources/AppleCredentialManager/AppleCredentialManager-83.20.2/AppleCredentialManager/AppleCredentialManager.cpp, line: 765

Mar 11 17:45:25 localhost kernel[0] <Notice>: AppleKeyStore starting (BUILT: Dec 10 2015 19:43:11)

Mar 11 17:45:25 localhost kernel[0] <Notice>: IOAPIC: Version 0x20 Vectors 64:81

Mar 11 17:45:25 localhost kernel[0] <Notice>: ACPI: sleep states S3 S4 S5

Mar 11 17:45:25 localhost kernel[0] <Notice>: RTC: Only single RAM bank (128 bytes)

Mar 11 17:45:25 localhost kernel[0] <Notice>: FakeSMC: 13 preconfigured keys added

Mar 11 17:45:25 localhost kernel[0] <Notice>: FakeSMC: 5 keys exported by Clover EFI

Mar 11 17:45:25 localhost kernel[0] <Notice>: SMC: successfully initialized

Mar 11 17:45:25 localhost kernel[0] <Notice>: pci (build 19:23:54 Dec 10 2015), flags 0xe3000, pfm64 (39 cpu) 0x7f80000000, 0x80000000

Mar 11 17:45:25 localhost kernel[0] <Notice>: [ PCI configuration begin ]

Mar 11 17:45:25 localhost kernel[0] <Notice>: 000000.671224 AppleUSBLegacyRoot@: AppleUSBLegacyRoot::init: enabling legacy matching

Mar 11 17:45:25 localhost kernel[0] <Notice>: console relocated to 0x7f91000000

Mar 11 17:45:25 localhost kernel[0] <Notice>: [ PCI configuration end, bridges 5, devices 12 ]

Mar 11 17:45:25 localhost kernel[0] <Notice>: HDMIAudio: Audio Controller 0x10de0fba on pci10de,fba

Mar 11 17:45:25 localhost kernel[0] <Notice>: HDMIAudio: Display Controller 0x10de1402 on PEGP

Mar 11 17:45:25 localhost kernel[0] <Notice>: mcache: 4 CPU(s), 64 bytes CPU cache line size

Mar 11 17:45:25 localhost kernel[0] <Notice>: mbinit: done [96 MB total pool size, (64/32) split]

Mar 11 17:45:25 localhost kernel[0] <Notice>: rooting via boot-uuid from /chosen: 83412E4A-C4A6-3B35-B409-ACEE954F57DA

Mar 11 17:45:25 localhost kernel[0] <Notice>: Waiting on <dict ID="0"><key>IOProviderClass</key><string ID="1">IOResources</string><key>IOResourceMatch</key><string ID="2">boot-uuid-media</string></dict>

Mar 11 17:45:25 localhost kernel[0] <Notice>: Ethernet [RealtekRTL8111]: Disable PCIe ASPM.

Mar 11 17:45:25 localhost kernel[0] <Notice>: Ethernet [RealtekRTL8111]: EEE support enabled.

Mar 11 17:45:25 localhost kernel[0] <Notice>: Ethernet [RealtekRTL8111]: TCP/IPv4 segmentation offload enabled.

Mar 11 17:45:25 localhost kernel[0] <Notice>: Ethernet [RealtekRTL8111]: TCP/IPv6 segmentation offload enabled.

Mar 11 17:45:25 localhost kernel[0] <Notice>: Ethernet [RealtekRTL8111]: TCP/IPv6 checksum offload enabled.

Mar 11 17:45:25 localhost kernel[0] <Notice>: Ethernet [RealtekRTL8111]: Version 2.0.0 using interrupt mitigate value 0xcf58.

Mar 11 17:45:25 localhost kernel[0] <Notice>: unknown chip version (54000000)

Mar 11 17:45:25 localhost kernel[0] <Notice>: com.apple.AppleFSCompressionTypeZlib kmod start

Mar 11 17:45:25 localhost kernel[0] <Notice>: com.apple.AppleFSCompressionTypeDataless kmod start

Mar 11 17:45:25 localhost kernel[0] <Notice>: com.apple.AppleFSCompressionTypeZlib load succeeded

Mar 11 17:45:25 localhost kernel[0] <Notice>: com.apple.AppleFSCompressionTypeDataless load succeeded

Mar 11 17:45:25 localhost kernel[0] <Notice>: Ethernet [RealtekRTL8111]: RTL8168B/8111B: (Chipset 0) at 0x<ptr>, d0:50:99:86:3f:4a

Mar 11 17:45:25 localhost kernel[0] <Notice>: Got boot device = IOService:/AppleACPIPlatformExpert/PCI0@0/AppleACPIPCI/SAT0@17/AppleIntelPchSeriesAHCI/PRT0@0/IOAHCIDevice@0/AppleAHCIDiskDriver/IOAHCIBlockStorageDevice/IOBlockStorageDriver/WDC WD10EZEX-08M2NA0 Media/IOGUIDPartitionScheme/El Capitan@2

Mar 11 17:45:25 localhost kernel[0] <Notice>: BSD root: disk0s2, major 1, minor 2

Mar 11 17:45:25 localhost kernel[0] <Notice>: 000000.932042 HS09@14900000: AppleUSB20XHCIPort::resetAndCreateDevice: failed to create device, disabling port

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>usbConfigInit - have 1 configurations

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>message - Unknown message! mesg = 3758112799 (0xE000401F)

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>message - Unknown message! mesg = 3758096944 (0xE0000230)

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>usbConfigInit - open device for configuration, isOpen = 1

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>usbConfigInit - set the configuration

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>usbConfigInit - got FindNextInterface. Interface had config number = 1

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=> message [898] kIOMessageServiceIsAttemptingOpen --------------->

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>usbConfigInit - usbDevice open interface success.

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>usbConfigInit - Success to map data CONTROL pipe. EP Number = 0, MaxPacketSize = 64, interval = 0

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>usbConfigInit - Success to map data IN pipe. EP Number = 1, USBDeviceAddress = 129, MaxPacketSize = 512, interval = 0

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>usbConfigInit - Success to map data OUT pipe. Pipe[0] EP Number = 1, USBDeviceAddress = 1, MaxPacketSize = 512, interval = 0

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>usbConfigInit - Success to map data OUT pipe. Pipe[1] EP Number = 2, USBDeviceAddress = 2, MaxPacketSize = 512, interval = 0

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>usbConfigInit - Success to map data OUT pipe. Pipe[2] EP Number = 3, USBDeviceAddress = 3, MaxPacketSize = 512, interval = 0

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>usbConfigInit - Success to map data OUT pipe. Pipe[3] EP Number = 4, USBDeviceAddress = 4, MaxPacketSize = 512, interval = 0

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>usbConfigInit <--------------

Mar 11 17:45:25 localhost kernel[0] <Notice>: RTMPInitialize ==> Line 106 RTMPInitialize ==>

Mar 11 17:45:25 localhost kernel[0] <Notice>: RTMPInitialize ==> Latest build from 10.11 Machine ==>

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>NICInitTransmit ==> Line 1634 ==>

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>NICInitRecv ==> Line 1870 ==>

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>UserCfgInit ==> Line 9175 ==>

Mar 11 17:45:25 localhost kernel[0] <Notice>: RTMPInitialize ==> Line 194 NICLoadFirmware ==>

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>NICLoadFirmware ==> Line 8695 ==>

Mar 11 17:45:25 localhost kernel[0] <Notice>: hfs: mounted El Capitan on device root_device

Mar 11 17:45:25 localhost kernel[0] <Notice>: XCPM: registered

Mar 11 17:45:25 localhost kernel[0] <Notice>: VM Swap Subsystem is ON

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>NICSetDefaultSettings ==> Line 4982 ==>

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>NICReadEEPROMParameters ==> Line 5227 ==>

Mar 11 17:45:25 localhost kernel[0] <Notice>: USBMSC Identifier (non-unique): 07013A15713D5183 0x13fe 0x5200 0x100, 2

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>PostBBPInitialization ==> Line 8014 ==>

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>PostRFInitialization ==> Line 8392 ==>

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>AsicRFOn ==> Line 11588 ==>

Mar 11 17:45:25 localhost kernel[0] <Notice>: MT=>RTMPEnableRxTx ==> Line 10471 ==>

Mar 11 17:45:25 localhost kernel[0] <Notice>: Waiting for DSMOS...

Mar 11 17:45:28 localhost kernel[0] <Notice>: IOGraphics flags 0x43

Mar 11 17:45:28 localhost kernel[0] <Notice>: NVDAStartupWeb: Web

Mar 11 17:45:28 localhost kernel[0] <Notice>: HDMIAudio: Display Controller 0x10de1402 on PEGP

Mar 11 17:45:28 localhost kernel[0] <Notice>: NVDAGM100HAL loaded and registered

Mar 11 17:45:28 localhost kernel[0] <Notice>: Previous shutdown cause: 5

Mar 11 17:45:28 localhost kernel[0] <Notice>: HDMIAudio: Audio Controller 0x10de0fba on HDAU

Mar 11 17:45:28 localhost kernel[0] <Notice>: DSMOS has arrived

Mar 11 17:45:28 localhost kernel[0] <Notice>: [IOBluetoothFamily][start] -- completed

Mar 11 17:45:29 localhost kernel[0] <Notice>: IONetworkController::enable

Mar 11 17:45:29 localhost kernel[0] <Notice>: enable ==> Line 1323 ==> WakeFromSleep =0

Mar 11 17:45:29 localhost kernel[0] <Notice>: MT=> enable : pAd->ifnetUnit = 2, NamePrefix = en(2)

Mar 11 17:45:30 dimas-iMac-2 kernel[0] <Notice>: in6_unlink_ifa: IPv6 address 0x8a41ee087c8286a1 has no prefix

Mar 11 17:45:31 dimas-iMac-2 kernel[0] <Notice>: IOPPF: XCPM mode

Mar 11 17:45:32 dimas-iMac-2 kernel[0] <Notice>: hfs: mounted Untitled on device disk0s4

Mar 11 17:45:33 dimas-iMac-2 kernel[0] <Notice>: hfs: mounted OS X 10.10.4 on device disk1s2

Mar 11 17:45:33 dimas-iMac-2 kernel[0] <Notice>: hfs: mounted Yosemite Install on device disk1s3

Mar 11 17:45:33 dimas-iMac-2 kernel[0] <Notice>: hfs: unmount initiated on OS X 10.10.4 on device disk1s2

Mar 11 17:45:33 dimas-iMac-2 kernel[0] <Notice>: hfs: unmount initiated on Yosemite Install on device disk1s3

Mar 11 17:45:33 dimas-iMac-2 kernel[0] <Notice>: ignored is_io_service_close(0x1000003a6,IOHIDParamUserClient)

Mar 11 17:45:49 dimas-iMac-2 kernel[0] <Notice>: AppleKeyStore:Sending lock change 0 for handle -501

Mar 11 17:45:49 dimas-iMac-2 kernel[0] <Notice>: hfs: mounted OS X 10.10.4 on device disk1s2

Mar 11 17:45:49 dimas-iMac-2 kernel[0] <Notice>: hfs: mounted Yosemite Install on device disk1s3

Mar 11 17:45:49 dimas-iMac-2 kernel[0] <Notice>: hfs: set LowDisk: vol:Yosemite Install, freeblks:30999, warninglimit:35964

Mar 11 17:45:58 dimas-iMac-2 kernel[0] <Notice>: **** [IOBluetoothFamily][SearchForTransportEventTimeOutHandler] -- Missing Bluetooth Controller Transport!

Mar 11 17:46:00 dimas-iMac-2 kernel[0] <Notice>: Sandbox: SocialPushAgent(383) deny(1) file-write-data /Users/dima/Library/Preferences/com.apple.socialpushagent.plist

Mar 11 17:46:00 dimas-iMac-2 kernel[0] <Notice>: Sandbox: storeaccountd(414) deny(1) file-write-create /Users/dima/Library/Caches/com.apple.spotlight

Mar 11 17:46:05 dimas-iMac-2 kernel[0] <Notice>: MT=>Set::OID_802_11_DISASSOCIATE pAd->StaCfg.WscControl.WscState = 0 (WSC_STATE_OFF=0)

Mar 11 17:46:05 dimas-iMac-2 kernel[0] <Notice>: MT=>Set::RT_OID_802_11_RESET_COUNTERS (=0)

Mar 11 17:46:05 dimas-iMac-2 kernel[0] <Notice>: MT=>Query::RT_OID_802_11_QUERY_COUNTRY_REGION (A:0 B/G:0 =0)

Mar 11 17:46:05 dimas-iMac-2 kernel[0] <Notice>: MT=>Set::RT_OID_802_11_SET_COUNTRY_REGION (Clean the scan table)

Mar 11 17:46:05 dimas-iMac-2 kernel[0] <Notice>: MT=>Set::RT_OID_802_11_SET_COUNTRY_REGION CountryRegion = 0

Mar 11 17:46:05 dimas-iMac-2 kernel[0] <Notice>: MT=>Set::RT_OID_802_11_SET_COUNTRY_REGION CountryRegionForABand = 7

Mar 11 17:46:05 dimas-iMac-2 kernel[0] <Notice>: MT=>Query::RT_OID_802_11_QUERY_COUNTRY_REGION (A:7 B/G:0 =1792)

Mar 11 17:46:05 dimas-iMac-2 kernel[0] <Notice>: MT=>Query::RT_OID_802_11_QUERY_IEEE80211H (=0)

Mar 11 17:46:05 dimas-iMac-2 kernel[0] <Notice>: MT=>Query::RT_OID_802_11_QUERY_EDCCA (=1)

Mar 11 17:46:05 dimas-iMac-2 kernel[0] <Notice>: MT=>Set::RT_OID_802_11_SET_EDCCA (=0)

Mar 11 17:46:05 dimas-iMac-2 kernel[0] <Notice>: MT=>Query::RT_OID_802_11_QUERY_COUNTRY_REGION (A:7 B/G:0 =1792)

Mar 11 17:46:05 dimas-iMac-2 kernel[0] <Notice>: ignored is_io_service_close(0x1000003a6,IOHIDParamUserClient)

Mar 11 17:46:05 dimas-iMac-2 kernel[0] <Notice>: MT=>Set::RT_OID_802_11_RESET_COUNTERS (=0)

Mar 11 17:46:05 dimas-iMac-2 kernel[0] <Notice>: MT=>Set::OID_802_11_DISASSOCIATE pAd->StaCfg.WscControl.WscState = 0 (WSC_STATE_OFF=0)

Mar 11 17:46:11 dimas-iMac-2 kernel[0] <Notice>: Sandbox: softwareupdated(453) deny(1) system-fsctl 682f

Mar 11 17:46:19 dimas-iMac-2 kernel[0] <Notice>: MT=>Set::OID_802_11_DISASSOCIATE pAd->StaCfg.WscControl.WscState = 0 (WSC_STATE_OFF=0)

Mar 11 17:46:59 dimas-iMac-2 kernel[0] <Notice>: hfs: unmount initiated on OS X 10.10.4 on device disk1s2

Mar 11 17:46:59 dimas-iMac-2 kernel[0] <Notice>: hfs: unmount initiated on Yosemite Install on device disk1s3

Mar 11 17:56:13 dimas-iMac-2 kernel[0] <Notice>: SW watchdog[scan no AP] ....

Mar 11 17:56:13 dimas-iMac-2 kernel[0] <Notice>: MT=>---> SameRxByteCount = 21 !!!!!!!!!!!!!!!

Mar 11 17:56:13 dimas-iMac-2 kernel[0] <Notice>: Packet count [Data1 928d Data2 0 Data3 0 RTS 0 PSPoll 0 Null 16 MLME 5c CMD 0]

Mar 11 17:56:13 dimas-iMac-2 kernel[0] <Notice>: MT=>PostBBPInitialization ==> Line 8014 ==>

Mar 11 17:56:21 dimas-iMac-2 kernel[0] <Notice>: SW watchdog[scan no AP] ....

Mar 11 17:56:21 dimas-iMac-2 kernel[0] <Notice>: MT=>---> SameRxByteCount = 21 !!!!!!!!!!!!!!!

Mar 11 17:56:21 dimas-iMac-2 kernel[0] <Notice>: Packet count [Data1 928d Data2 0 Data3 0 RTS 0 PSPoll 0 Null 16 MLME 63 CMD 0]

Mar 11 17:56:21 dimas-iMac-2 kernel[0] <Notice>: MT=>PostBBPInitialization ==> Line 8014 ==>

Mar 11 17:56:26 dimas-iMac-2 kernel[0] <Notice>: SW watchdog[scan no AP] ....

Mar 11 17:56:26 dimas-iMac-2 kernel[0] <Notice>: MT=>---> SameRxByteCount = 21 !!!!!!!!!!!!!!!

Mar 11 17:56:26 dimas-iMac-2 kernel[0] <Notice>: Packet count [Data1 928d Data2 0 Data3 0 RTS 0 PSPoll 0 Null 16 MLME 68 CMD 0]

Mar 11 17:56:26 dimas-iMac-2 kernel[0] <Notice>: MT=>PostBBPInitialization ==> Line 8014 ==>

Mar 11 17:56:32 dimas-iMac-2 kernel[0] <Notice>: SW watchdog[scan no AP] ....

Mar 11 17:56:32 dimas-iMac-2 kernel[0] <Notice>: MT=>---> SameRxByteCount = 21 !!!!!!!!!!!!!!!

Mar 11 17:56:32 dimas-iMac-2 kernel[0] <Notice>: Packet count [Data1 928d Data2 0 Data3 0 RTS 0 PSPoll 0 Null 16 MLME 70 CMD 0]

Mar 11 17:56:32 dimas-iMac-2 kernel[0] <Notice>: MT=>PostBBPInitialization ==> Line 8014 ==>

Mar 11 18:06:16 dimas-iMac-2 kernel[0] <Notice>: SW watchdog[scan no AP] ....

Mar 11 18:06:16 dimas-iMac-2 kernel[0] <Notice>: MT=>---> SameRxByteCount = 21 !!!!!!!!!!!!!!!

Mar 11 18:06:16 dimas-iMac-2 kernel[0] <Notice>: Packet count [Data1 a0d7 Data2 0 Data3 0 RTS 0 PSPoll 0 Null 39 MLME 87 CMD 0]

Mar 11 18:06:16 dimas-iMac-2 kernel[0] <Notice>: MT=>PostBBPInitialization ==> Line 8014 ==>

Mar 11 18:06:22 dimas-iMac-2 kernel[0] <Notice>: SW watchdog[scan no AP] ....

Mar 11 18:06:22 dimas-iMac-2 kernel[0] <Notice>: MT=>---> SameRxByteCount = 21 !!!!!!!!!!!!!!!

Mar 11 18:06:22 dimas-iMac-2 kernel[0] <Notice>: Packet count [Data1 a0d7 Data2 0 Data3 0 RTS 0 PSPoll 0 Null 39 MLME 8c CMD 0]

Mar 11 18:06:22 dimas-iMac-2 kernel[0] <Notice>: MT=>PostBBPInitialization ==> Line 8014 ==>

Mar 11 18:06:28 dimas-iMac-2 kernel[0] <Notice>: SW watchdog[scan no AP] ....

Mar 11 18:06:28 dimas-iMac-2 kernel[0] <Notice>: MT=>---> SameRxByteCount = 21 !!!!!!!!!!!!!!!

Mar 11 18:06:28 dimas-iMac-2 kernel[0] <Notice>: Packet count [Data1 a0d7 Data2 0 Data3 0 RTS 0 PSPoll 0 Null 39 MLME 95 CMD 0]

Mar 11 18:06:28 dimas-iMac-2 kernel[0] <Notice>: MT=>PostBBPInitialization ==> Line 8014 ==>

Mar 11 18:06:33 dimas-iMac-2 kernel[0] <Notice>: SW watchdog[scan no AP] ....

Mar 11 18:06:33 dimas-iMac-2 kernel[0] <Notice>: MT=>---> SameRxByteCount = 21 !!!!!!!!!!!!!!!

Mar 11 18:06:33 dimas-iMac-2 kernel[0] <Notice>: Packet count [Data1 a0d7 Data2 0 Data3 0 RTS 0 PSPoll 0 Null 39 MLME 9a CMD 0]

Mar 11 18:06:33 dimas-iMac-2 kernel[0] <Notice>: MT=>PostBBPInitialization ==> Line 8014 ==>

Dumped using /sbin/dmesg

View File dmesg.txt

Longterm timer threshold: 1000 ms

PMAP: PCID enabled

PMAP: Supervisor Mode Execute Protection enabled

PMAP: Supervisor Mode Access Protection enabled

Darwin Kernel Version 15.3.0: Thu Dec 10 18:40:58 PST 2015; root:xnu-3248.30.4~1/RELEASE_X86_64

vm_page_bootstrap: 3941417 free pages and 220119 wired pages

kext submap [0x<ptr> - 0x<ptr>], kernel text [0x<ptr> - 0x<ptr>]

zone leak detection enabled

"vm_compressor_mode" is 4

multiq scheduler config: deep-drain 0, ceiling 47, depth limit 4, band limit 127, sanity check 0

standard timeslicing quantum is 10000 us

standard background quantum is 2500 us

WQ[lt_init]: init linktable with max:262144 elements (8388608 bytes)

WQ[wqp_init]: init prepost table with max:262144 elements (8388608 bytes)

mig_table_max_displ = 15

TSC Deadline Timer supported and enabled

kdp_core zlib memory 0x7000

"name" not a kext

"FailedCLUT" not a kext

"FailedImage" not a kext

Notice - new kext com.apple.driver.RealtekALC, v1.0 matches prelinked kext but can't determine if executables are the same (no UUIDs).

FakeSMCKeyStore: started

AppleACPICPU: ProcessorId=1 LocalApicId=0 Enabled

AppleACPICPU: ProcessorId=2 LocalApicId=2 Enabled

AppleACPICPU: ProcessorId=3 LocalApicId=1 Enabled

AppleACPICPU: ProcessorId=4 LocalApicId=3 Enabled

calling mpo_policy_init for TMSafetyNet

Security policy loaded: Safety net for Time Machine (TMSafetyNet)

calling mpo_policy_init for AMFI

Security policy loaded: Apple Mobile File Integrity (AMFI)

calling mpo_policy_init for Sandbox

Security policy loaded: Seatbelt sandbox policy (Sandbox)

calling mpo_policy_init for Quarantine

Security policy loaded: Quarantine policy (Quarantine)

MAC Framework successfully initialized

using 16384 buffer headers and 10240 cluster IO buffer headers

AppleCredentialManager::start called

AssertMacros: tmpData (value: 0x0), file: /BuildRoot/Library/Caches/com.apple.xbs/Sources/AppleCredentialManager/AppleCredentialManager-83.20.2/AppleCredentialManager/AppleCredentialManager.cpp, line: 765

AppleKeyStore starting (BUILT: Dec 10 2015 19:43:11)

IOAPIC: Version 0x20 Vectors 64:81

ACPI: sleep states S3 S4 S5

FakeSMC: 13 preconfigured keys added

FakeSMC: 5 keys exported by Clover EFI

RTC: Only single RAM bank (128 bytes)

SMC: successfully initialized

pci (build 19:23:54 Dec 10 2015), flags 0xe3000, pfm64 (39 cpu) 0x7f80000000, 0x80000000

[ PCI configuration begin ]

console relocated to 0x7f91000000

[ PCI configuration end, bridges 5, devices 12 ]

000000.684733 AppleUSBLegacyRoot@: AppleUSBLegacyRoot::init: enabling legacy matching

HDMIAudio: Audio Controller 0x10de0fba on pci10de,fba

HDMIAudio: Display Controller 0x10de1402 on PEGP

mcache: 4 CPU(s), 64 bytes CPU cache line size

mbinit: done [128 MB total pool size, (85/42) split]

Ethernet [RealtekRTL8111]: Disable PCIe ASPM.

Ethernet [RealtekRTL8111]: EEE support enabled.

Ethernet [RealtekRTL8111]: TCP/IPv4 segmentation offload enabled.

Ethernet [RealtekRTL8111]: TCP/IPv6 segmentation offload enabled.

Ethernet [RealtekRTL8111]: TCP/IPv6 checksum offload enabled.

Ethernet [RealtekRTL8111]: Version 2.0.0 using interrupt mitigate value 0xcf58.

unknown chip version (54000000)

rooting via boot-uuid from /chosen: 83412E4A-C4A6-3B35-B409-ACEE954F57DA

Waiting on <dict ID="0"><key>IOProviderClass</key><string ID="1">IOResources</string><key>IOResourceMatch</key><string ID="2">boot-uuid-media</string></dict>

com.apple.AppleFSCompressionTypeZlib kmod start

com.apple.AppleFSCompressionTypeDataless kmod start

com.apple.AppleFSCompressionTypeZlib load succeeded

com.apple.AppleFSCompressionTypeDataless load succeeded

Ethernet [RealtekRTL8111]: RTL8168B/8111B: (Chipset 0) at 0x<ptr>, d0:50:99:86:3f:4a

Got boot device = IOService:/AppleACPIPlatformExpert/PCI0@0/AppleACPIPCI/SAT0@17/AppleIntelPchSeriesAHCI/PRT0@0/IOAHCIDevice@0/AppleAHCIDiskDriver/IOAHCIBlockStorageDevice/IOBlockStorageDriver/WDC WD10EZEX-08M2NA0 Media/IOGUIDPartitionScheme/El Capitan@2

BSD root: disk0s2, major 1, minor 2

jnl: b(1, 2): replay_journal: from: 76633600 to: 80270848 (joffset 0x1d1c000)

MT=>usbConfigInit - have 1 configurations

MT=>message - Unknown message! mesg = 3758112799 (0xE000401F)

MT=>message - Unknown message! mesg = 3758096944 (0xE0000230)

MT=>usbConfigInit - open device for configuration, isOpen = 1

MT=>usbConfigInit - set the configuration

MT=>usbConfigInit - got FindNextInterface. Interface had config number = 1

MT=> message [898] kIOMessageServiceIsAttemptingOpen --------------->

MT=>usbConfigInit - usbDevice open interface success.

MT=>usbConfigInit - Success to map data CONTROL pipe. EP Number = 0, MaxPacketSize = 64, interval = 0

MT=>usbConfigInit - Success to map data IN pipe. EP Number = 1, USBDeviceAddress = 129, MaxPacketSize = 512, interval = 0

MT=>usbConfigInit - Success to map data OUT pipe. Pipe[0] EP Number = 1, USBDeviceAddress = 1, MaxPacketSize = 512, interval = 0

MT=>usbConfigInit - Success to map data OUT pipe. Pipe[1] EP Number = 2, USBDeviceAddress = 2, MaxPacketSize = 512, interval = 0

MT=>usbConfigInit - Success to map data OUT pipe. Pipe[2] EP Number = 3, USBDeviceAddress = 3, MaxPacketSize = 512, interval = 0

MT=>usbConfigInit - Success to map data OUT pipe. Pipe[3] EP Number = 4, USBDeviceAddress = 4, MaxPacketSize = 512, interval = 0

MT=>usbConfigInit <--------------

RTMPInitialize ==> Line 106 RTMPInitialize ==>

RTMPInitialize ==> Latest build from 10.11 Machine ==>

MT=>NICInitTransmit ==> Line 1634 ==>

MT=>NICInitRecv ==> Line 1870 ==>

MT=>UserCfgInit ==> Line 9175 ==>

RTMPInitialize ==> Line 194 NICLoadFirmware ==>

MT=>NICLoadFirmware ==> Line 8695 ==>

MT=>NICSetDefaultSettings ==> Line 4982 ==>

MT=>NICReadEEPROMParameters ==> Line 5227 ==>

MT=>PostBBPInitialization ==> Line 8014 ==>

MT=>PostRFInitialization ==> Line 8392 ==>

MT=>AsicRFOn ==> Line 11588 ==>

MT=>RTMPEnableRxTx ==> Line 10471 ==>

jnl: b(1, 2): journal replay done.

hfs: mounted El Capitan on device root_device

XCPM: registered

VM Swap Subsystem is ON

hfs: Removed 0 orphaned / unlinked files and 3 directories

Waiting for DSMOS...

IOGraphics flags 0x43

NVDAStartupWeb: Web

HDMIAudio: Display Controller 0x10de1402 on PEGP

NVDAGM100HAL loaded and registered

Previous shutdown cause: 5

HDMIAudio: Audio Controller 0x10de0fba on HDAU

DSMOS has arrived

[IOBluetoothFamily][start] -- completed

IONetworkController::enable

enable ==> Line 1323 ==> WakeFromSleep =0

MT=> enable : pAd->ifnetUnit = 1, NamePrefix = en(2)

in6_unlink_ifa: IPv6 address 0x990c0455a29d9783 has no prefix

jnl: disk0s4: replay_journal: from: 7638016 to: 7805952 (joffset 0xe8e000)

jnl: disk0s4: journal replay done.

IOPPF - Found another boot volume.Failed to find sleep policy for this platform! Disabling deep sleep.

IOPPF: XCPM mode

X86PlatformShim::start - Failed to send stepper

Standby delay is not specified! Defaulting to 0x1068

ErP Timer is not specified! Defaulting to 0x3840

Standby delay is not specified! Defaulting to 0x1068

ErP Timer is not specified! Defaulting to 0x3840

Standby delay is not specified! Defaulting to 0x1068

ErP Timer is not specified! Defaulting to 0x3840

Standby delay is not specified! Defaulting to 0x1068

ErP Timer is not specified! Defaulting to 0x3840

Standby delay is not specified! Defaulting to 0x1068

ErP Timer is not specified! Defaulting to 0x3840

Standby delay is not specified! Defaulting to 0x1068

ErP Timer is not specified! Defaulting to 0x3840

Standby delay is not specified! Defaulting to 0x1068

ErP Timer is not specified! Defaulting to 0x3840

Standby delay is not specified! Defaulting to 0x1068

ErP Timer is not specified! Defaulting to 0x3840

Standby delay is not specified! Defaulting to 0x1068

ErP Timer is not specified! Defaulting to 0x3840

Standby delay is not specified! Defaulting to 0x1068

ErP Timer is not specified! Defaulting to 0x3840

Standby delay is not specified! Defaulting to 0x1068

ErP Timer is not specified! Defaulting to 0x3840

Standby delay is not specified! Defaulting to 0x1068

ErP Timer is not specified! Defaulting to 0x3840

hfs: mounted Untitled on device disk0s4

AppleKeyStore:Sending lock change 0 for handle -501

ignored is_io_service_close(0x100000382,IOHIDParamUserClient)

**** [IOBluetoothFamily][SearchForTransportEventTimeOutHandler] -- Missing Bluetooth Controller Transport!

Standby delay is not specified! Defaulting to 0x1068

ErP Timer is not specified! Defaulting to 0x3840

Sandbox: SocialPushAgent(327) deny(1) file-write-data /Users/dima/Library/Preferences/com.apple.socialpushagent.plist

ignored is_io_service_close(0x100000382,IOHIDParamUserClient)

Sandbox: storeaccountd(365) deny(1) file-write-create /Users/dima/Library/Caches/com.apple.spotlight

ignored is_io_service_close(0x100000382,IOHIDParamUserClient)

Sandbox: softwareupdated(406) deny(1) system-fsctl 682f

MT=>Set::OID_802_11_DISASSOCIATE pAd->StaCfg.WscControl.WscState = 0 (WSC_STATE_OFF=0)

MT=>Set::RT_OID_802_11_RESET_COUNTERS (=0)

MT=>Query::RT_OID_802_11_QUERY_COUNTRY_REGION (A:0 B/G:0 =0)

MT=>Set::RT_OID_802_11_SET_COUNTRY_REGION (Clean the scan table)

MT=>Set::RT_OID_802_11_SET_COUNTRY_REGION CountryRegion = 0

MT=>Set::RT_OID_802_11_SET_COUNTRY_REGION CountryRegionForABand = 7

MT=>Query::RT_OID_802_11_QUERY_COUNTRY_REGION (A:7 B/G:0 =1792)

MT=>Query::RT_OID_802_11_QUERY_IEEE80211H (=0)

MT=>Query::RT_OID_802_11_QUERY_EDCCA (=1)

MT=>Set::RT_OID_802_11_SET_EDCCA (=0)

MT=>Query::RT_OID_802_11_QUERY_COUNTRY_REGION (A:7 B/G:0 =1792)

MT=>Set::RT_OID_802_11_RESET_COUNTERS (=0)

MT=>Set::OID_802_11_DISASSOCIATE pAd->StaCfg.WscControl.WscState = 0 (WSC_STATE_OFF=0)

ignored is_io_service_close(0x100000382,IOHIDParamUserClient)

SW watchdog[scan no AP] ....

MT=>---> SameRxByteCount = 21 !!!!!!!!!!!!!!!

Packet count [Data1 6ea1 Data2 0 Data3 0 RTS 0 PSPoll 0 Null 24 MLME 70 CMD 0]

MT=>PostBBPInitialization ==> Line 8014 ==>

SW watchdog[scan no AP] ....

MT=>---> SameRxByteCount = 21 !!!!!!!!!!!!!!!

Packet count [Data1 6ea1 Data2 0 Data3 0 RTS 0 PSPoll 0 Null 24 MLME 78 CMD 0]

MT=>PostBBPInitialization ==> Line 8014 ==>

SW watchdog[scan no AP] ....

MT=>---> SameRxByteCount = 21 !!!!!!!!!!!!!!!

Packet count [Data1 a1a7 Data2 0 Data3 0 RTS 0 PSPoll 0 Null 4d MLME 89 CMD 0]

MT=>PostBBPInitialization ==> Line 8014 ==>

SW watchdog[scan no AP] ....

MT=>---> SameRxByteCount = 21 !!!!!!!!!!!!!!!

Packet count [Data1 a1a7 Data2 0 Data3 0 RTS 0 PSPoll 0 Null 4d MLME 90 CMD 0]

MT=>PostBBPInitialization ==> Line 8014 ==>

SW watchdog[scan no AP] ....

MT=>---> SameRxByteCount = 21 !!!!!!!!!!!!!!!

Packet count [Data1 a1a7 Data2 0 Data3 0 RTS 0 PSPoll 0 Null 4d MLME 9a CMD 0]

MT=>PostBBPInitialization ==> Line 8014 ==>

SW watchdog[scan no AP] ....

MT=>---> SameRxByteCount = 21 !!!!!!!!!!!!!!!

Packet count [Data1 a1a7 Data2 0 Data3 0 RTS 0 PSPoll 0 Null 4d MLME a2 CMD 0]

MT=>PostBBPInitialization ==> Line 8014 ==>

SW watchdog[scan no AP] ....

MT=>---> SameRxByteCount = 21 !!!!!!!!!!!!!!!

Packet count [Data1 c411 Data2 0 Data3 0 RTS 0 PSPoll 0 Null 74 MLME ac CMD 0]

MT=>PostBBPInitialization ==> Line 8014 ==>

SW watchdog[scan no AP] ....

MT=>---> SameRxByteCount = 21 !!!!!!!!!!!!!!!

Packet count [Data1 c411 Data2 0 Data3 0 RTS 0 PSPoll 0 Null 74 MLME b3 CMD 0]

MT=>PostBBPInitialization ==> Line 8014 ==>

SW watchdog[scan no AP] ....

MT=>---> SameRxByteCount = 21 !!!!!!!!!!!!!!!

Packet count [Data1 c411 Data2 0 Data3 0 RTS 0 PSPoll 0 Null 74 MLME b8 CMD 0]

MT=>PostBBPInitialization ==> Line 8014 ==>

SW watchdog[scan no AP] ....

MT=>---> SameRxByteCount = 21 !!!!!!!!!!!!!!!

Packet count [Data1 c411 Data2 0 Data3 0 RTS 0 PSPoll 0 Null 74 MLME bd CMD 0]

MT=>PostBBPInitialization ==> Line 8014 ==>

SW watchdog[scan no AP] ....

MT=>---> SameRxByteCount = 21 !!!!!!!!!!!!!!!

Packet count [Data1 c411 Data2 0 Data3 0 RTS 0 PSPoll 0 Null 74 MLME c5 CMD 0]

MT=>PostBBPInitialization ==> Line 8014 ==>

Kernel Info

kernel_version
sysctl_cpu
sysctl_hw
sysctl_machdep_xcpm

Dumped using uname -v

View File kernel_version.txt

Darwin Kernel Version 15.3.0: Thu Dec 10 18:40:58 PST 2015; root:xnu-3248.30.4~1/RELEASE_X86_64

Dumped using /usr/sbin/sysctl -a | grep cpu

View File sysctl_cpu.txt

hw.ncpu: 4

hw.activecpu: 4

hw.physicalcpu: 2

hw.physicalcpu_max: 2

hw.logicalcpu: 4

hw.logicalcpu_max: 4

hw.cputype: 7

hw.cpusubtype: 8

hw.cpu64bit_capable: 1

hw.cpufamily: 939270559

hw.cpufrequency: 3697000000

hw.cpufrequency_min: 3697000000

hw.cpufrequency_max: 3697000000

hw.cputhreadtype: 1

machdep.cpu.max_basic: 22

machdep.cpu.max_ext: 2147483656

machdep.cpu.vendor: GenuineIntel

machdep.cpu.brand_string: Intel(R) Core(TM) i3-6100 CPU @ 3.70GHz

machdep.cpu.family: 6

machdep.cpu.model: 94

machdep.cpu.extmodel: 5

machdep.cpu.extfamily: 0

machdep.cpu.stepping: 3

machdep.cpu.feature_bits: 9221959987971750911

machdep.cpu.leaf7_feature_bits: 43804591

machdep.cpu.extfeature_bits: 1241984796928

machdep.cpu.signature: 329443

machdep.cpu.brand: 0

machdep.cpu.features: FPU VME DE PSE TSC MSR PAE MCE CX8 APIC SEP MTRR PGE MCA CMOV PAT PSE36 CLFSH DS ACPI MMX FXSR SSE SSE2 SS HTT TM PBE SSE3 PCLMULQDQ DTES64 MON DSCPL VMX EST TM2 SSSE3 FMA CX16 TPR PDCM SSE4.1 SSE4.2 x2APIC MOVBE POPCNT AES PCID XSAVE OSXSAVE SEGLIM64 TSCTMR AVX1.0 RDRAND F16C

machdep.cpu.leaf7_features: SMEP ERMS RDWRFSGS TSC_THREAD_OFFSET BMI1 AVX2 BMI2 INVPCID SMAP RDSEED ADX IPT SGX FPU_CSDS MPX CLFSOPT

machdep.cpu.extfeatures: SYSCALL XD 1GBPAGE EM64T LAHF LZCNT PREFETCHW RDTSCP TSCI

machdep.cpu.logical_per_package: 16

machdep.cpu.cores_per_package: 8

machdep.cpu.microcode_version: 45

machdep.cpu.processor_flag: 1

machdep.cpu.mwait.linesize_min: 64

machdep.cpu.mwait.linesize_max: 64

machdep.cpu.mwait.extensions: 3

machdep.cpu.mwait.sub_Cstates: 1319200

machdep.cpu.thermal.sensor: 1

machdep.cpu.thermal.dynamic_acceleration: 0

machdep.cpu.thermal.invariant_APIC_timer: 1

machdep.cpu.thermal.thresholds: 2

machdep.cpu.thermal.ACNT_MCNT: 1

machdep.cpu.thermal.core_power_limits: 1

machdep.cpu.thermal.fine_grain_clock_mod: 1

machdep.cpu.thermal.package_thermal_intr: 1

machdep.cpu.thermal.hardware_feedback: 0

machdep.cpu.thermal.energy_policy: 1

machdep.cpu.xsave.extended_state: 31 832 1088 0

machdep.cpu.xsave.extended_state1: 15 832 256 0

machdep.cpu.arch_perf.version: 4

machdep.cpu.arch_perf.number: 4

machdep.cpu.arch_perf.width: 48

machdep.cpu.arch_perf.events_number: 7

machdep.cpu.arch_perf.events: 0

machdep.cpu.arch_perf.fixed_number: 3

machdep.cpu.arch_perf.fixed_width: 48

machdep.cpu.cache.linesize: 64

machdep.cpu.cache.L2_associativity: 4

machdep.cpu.cache.size: 256

machdep.cpu.tlb.inst.large: 8

machdep.cpu.tlb.data.small: 64

machdep.cpu.tlb.data.small_level1: 64

machdep.cpu.address_bits.physical: 39

machdep.cpu.address_bits.virtual: 48

machdep.cpu.core_count: 2

machdep.cpu.thread_count: 4

machdep.cpu.tsc_ccc.numerator: 308

machdep.cpu.tsc_ccc.denominator: 2

machdep.xcpm.cpu_thermal_level: 0

Dumped using /usr/sbin/sysctl -a | grep hw

View File sysctl_hw.txt

net.inet.ip.adj_clear_hwcksum: 0

net.link.generic.system.hwcksum_in_invalidated: 0

net.link.generic.system.hwcksum_dbg: 0

net.link.generic.system.hwcksum_dbg_mode: 0

net.link.generic.system.hwcksum_dbg_partial_forced: 0

net.link.generic.system.hwcksum_dbg_partial_forced_bytes: 0

net.link.generic.system.hwcksum_dbg_partial_rxoff_forced: 0

net.link.generic.system.hwcksum_dbg_partial_rxoff_adj: 0

net.link.generic.system.hwcksum_dbg_verified: 0

net.link.generic.system.hwcksum_dbg_bad_cksum: 0

net.link.generic.system.hwcksum_dbg_bad_rxoff: 0

net.link.generic.system.hwcksum_dbg_adjusted: 0

net.link.generic.system.hwcksum_dbg_finalized_hdr: 0

net.link.generic.system.hwcksum_dbg_finalized_data: 0

net.link.generic.system.hwcksum_tx: 1

net.link.generic.system.hwcksum_rx: 1

net.link.ether.inet.apple_hwcksum_tx: 1

net.link.ether.inet.apple_hwcksum_rx: 1

net.inet6.ip6.adj_clear_hwcksum: 0

hw.ncpu: 4

hw.byteorder: 1234

hw.memsize: 17179869184

hw.activecpu: 4

hw.targettype:

hw.physicalcpu: 2

hw.physicalcpu_max: 2

hw.logicalcpu: 4

hw.logicalcpu_max: 4

hw.cputype: 7

hw.cpusubtype: 8

hw.cpu64bit_capable: 1

hw.cpufamily: 939270559

hw.cacheconfig: 4 2 2 4 0 0 0 0 0 0

hw.cachesize: 17179869184 32768 262144 3145728 0 0 0 0 0 0

hw.pagesize: 4096

hw.pagesize32: 4096

hw.busfrequency: 400000000

hw.busfrequency_min: 400000000

hw.busfrequency_max: 400000000

hw.cpufrequency: 3697000000

hw.cpufrequency_min: 3697000000

hw.cpufrequency_max: 3697000000

hw.cachelinesize: 64

hw.l1icachesize: 32768

hw.l1dcachesize: 32768

hw.l2cachesize: 262144

hw.l3cachesize: 3145728

hw.tbfrequency: 1000000000

hw.packages: 1

hw.optional.floatingpoint: 1

hw.optional.mmx: 1

hw.optional.sse: 1

hw.optional.sse2: 1

hw.optional.sse3: 1

hw.optional.supplementalsse3: 1

hw.optional.sse4_1: 1

hw.optional.sse4_2: 1

hw.optional.x86_64: 1

hw.optional.aes: 1

hw.optional.avx1_0: 1

hw.optional.rdrand: 1

hw.optional.f16c: 1

hw.optional.enfstrg: 1

hw.optional.fma: 1

hw.optional.avx2_0: 1

hw.optional.bmi1: 1

hw.optional.bmi2: 1

hw.optional.rtm: 0

hw.optional.hle: 0

hw.optional.adx: 1

hw.optional.mpx: 1

hw.optional.sgx: 1

hw.cputhreadtype: 1

machdep.pmap.hashwalks: 1018282

Dumped using /usr/sbin/sysctl -a machdep.xcpm (Thanks Pike).

View File sysctl_machdep_xcpm.txt

machdep.xcpm.mode: 1

machdep.xcpm.hard_plimit_max_100mhz_ratio: 37

machdep.xcpm.hard_plimit_min_100mhz_ratio: 8

machdep.xcpm.soft_plimit_max_100mhz_ratio: 37

machdep.xcpm.soft_plimit_min_100mhz_ratio: 8

machdep.xcpm.tuib_plimit_max_100mhz_ratio: 37

machdep.xcpm.tuib_plimit_min_100mhz_ratio: 8

machdep.xcpm.tuib_enabled: 0

machdep.xcpm.power_source: 0

machdep.xcpm.bootplim: 0

machdep.xcpm.bootpst: 37

machdep.xcpm.tuib_ns: 0

machdep.xcpm.ratio_changes_total: 378470

machdep.xcpm.maxbusdelay: 0

machdep.xcpm.maxintdelay: 0

machdep.xcpm.mbd_mode: 1

machdep.xcpm.mbd_applications: 0

machdep.xcpm.mbd_relaxations: 0

machdep.xcpm.forced_idle_ratio: 100

machdep.xcpm.forced_idle_period: 30000000

machdep.xcpm.deep_idle_log: 0

machdep.xcpm.qos_txfr: 1

machdep.xcpm.deep_idle_count: 0

machdep.xcpm.deep_idle_last_stats: n/a

machdep.xcpm.deep_idle_total_stats: n/a

machdep.xcpm.cpu_thermal_level: 0

machdep.xcpm.gpu_thermal_level: 0

machdep.xcpm.io_thermal_level: 0

machdep.xcpm.io_control_engages: 0

machdep.xcpm.io_control_disengages: 1

machdep.xcpm.io_filtered_reads: 0

Kexts

AppleKexts
NonAppleKexts

Dumped using: kextstat -l | egrep "com.apple"

Apple Kexts : 90

IDX	REFS	ADDRESS	SIZE	WIRED	NAME	VERSION	LINKED AGAINST
1	67	0xffffff7f80a42000	0x9c80	0x9c80	com.apple.kpi.bsd	(15.3.0)
2	8	0xffffff7f80dd2000	0x3890	0x3890	com.apple.kpi.dsep	(15.3.0)
3	83	0xffffff7f80a04000	0x20e20	0x20e20	com.apple.kpi.iokit	(15.3.0)
4	91	0xffffff7f80a25000	0xd000	0xd000	com.apple.kpi.libkern	(15.3.0)
5	76	0xffffff7f80a00000	0x3d50	0x3d50	com.apple.kpi.mach	(15.3.0)
6	44	0xffffff7f80a32000	0x96d0	0x96d0	com.apple.kpi.private	(15.3.0)
7	58	0xffffff7f80a3c000	0x58a0	0x58a0	com.apple.kpi.unsupported	(15.3.0)
8	5	0xffffff7f80dd9000	0x95000	0x95000	com.apple.kec.corecrypto	(1.0)	<7 6 5 4 3 1>
9	0	0xffffff7f8112c000	0xd000	0xd000	com.apple.kec.pthread	(1)	<7 6 5 4 1>
10	1	0xffffff7f816b2000	0x9000	0x9000	com.apple.kec.Libm	(1)	<4>
11	14	0xffffff7f80c07000	0x9000	0x9000	com.apple.iokit.IOACPIFamily	(1.4)	<7 6 4 3>
12	23	0xffffff7f80b2c000	0x30000	0x30000	com.apple.iokit.IOPCIFamily	(2.9)	<7 6 5 4 3>
13	1	0xffffff7f82953000	0x60000	0x60000	com.apple.driver.AppleACPIPlatform	(4.0)	<12 11 7 6 5 4 3 1>
15	1	0xffffff7f817f1000	0xb000	0xb000	com.apple.driver.AppleFDEKeyStore	(28.30)	<8 7 6 5 4 3 1>
16	1	0xffffff7f81bb1000	0x7000	0x7000	com.apple.iokit.IOReportFamily	(31)	<5 4 3>
17	3	0xffffff7f80a4c000	0x27000	0x27000	com.apple.iokit.IOStorageFamily	(2.1)	<7 6 5 4 3 1>
18	0	0xffffff7f81c49000	0x19000	0x19000	com.apple.driver.DiskImages	(417.2)	<17 7 6 5 4 3 1>
19	1	0xffffff7f824e3000	0x1e000	0x1e000	com.apple.driver.AppleCredentialManager	(1.0)	<8 7 5 4 3 1>
20	2	0xffffff7f80e6e000	0x12000	0x12000	com.apple.driver.AppleMobileFileIntegrity	(1.0.5)	<8 7 6 5 4 3 2 1>
21	0	0xffffff7f82501000	0x28000	0x28000	com.apple.driver.AppleKeyStore	(2)	<20 19 8 7 6 5 4 3 1>
22	0	0xffffff7f80dd6000	0x2000	0x2000	com.apple.security.TMSafetyNet	(8)	<7 6 5 4 2 1>
23	2	0xffffff7f80e80000	0x5000	0x5000	com.apple.kext.AppleMatch	(1.0.0d1)	<4 1>
24	1	0xffffff7f80e85000	0x1e000	0x1e000	com.apple.security.sandbox	(300.0)	<23 20 17 7 6 5 4 3 2 1>
25	0	0xffffff7f81122000	0x9000	0x9000	com.apple.security.quarantine	(3)	<24 23 7 6 5 4 2 1>
26	0	0xffffff7f829ca000	0x8000	0x8000	com.apple.nke.applicationfirewall	(163)	<7 6 5 4 3 1>
27	0	0xffffff7f82921000	0x3000	0x3000	com.apple.driver.AppleAPIC	(1.7)	<4 3>
28	0	0xffffff7f823fb000	0x4000	0x4000	com.apple.driver.AppleSMBIOS	(2.1)	<7 4 3>
29	0	0xffffff7f825fd000	0x3000	0x3000	com.apple.driver.AppleHPET	(1.8)	<11 7 5 4 3>
30	2	0xffffff7f817fc000	0x76000	0x76000	com.apple.iokit.IOHIDFamily	(2.0.0)	<15 7 6 5 4 3 2 1>
31	0	0xffffff7f829c3000	0x4000	0x4000	com.apple.driver.AppleACPIButtons	(4.0)	<30 13 11 7 6 5 4 3 1>
32	1	0xffffff7f82657000	0x5000	0x5000	com.apple.driver.AppleEFIRuntime	(2.0)	<7 6 5 4 3>
33	0	0xffffff7f82429000	0x8000	0x8000	com.apple.driver.AppleRTC	(2.0)	<11 5 4 3 1>
34	1	0xffffff7f8265c000	0xa000	0xa000	com.apple.driver.AppleEFINVRAM	(2.0)	<32 7 6 5 4 3 2 1>
35	1	0xffffff7f80ed7000	0x4000	0x4000	com.apple.driver.AppleUSBHostMergeProperties	(1.0.1)	<4 3 1>
36	6	0xffffff7f80edb000	0x69000	0x69000	com.apple.iokit.IOUSBHostFamily	(1.0.1)	<35 7 5 4 3 1>
37	2	0xffffff7f80f4d000	0x98000	0x98000	com.apple.iokit.IOUSBFamily	(900.4.1)	<36 12 7 5 4 3 1>
38	1	0xffffff7f81890000	0x3f000	0x3f000	com.apple.driver.usb.AppleUSBXHCI	(1.0.1)	<36 11 7 5 4 3 1>
39	0	0xffffff7f818d5000	0x20000	0x20000	com.apple.driver.usb.AppleUSBXHCIPCI	(1.0.1)	<38 36 12 11 7 5 4 3 1>
40	2	0xffffff7f81e0f000	0x1b000	0x1b000	com.apple.iokit.IOAHCIFamily	(2.8.1)	<5 4 3 1>
41	0	0xffffff7f82926000	0x1e000	0x1e000	com.apple.driver.AppleAHCIPort	(3.1.8)	<40 12 5 4 3 1>
43	3	0xffffff7f80ea3000	0x2d000	0x2d000	com.apple.iokit.IONetworkingFamily	(3.2)	<7 6 5 4 3 1>
45	0	0xffffff7f81e3a000	0x1c000	0x1c000	com.apple.iokit.IOAHCIBlockStorage	(2.8.5)	<40 17 6 5 4 3 1>
46	0	0xffffff7f820ef000	0xa000	0xa000	com.apple.BootCache	(38)	<7 6 5 4 3 1>
47	0	0xffffff7f828f2000	0x6000	0x6000	com.apple.AppleFSCompression.AppleFSCompressionTypeZlib	(1.0.0)	<6 4 3 2 1>
48	0	0xffffff7f828fa000	0x3000	0x3000	com.apple.AppleFSCompression.AppleFSCompressionTypeDataless	(1.0.0d1)	<7 6 4 3 2 1>
51	0	0xffffff7f819c4000	0x8000	0x8000	com.apple.driver.usb.AppleUSBHostCompositeDevice	(1.0.1)	<36 5 4 3 1>
52	0	0xffffff7f81886000	0xa000	0xa000	com.apple.driver.usb.IOUSBHostHIDDevice	(1.0.1)	<36 30 5 4 3 1>
54	0	0xffffff7f80ae9000	0x2b000	0x2b000	com.apple.iokit.IOSCSIArchitectureModelFamily	(3.7.7)	<6 5 4 3 1>
57	12	0xffffff7f8114f000	0x3b000	0x3b000	com.apple.iokit.IOGraphicsFamily	(2.4.1)	<12 7 5 4 3 1>
58	6	0xffffff7f81196000	0x10000	0x10000	com.apple.iokit.IONDRVSupport	(2.4.1)	<57 12 7 5 4 3>
60	4	0xffffff7f81bb8000	0xa000	0xa000	com.apple.driver.IOPlatformPluginFamily	(6.0.0d7)	<11 7 6 5 4 3>
61	0	0xffffff7f82534000	0x3000	0x3000	com.apple.driver.AppleIntelPCHPMC	(1.0)	<60 12 5 4 3>
62	2	0xffffff7f811a6000	0x7000	0x7000	com.apple.AppleGraphicsDeviceControl	(3.12.6)	<7 6 5 4 3 1>
65	5	0xffffff7f81bc2000	0x19000	0x19000	com.apple.driver.AppleSMC	(3.1.9)	<11 7 5 4 3 1>
66	1	0xffffff7f81bdd000	0x17000	0x17000	com.apple.driver.X86PlatformPlugin	(1.0.0)	<65 60 37 36 11 7 6 5 4 3 1>
70	1	0xffffff7f81b3d000	0x4000	0x4000	com.apple.iokit.IOSMBusFamily	(1.1)	<5 4 3>
71	1	0xffffff7f82495000	0xe000	0xe000	com.apple.driver.AppleSMBusController	(1.0.14d1)	<70 12 11 5 4 3>
72	0	0xffffff7f824a6000	0xe000	0xe000	com.apple.driver.AppleMCCSControl	(1.2.13)	<71 65 57 12 11 7 5 4 3 1>
73	1	0xffffff7f828c5000	0x5000	0x5000	com.apple.driver.AppleBacklightExpert	(1.1.0)	<65 58 57 12 5 4 3>
74	0	0xffffff7f82919000	0x5000	0x5000	com.apple.driver.AppleBacklight	(170.8.8)	<73 58 57 12 5 4 3>
75	1	0xffffff7f81e63000	0x6c000	0x6c000	com.apple.iokit.IOAcceleratorFamily2	(205.1)	<57 12 7 6 5 4 3 1>
77	1	0xffffff7f81b41000	0x5000	0x5000	com.apple.iokit.IOSlowAdaptiveClockingFamily	(1.0.0)	<7 6 5 4 3 1>
78	0	0xffffff7f82530000	0x2000	0x2000	com.apple.driver.AppleIntelSlowAdaptiveClocking	(4.0.0)	<77 4 3>
79	0	0xffffff7f825c0000	0xa000	0xa000	com.apple.driver.AppleHV	(1)	<7 6 5 4 3 1>
80	1	0xffffff7f820be000	0x22000	0x22000	com.apple.driver.corecapture	(1.0.4)	<7 6 5 4 3 1>
81	0	0xffffff7f820e8000	0x7000	0x7000	com.apple.driver.CoreCaptureResponder	(1)	<80 7 6 5 4 3 1>
84	0	0xffffff7f82488000	0x4000	0x4000	com.apple.driver.AppleOSXWatchdog	(1)	<12 7 6 5 4 3 1>
85	2	0xffffff7f8210b000	0x7c000	0x7c000	com.apple.vecLib.kext	(1.2.0)	<10 6 5 4 3>
86	4	0xffffff7f82187000	0x31000	0x31000	com.apple.iokit.IOAudioFamily	(204.3)	<85 5 4 3 1>
87	2	0xffffff7f82614000	0xc000	0xc000	com.apple.iokit.IOHDAFamily	(272.51.3)	<5 4 3 1>
88	1	0xffffff7f82627000	0x1d000	0x1d000	com.apple.driver.AppleHDAController	(272.51.3)	<87 86 57 12 7 6 5 4 3 1>
89	0	0xffffff7f81fba000	0x5000	0x5000	com.apple.Dont_Steal_Mac_OS_X	(7.0.0)	<65 7 4 3 1>
90	0	0xffffff7f8226f000	0x5000	0x5000	com.apple.driver.AppleUpstreamUserClient	(3.6.1)	<57 12 11 7 5 4 3 1>
91	0	0xffffff7f81ced000	0xbd000	0xbd000	com.apple.iokit.IOBluetoothFamily	(4.4.3f4)	<16 7 5 4 3 1>
92	0	0xffffff7f81b28000	0x13000	0x13000	com.apple.iokit.IOSurface	(108.0.1)	<7 5 4 3 1>
93	0	0xffffff7f8179d000	0x6000	0x6000	com.apple.iokit.IOUserEthernet	(1.0.1)	<43 6 5 4 3 1>
94	0	0xffffff7f81139000	0x8000	0x8000	com.apple.driver.pmtelemetry	(1)	<7 6 5 4 3>
95	1	0xffffff7f81b4c000	0xe000	0xe000	com.apple.iokit.IOSerialFamily	(11)	<7 6 5 4 3 1>
96	0	0xffffff7f81cd9000	0xa000	0xa000	com.apple.iokit.IOBluetoothSerialManager	(4.4.3f4)	<95 7 5 4 3 1>
97	1	0xffffff7f82644000	0x13000	0x13000	com.apple.kext.OSvKernDSPLib	(525)	<5 4>
98	1	0xffffff7f82666000	0x131000	0x131000	com.apple.driver.DspFuncLib	(272.51.3)	<97 86 85 34 6 5 4 3 1>
99	0	0xffffff7f827a1000	0xb2000	0xb2000	com.apple.driver.AppleHDA	(272.51.3)	<98 88 87 86 58 57 6 5 4 3 1>
101	2	0xffffff7f820fb000	0x5000	0x5000	com.apple.kext.triggers	(1.0)	<7 6 5 4 3 1>
102	0	0xffffff7f82100000	0x9000	0x9000	com.apple.filesystems.autofs	(3.0)	<101 7 6 5 4 3 1>
103	1	0xffffff7f81bf4000	0x7000	0x7000	com.apple.driver.X86PlatformShim	(1.0.0)	<66 65 60 7 4 3>
105	0	0xffffff7f828a5000	0x14000	0x14000	com.apple.driver.AGPM	(110.20.22)	<62 60 58 57 12 6 5 4 3>
108	0	0xffffff7f821c0000	0x5000	0x5000	com.apple.driver.AudioAUUC	(1.70)	<86 57 12 11 7 5 4 3 1>
110	0	0xffffff7f82a14000	0x5e000	0x5e000	com.apple.filesystems.smbfs	(3.0.0)	<101 8 7 6 5 4 3 1>
111	1	0xffffff7f82a72000	0xf000	0xf000	com.apple.filesystems.msdosfs	(1.10)	<7 5 4 1>
115	0	0xffffff7f82a85000	0x3000	0x3000	com.apple.nvidia.NVDAStartup	(10.0.8)	<12 4 3>

Dumped using: kextstat -l | egrep -v "com.apple"

Non Apple Kexts : 8

IDX	REFS	ADDRESS	SIZE	WIRED	NAME	VERSION	LINKED AGAINST
14	0	0xffffff7f80c10000	0x19000	0x19000	org.netkas.driver.FakeSMC	(1394)	<11 7 5 4 3 1>
44	0	0xffffff7f829da000	0x3a000	0x3a000	com.insanelymac.RealtekRTL8111	(2.0.0)	<43 12 5 4 3 1>
53	0	0xffffff7f80ff7000	0x110000	0x110000	com.Ralink.driver.RT2870USBWirelessDriver	(5.0.1)	<43 37 5 4 3 1>
63	2	0xffffff7f811ad000	0x2e4000	0x2e4000	com.nvidia.web.NVDAResmanWeb	(10.0.9)	<62 58 57 12 7 5 4 3 1>
64	0	0xffffff7f814a0000	0x1ff000	0x1ff000	com.nvidia.web.NVDAGM100HalWeb	(10.0.9)	<63 12 4 3>
76	0	0xffffff7f81edd000	0x93000	0x93000	com.nvidia.web.GeForceWeb	(10.0.9)	<75 63 58 57 12 7 5 4 3 1>
106	0	0xffffff7f81fc0000	0x2000	0x2000	com.nvidia.CUDA	(1.1.0)	<4 1>
114	0	0xffffff7f829d4000	0x3000	0x3000	com.nvidia.NVDAStartupWeb	(10.0.9)	<12 4 3>

LSPCI

lspci (nnvv)
lspci detailed (nnvvbxxxx)
lspci map (M)
lspci tree (nnvvt)

Numbers & names view. Dumped using pciutils v3.2.0 by Martin Mares. OS X port by THe KiNG. This version compiled by xsmile.

View File lspci (nnvv).txt

00:00.0 Host bridge [0600]: Intel Corporation Skylake Host Bridge/DRAM Registers [8086:190f] (rev 07)

Subsystem: ASRock Incorporation Device [1849:190f]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx-

Latency: 0

Capabilities: [e0] Vendor Specific Information: Len=10 <?>

00:01.0 PCI bridge [0604]: Intel Corporation Skylake PCIe Controller (x16) [8086:1901] (rev 07) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Bus: primary=00, secondary=01, subordinate=01, sec-latency=0

I/O behind bridge: 0000e000-0000efff

Memory behind bridge: de000000-df0fffff

Prefetchable memory behind bridge: 0000007f80000000-0000007f91ffffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [88] Subsystem: ASRock Incorporation Device [1849:1901]

Capabilities: [80] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [90] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [a0] Express (v2) Root Port (Slot+), MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 256 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-

LnkCap: Port #2, Speed 8GT/s, Width x16, ASPM L0s L1, Latency L0 <256ns, L1 <8us

ClockPM- Surprise- LLActRep- BwNot+

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 8GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt+ ABWMgmt+

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-

Slot #1, PowerLimit 75.000W; Interlock- NoCompl+

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet+ LinkState-

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Not Supported, TimeoutDis- ARIFwd-

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -3.5dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete+, EqualizationPhase1+

EqualizationPhase2+, EqualizationPhase3+, LinkEqualizationRequest-

00:14.0 USB controller [0c03]: Intel Corporation Sunrise Point-H USB 3.0 xHCI Controller [8086:a12f] (rev 31) (prog-if 30 [XHCI])

Subsystem: ASRock Incorporation Device [1849:a12f]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at 7f92010000 (64-bit, non-prefetchable)

Capabilities: [70] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0-,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [80] MSI: Enable+ Count=1/8 Maskable- 64bit+

Address: 00000000fee00000 Data: 4071

00:14.2 Signal processing controller [1180]: Intel Corporation Sunrise Point-H Thermal subsystem [8086:a131] (rev 31)

Subsystem: ASRock Incorporation Device [1849:a131]

Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Interrupt: pin C routed to IRQ 18

Region 0: Memory at 7f92025000 (64-bit, non-prefetchable)

Capabilities: [50] Power Management version 3

Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: fee00000 Data: 4070

00:16.0 Communication controller [0780]: Intel Corporation Sunrise Point-H CSME HECI #1 [8086:a13a] (rev 31)

Subsystem: ASRock Incorporation Device [1849:a13a]

Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Interrupt: pin A routed to IRQ 16

Region 0: Memory at 7f92024000 (64-bit, non-prefetchable) [disabled]

Capabilities: [50] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [8c] MSI: Enable- Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4072

00:17.0 SATA controller [0106]: Intel Corporation Sunrise Point-H SATA controller [AHCI mode] [8086:a102] (rev 31) (prog-if 01 [AHCI 1.0])

Subsystem: ASRock Incorporation Device [1849:a102]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at df228000 (32-bit, non-prefetchable)

Region 1: Memory at df22c000 (32-bit, non-prefetchable)

Region 2: I/O ports at f050

Region 3: I/O ports at f040

Region 4: I/O ports at f020

Region 5: Memory at df22b000 (32-bit, non-prefetchable)

Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit-

Address: fee00000 Data: 4073

Capabilities: [70] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [a8] SATA HBA v1.0 BAR4 Offset=00000004

00:1c.0 PCI bridge [0604]: Intel Corporation Sunrise Point-H PCI Express Root Port #1 [8086:a110] (rev f1) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Bus: primary=00, secondary=02, subordinate=02, sec-latency=0

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v2) Root Port (Slot-), MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 256 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #1, Speed 8GT/s, Width x1, ASPM unknown, Latency L0 unlimited, L1 <16us

ClockPM- Surprise- LLActRep+ BwNot+

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train+ SlotClk+ DLActive- BWMgmt- ABWMgmt-

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Range ABC, TimeoutDis+ ARIFwd+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: ASRock Incorporation Device [1849:a110]

Capabilities: [a0] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00:1d.0 PCI bridge [0604]: Intel Corporation Sunrise Point-H PCI Express Root Port #9 [8086:a118] (rev f1) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Bus: primary=00, secondary=03, subordinate=03, sec-latency=0

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v2) Root Port (Slot-), MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 256 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #9, Speed 8GT/s, Width x1, ASPM unknown, Latency L0 unlimited, L1 <16us

ClockPM- Surprise- LLActRep+ BwNot+

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train+ SlotClk+ DLActive- BWMgmt- ABWMgmt-

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Range ABC, TimeoutDis+ ARIFwd+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: ASRock Incorporation Device [1849:a118]

Capabilities: [a0] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00:1d.3 PCI bridge [0604]: Intel Corporation Sunrise Point-H PCI Express Root Port #12 [8086:a11b] (rev f1) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Bus: primary=00, secondary=04, subordinate=04, sec-latency=0

I/O behind bridge: 0000d000-0000dfff

Memory behind bridge: df100000-df1fffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #12, Speed 8GT/s, Width x1, ASPM unknown, Latency L0 <1us, L1 <16us

ClockPM- Surprise- LLActRep+ BwNot+

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-

Slot #15, PowerLimit 10.000W; Interlock- NoCompl+

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet- LinkState+

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Range ABC, TimeoutDis+ ARIFwd+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: ASRock Incorporation Device [1849:a11b]

Capabilities: [a0] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00:1f.0 ISA bridge [0601]: Intel Corporation Sunrise Point-H LPC Controller [8086:a145] (rev 31)

Subsystem: ASRock Incorporation Device [1849:a145]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

00:1f.2 Memory controller [0580]: Intel Corporation Sunrise Point-H PMC [8086:a121] (rev 31)

Subsystem: ASRock Incorporation Device [1849:a121]

Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Region 0: Memory at df224000 (32-bit, non-prefetchable) [disabled]

00:1f.3 Audio device [0403]: Intel Corporation Sunrise Point-H HD Audio [8086:a170] (rev 31)

Subsystem: ASRock Incorporation Device [1849:5892]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 64

Interrupt: pin A routed to IRQ 16

Region 0: Memory at 7f92020000 (64-bit, non-prefetchable)

Region 4: Memory at 7f92000000 (64-bit, non-prefetchable)

Capabilities: [50] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0-,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [60] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4076

00:1f.4 SMBus [0c05]: Intel Corporation Sunrise Point-H SMBus [8086:a123] (rev 31)

Subsystem: ASRock Incorporation Device [1849:a123]

Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Interrupt: pin A routed to IRQ 16

Region 0: Memory at 7f92026000 (64-bit, non-prefetchable)

Region 4: I/O ports at f000

01:00.0 VGA compatible controller [0300]: NVIDIA Corporation GM206 [GeForce GTX 950] [10de:1402] (rev a1) (prog-if 00 [VGA controller])

Subsystem: ZOTAC International (MCO) Ltd. Device [19da:1376]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at de000000 (32-bit, non-prefetchable)

Region 1: Memory at 7f80000000 (64-bit, prefetchable)

Region 3: Memory at 7f90000000 (64-bit, prefetchable)

Region 5: I/O ports at e000

Capabilities: [60] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [68] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4074

Capabilities: [78] Express (v2) Legacy Endpoint, MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s unlimited, L1 <64us

ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+

MaxPayload 256 bytes, MaxReadReq 512 bytes

DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-

LnkCap: Port #0, Speed 8GT/s, Width x16, ASPM unknown, Latency L0 <1us, L1 <4us

ClockPM+ Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 8GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

DevCap2: Completion Timeout: Range AB, TimeoutDis+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-

LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete+, EqualizationPhase1+

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

01:00.1 Audio device [0403]: NVIDIA Corporation Device [10de:0fba] (rev a1)

Subsystem: ZOTAC International (MCO) Ltd. Device [19da:1376]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin B routed to IRQ 17

Region 0: Memory at df080000 (32-bit, non-prefetchable)

Capabilities: [60] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [68] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4075

Capabilities: [78] Express (v2) Endpoint, MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s unlimited, L1 <64us

ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+

MaxPayload 256 bytes, MaxReadReq 512 bytes

DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-

LnkCap: Port #0, Speed 8GT/s, Width x16, ASPM unknown, Latency L0 <1us, L1 <4us

ClockPM+ Surprise- LLActRep- BwNot-

LnkCtl: ASPM L0s L1 Enabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 8GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

DevCap2: Completion Timeout: Range AB, TimeoutDis+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-

LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

04:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller [10ec:8168] (rev 15)

Subsystem: ASRock Incorporation Motherboard (one of many) [1849:8168]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 19

Region 0: I/O ports at d000 [disabled]

Region 2: Memory at df104000 (64-bit, non-prefetchable)

Region 4: Memory at df100000 (64-bit, non-prefetchable)

Capabilities: [40] Power Management version 3

Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [50] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4077

Capabilities: [70] Express (v2) Endpoint, MSI 01

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us

ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 512 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 unlimited, L1 <64us

ClockPM+ Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

DevCap2: Completion Timeout: Range ABCD, TimeoutDis+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-

LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [b0] MSI-X: Enable- Count=4 Masked-

Vector table: BAR=4 offset=00000000

PBA: BAR=4 offset=00000800

Bus centric view - Extended hex dump. Dumped using pciutils v3.2.0 by Martin Mares. OS X port by THe KiNG. This version compiled by xsmile.

View File lspci detailed (nnvvbxxxx).txt

00:00.0 Host bridge [0600]: Intel Corporation Skylake Host Bridge/DRAM Registers [8086:190f] (rev 07)

Subsystem: ASRock Incorporation Device [1849:190f]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx-

Latency: 0

Capabilities: [e0] Vendor Specific Information: Len=10 <?>

00: 86 80 0f 19 06 00 90 20 07 00 00 06 00 00 00 00

10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 0f 19

30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00

40: 01 90 d1 fe 00 00 00 00 01 00 d1 fe 00 00 00 00

50: 03 00 00 00 29 00 00 00 04 00 00 00 01 00 40 88

60: 01 00 00 e0 00 00 00 00 01 80 d1 fe 00 00 00 00

70: 00 00 00 ff 03 00 00 00 00 0c 00 ff 7f 00 00 00

80: 11 11 11 11 11 11 11 00 1a 00 00 00 00 00 00 00

90: 01 00 00 ff 03 00 00 00 01 00 70 76 04 00 00 00

a0: 01 00 00 00 04 00 00 00 01 00 80 76 04 00 00 00

b0: 01 00 80 88 01 00 80 88 01 00 40 88 01 00 80 88

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 09 00 10 01 7d 26 01 62 c8 00 04 94 00 00 07 00

f0: 00 00 00 00 c8 0f 03 00 00 00 00 00 00 00 00 00

00:01.0 PCI bridge [0604]: Intel Corporation Skylake PCIe Controller (x16) [8086:1901] (rev 07) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Bus: primary=00, secondary=01, subordinate=01, sec-latency=0

I/O behind bridge: 0000e000-0000efff

Memory behind bridge: de000000-df0fffff

Prefetchable memory behind bridge: 0000007f80000000-0000007f91ffffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [88] Subsystem: ASRock Incorporation Device [1849:1901]

Capabilities: [80] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [90] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [a0] Express (v2) Root Port (Slot+), MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 256 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-

LnkCap: Port #2, Speed 8GT/s, Width x16, ASPM L0s L1, Latency L0 <256ns, L1 <8us

ClockPM- Surprise- LLActRep- BwNot+

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 8GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt+ ABWMgmt+

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-

Slot #1, PowerLimit 75.000W; Interlock- NoCompl+

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet+ LinkState-

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Not Supported, TimeoutDis- ARIFwd-

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -3.5dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete+, EqualizationPhase1+

EqualizationPhase2+, EqualizationPhase3+, LinkEqualizationRequest-

00: 86 80 01 19 07 00 10 00 07 00 04 06 00 00 81 00

10: 00 00 00 00 00 00 00 00 00 01 01 00 e0 e0 00 20

20: 00 de 00 df 01 80 f1 91 7f 00 00 00 7f 00 00 00

30: 00 00 00 00 88 00 00 00 00 00 00 00 10 01 1a 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 0d 92 1e 00 00 00 00 0a

80: 01 90 03 c8 08 00 00 00 0d 80 00 00 49 18 01 19

90: 05 a0 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 10 00 42 01 01 80 00 00 20 00 00 00 03 ad 61 02

b0: 40 00 03 d1 80 25 0c 00 00 00 48 00 00 00 00 00

c0: 00 00 00 00 80 0b 08 00 00 64 00 00 0e 00 00 00

d0: 43 00 1e 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 60 01 a8 4e 01 01 20 00 00 00 00 e0 00 10 00

00:14.0 USB controller [0c03]: Intel Corporation Sunrise Point-H USB 3.0 xHCI Controller [8086:a12f] (rev 31) (prog-if 30 [XHCI])

Subsystem: ASRock Incorporation Device [1849:a12f]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at 7f92010000 (64-bit, non-prefetchable)

Capabilities: [70] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0-,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [80] MSI: Enable+ Count=1/8 Maskable- 64bit+

Address: 00000000fee00000 Data: 4071

00: 86 80 2f a1 06 04 90 02 31 30 03 0c 00 00 80 00

10: 04 00 01 92 7f 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 2f a1

30: 00 00 00 00 70 00 00 00 00 00 00 00 10 01 00 00

40: fd 01 34 80 88 c6 0f 80 00 00 00 00 00 00 00 00

50: 5f 6e ce 0f 00 00 00 00 00 00 00 00 00 00 00 00

60: 30 60 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 01 80 c2 c1 08 00 00 00 00 00 00 00 00 00 00 00

80: 05 00 87 00 00 00 e0 fe 00 00 00 00 71 40 00 00

90: 09 00 14 f0 10 00 40 01 00 00 00 00 c1 0a 08 00

a0: 00 08 04 00 00 18 00 00 8f 40 02 00 00 01 04 00

b0: 80 c0 00 00 30 00 00 00 01 02 00 00 00 10 00 00

c0: 0c 00 00 00 02 01 00 00 00 28 00 00 00 00 00 00

d0: 18 00 00 00 06 00 00 00 c0 00 00 00 00 01 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00

00:14.2 Signal processing controller [1180]: Intel Corporation Sunrise Point-H Thermal subsystem [8086:a131] (rev 31)

Subsystem: ASRock Incorporation Device [1849:a131]

Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Interrupt: pin C routed to IRQ 18

Region 0: Memory at 7f92025000 (64-bit, non-prefetchable)

Capabilities: [50] Power Management version 3

Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: fee00000 Data: 4070

00: 86 80 31 a1 02 00 10 00 31 00 80 11 00 00 00 00

10: 04 50 02 92 7f 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 31 a1

30: 00 00 00 00 50 00 00 00 00 00 00 00 12 03 00 00

40: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 01 80 23 00 08 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 05 00 00 00 00 00 e0 fe 70 40 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00

00:16.0 Communication controller [0780]: Intel Corporation Sunrise Point-H CSME HECI #1 [8086:a13a] (rev 31)

Subsystem: ASRock Incorporation Device [1849:a13a]

Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Interrupt: pin A routed to IRQ 16

Region 0: Memory at 7f92024000 (64-bit, non-prefetchable) [disabled]

Capabilities: [50] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [8c] MSI: Enable- Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4072

00: 86 80 3a a1 00 00 10 00 31 00 80 07 00 00 80 00

10: 04 40 02 92 7f 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 3a a1

30: 00 00 00 00 50 00 00 00 00 00 00 00 10 01 00 00

40: 45 02 00 90 10 00 01 80 06 03 11 86 00 00 00 00

50: 01 8c 03 40 08 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 40 08 00 00 00 00 00 00 00 00 40

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 05 00 80 00

90: 00 00 e0 fe 00 00 00 00 72 40 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00

00:17.0 SATA controller [0106]: Intel Corporation Sunrise Point-H SATA controller [AHCI mode] [8086:a102] (rev 31) (prog-if 01 [AHCI 1.0])

Subsystem: ASRock Incorporation Device [1849:a102]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at df228000 (32-bit, non-prefetchable)

Region 1: Memory at df22c000 (32-bit, non-prefetchable)

Region 2: I/O ports at f050

Region 3: I/O ports at f040

Region 4: I/O ports at f020

Region 5: Memory at df22b000 (32-bit, non-prefetchable)

Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit-

Address: fee00000 Data: 4073

Capabilities: [70] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [a8] SATA HBA v1.0 BAR4 Offset=00000004

00: 86 80 02 a1 07 04 b0 02 31 01 06 01 00 00 00 00

10: 00 80 22 df 00 c0 22 df 51 f0 00 00 41 f0 00 00

20: 21 f0 00 00 00 b0 22 df 00 00 00 00 49 18 02 a1

30: 00 00 00 00 80 00 00 00 00 00 00 00 10 01 00 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 01 a8 03 40 08 00 00 00 00 00 00 00 00 00 00 00

80: 05 70 01 00 00 00 e0 fe 73 40 00 00 00 00 00 00

90: 00 00 fe 00 01 00 01 00 00 00 00 00 30 00 00 80

a0: 3c 00 00 00 00 00 00 00 12 00 10 00 48 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 11 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00

00:1c.0 PCI bridge [0604]: Intel Corporation Sunrise Point-H PCI Express Root Port #1 [8086:a110] (rev f1) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Bus: primary=00, secondary=02, subordinate=02, sec-latency=0

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v2) Root Port (Slot-), MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 256 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #1, Speed 8GT/s, Width x1, ASPM unknown, Latency L0 unlimited, L1 <16us

ClockPM- Surprise- LLActRep+ BwNot+

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train+ SlotClk+ DLActive- BWMgmt- ABWMgmt-

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Range ABC, TimeoutDis+ ARIFwd+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: ASRock Incorporation Device [1849:a110]

Capabilities: [a0] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00: 86 80 10 a1 07 00 10 00 f1 00 04 06 00 00 81 00

10: 00 00 00 00 00 00 00 00 00 02 02 00 f0 00 00 20

20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00

30: 00 00 00 00 40 00 00 00 00 00 00 00 10 01 12 00

40: 10 80 42 00 01 80 00 00 20 00 10 00 13 70 72 01

50: 00 00 01 18 00 b2 24 00 00 00 40 00 00 00 00 00

60: 00 00 00 00 37 08 00 00 00 04 00 00 0e 00 00 00

70: 01 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 05 90 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 0d a0 00 00 49 18 10 a1 00 00 00 00 00 00 00 00

a0: 01 00 03 c8 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 11 10 00 07 42 18 00 00 08 00 1e 0b 00 00 00 00

e0: 00 b7 d1 00 00 00 00 00 06 80 12 00 00 00 00 00

f0: 50 01 00 00 00 03 00 40 b3 0f 33 08 00 00 00 01

00:1d.0 PCI bridge [0604]: Intel Corporation Sunrise Point-H PCI Express Root Port #9 [8086:a118] (rev f1) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Bus: primary=00, secondary=03, subordinate=03, sec-latency=0

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v2) Root Port (Slot-), MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 256 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #9, Speed 8GT/s, Width x1, ASPM unknown, Latency L0 unlimited, L1 <16us

ClockPM- Surprise- LLActRep+ BwNot+

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train+ SlotClk+ DLActive- BWMgmt- ABWMgmt-

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Range ABC, TimeoutDis+ ARIFwd+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: ASRock Incorporation Device [1849:a118]

Capabilities: [a0] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00: 86 80 18 a1 07 00 10 00 f1 00 04 06 00 00 81 00

10: 00 00 00 00 00 00 00 00 00 03 03 00 f0 00 00 20

20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00

30: 00 00 00 00 40 00 00 00 00 00 00 00 10 01 12 00

40: 10 80 42 00 01 80 00 00 20 00 10 00 13 70 72 09

50: 00 00 01 18 00 b2 64 00 00 00 40 00 00 00 00 00

60: 00 00 00 00 37 08 00 00 00 04 00 00 0e 00 00 00

70: 01 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 05 90 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 0d a0 00 00 49 18 18 a1 00 00 00 00 00 00 00 00

a0: 01 00 03 c8 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 11 10 00 07 42 18 00 00 08 00 1e 0b 00 00 00 00

e0: 00 b7 d1 00 00 00 00 00 06 80 12 00 00 00 00 00

f0: 50 01 00 00 00 03 00 40 b3 0f 33 08 00 00 00 01

00:1d.3 PCI bridge [0604]: Intel Corporation Sunrise Point-H PCI Express Root Port #12 [8086:a11b] (rev f1) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Bus: primary=00, secondary=04, subordinate=04, sec-latency=0

I/O behind bridge: 0000d000-0000dfff

Memory behind bridge: df100000-df1fffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #12, Speed 8GT/s, Width x1, ASPM unknown, Latency L0 <1us, L1 <16us

ClockPM- Surprise- LLActRep+ BwNot+

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-

Slot #15, PowerLimit 10.000W; Interlock- NoCompl+

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet- LinkState+

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Range ABC, TimeoutDis+ ARIFwd+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: ASRock Incorporation Device [1849:a11b]

Capabilities: [a0] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00: 86 80 1b a1 07 00 10 00 f1 00 04 06 00 00 81 00

10: 00 00 00 00 00 00 00 00 00 04 04 00 d0 d0 00 20

20: 10 df 10 df f1 ff 01 00 00 00 00 00 00 00 00 00

30: 00 00 00 00 40 00 00 00 00 00 00 00 13 04 12 00

40: 10 80 42 01 01 80 00 00 00 00 10 00 13 40 72 0c

50: 40 00 11 70 00 b2 7c 00 00 00 40 01 00 00 00 00

60: 00 00 00 00 37 08 00 00 00 04 00 00 0e 00 00 00

70: 03 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 05 90 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 0d a0 00 00 49 18 1b a1 00 00 00 00 00 00 00 00

a0: 01 00 03 c8 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 01 10 00 07 42 18 00 00 08 00 1e 0b 00 00 00 00

e0: 00 03 e3 00 00 00 00 00 06 00 10 00 00 00 00 00

f0: 50 00 00 00 00 00 00 4c b3 0f 33 08 00 00 00 04

00:1f.0 ISA bridge [0601]: Intel Corporation Sunrise Point-H LPC Controller [8086:a145] (rev 31)

Subsystem: ASRock Incorporation Device [1849:a145]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

00: 86 80 45 a1 07 00 00 02 31 00 01 06 00 00 80 00

10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 45 a1

30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 d0 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 70 00 0f 3f 81 02 3c 00 81 00 0c 00 00 00 00 00

90: 00 00 00 00 00 0f 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 33 22 11 00 67 45 00 00 00 00 00 00 80 00 00 00

e0: c1 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00

00:1f.2 Memory controller [0580]: Intel Corporation Sunrise Point-H PMC [8086:a121] (rev 31)

Subsystem: ASRock Incorporation Device [1849:a121]

Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Region 0: Memory at df224000 (32-bit, non-prefetchable) [disabled]

00: 86 80 21 a1 00 00 00 00 31 00 80 05 00 00 80 00

10: 00 40 22 df 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 21 a1

30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

40: 01 18 00 00 80 01 00 00 00 00 00 fe 00 00 00 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: f8 36 a0 98 49 38 06 00 00 46 00 00 00 00 00 80

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00

00:1f.3 Audio device [0403]: Intel Corporation Sunrise Point-H HD Audio [8086:a170] (rev 31)

Subsystem: ASRock Incorporation Device [1849:5892]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 64

Interrupt: pin A routed to IRQ 16

Region 0: Memory at 7f92020000 (64-bit, non-prefetchable)

Region 4: Memory at 7f92000000 (64-bit, non-prefetchable)

Capabilities: [50] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0-,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [60] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4076

00: 86 80 70 a1 06 04 10 00 31 00 03 04 00 40 00 00

10: 04 00 02 92 7f 00 00 00 00 00 00 00 00 00 00 00

20: 04 00 00 92 7f 00 00 00 00 00 00 00 49 18 92 58

30: 00 00 00 00 50 00 00 00 00 00 00 00 10 01 00 00

40: 00 00 00 00 1b 00 00 00 00 00 00 00 00 00 00 00

50: 01 60 43 c0 08 00 00 00 00 00 00 00 00 00 00 00

60: 05 00 81 00 00 00 e0 fe 00 00 00 00 76 40 00 00

70: 10 00 91 00 00 00 00 10 00 28 10 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 08 06 02 01 00 70 00 84 00 0c a5 82 10 00 01 00

d0: 00 0c b5 02 10 00 01 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00

00:1f.4 SMBus [0c05]: Intel Corporation Sunrise Point-H SMBus [8086:a123] (rev 31)

Subsystem: ASRock Incorporation Device [1849:a123]

Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Interrupt: pin A routed to IRQ 16

Region 0: Memory at 7f92026000 (64-bit, non-prefetchable)

Region 4: I/O ports at f000

00: 86 80 23 a1 03 00 80 02 31 00 05 0c 00 00 00 00

10: 04 60 02 92 7f 00 00 00 00 00 00 00 00 00 00 00

20: 01 f0 00 00 00 00 00 00 00 00 00 00 49 18 23 a1

30: 00 00 00 00 00 00 00 00 00 00 00 00 10 01 00 00

40: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 01 04 00 00 00 01 00 00 00 00 00 00 00 00 00 00

60: 04 05 05 00 00 00 06 0f 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 24 00 04 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00

01:00.0 VGA compatible controller [0300]: NVIDIA Corporation GM206 [GeForce GTX 950] [10de:1402] (rev a1) (prog-if 00 [VGA controller])

Subsystem: ZOTAC International (MCO) Ltd. Device [19da:1376]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at de000000 (32-bit, non-prefetchable)

Region 1: Memory at 7f80000000 (64-bit, prefetchable)

Region 3: Memory at 7f90000000 (64-bit, prefetchable)

Region 5: I/O ports at e000

Capabilities: [60] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [68] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4074

Capabilities: [78] Express (v2) Legacy Endpoint, MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s unlimited, L1 <64us

ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+

MaxPayload 256 bytes, MaxReadReq 512 bytes

DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-

LnkCap: Port #0, Speed 8GT/s, Width x16, ASPM unknown, Latency L0 <1us, L1 <4us

ClockPM+ Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 8GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

DevCap2: Completion Timeout: Range AB, TimeoutDis+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-

LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete+, EqualizationPhase1+

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

00: de 10 02 14 07 04 10 00 a1 00 00 03 00 00 80 00

10: 00 00 00 de 0c 00 00 80 7f 00 00 00 0c 00 00 90

20: 7f 00 00 00 01 e0 00 00 00 00 00 00 da 19 76 13

30: 00 00 00 00 60 00 00 00 00 00 00 00 10 01 00 00

40: da 19 76 13 00 00 00 00 00 00 00 00 00 00 00 00

50: 01 00 00 00 00 00 00 00 ce d6 23 00 00 00 00 00

60: 01 68 03 00 08 00 00 00 05 78 81 00 00 00 e0 fe

70: 00 00 00 00 74 40 00 00 10 00 12 00 e1 8d 2c 01

80: 30 29 09 00 03 41 45 00 40 01 03 11 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 13 00 04 00

a0: 00 00 00 00 0e 00 00 00 03 00 07 00 00 00 00 00

b0: 00 00 00 00 09 00 14 01 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

01:00.1 Audio device [0403]: NVIDIA Corporation Device [10de:0fba] (rev a1)

Subsystem: ZOTAC International (MCO) Ltd. Device [19da:1376]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin B routed to IRQ 17

Region 0: Memory at df080000 (32-bit, non-prefetchable)

Capabilities: [60] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [68] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4075

Capabilities: [78] Express (v2) Endpoint, MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s unlimited, L1 <64us

ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+

MaxPayload 256 bytes, MaxReadReq 512 bytes

DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-

LnkCap: Port #0, Speed 8GT/s, Width x16, ASPM unknown, Latency L0 <1us, L1 <4us

ClockPM+ Surprise- LLActRep- BwNot-

LnkCtl: ASPM L0s L1 Enabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 8GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

DevCap2: Completion Timeout: Range AB, TimeoutDis+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-

LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

00: de 10 ba 0f 06 04 10 00 a1 00 03 04 00 00 80 00

10: 00 00 08 df 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 da 19 76 13

30: 00 00 00 00 60 00 00 00 00 00 00 00 11 02 00 00

40: da 19 76 13 00 00 00 00 00 00 00 00 00 00 00 00

50: 00 00 00 00 00 00 00 00 ce d6 23 00 00 00 00 00

60: 01 68 03 00 08 00 00 00 05 78 81 00 00 00 e0 fe

70: 00 00 00 00 75 40 00 00 10 00 02 00 e1 8d 2c 01

80: 30 29 09 00 03 41 45 00 03 01 03 11 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 13 00 04 00

a0: 00 00 00 00 0e 00 00 00 00 00 01 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

04:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller [10ec:8168] (rev 15)

Subsystem: ASRock Incorporation Motherboard (one of many) [1849:8168]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 19

Region 0: I/O ports at d000 [disabled]

Region 2: Memory at df104000 (64-bit, non-prefetchable)

Region 4: Memory at df100000 (64-bit, non-prefetchable)

Capabilities: [40] Power Management version 3

Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [50] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4077

Capabilities: [70] Express (v2) Endpoint, MSI 01

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us

ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 512 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 unlimited, L1 <64us

ClockPM+ Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

DevCap2: Completion Timeout: Range ABCD, TimeoutDis+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-

LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [b0] MSI-X: Enable- Count=4 Masked-

Vector table: BAR=4 offset=00000000

PBA: BAR=4 offset=00000800

00: ec 10 68 81 06 04 10 00 15 00 00 02 00 00 00 00

10: 01 d0 00 00 00 00 00 00 04 40 10 df 00 00 00 00

20: 04 00 10 df 00 00 00 00 00 00 00 00 49 18 68 81

30: 00 00 00 00 40 00 00 00 00 00 00 00 13 01 00 00

40: 01 50 c3 ff 08 00 00 00 00 00 00 00 00 00 00 00

50: 05 70 81 00 00 00 e0 fe 00 00 00 00 77 40 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 10 b0 02 02 c0 8c 90 05 10 20 10 00 11 7c 47 00

80: 40 00 11 10 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 1f 08 0c 00 00 04 00 00 02 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 11 00 03 00 04 00 00 00 04 08 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

Map view. Dumped using pciutils v3.2.0 by Martin Mares. OS X port by THe KiNG. This version compiled by xsmile.

View File lspci map (M).txt

00:00.0 Host bridge: Intel Corporation Skylake Host Bridge/DRAM Registers (rev 07)

00:01.0 PCI bridge: Intel Corporation Skylake PCIe Controller (x16) (rev 07)

## 00.01:0 is a bridge from 00 to 01-01

00:14.0 USB controller: Intel Corporation Sunrise Point-H USB 3.0 xHCI Controller (rev 31)

00:14.2 Signal processing controller: Intel Corporation Sunrise Point-H Thermal subsystem (rev 31)

00:16.0 Communication controller: Intel Corporation Sunrise Point-H CSME HECI #1 (rev 31)

00:17.0 SATA controller: Intel Corporation Sunrise Point-H SATA controller [AHCI mode] (rev 31)

00:1c.0 PCI bridge: Intel Corporation Sunrise Point-H PCI Express Root Port #1 (rev f1)

## 00.1c:0 is a bridge from 00 to 02-02

00:1d.0 PCI bridge: Intel Corporation Sunrise Point-H PCI Express Root Port #9 (rev f1)

## 00.1d:0 is a bridge from 00 to 03-03

00:1d.3 PCI bridge: Intel Corporation Sunrise Point-H PCI Express Root Port #12 (rev f1)

## 00.1d:3 is a bridge from 00 to 04-04

00:1f.0 ISA bridge: Intel Corporation Sunrise Point-H LPC Controller (rev 31)

00:1f.2 Memory controller: Intel Corporation Sunrise Point-H PMC (rev 31)

00:1f.3 Audio device: Intel Corporation Sunrise Point-H HD Audio (rev 31)

00:1f.4 SMBus: Intel Corporation Sunrise Point-H SMBus (rev 31)

01:00.0 VGA compatible controller: NVIDIA Corporation GM206 [GeForce GTX 950] (rev a1)

01:00.1 Audio device: NVIDIA Corporation Device 0fba (rev a1)

04:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller (rev 15)

Summary of buses:

00: Primary host bus

1d.3 Bridge to 04-04

1d.0 Bridge to 03-03

1c.0 Bridge to 02-02

01.0 Bridge to 01-01

01: Entered via 00:01.0

04: Entered via 00:1d.3

Tree view. Dumped using pciutils v3.2.0 by Martin Mares. OS X port by THe KiNG. This version compiled by xsmile.

View File lspci tree (nnvvt).txt

-[0000:00]-+-00.0 Intel Corporation Skylake Host Bridge/DRAM Registers [8086:190f]

+-01.0-[01]--+-00.0 NVIDIA Corporation GM206 [GeForce GTX 950] [10de:1402]

| \-00.1 NVIDIA Corporation Device [10de:0fba]

+-14.0 Intel Corporation Sunrise Point-H USB 3.0 xHCI Controller [8086:a12f]

+-14.2 Intel Corporation Sunrise Point-H Thermal subsystem [8086:a131]

+-16.0 Intel Corporation Sunrise Point-H CSME HECI #1 [8086:a13a]

+-17.0 Intel Corporation Sunrise Point-H SATA controller [AHCI mode] [8086:a102]

+-1c.0-[02]--

+-1d.0-[03]--

+-1d.3-[04]----00.0 Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller [10ec:8168]

+-1f.0 Intel Corporation Sunrise Point-H LPC Controller [8086:a145]

+-1f.2 Intel Corporation Sunrise Point-H PMC [8086:a121]

+-1f.3 Intel Corporation Sunrise Point-H HD Audio [8086:a170]

\-1f.4 Intel Corporation Sunrise Point-H SMBus [8086:a123]

NVRAM

nvram.plist
nvram_hexdump
uefi_firmware_vars

Dumped using nvram -x -p

View File nvram.plist

<?xml version="1.0" encoding="UTF-8"?>

<!DOCTYPE plist PUBLIC "-//Apple//DTD PLIST 1.0//EN" "http://www.apple.com/DTDs/PropertyList-1.0.dtd">

<dict>

<key>SystemAudioVolume</key>

<data>

MA==

</data>

<key>SystemAudioVolumeDB</key>

<data>

8A==

</data>

<key>aapl,panic-info</key>

<data>

8LA7PUaN4XWQDDQOs9llOQiGN5vNZrMZB4vNxDnyzUZL6UDscN09RpNBZXyaXiaDUPP0

2R1mg3AsUBmfpoPm9DC9PgfBQCmFol5Pk0Fpt/mtU4Bg+JvZbLbhbjYcDAZL1OtpMqgH

4uXIsJqZbKa1bLVxuTUT12YtnI1Ma4XF5Vi4JjbPauaZTwGC4WMw201Mg8FgiXo9TQb1

QDxzDkaLjcu0lmxMHrdmNZi5hQvTbC1bGEeeycK1WFgm9ikUVLS8HCaDZqCxPDxHl8kK

hTSI1YFgeLPZbDabzeayrRbOjWEwFkgqxOpAMDwMBoPdYDAYDAbDwcI0GAskHWJ1IBge

BoPBYDAYbCbOhcdhGIwFkhKxOhAMD4PBYDAYDGY2m81ms9mskE6hOhAMD4PBYDcYDAaD

wXCwXBjGAkmFUB0IhofBYLAbDAaDwWA4WC4MY4Gk06QOBMPDYDDYzWw2m81lGAxWg7FA

UmJSB4LhYTAY7AaDwWAwGA4WpsEUUpwOBILhYTAYDAaDwWq2ssw8g41ZIGlOBwLB8DAY

DAaDwWBms9lsNpvHLJA0BtOBYHgYDAa7mXE4WOwGM8fEMBZIGovpQDC82Ww2m81ms9l8

m+HIOZxCGpPpQDA8DAaD3WAwGAwGw8HCNBgLJI3NdCAYHgaDwW5ms9lsLsNgsBqMBZLG

aDoQDA+DwWAwGAwGg8FgsNgsxwJJYzUdCIaHwWAwGAwWg9lu5RzZTFZIjUwdCIaHwWAw

GAwGg8FgMVgYdmOBpEmoDgTDw2Aw2M1sNuNyMrOtVpuxQMOpDgSC4WEwGAwGg8FgMBgM

BpOJWaDpVAcCwfAwGAwGg8FgMBgMBoPJZgoFFS0vh8kgmA4Ew5vNZrPZjIPRaDTZWGyD

KRIwPAwGg93MZnMORsvFyLCYIgHDw2AwGAwGg8FgMBgMBoMpFFS0vBwmg2I6EAxvNpvN

ZjMORqPRaDkZDaZIwPAwGAwGg8FiMNttHL6ZY4oEDA+DwWA3s9mcg9Fw49nMrEjA8DAY

DHYzm805GC0HM9vMigQMD4PBYDez2ZyD0XI320ysSMDwMBgMdjObzTkYDTeezcyKBAwP

g8FgN7PZnIPRcrDY2KxIwPAwGAx2M5vNORgNZw7PaIoEDA+DwWA3s9mMG4vNNxvOrEjA

8DAYDHYzm824sdhcm9lqigQMD4PBYDAYDAaDwWAwGAymUFDR8nKYDJLpQDC82Ww2m804

GI1Go+VsZJgiAcPDYDDYzWw252C0MOwmtikSMDwMBoPBYDAYDAaDwWAwmEJBRcvLYTJo

pgPB8Gaz2Ww242A0m4w2zslgigQMD4PBYDAYDAaDwWAwGAymSMDwMBgMBoPBYDAYDAaD

wWAKBRUtL4fJIJoOBMObzWaz2YyD0WwyGs5GhikSMDwMBoPdzGZzLmcjz2BhsyIBw8Ng

MNjNbDbncjbybBY2KxIwPAwGg8FgsBjMdiOXazGzIgHDw2Aw2M1sNudgtDBtJqMpEjA8

DAaD3cxmcw5Gw41nM7MiAcPDYDDYzWw252C0HMxsMysSMDwMBoPdzGZzDkbL3WwzsSIB

w8NgMNjNbDbnYDSceYy7KRIwPAwGg93MZnMORsOZwzOaIgHDw2Aw2M1sNuPGYvPNhjMr

EjA8DAaD3cxmM24sNtdmtpoiAcPDYDAYDAaDwWAwGAwGgykUzfAY9JyC7GX5PP1260Cx

GlEWUyzLcneZDbKX5fP0260DEcPye9oNWpbl7jIbZC3L5+m3GxSruWYumA5ERddBxPIY

FIOBYjgdDaar4UDQKRUkg8VqO5D8/abr8O56ayaj4VwzmIvmj72kRWYxOC1+sTjb10ZT

LMtyd5kNqlaTRB2IWBwOc0aYrCW7EW+tWcwIa+VquVwrmCsaZbjbLAeTDRXT/JxeboPa

b3KZDXKH22UdqBkeQ+XvGSsGQjXD45aRJhvicENcSgEAAAA=

</data>

<key>bootercfg</key>

<data>

KAA=

</data>

<key>csr-active-config</key>

<data>

AwAAAA==

</data>

<key>fmm-computer-name</key>

<data>

ZGltYeKAmXMgaU1hYyAoMik=

</data>

<key>security-mode</key>

</dict>

</plist>

Dumped with nvram -hp using an amended version of Apple's nvram tool.

View File nvram_hexdump.txt

------------------------------------------------------------------------------

csr-active-config

------------------------------------------------------------------------------

000000: 03 00 00 00 |....|

------------------------------------------------------------------------------

bootercfg

------------------------------------------------------------------------------

000000: 28 00 |(.|

------------------------------------------------------------------------------

SystemAudioVolumeDB

------------------------------------------------------------------------------

000000: f0 |.|

------------------------------------------------------------------------------

aapl,panic-info

------------------------------------------------------------------------------

000000: f0 b0 3b 3d 46 8d e1 75 90 0c 34 0e b3 d9 65 39 |..;=F..u..4...e9|

000010: 08 86 37 9b cd 66 b3 19 07 8b cd c4 39 f2 cd 46 |..7..f......9..F|

000020: 4b e9 40 ec 70 dd 3d 46 93 41 65 7c 9a 5e 26 83 |K.@.p.=F.Ae|.^&.|

000030: 50 f3 f4 d9 1d 66 83 70 2c 50 19 9f a6 83 e6 f4 |P....f.p,P......|

000040: 30 bd 3e 07 c1 40 29 85 a2 5e 4f 93 41 69 b7 f9 |0.>..@)..^O.Ai..|

000050: ad 53 80 60 f8 9b d9 6c b6 e1 6e 36 1c 0c 06 4b |.S.`...l..n6...K|

000060: d4 eb 69 32 a8 07 e2 e5 c8 b0 9a 99 6c a6 b5 6c |..i2........l..l|

000070: b5 71 b9 35 13 d7 66 2d 9c 8d 4c 6b 85 c5 e5 58 |.q.5..f-..Lk...X|

000080: b8 26 36 cf 6a e6 99 4f 01 82 e1 63 30 db 4d 4c |.&6.j..O...c0.ML|

000090: 83 c1 60 89 7a 3d 4d 06 f5 40 3c 73 0e 46 8b 8d |..`.z=M..@<s.F..|

0000a0: cb b4 96 6c 4c 1e b7 66 35 98 b9 85 0b d3 6c 2d |...lL..f5.....l-|

0000b0: 5b 18 47 9e c9 c2 b5 58 58 26 f6 29 14 54 b4 bc |[.G....XX&.).T..|

0000c0: 1c 26 83 66 a0 b1 3c 3c 47 97 c9 0a 85 34 88 d5 |.&.f..<<G....4..|

0000d0: 81 60 78 b3 d9 6c 36 9b cd e6 b2 ad 16 ce 8d 61 |.`x..l6........a|

0000e0: 30 16 48 2a c4 ea 40 30 3c 0c 06 83 dd 60 30 18 |0.H*..@0<....`0.|

0000f0: 0c 06 c3 c1 c2 34 18 0b 24 1d 62 75 20 18 1e 06 |.....4..$.bu ...|

000100: 83 c1 60 30 18 6c 26 ce 85 c7 61 18 8c 05 92 12 |..`0.l&...a.....|

000110: b1 3a 10 0c 0f 83 c1 60 30 18 0c 66 36 9b cd 66 |.:.....`0..f6..f|

000120: b3 d9 ac 90 4e a1 3a 10 0c 0f 83 c1 60 37 18 0c |....N.:.....`7..|

000130: 06 83 c1 70 b0 5c 18 c6 02 49 85 50 1d 08 86 87 |...p.\...I.P....|

000140: c1 60 b0 1b 0c 06 83 c1 60 38 58 2e 0c 63 81 a4 |.`......`8X..c..|

000150: d3 a4 0e 04 c3 c3 60 30 d8 cd 6c 36 9b cd 65 18 |......`0..l6..e.|

000160: 0c 56 83 b1 40 52 62 52 07 82 e1 61 30 18 ec 06 |.V..@RbR...a0...|

000170: 83 c1 60 30 18 0e 16 a6 c1 14 52 9c 0e 04 82 e1 |..`0......R.....|

000180: 61 30 18 0c 06 83 c1 6a b6 b2 cc 3c 83 8d 59 20 |a0.....j...<..Y |

000190: 69 4e 07 02 c1 f0 30 18 0c 06 83 c1 60 66 b3 d9 |iN....0.....`f..|

0001a0: 6c 36 9b c7 2c 90 34 06 d3 81 60 78 18 0c 06 bb |l6..,.4...`x....|

0001b0: 99 71 38 58 ec 06 33 c7 c4 30 16 48 1a 8b e9 40 |.q8X..3..0.H...@|

0001c0: 30 bc d9 6c 36 9b cd 66 b3 d9 7c 9b e1 c8 39 9c |0..l6..f..|...9.|

0001d0: 42 1a 93 e9 40 30 3c 0c 06 83 dd 60 30 18 0c 06 |B...@0<....`0...|

0001e0: c3 c1 c2 34 18 0b 24 8d cd 74 20 18 1e 06 83 c1 |...4..$..t .....|

0001f0: 6e 66 b3 d9 6c 2e c3 60 b0 1a 8c 05 92 c6 68 3a |nf..l..`......h:|

000200: 10 0c 0f 83 c1 60 30 18 0c 06 83 c1 60 b0 d8 2c |.....`0.....`..,|

000210: c7 02 49 63 35 1d 08 86 87 c1 60 30 18 0c 16 83 |..Ic5.....`0....|

000220: d9 6e e5 1c d9 4c 56 48 8d 4c 1d 08 86 87 c1 60 |.n...LVH.L.....`|

000230: 30 18 0c 06 83 c1 60 31 58 18 76 63 81 a4 49 a8 |0.....`1X.vc..I.|

000240: 0e 04 c3 c3 60 30 d8 cd 6c 36 e3 72 32 b3 ad 56 |....`0..l6.r2..V|

000250: 9b b1 40 c3 a9 0e 04 82 e1 61 30 18 0c 06 83 c1 |..@......a0.....|

000260: 60 30 18 0c 06 93 89 59 a0 e9 54 07 02 c1 f0 30 |`0.....Y..T....0|

000270: 18 0c 06 83 c1 60 30 18 0c 06 83 c9 66 0a 05 15 |.....`0.....f...|

000280: 2d 2f 87 c9 20 98 0e 04 c3 9b cd 66 b3 d9 8c 83 |-/.. ......f....|

000290: d1 68 34 d9 58 6c 83 29 12 30 3c 0c 06 83 dd cc |.h4.Xl.).0<.....|

0002a0: 66 73 0e 46 cb c5 c8 b0 98 22 01 c3 c3 60 30 18 |fs.F....."...`0.|

0002b0: 0c 06 83 c1 60 30 18 0c 06 83 29 14 54 b4 bc 1c |....`0....).T...|

0002c0: 26 83 62 3a 10 0c 6f 36 9b cd 66 33 0e 46 a3 d1 |&.b:..o6..f3.F..|

0002d0: 68 39 19 0d a6 48 c0 f0 30 18 0c 06 83 c1 62 30 |h9...H..0.....b0|

0002e0: db 6d 1c be 99 63 8a 04 0c 0f 83 c1 60 37 b3 d9 |.m...c......`7..|

0002f0: 9c 83 d1 70 e3 d9 cc ac 48 c0 f0 30 18 0c 76 33 |...p....H..0..v3|

000300: 9b cd 39 18 2d 07 33 db cc 8a 04 0c 0f 83 c1 60 |..9.-.3........`|

000310: 37 b3 d9 9c 83 d1 72 37 db 4c ac 48 c0 f0 30 18 |7.....r7.L.H..0.|

000320: 0c 76 33 9b cd 39 18 0d 37 9e cd cc 8a 04 0c 0f |.v3..9..7.......|

000330: 83 c1 60 37 b3 d9 9c 83 d1 72 b0 d8 d8 ac 48 c0 |..`7.....r....H.|

000340: f0 30 18 0c 76 33 9b cd 39 18 0d 67 0e cf 68 8a |.0..v3..9..g..h.|

000350: 04 0c 0f 83 c1 60 37 b3 d9 8c 1b 8b cd 37 1b ce |.....`7......7..|

000360: ac 48 c0 f0 30 18 0c 76 33 9b cd b8 b1 d8 5c 9b |.H..0..v3.....\.|

000370: d9 6a 8a 04 0c 0f 83 c1 60 30 18 0c 06 83 c1 60 |.j......`0.....`|

000380: 30 18 0c a6 50 50 d1 f2 72 98 0c 92 e9 40 30 bc |0...PP..r....@0.|

000390: d9 6c 36 9b cd 38 18 8d 46 a3 e5 6c 64 98 22 01 |.l6..8..F..ld.".|

0003a0: c3 c3 60 30 d8 cd 6c 36 e7 60 b4 30 ec 26 b6 29 |..`0..l6.`.0.&.)|

0003b0: 12 30 3c 0c 06 83 c1 60 30 18 0c 06 83 c1 60 30 |.0<....`0.....`0|

0003c0: 98 42 41 45 cb cb 61 32 68 a6 03 c1 f0 66 b3 d9 |.BAE..a2h....f..|

0003d0: 6c 36 e3 60 34 9b 8c 36 ce c9 60 8a 04 0c 0f 83 |l6.`4..6..`.....|

0003e0: c1 60 30 18 0c 06 83 c1 60 30 18 0c a6 48 c0 f0 |.`0.....`0...H..|

0003f0: 30 18 0c 06 83 c1 60 30 18 0c 06 83 c1 60 0a 05 |0.....`0.....`..|

000400: 15 2d 2f 87 c9 20 9a 0e 04 c3 9b cd 66 b3 d9 8c |.-/.. ......f...|

000410: 83 d1 6c 32 1a ce 46 86 29 12 30 3c 0c 06 83 dd |..l2..F.).0<....|

000420: cc 66 73 2e 67 23 cf 60 61 b3 22 01 c3 c3 60 30 |.fs.g#.`a."...`0|

000430: d8 cd 6c 36 e7 72 36 f2 6c 16 36 2b 12 30 3c 0c |..l6.r6.l.6+.0<.|

000440: 06 83 c1 60 b0 18 cc 76 23 97 6b 31 b3 22 01 c3 |...`...v#.k1."..|

000450: c3 60 30 d8 cd 6c 36 e7 60 b4 30 6d 26 a3 29 12 |.`0..l6.`.0m&.).|

000460: 30 3c 0c 06 83 dd cc 66 73 0e 46 c3 8d 67 33 b3 |0<.....fs.F..g3.|

000470: 22 01 c3 c3 60 30 d8 cd 6c 36 e7 60 b4 1c cc 6c |"...`0..l6.`...l|

000480: 33 2b 12 30 3c 0c 06 83 dd cc 66 73 0e 46 cb dd |3+.0<.....fs.F..|

000490: 6c 33 b1 22 01 c3 c3 60 30 d8 cd 6c 36 e7 60 34 |l3."...`0..l6.`4|

0004a0: 9c 79 8c bb 29 12 30 3c 0c 06 83 dd cc 66 73 0e |.y..).0<.....fs.|

0004b0: 46 c3 99 c3 33 9a 22 01 c3 c3 60 30 d8 cd 6c 36 |F...3."...`0..l6|

0004c0: e3 c6 62 f3 cd 86 33 2b 12 30 3c 0c 06 83 dd cc |..b...3+.0<.....|

0004d0: 66 33 6e 2c 36 d7 66 b6 9a 22 01 c3 c3 60 30 18 |f3n,6.f.."...`0.|

0004e0: 0c 06 83 c1 60 30 18 0c 06 83 29 14 cd f0 18 f4 |....`0....).....|

0004f0: 9c 82 ec 65 f9 3c fd 76 eb 40 b1 1a 51 16 53 2c |...e.<.v.@..Q.S,|

000500: cb 72 77 99 0d b2 97 e5 f3 f4 db ad 03 11 c3 f2 |.rw.............|

000510: 7b da 0d 5a 96 e5 ee 32 1b 64 2d cb e7 e9 b7 1b |{..Z...2.d-.....|

000520: 14 ab b9 66 2e 98 0e 44 45 d7 41 c4 f2 18 14 83 |...f...DE.A.....|

000530: 81 62 38 1d 0d a6 ab e1 40 d0 29 15 24 83 c5 6a |.b8.....@.).$..j|

000540: 3b 90 fc fd a6 eb f0 ee 7a 6b 26 a3 e1 5c 33 98 |;.......zk&..\3.|

000550: 8b e6 8f bd a4 45 66 31 38 2d 7e b1 38 db d7 46 |.....Ef18-~.8..F|

000560: 53 2c cb 72 77 99 0d aa 56 93 44 1d 88 58 1c 0e |S,.rw...V.D..X..|

000570: 73 46 98 ac 25 bb 11 6f ad 59 cc 08 6b e5 6a b9 |sF..%..o.Y..k.j.|

000580: 5c 2b 98 2b 1a 65 b8 db 2c 07 93 0d 15 d3 fc 9c |\+.+.e..,.......|

000590: 5e 6e 83 da 6f 72 99 0d 72 87 db 65 1d a8 19 1e |^n..or..r..e....|

0005a0: 43 e5 ef 19 2b 06 42 35 c3 e3 96 91 26 1b e2 70 |C...+.B5....&..p|

0005b0: 43 5c 4a 01 00 00 00 |C\J....|

------------------------------------------------------------------------------

SystemAudioVolume

------------------------------------------------------------------------------

000000: 30 |0|

------------------------------------------------------------------------------

fmm-computer-name

------------------------------------------------------------------------------

000000: 64 69 6d 61 e2 80 99 73 20 69 4d 61 63 20 28 32 |dima...s iMac (2|

000010: 29 |)|

------------------------------------------------------------------------------

boot-args

------------------------------------------------------------------------------

security-mode

------------------------------------------------------------------------------

Dumped with nvram -ha using an amended version of Apple's nvram tool.

View File uefi_firmware_vars.txt

------------------------------------------------------------------------------

1B838190-4625-4EAD-ABC9-CD5E6AF18FE0:HiiDB

------------------------------------------------------------------------------

000000: bf 6d 0d 00 18 40 20 87 |.m...@ .|

------------------------------------------------------------------------------

2781600E-9DF9-4EF8-A5A4-66501AE55C41:ASR_TIMERSMI

------------------------------------------------------------------------------

000000: 01 |.|

------------------------------------------------------------------------------

4BAFC2B4-02DC-4104-B236-D6F1B98D9E84:S3SS

------------------------------------------------------------------------------

000000: 00 40 9e 87 00 00 00 00 |.@......|

------------------------------------------------------------------------------

4D1EDE05-38C7-4A6A-9CC6-4BCCA8B38C14:FirmwareFeatures

------------------------------------------------------------------------------

000000: 37 f5 01 e0 |7...|

------------------------------------------------------------------------------

4D1EDE05-38C7-4A6A-9CC6-4BCCA8B38C14:FirmwareFeaturesMask

------------------------------------------------------------------------------

000000: ff ff 03 c0 |....|

------------------------------------------------------------------------------

4D1EDE05-38C7-4A6A-9CC6-4BCCA8B38C14:MLB

------------------------------------------------------------------------------

000000: 43 30 32 31 34 30 33 30 32 44 35 44 4d 54 33 31 |C02140302D5DMT31|

000010: 4d |M|

------------------------------------------------------------------------------

4D1EDE05-38C7-4A6A-9CC6-4BCCA8B38C14:ROM

------------------------------------------------------------------------------

000000: 00 07 00 08 00 09 |......|

------------------------------------------------------------------------------

8BE4DF61-93CA-11D2-AA0D-00E098032B8C:BootCurrent

------------------------------------------------------------------------------

000000: 01 00 |..|

------------------------------------------------------------------------------

8BE4DF61-93CA-11D2-AA0D-00E098032B8C:BootOptionSupport

------------------------------------------------------------------------------

000000: 01 00 00 00 |....|

------------------------------------------------------------------------------

8BE4DF61-93CA-11D2-AA0D-00E098032B8C:BootOrder

------------------------------------------------------------------------------

000000: 01 00 02 00 |....|

------------------------------------------------------------------------------

8BE4DF61-93CA-11D2-AA0D-00E098032B8C:ConIn

------------------------------------------------------------------------------

000000: 02 01 0c 00 d0 41 03 0a 00 00 00 00 01 01 06 00 |.....A..........|

000010: 00 14 03 05 06 00 02 00 7f 01 04 00 02 01 0c 00 |................|

000020: d0 41 03 0a 00 00 00 00 01 01 06 00 00 14 03 05 |.A..............|

000030: 06 00 02 01 7f 01 04 00 02 01 0c 00 d0 41 03 0a |.............A..|

000040: 00 00 00 00 01 01 06 00 00 14 03 05 06 00 03 00 |................|

000050: 7f ff 04 00 |....|

------------------------------------------------------------------------------

8BE4DF61-93CA-11D2-AA0D-00E098032B8C:ConInDev

------------------------------------------------------------------------------

000000: 02 01 0c 00 d0 41 03 0a 00 00 00 00 01 01 06 00 |.....A..........|

000010: 00 14 03 05 06 00 02 00 7f 01 04 00 02 01 0c 00 |................|

000020: d0 41 03 0a 00 00 00 00 01 01 06 00 00 14 03 05 |.A..............|

000030: 06 00 02 01 7f 01 04 00 02 01 0c 00 d0 41 03 0a |.............A..|

000040: 00 00 00 00 01 01 06 00 00 14 03 05 06 00 03 00 |................|

000050: 7f ff 04 00 |....|

------------------------------------------------------------------------------

8BE4DF61-93CA-11D2-AA0D-00E098032B8C:ConOut

------------------------------------------------------------------------------

000000: 02 01 0c 00 d0 41 03 0a 00 00 00 00 01 01 06 00 |.....A..........|

000010: 00 01 01 01 06 00 00 00 02 03 08 00 00 01 01 80 |................|

000020: 7f ff 04 00 |....|

------------------------------------------------------------------------------

8BE4DF61-93CA-11D2-AA0D-00E098032B8C:ConOutDev

------------------------------------------------------------------------------

000000: 02 01 0c 00 d0 41 03 0a 00 00 00 00 01 01 06 00 |.....A..........|

000010: 00 01 01 01 06 00 00 00 02 03 08 00 00 01 01 80 |................|

000020: 7f ff 04 00 |....|

------------------------------------------------------------------------------

8BE4DF61-93CA-11D2-AA0D-00E098032B8C:ErrOut

------------------------------------------------------------------------------

000000: 02 01 0c 00 d0 41 03 0a 00 00 00 00 01 01 06 00 |.....A..........|

000010: 00 01 01 01 06 00 00 00 02 03 08 00 00 01 01 80 |................|

000020: 7f ff 04 00 |....|

------------------------------------------------------------------------------

8BE4DF61-93CA-11D2-AA0D-00E098032B8C:ErrOutDev

------------------------------------------------------------------------------

000000: 02 01 0c 00 d0 41 03 0a 00 00 00 00 01 01 06 00 |.....A..........|

000010: 00 01 01 01 06 00 00 00 02 03 08 00 00 01 01 80 |................|

000020: 7f ff 04 00 |....|

------------------------------------------------------------------------------

8BE4DF61-93CA-11D2-AA0D-00E098032B8C:OsIndicationsSupported

------------------------------------------------------------------------------

000000: 01 00 00 00 00 00 00 00 |........|

------------------------------------------------------------------------------

8BE4DF61-93CA-11D2-AA0D-00E098032B8C:PlatformLangCodes

------------------------------------------------------------------------------

000000: 65 6e 2d 55 53 3b 7a 68 2d 63 68 73 3b 7a 68 2d |en-US;zh-chs;zh-|

000010: 63 68 74 3b 65 73 2d 45 53 3b 64 65 2d 44 45 3b |cht;es-ES;de-DE;|

000020: 72 75 2d 52 55 3b 6b 6f 2d 4b 52 3b 6a 61 2d 4a |ru-RU;ko-KR;ja-J|

000030: 50 00 |P.|

------------------------------------------------------------------------------

8BE4DF61-93CA-11D2-AA0D-00E098032B8C:SecureBoot

------------------------------------------------------------------------------

000000: 00 |.|

------------------------------------------------------------------------------

8BE4DF61-93CA-11D2-AA0D-00E098032B8C:SetupMode

------------------------------------------------------------------------------

000000: 01 |.|

------------------------------------------------------------------------------

8BE4DF61-93CA-11D2-AA0D-00E098032B8C:SignatureSupport

------------------------------------------------------------------------------

000000: 92 a4 d2 3b c0 96 79 40 b4 20 fc f9 8e f1 03 ed |...;..y@. ......|

000010: 6e 87 76 70 c2 80 e6 4e aa d2 28 b3 49 a6 86 5b |n.vp...N..(.I..[|

000020: 63 bf 6d 44 02 25 da 4c bc fa 24 65 d2 b0 fe 9d |c.mD.%.L..$e....|

000030: 26 16 c4 c1 4c 50 92 40 ac a9 41 f9 36 93 43 28 |&...LP.@..A.6.C(|

000040: a1 59 c0 a5 e4 94 a7 4a 87 b5 ab 15 5c 2b f0 72 |.Y.....J....\+.r|

000050: e8 66 57 3c 9c 26 34 4e aa 14 ed 77 6e 85 b3 b6 |.fW<.&4N...wn...|

000060: 90 61 b3 e2 9b 87 3d 4a ad 8d f2 e7 bb a3 27 84 |.a....=J......'.|

000070: 4f 44 f8 67 43 87 f1 48 a3 28 1e aa b8 73 60 80 |OD.gC..H.(...s`.|

------------------------------------------------------------------------------

8BE4DF61-93CA-11D2-AA0D-00E098032B8C:Timeout

------------------------------------------------------------------------------

000000: 01 00 |..|

------------------------------------------------------------------------------

8F132913-6907-4192-A227-6CBCD7A50E6C:StageChk

------------------------------------------------------------------------------

000000: 11 21 11 01 21 11 91 39 50 3e 36 3b 50 3e 01 01 |.!..!..9P>6;P>..|

000010: 91 39 50 3e 36 3b 50 3e 00 00 00 00 00 00 |.9P>6;P>......|

------------------------------------------------------------------------------

9D0DA369-540B-46F8-85A0-2B5F2C301E15:EfiTime

------------------------------------------------------------------------------

000000: ff 07 00 |...|

------------------------------------------------------------------------------

EC87D643-EBA4-4BB5-A1E5-3F3E36B20DA9:ASR_USER_DEF_VER

------------------------------------------------------------------------------

000000: 02 |.|

------------------------------------------------------------------------------

EC87D643-EBA4-4BB5-A1E5-3F3E36B20DA9:GoodNightLed

------------------------------------------------------------------------------

000000: 02 |.|

------------------------------------------------------------------------------

8BE4DF61-93CA-11D2-AA0D-00E098032B8C:Boot0001

------------------------------------------------------------------------------

000000: 01 00 00 00 5e 00 55 00 45 00 46 00 49 00 20 00 |....^.U.E.F.I. .|

000010: 4f 00 53 00 00 00 04 01 2a 00 01 00 00 00 28 00 |O.S.....*.....(.|

000020: 00 00 00 00 00 00 00 40 06 00 00 00 00 00 23 9c |.......@......#.|

000030: 18 f9 a6 8c 47 4a bc 08 02 c0 fd be 35 a3 02 02 |....GJ......5...|

000040: 04 04 30 00 5c 00 45 00 46 00 49 00 5c 00 42 00 |..0.\.E.F.I.\.B.|

000050: 4f 00 4f 00 54 00 5c 00 42 00 4f 00 4f 00 54 00 |O.O.T.\.B.O.O.T.|

000060: 58 00 36 00 34 00 2e 00 45 00 46 00 49 00 00 00 |X.6.4...E.F.I...|

000070: 7f ff 04 00 00 00 42 4f |......BO|

------------------------------------------------------------------------------

8BE4DF61-93CA-11D2-AA0D-00E098032B8C:Boot0002

------------------------------------------------------------------------------

000000: 01 00 00 00 0d 00 48 00 61 00 72 00 64 00 20 00 |......H.a.r.d. .|

000010: 44 00 72 00 69 00 76 00 65 00 00 00 05 01 09 00 |D.r.i.v.e.......|

000020: 02 00 00 00 00 7f ff 04 00 00 00 47 4f 00 00 4e |...........GO..N|

000030: 4f ab 00 00 00 01 00 00 00 6f 00 57 00 44 00 43 |O........o.W.D.C|

000040: 00 20 00 57 00 44 00 31 00 30 00 45 00 5a 00 45 |. .W.D.1.0.E.Z.E|

000050: 00 58 00 2d 00 30 00 38 00 4d 00 32 00 4e 00 41 |.X.-.0.8.M.2.N.A|

000060: 00 30 00 00 00 05 01 09 00 02 00 00 00 00 7f ff |.0..............|

000070: 04 00 02 01 0c 00 d0 41 03 0a 00 00 00 00 01 01 |.......A........|

000080: 06 00 00 17 03 12 0a 00 00 00 ff ff 00 00 7f ff |................|

000090: 04 00 01 04 3e 00 ef 47 64 2d c9 3b a0 41 ac 19 |....>..Gd-.;.A..|

0000a0: 4d 51 d0 1b 4c e6 20 00 20 00 20 00 20 00 57 00 |MQ..L. . . . .W.|

0000b0: 20 00 2d 00 44 00 43 00 57 00 33 00 43 00 4b 00 | .-.D.C.W.3.C.K.|

0000c0: 46 00 52 00 5a 00 50 00 31 00 54 00 4a 00 00 00 |F.R.Z.P.1.T.J...|

0000d0: 7f ff 04 00 00 00 42 4f |......BO|

OpenCL

Dumped using opencl by cmf from 2009

View openCLinfo.txt File

1 OpenCL platform found!

[Platform 0]

Name: Apple

Vendor: Apple

Version: OpenCL 1.2 (Dec 8 2015 17:02:20)

Profile: FULL_PROFILE

Extensions: cl_APPLE_SetMemObjectDestructor cl_APPLE_ContextLoggingFunctions cl_APPLE_clut cl_APPLE_query_kernel_names cl_APPLE_gl_sharing cl_khr_gl_event

2 OpenCL devices found!

[Device 0]

Name: Intel(R) Core(TM) i3-6100 CPU @ 3.70GHz

Vendor: Intel

Type: CPU

Device Version: OpenCL 1.2

Driver Version: 1.1

Compute Units: 4

Work Group Size: 1024

Clock: 3697 MHz

Global Memory (Total): 16384 MB

Global Memory (Host): 16384 MB

Global Memory (PCIe): 0 MB

Local Memory: 32 KB

Cache Size: 0.0625 KB

Cache Line Size: 3145728 Bytes

Available: Yes

Double-Precision: Yes

Extensions:

cl_APPLE_SetMemObjectDestructor

cl_APPLE_ContextLoggingFunctions

cl_APPLE_clut

cl_APPLE_query_kernel_names

cl_APPLE_gl_sharing

cl_khr_gl_event

cl_khr_fp64

cl_khr_global_int32_base_atomics

cl_khr_global_int32_extended_atomics

cl_khr_local_int32_base_atomics

cl_khr_local_int32_extended_atomics

cl_khr_byte_addressable_store

cl_khr_int64_base_atomics

cl_khr_int64_extended_atomics

cl_khr_3d_image_writes

cl_khr_image2d_from_buffer

cl_APPLE_fp64_basic_ops

cl_APPLE_fixed_alpha_channel_orders

cl_APPLE_biased_fixed_point_image_formats

[Device 1]

Name: GeForce GTX 950

Vendor: NVIDIA

Type: GPU

Device Version: OpenCL 1.2

Driver Version: 10.9.14 346.03.05f01

Compute Units: 6

Work Group Size: 1024

Clock: 1266 MHz

Global Memory: 2048 MB

Local Memory: 48 KB

Cache Size: 0 KB

Cache Line Size: 0 Bytes

Available: Yes

Double-Precision: Yes

Extensions:

cl_APPLE_SetMemObjectDestructor

cl_APPLE_ContextLoggingFunctions

cl_APPLE_clut

cl_APPLE_query_kernel_names

cl_APPLE_gl_sharing

cl_khr_gl_event

cl_khr_byte_addressable_store

cl_khr_global_int32_base_atomics

cl_khr_global_int32_extended_atomics

cl_khr_local_int32_base_atomics

cl_khr_local_int32_extended_atomics

cl_APPLE_fp64_basic_ops

cl_khr_fp64

cl_khr_3d_image_writes

cl_khr_depth_images

cl_khr_gl_depth_images

cl_khr_gl_msaa_sharing

cl_khr_image2d_from_buffer

cl_APPLE_ycbcr_422

cl_APPLE_rgb_422

RC Startup and Shutdown scripts

/etc/rc.boot.d/10.save_and_rotate_boot_log.local
/etc/rc.boot.d/20.mount_ESP.local
/etc/rc.boot.d/70.disable_sleep_proxy_client.local
/etc/rc.clover.lib
/etc/rc.shutdown.d/80.save_nvram_plist.local

Found from searching /etc/rc*

View 10.save_and_rotate_boot_log.local file

#!/bin/bash

# save nvram.plist script for CLOVER

# © JrCs 2013

# Save boot.log and rotate the system.log file

# NVRam keys used:

# Clover.LogLineCount: number of line to keep in system.log file

# Clover.LogEveryBoot: create a new boot.log file for every boot

# Check that all variable are bound

set -u

# Source clover rc library if needed

if [[ ! "$(type -t GetNVRamKey)" == "function" ]]; then

selfDir=$(cd $(dirname "$0") && pwd -P)

source "${selfDir}"/../rc.clover.lib

# Variables

currentDate=$(date "+%Y-%m-%d")

currentTime=$(date "+%H:%M:%S")

bootLogPath="${CLOVER_LOG_LOCATION}/boot.log"

systemLogPath="${CLOVER_LOG_LOCATION}/system.log"

# Debug mode ?

[[ "$DEBUG" -ne 0 ]] && set -x

# Turn on a case-insensitive matching

shopt -s nocasematch

# Print the current timestamp

echo "-------------------------------" > ${bootLogPath}

echo "DATE: ${currentDate} TIME: ${currentTime}" >> ${bootLogPath}

echo "-------------------------------" >> ${bootLogPath}

# Save the current boot log

LC_ALL=C /usr/sbin/ioreg -l -pIODeviceTree | \

sed -nE 's@.*boot-log.*<([0-9a-fA-F]*)>.*@\1@p' | xxd -r -p >> ${bootLogPath}

echo "Clover boot messages saved in $bootLogPath"

# Clover.LogLineCount=0/N [default 3000]

logLineCount=$(GetNVRamKey 'Clover.LogLineCount')

[[ "$logLineCount" =~ ^[0-9]+$ ]] || logLineCount=3000

# If the logLineCount > 0 trim the system log to line count before adding

# boot.log content

if [[ "$logLineCount" -gt 0 ]]; then

tail -n $logLineCount "$systemLogPath" 2>/dev/null > "${systemLogPath}.tmp"

cat "$bootLogPath" >> "${systemLogPath}.tmp"

mv "${systemLogPath}.tmp" "$systemLogPath"

# Clover.LogEveryBoot=No|Yes|Number [default No]

logEveryBoot=$(GetNVRamKey 'Clover.LogEveryBoot')

# If logEveryBoot == Yes then save a copy of boot.log with a timestamp boot.log

# file

if [[ -n "$logEveryBoot" && "$logEveryBoot" != 'No' ]];then

# If logEveryBoot is a number keep this number of boot logs

if [[ "$logEveryBoot" =~ [[:digit:]]+ ]]; then

# Keep only logEveryBoot logs

ls -t "${CLOVER_LOG_LOCATION}"/boot-*.log | tail -n +$logEveryBoot | xargs rm -f

# Extract clover revision from the boot log file

cloverRevision=$(sed -nE 's/^.*Clover revision: *([0-9]+).*$/\1/p' "$bootLogPath")

timeStampBootLogFilename=boot-r$cloverRevision-${currentDate}-$(echo ${currentTime//:/.}).log

cp "$bootLogPath" "${CLOVER_LOG_LOCATION}/${timeStampBootLogFilename}"

# Local Variables: #

# mode: ksh #

# tab-width: 4 #

# indent-tabs-mode: nil #

# End: #

# vi: set expandtab ts=4 sw=4 sts=4: #

Found from searching /etc/rc*

View 20.mount_ESP.local file

#!/bin/bash

# Mount ESP script for Clover

# © JrCs 2013

# Mount ESP (EFI System Partition)

# NVRam keys used:

# Clover.MountEFI: Yes|diskX|GUID|VolName [default No]

# Check that all variable are bound

set -u

# Source clover rc library if needed

if [[ ! "$(type -t GetNVRamKey)" == "function" ]]; then

selfDir=$(cd $(dirname "$0") && pwd -P)

source "${selfDir}"/../rc.clover.lib

# Variables

ESPMountPoint=/Volumes/EFI

declare -r plistbuddy='/usr/libexec/PlistBuddy'

# Debug mode ?

[[ "$DEBUG" -ne 0 ]] && set -x

# Turn on a case-insensitive matching

shopt -s nocasematch

function mountESP {

local arg="$1"

local exitcode=1

local guidRegExp='[[:xdigit:]]+-[[:xdigit:]]+-[[:xdigit:]]+-[[:xdigit:]]+'

local ESPDevice=

if [[ "$arg" == Yes ]]; then

ESPDevice=$(LC_ALL=C diskutil info / 2>/dev/null | \

sed -n 's/.*Part [Oo]f Whole: *//p')

elif [[ "$arg" =~ $guidRegExp ]]; then

ESPDevice=$(LC_ALL=C diskutil info "$arg" 2>/dev/null | \

sed -n 's/.*Part [Oo]f Whole: *//p')

if [[ -z "$ESPDevice" ]]; then

echo "Can't find partition with UUID $arg"

return 1

elif [[ ! "$arg" =~ ^(/dev/)?disk[0-9]+ ]]; then

ESPDevice=$(LC_ALL=C diskutil info "$arg" 2>/dev/null | \

sed -n 's/.*Part [Oo]f Whole: *//p')

if [[ -z "$ESPDevice" ]]; then

echo "Can't find volume with the name $arg"

return 1

else

ESPDevice="$arg"

# keep only the device name (remove /dev/ and partition (aka s1))

ESPDevice=$(echo "$ESPDevice" | sed -E 's@^.*/?(disk[0-9]*).*@\1@')

if [[ "$ESPDevice" =~ ^disk[0-9]+$ ]]; then

local ESP="${ESPDevice}s1"

# Umount previously mount partition

/usr/sbin/diskutil umount "${ESPMountPoint}" &>/dev/null

umount /dev/${ESP} &>/dev/null

exitcode=1

local tmpfile=$(mktemp -t fstyp)

LC_ALL=C diskutil info -plist /dev/$ESP > "$tmpfile"

local fstype=$($plistbuddy -c "Print FilesystemType" \

"$tmpfile" 2>/dev/null)

rm -f "$tmpfile"

[[ -z "$fstype" ]] && fstype=$(/sbin/fstyp /dev/$ESP)

if [[ -n "$fstype" ]]; then

[[ ! -d "${ESPMountPoint}" ]] && mkdir -p "${ESPMountPoint}"

mount -t "$fstype" /dev/$ESP "${ESPMountPoint}" &>/dev/null

exitcode=$?

if [[ $exitcode -ne 0 ]]; then

echo "Failed to mount $ESP at $ESPMountPoint"

else

echo "EFI partition ($ESP) mount at $ESPMountPoint"

else

echo "Invalid device '$ESPDevice'"

return $exitcode

}

# Clover.MountEFI=Yes|diskX|GUID|VolName [default No]

mountEFIValue=$(GetNVRamKey 'Clover.MountEFI' || echo 'No')

if [[ "$mountEFIValue" == "No" ]]; then

echo "Not auto mounting EFI partition"

else

mountESP "$mountEFIValue"

[[ $? -ne 0 ]] && rmdir "$ESPMountPoint" &>/dev/null

# Local Variables: #

# mode: ksh #

# tab-width: 4 #

# indent-tabs-mode: nil #

# End: #

# vi: set expandtab ts=4 sw=4 sts=4: #

Found from searching /etc/rc*

View 70.disable_sleep_proxy_client.local file

#!/bin/bash

# disable mDNSResponder sleep proxy client

# this will prevent the system waking from sleep every hours

# © JrCs 2013

# Check that all variable are bound

set -u

# Source clover rc library if needed

if [[ ! "$(type -t GetNVRamKey)" == "function" ]]; then

selfDir=$(cd $(dirname "$0") && pwd -P)

source "${selfDir}"/../rc.clover.lib

# Variables

mDNSResponderPList=/System/Library/LaunchDaemons/com.apple.mDNSResponder.plist

pListBuddy=/usr/libexec/PlistBuddy

disableOption='-DisableSleepProxyClient'

# Debug mode ?

[[ "$DEBUG" -ne 0 ]] && set -x

[[ ! -f "$mDNSResponderPList" ]] && exit 0

# Check if sleep proxy is not already disabled

already_disabled=$($pListBuddy -c 'Print ProgramArguments:' \

"$mDNSResponderPList" | grep -c -- "$disableOption")

if [[ $already_disabled -eq 0 ]]; then

echo "Disabling mDNS responder sleep proxy"

$pListBuddy -c "Add ProgramArguments: string $disableOption" \

"$mDNSResponderPList"

else

echo "mDNS responder sleep proxy already disabled"

# Local Variables: #

# mode: ksh #

# tab-width: 4 #

# indent-tabs-mode: nil #

# End: #

# vi: set expandtab ts=4 sw=4 sts=4: #

Found from searching /etc/rc*

View rc.clover.lib file

#!/bin/bash

# rc functions library for CLOVER

##################### VARIABLES #####################

# Export variables that can be used in custom scripts

export DEBUG=${DEBUG:-0}

declare -r CLOVER_LOG_LOCATION=/Library/Logs/CloverEFI

export CLOVER_LOG_LOCATION

##################### FUNCTIONS #####################

# get value of a nvram key

GetNVRamKey() {

# Arguments:

# $1: nvram key to search (case insensitive)

# Return:

# return the value of the nvram key

# exit code is != 0 if the nvram key wasn't found

local keyvalue exitCode

local IFS=$(printf "\t")

keyvalue=( $(/usr/sbin/nvram -p | /usr/bin/grep -i "^${1}\t*" 2>/dev/null) )

exitCode=$?

[[ $exitCode -eq 0 ]] && echo "${keyvalue[1]}"

return $exitCode

}

export -f GetNVRamKey

# get value of a boot flag

GetBootFlags() {

# Arguments:

# $1: boot flag key to search (case insensitive)

# Return:

# return the value of the boot flag

# exit code is != 0 if the boot flag wasn't found

local searchKey="$1"

local exitCode=1

local bootFlagValue=

local bootFlags=$(GetNVRamKey 'boot-args')

# Turn case-insensitive matching temporarily on, if necessary.

local nocasematchWasOff=0

shopt nocasematch >/dev/null || nocasematchWasOff=1

(( nocasematchWasOff )) && shopt -s nocasematch

for bootFlag in $bootFlags ; do

# Split the key and value

local bootFlagKey="${bootFlag%%=*}"

if [[ "$bootFlagKey" == "$searchKey" ]]; then

bootFlagValue=

[[ $bootFlag == *=* ]] && bootFlagValue="${bootFlag#*=}"

exitCode=0

break;

done

# Restore state of 'nocasematch' option, if necessary.

(( nocasematchWasOff )) && shopt -u nocasematch

echo "$bootFlagValue"

return $exitCode

}

export -f GetBootFlags

GetDiskGUIDFromDevice() {

local arg="$1"

# keep only the device name (remove /dev/ and partition (aka s1))

local device=$(echo "$arg" | sed -E 's@^.*/?(disk[0-9]*).*@\1@')

# get the GPT table

gpt_table=$(dd if=/dev/$device iseek=512 count=72 bs=1 2>/dev/null | xxd -u -ps -c 72)

# Check if it is a GPT partition table (EFI PART signature)

[[ ! "${gpt_table:0:16}" == 4546492050415254 ]] && return 1

printf "%s-%s-%s-%s-%s\n" \

"${gpt_table:118:2}${gpt_table:116:2}${gpt_table:114:2}${gpt_table:112:2}" \

"${gpt_table:122:2}${gpt_table:120:2}" \

"${gpt_table:126:2}${gpt_table:124:2}" \

"${gpt_table:128:4}" "${gpt_table:132:16}"

}

export -f GetDiskGUIDFromDevice

####################### MAIN #######################

# Ensure log directory exists

[[ ! -d "${CLOVER_LOG_LOCATION}" ]] && mkdir -p "${CLOVER_LOG_LOCATION}"

# Local Variables: #

# mode: ksh #

# tab-width: 4 #

# indent-tabs-mode: nil #

# End: #

# vi: set expandtab ts=4 sw=4 sts=4: #

Found from searching /etc/rc*

View 80.save_nvram_plist.local file

#!/bin/bash

# save nvram.plist script for CLOVER

# © JrCs 2013

# Manage nvram.plist: try to store it in the first boot helper partition

# or in the root directory

# NVRam keys used:

# Clover.NVRamDisk: No|Yes or empty [default empty]

# Check that all variable are bound

set -u

# Source clover rc library if needed

if [[ ! "$(type -t GetNVRamKey)" == "function" ]]; then

selfDir=$(cd $(dirname "$0") && pwd -P)

source "${selfDir}"/../rc.clover.lib

# Variables

NVRAMFilename=nvram.plist

NVRAMMountPoint=/tmp/NVRAM

NVRAMPartType=

# Debug mode ?

[[ "$DEBUG" -ne 0 ]] && set -x

# Turn on a case-insensitive matching

shopt -s nocasematch

# Catch signal to clean up

trap 'rmdir "${NVRAMMountPoint}" &>/dev/null' EXIT

function findFirstAppleBootDevice {

local devices=$(LC_ALL=C ls /dev/disk* | sed -n '/\/dev\/disk[0-9]*$/p')

# Iterate over all devices

for device in $devices; do

# Find first partition with Apple Boot partition signature

index=$(LC_ALL=C /usr/sbin/gpt -r show "$device" 2>/dev/null | \

awk 'toupper($7) == "426F6F74-0000-11AA-AA11-00306543ECAC" {print $3; exit}')

if [[ $index =~ ^[0-9]+$ ]];then

break

else

index=

done

# If index found return the device and partition (like diskXsY)

[[ -n "$index" ]] && echo "${device##*/}s$index"

}

function mountNVRAMDisk {

local device="$1"

local mntpt="$2"

# Check if the device is not already mount

local current_mntpts=$(/bin/df -l | \

sed -nE 's#^/dev/(disk[^ ]*)[^/]*(/.*$)#\1 \2#p')

while read -r dev mnt; do

if [[ "$dev" == "$device" ]]; then

echo "$mnt" # Return the mount point

return 0

done <<<"$current_mntpts"

# Make sure mount point exists

[[ ! -d "$mntpt" ]] && mkdir -p "$mntpt"

[[ ! -d "$mntpt" ]] && return 1

# Unmount the mount point and device first just in case

umount "$mntpt" 2>/dev/null

umount "/dev/$device" 2>/dev/null

for fstype in hfs msdos exfat; do

mount -t $fstype /dev/$device "$mntpt" &>/dev/null

[[ $? -eq 0 ]] && echo "$mntpt" && return 0

done

return 1

}

function mountAndSaveNVRAM {

local device="$1"

# Mount the NVRamDisk device

local mntpt=$(mountNVRAMDisk "$device" "$NVRAMMountPoint")

if [[ -n "$mntpt" ]]; then

mntpt="${mntpt%/}" # Remove last /

# Write NVRAM and make sure it exists

if [[ -f "${mntpt}/${NVRAMFilename}" ]]; then

rm -rf "${mntpt}/${NVRAMFilename}"

nvram -x -p > "${mntpt}/${NVRAMFilename}"

if [[ -f "${mntpt}/${NVRAMFilename}" ]]; then

chflags hidden "${mntpt}/${NVRAMFilename}"

umount "$NVRAMMountPoint" &>/dev/null

if [[ "$mntpt" != "$NVRAMMountPoint" ]]; then

echo "NVRAM saved to '${mntpt}/${NVRAMFilename}' [$device]"

else

echo "NVRAM saved on root of $device"

return 0

umount "$NVRAMMountPoint" &>/dev/null

echo "NVRAM couldn't be saved to ${NVRAMFilename} on root of $device !"

return 1

}

function saveNVRAM {

local rootDevice=$(df -l / | sed -nE 's#^/dev/([^ ]*).*#\1#p')

# If NVRAMDevice is not specify use rootDevice

#NVRAMDevice=${NVRAMDevice:-$rootDevice}

NVRAMDevice=${rootDevice}

# Normalize NVRAMDevice (keep only the device name (remove /dev/)

NVRAMDevice=${NVRAMDevice##*/}

if [[ ! "$NVRAMDevice" =~ ^disk[0-9]*s[0-9]*$ ]]; then

# NVRAMDevice is a whole disk certainly a RAID device

# try to save nvram.plist on the first Apple Boot Partition

local AppleBootDevice=$(findFirstAppleBootDevice)

if [[ -n "$AppleBootDevice" ]]; then

# Try to save nvram.plist on the Apple Boot device

mountAndSaveNVRAM "$AppleBootDevice"

[[ $? -eq 0 ]] && return

# Save NVRAM to specific device or root

mountAndSaveNVRAM "$NVRAMDevice"

[[ $? -ne 0 ]] && mountAndSaveNVRAM "$rootDevice"

}

# Check if user requested to not save nvram

NVRAMDevice=$(GetNVRamKey 'Clover.NVRamDisk') # NVRamDisk=No|Yes or empty [default empty]

if [[ "$NVRAMDevice" != No ]]; then

if [[ "$NVRAMDevice" == Yes ]]; then

# Always save NVRam to disk

saveNVRAM

else

# Check if runtime variables emulation is being used

# and if so, always save nvram

if [[ $(nvram -p | grep 'EmuVariableUefiPresent') != "" ]]; then

saveNVRAM

else

# Otherwise only save nvram to disk if boot from CloverEFI or EDK II

EFIFirmwareVendor=$(LC_ALL=C ioreg -l -pIODeviceTree | \

sed -nE 's@.*firmware-vendor.*<([0-9a-fA-F]*)>.*@\1@p' | xxd -r -p)

case "$EFIFirmwareVendor" in

"CLOVER"|"EDK II") saveNVRAM ;;

*) echo "Not saving $NVRAMFilename because booting from an UEFI firmware ($EFIFirmwareVendor)"

;;

esac

# Local Variables: #

# mode: ksh #

# tab-width: 4 #

# indent-tabs-mode: nil #

# End: #

# vi: set expandtab ts=4 sw=4 sts=4: #

RTC

Dumped using cmosDumperForOsx by rafirafi, revised extensively by STLVNUB

View RTCDump.txt File

CMOS Dumper V0.1.:)

DSDT has RTC Length of 2. Dumped 128 Bytes.

--------------------------------------------------

0 1 2 3 4 5 6 7 8 9 A B C D E F |

--------------------------------------------------

0|31 00 07 00 17 00 05 11 03 16 26 02 50 80 00 00 |

1|00 bf ff ff 6f 7b 02 ff ff 5f af fb bf ff fb ff |

2|7b f9 fd fd ff bb ff bf ff ef ed ef dd ff 17 f4 |

3|ff ff 20 fb ff 68 08 ff ff 8e ff fc 1c f1 0d 21 |

4|00 5a 67 0c a8 b8 00 00 f0 5a 00 00 00 00 00 00 |

5|00 00 00 00 00 00 00 00 02 7d 00 00 00 00 00 00 |

6|00 00 00 00 00 d0 50 99 86 3f 4c cb 02 00 00 00 |

7|00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |

--------------------------------------------------

By observtion of the CHANGED bytes from Sleep/Wake Cycles

You MAY get some idea as to why CMOS RESET bug exists!!!!

Security Integrity Protection (SIP)

Dumped using csrstat by Piker-Alpha

View SIP_status.txt File

System Integrity Protection status: enabled (0x00000003) (Custom Configuration).

Configuration:

Apple Internal: disabled

Kext Signing Restrictions: disabled

Task for PID Restrictions: enabled

Filesystem Protections: disabled

Debugging Restrictions: enabled

DTrace Restrictions: enabled

NVRAM Protections: enabled

This is an unsupported configuration, likely to break in the future and leave your machine in an unknown state.

SMC

SMC-fans
SMC-keys

Dumped using SMC_util2 (Former Apple System Management Control (SMC) tool 0.01) by usr-sse2.

View File SMC-fans.txt

Total fans in system: 0

Dumped using SMC_util2 (Former Apple System Management Control (SMC) tool 0.01) by usr-sse2.

View File SMC-keys.txt

Num: b0=0 b1=0 b2=0 b3=1a size=4

#KEY [ui32] 26 (bytes 00 00 00 1a)

FNum [ui8 ] 0 (bytes 00)

HWS0 [ch8*] (bytes 41 53 52 6f 63 6b)

HWS1 [ch8*] (bytes 5a 31 37 30 4d 2d 49 54 58 5f 61 63)

$Adr [ui32] 0 (bytes 00 00 03 00)

MSSD [si8 ] (bytes 05)

LsNM [ui8 ] 1 (bytes 01)

OSK0 [ch8*] (bytes 6f 75 72 68 61 72 64 77 6f 72 6b 62 79 74 68 65 73 65 77 6f 72 64 73 67 75 61 72 64 65 64 70 6c)

$Num [ui8 ] 1 (bytes 01)

REV [{rev] (bytes 01 25 0f 00 00 04)

RVBF [{rev] (bytes 01 30 0f 00 00 03)

RVUF [{rev] (bytes 01 30 0f 00 00 03)

LsbV [{rev] (bytes 01 04 0a 00 06)

NATJ [ui8 ] 2 (bytes 02)

MSSP [si8 ] (bytes 05)

OSK1 [ch8*] (bytes 65 61 73 65 64 6f 6e 74 73 74 65 61 6c 28 63 29 41 70 70 6c 65 43 6f 6d 70 75 74 65 72 49 6e 63)

EPCI [ui32] 0 (bytes 01 90 07 00)

RPlt [ch8*] (bytes 6d 38 36 00 00 00 00 00)

RBr [ch8*] (bytes 6d 38 36 00 00 00 00 00)

BEMB [flag] (bytes 00)

NATi [ui16] 30 (bytes 00 1e)

NTOK [ui8 ] 1 (bytes 01)

CLKT [ui32] 237 (bytes 00 01 05 ed)

CLKH [{clh] (bytes 00 00 70 80 00 01 19 40)

MSDW [flag] (bytes 01)

HI0N [ui8 ] 4 (bytes 04)

System Profiler

Dumped using /usr/sbin/system_profiler -detailLevel mini

View System-Profiler.txt File

Audio:

Intel High Definition Audio:

Audio ID: 1

Speaker:

Connection: Internal

Line Output:

Connection: 1/8-Inch Jack

Line Output:

Connection: 1/8-Inch Jack

Internal Microphone:

Connection: Internal

Line Input:

Connection: 1/8-Inch Jack

Line Input:

Connection: 1/8-Inch Jack

Headphone:

Connection: 1/8-Inch Jack

S/PDIF Optical Digital Audio Output:

Connection: Combination Output

HDMI / DisplayPort Output:

Connection: Display

Devices:

Built-in Input:

Default Input Device: Yes

Input Channels: 2

Manufacturer: Apple Inc.

Current SampleRate: 44100

Transport: Built-in

Built-in Line Input:

Input Channels: 2

Manufacturer: Apple Inc.

Current SampleRate: 44100

Transport: Built-in

Built-in Output:

Manufacturer: Apple Inc.

Output Channels: 2

Current SampleRate: 44100

Transport: Built-in

Built-in Line Output:

Manufacturer: Apple Inc.

Output Channels: 2

Current SampleRate: 44100

Transport: Built-in

Built-in Line Output:

Manufacturer: Apple Inc.

Output Channels: 2

Current SampleRate: 44100

Transport: Built-in

Built-in Digital Output:

Manufacturer: Apple Inc.

Output Channels: 2

Current SampleRate: 44100

Transport: Built-in

DisplayPort:

Default Output Device: Yes

Default System Output Device: Yes

Manufacturer: Apple Inc.

Output Channels: 2

Current SampleRate: 48000

Transport: DisplayPort

Diagnostics:

Power On Self-Test:

Last Run: 3/11/16, 6:32 PM

Result: Passed

Ethernet Cards:

Realtek RTL8168B/8111B PCI Express Gigabit Ethernet:

Name: ethernet

Type: Ethernet

Bus: PCI

Vendor ID: 0x10ec

Device ID: 0x8168

Subsystem Vendor ID: 0x1849

Subsystem ID: 0x8168

Revision ID: 0x0015

Link Width: x1

BSD name: en0

Graphics/Displays:

NVIDIA GeForce GTX 950:

Chipset Model: NVIDIA GeForce GTX 950

Type: GPU

Bus: PCIe

PCIe Lane Width: x16

VRAM (Total): 2047 MB

Vendor: NVIDIA (0x10de)

Device ID: 0x1402

Revision ID: 0x00a1

ROM Revision: VBIOS 84.06.2f.00.6a

Displays:

SwitchResX4 - SE42UMS:

Resolution: 2560 x 1440 @ 30 Hz

Pixel Depth: 32-Bit Color (ARGB8888)

Display Serial Number:

Main Display: Yes

Mirror: Off

Online: Yes

Rotation: Supported

Connection Type: DVI or HDMI

Adapter Firmware Version: 7.0e

Television: Yes

Hardware:

Hardware Overview:

Model Name: Mac Pro

Model Identifier: MacPro3,1

Processor Name: Intel Core i3

Processor Speed: 3.70 GHz

Number of Processors: 1

Total Number of Cores: 2

L2 Cache (per Core): 256 KB

L3 Cache: 3 MB

Memory: 16 GB

Bus Speed: 400 MHz

Boot ROM Version: MP31.006C.B05

SMC Version (system): 1.25f4

Memory:

Memory Slots:

ECC: Disabled

Upgradeable Memory: Yes

DIMM1:

Size: 8 GB

Type: DDR4

Speed: 2400 MHz

Status: OK

Manufacturer: Crucial

Part Number: BLS2K8G4D240FSA

DIMM2:

Size: Empty

Type: Empty

Speed: Empty

Status: Empty

Manufacturer: Empty

Part Number: Empty

DIMM3:

Size: 8 GB

Type: DDR4

Speed: 2400 MHz

Status: OK

Manufacturer: Crucial

Part Number: BLS2K8G4D240FSA

Network:

Ethernet:

Type: Ethernet

Hardware: Ethernet

BSD Device Name: en0

Service Order: 0

802.11 n WLAN:

Type: Ethernet

Hardware: Ethernet

BSD Device Name: en1

Service Order: 1

Printer Software:

PPDs:

Path: /Library/Printers/PPDs/Contents/Resources/EPSON FAX A3.gz

Version: 1.71

Path: /Library/Printers/PPDs/Contents/Resources/EPSON FAX.gz

Version: 1.71

Printers:

Path: /Library/Printers/Canon/IJScanner/Frameworks/CIJSDA.framework/Versions/A/Resources/Info.plist

Version: 3.1.0

Path: /Library/Printers/Canon/IJScanner/Frameworks/CIJSDE.framework/Versions/A/Resources/Info.plist

Version: 1.4.0

Path: /Library/Printers/Canon/IJScanner/Frameworks/CIJSDM.framework/Versions/A/Resources/Info.plist

Version: 2.1.0

Path: /Library/Printers/Canon/IJScanner/Frameworks/CIJSDV.framework/Versions/A/Resources/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdj_bjnp.plugin/Contents/Info.plist

Version: 2.10.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdj_cnq2413.plugin/Contents/Info.plist

Version: 2.2.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdj_cnq2414.plugin/Contents/Info.plist

Version: 1.2.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdj_cnq2415.plugin/Contents/Info.plist

Version: 1.1.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdj_cnq4807.plugin/Contents/Info.plist

Version: 2.3.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdj_cnq4808.plugin/Contents/Info.plist

Version: 2.2.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdj_cnq4809.plugin/Contents/Info.plist

Version: 1.2.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdj_cnq4811.plugin/Contents/Info.plist

Version: 1.1.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdj_cnq9601.plugin/Contents/Info.plist

Version: 2.2.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdj_iom.plugin/Contents/Info.plist

Version: 1.9.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdj_lld.plugin/Contents/Info.plist

Version: 4.4.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdj_lld09.plugin/Contents/Info.plist

Version: 3.9.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdj_sfusb.plugin/Contents/Info.plist

Version: 1.4.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdj_sfusb2.plugin/Contents/Info.plist

Version: 1.5.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_ag.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_ago8.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_ausm.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_caps.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_cubs.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_ddoct.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_dscrn.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_fare.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_farec.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_gercc.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_gercg.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_hsl.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_ijfsh.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_jgdir.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_mcrp2.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_mcrp3.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_mcrpp.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_mldo0.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_mldo8.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_mldo9.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_mldv0.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_qare.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_racs2.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_rotate.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_smac.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_tdg.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_tonec.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cijsdm_zoom.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/EPSON/Fax/AutoSetupTool/EPFaxAutoSetupTool.app/Contents/Info.plist

Version: 1.71

Path: /Library/Printers/EPSON/Fax/FaxIOSupport/epsonfax.app/Contents/Info.plist

Version: 1.71

Path: /Library/Printers/EPSON/Fax/FaxIOSupport/FaxIOService.framework/Versions/A/Resources/Info.plist

Version: 1.71

Path: /Library/Printers/EPSON/Fax/FaxIOSupport/FaxReceiveLib.framework/Versions/A/Resources/Info.plist

Version: 1.71

Path: /Library/Printers/EPSON/Fax/Filter/commandFilter.app/Contents/Info.plist

Version: 1.71

Path: /Library/Printers/EPSON/Fax/Filter/rastertoepfax.app/Contents/Info.plist

Version: 1.71

Path: /Library/Printers/EPSON/Fax/Help/Epson_IJFax_C.help/Contents/Info.plist

Version: 1.41

Path: /Library/Printers/EPSON/Fax/Icons/EpsonFax.icons/Contents/Info.plist

Version: 1.00

Path: /Library/Printers/EPSON/Fax/Libraries/FaxRecipientLib2.framework/Versions/A/Resources/Info.plist

Version: 1.71

Path: /Library/Printers/EPSON/Fax/Libraries/FICLib.framework/Versions/A/Resources/Info.plist

Version: 1.71

Path: /Library/Printers/EPSON/Fax/Libraries/rastertotiff.framework/Versions/A/Resources/Info.plist

Version: 1.71

Path: /Library/Printers/EPSON/Fax/Libraries/rastertotiff.framework/Versions/A/Resources/TIFFInfo.plist

Version: 1.71

Path: /Library/Printers/EPSON/Fax/PDEs/PDECPlugin.plugin/Contents/Info.plist

Version: 1.71

Path: /Library/Printers/EPSON/Fax/SupportPrinters/FaxSupportInfo.bundle/Contents/Info.plist

Version: 1.10

Path: /Library/Printers/EPSON/Fax/Utility/Fax Receive Monitor.app/Contents/Info.plist

Version: 1.71

Path: /Library/Printers/EPSON/Fax/Utility/FAX Utility.app/Contents/Info.plist

Version: 1.71

Path: /Library/Printers/EPSON/Fax/Utility/Help/Epson_IJFaxUTY.help/Contents/Info.plist

Version: 1.41

Path: /Library/Printers/EPSON/Fax/Utility/Plugins/FaxCheckConnection.plugin/Contents/Info.plist

Version: 1.71

Path: /Library/Printers/EPSON/Fax/Utility/Plugins/FaxPrinterSpeedDial.plugin/Contents/Info.plist

Version: 1.71

Path: /Library/Printers/EPSON/Fax/Utility/Plugins/FaxReceive.plugin/Contents/Info.plist

Version: 1.71

Path: /Library/Printers/EPSON/Fax/Utility/Plugins/FaxSettings.plugin/Contents/Info.plist

Version: 1.71

Path: /Library/Printers/EPSON/Fax/Utility/Plugins/FaxSyncContacts.plugin/Contents/Info.plist

Version: 1.71

Path: /Library/Printers/EPSON/Fax/Utility/Plugins/FaxTransmissionRecord.plugin/Contents/Info.plist

Version: 1.71

Image Capture Devices:

Path: /Library/Image Capture/Devices/Canon IJScanner2.app/Contents/Info.plist

Version: 4.0.0

Path: /Library/Image Capture/Devices/Canon IJScanner2.app/Contents/Resources/DeviceInfo.plist

Version: 4.0.0

Path: /Library/Image Capture/Devices/Canon IJScanner2.app/Contents/Resources/DeviceMatchingInfo.plist

Version: 4.0.0

Path: /Library/Image Capture/Devices/Canon IJScanner4.app/Contents/Info.plist

Version: 4.0.0

Path: /Library/Image Capture/Devices/Canon IJScanner4.app/Contents/Resources/DeviceInfo.plist

Version: 4.0.0

Path: /Library/Image Capture/Devices/Canon IJScanner4.app/Contents/Resources/DeviceMatchingInfo.plist

Version: 4.0.0

Path: /Library/Image Capture/Devices/Canon IJScanner6.app/Contents/Info.plist

Version: 4.0.0

Path: /Library/Image Capture/Devices/Canon IJScanner6.app/Contents/Resources/DeviceInfo.plist

Version: 4.0.0

Path: /Library/Image Capture/Devices/Canon IJScanner6.app/Contents/Resources/DeviceMatchingInfo.plist

Version: 4.0.0

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/Info.plist

Version: 5.7.17

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/.ICASingle.bundle/Contents/Info.plist

Version: 5.3.1

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/DDC.bundle/Contents/Info.plist

Version: 1.1.2

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/FIT.bundle/Contents/Info.plist

Version: 3.7.0

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Image Filter2.bundle/Contents/Info.plist

Version: 4.4.01

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/ImageFilter.bundle/Contents/Info.plist

Version: 3.2.1

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 10C.bundle/Contents/Info.plist

Version: 1.0.1

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 111.bundle/Contents/Info.plist

Version: 1.0.1

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 1D.bundle/Contents/Info.plist

Version: 1.0.2

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 23.bundle/Contents/Info.plist

Version: 1.0.2

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 30.bundle/Contents/Info.plist

Version: 1.0.6

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 32.bundle/Contents/Info.plist

Version: 1.0.4

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 41.bundle/Contents/Info.plist

Version: 1.1.3

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 43.bundle/Contents/Info.plist

Version: 1.1.6

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 52.bundle/Contents/Info.plist

Version: 1.1.4

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 54.bundle/Contents/Info.plist

Version: 1.0.11

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 5A.bundle/Contents/Info.plist

Version: 1.0.5

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 66.bundle/Contents/Info.plist

Version: 1.0.12

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 68.bundle/Contents/Info.plist

Version: 1.1.5

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 6E.bundle/Contents/Info.plist

Version: 1.0.4

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 7A.bundle/Contents/Info.plist

Version: 1.0.8

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 7C.bundle/Contents/Info.plist

Version: 1.0.11

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 7E.bundle/Contents/Info.plist

Version: 1.0.4

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 86.bundle/Contents/Info.plist

Version: 1.1.1

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 8B.bundle/Contents/Info.plist

Version: 1.0.5

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 94.bundle/Contents/Info.plist

Version: 1.2.2

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 95.bundle/Contents/Info.plist

Version: 1.2.2

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter A1.bundle/Contents/Info.plist

Version: 1.0.9

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter AD.bundle/Contents/Info.plist

Version: 1.1.3

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter C2.bundle/Contents/Info.plist

Version: 1.0.2

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter C3.bundle/Contents/Info.plist

Version: 1.0.2

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter CA.bundle/Contents/Info.plist

Version: 1.0.4

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter DD.bundle/Contents/Info.plist

Version: 1.0.3

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter EB.bundle/Contents/Info.plist

Version: 1.0.4

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter FE.bundle/Contents/Info.plist

Version: 1.0

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/Resources/DeviceInfo.plist

Version: 5.7.17

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/Resources/DeviceMatchingInfo.plist

Version: 5.7.17

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/Resources/HardwareInfo.plist

Version: 5.7.17

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/Resources/ModelInfo.plist

Version: 5.7.17

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/Resources/ProfileInfo.plist

Version: 5.7.17

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/Resources/RegionCodeInfo.plist

Version: 5.7.17

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/Resources/ResolutionInfo.plist

Version: 5.7.17

Image Capture Support:

Path: /Library/Image Capture/Support/LegacyDeviceDiscoveryHelpers/AirScanLegacyDiscovery.app/Contents/Info.plist

Version: 11.2

System Library Extensions:

Path: /System/Library/Extensions/AppleMobileDevice.kext

Version: 3.4.0

Path: /System/Library/Extensions/AppleStorageDrivers.kext/Contents/PlugIns/AppleATAPIStorage.kext

Version: 3.7.1

Path: /System/Library/Extensions/AppleStorageDrivers.kext/Contents/PlugIns/AppleXserveRAID.kext

Version: 3.7.1

Path: /System/Library/Extensions/AppleStorageDrivers.kext/Contents/PlugIns/FireWireStorageDeviceSpecifics.kext

Version: 3.7.1

Path: /System/Library/Extensions/AppleStorageDrivers.kext/Contents/PlugIns/SonyXDCAMDriver.kext

Version: 3.7.1

Path: /System/Library/Extensions/AppleStorageDrivers.kext/Contents/PlugIns/USBStorageDeviceSpecifics.kext

Version: 3.7.1

Path: /System/Library/Extensions/AppleTopCase.kext

Version: 86

Path: /System/Library/Extensions/AppleTopCase.kext/Contents/PlugIns/AppleTopCaseActuatorHIDDriver.kext

Version: 86

Path: /System/Library/Extensions/AppleUSBTopCase.kext

Version: 245.4

Path: /System/Library/Extensions/CellPhoneHelper.kext

Version: 1.4.0

Path: /System/Library/Extensions/IOHIDFamily.kext/Contents/PlugIns/IOHIDEventDriver.kext

Version: 2.0.0

Path: /System/Library/Extensions/IOHIDFamily.kext/Contents/PlugIns/IOHIDEventDriverSafeBoot.kext

Version: 2.0.0

Path: /System/Library/Extensions/IOHIDFamily.kext/Contents/PlugIns/IOHIDUserClient.kext

Version: 2.0.0

Path: /System/Library/Extensions/IOStreamFamily.kext/Contents/PlugIns/IOStreamUserClient.kext

Version: 1.1.0

Path: /System/Library/Extensions/IOUSBFamily.kext/Contents/PlugIns/IOUSBHIDDriverSafeBoot.kext

Version: 900.4.1

Path: /System/Library/Extensions/IOUSBHostFamily.kext/Contents/PlugIns/IOUSBHostHIDDeviceSafeBoot.kext

Version: 1.0.1

Path: /System/Library/Extensions/IOVideoFamily.kext/Contents/PlugIns/IOVideoDeviceUserClient.kext

Version: 1.2.0

Library Extensions:

Path: /Library/Extensions/realtekALC.kext

Version: 1.2-toledaALC-110

Printers:

Status: The printers list is empty. To add printers, choose Apple menu > System Preferences…, click Printers & Scanners, and then click Add (+).

CUPS Version: 2.1.0 (cups-435)

SATA/SATA Express:

Intel 10 Series Chipset:

Vendor: Intel

Product: 10 Series Chipset

Link Speed: 6 Gigabit

Negotiated Link Speed: 6 Gigabit

Physical Interconnect: SATA

Description: AHCI Version 1.31 Supported

WDC WD10EZEX-08M2NA0:

Capacity: 1 TB (1,000,204,886,016 bytes)

Model: WDC WD10EZEX-08M2NA0

Revision: 01.01A01

Native Command Queuing: Yes

Queue Depth: 32

Removable Media: No

Detachable Drive: No

BSD Name: disk0

Rotational Rate: 7200

Medium Type: Rotational

Partition Map Type: GPT (GUID Partition Table)

S.M.A.R.T. status: Verified

Intel 10 Series Chipset:

Vendor: Intel

Product: 10 Series Chipset

Link Speed: 6 Gigabit

Description: AHCI Version 1.31 Supported

Intel 10 Series Chipset:

Vendor: Intel

Product: 10 Series Chipset

Link Speed: 6 Gigabit

Description: AHCI Version 1.31 Supported

Intel 10 Series Chipset:

Vendor: Intel

Product: 10 Series Chipset

Link Speed: 6 Gigabit

Description: AHCI Version 1.31 Supported

Software:

System Software Overview:

System Version: OS X 10.11.3 (15D21)

Kernel Version: Darwin 15.3.0

Time since boot: 35 minutes

Thunderbolt:

Thunderbolt: No hardware was found.

USB:

USB 3.0 Bus:

Host Controller Driver: AppleUSBXHCISPT

PCI Device ID: 0xa12f

PCI Revision ID: 0x0031

PCI Vendor ID: 0x8086

802.11 n WLAN:

Product ID: 0x5572

Vendor ID: 0x148f

Version: 1.01

Serial Number: 1.0

Speed: Up to 480 Mb/sec

Manufacturer: Ralink

Location ID: 0x14600000 / 2

Current Available (mA): 1000

Current Required (mA): 450

Extra Operating Current (mA): 0

Built-In: Yes

Microsoft Wireless Optical Mouse¬Æ 1.00:

Product ID: 0x00e1

Vendor ID: 0x045e (Microsoft Corporation)

Version: 0.07

Speed: Up to 1.5 Mb/sec

Manufacturer: Microsoft

Location ID: 0x14400000 / 3

Current Available (mA): 1000

Current Required (mA): 100

Extra Operating Current (mA): 0

Built-In: Yes

HP Wireless Keyboard Kit:

Product ID: 0x140c

Vendor ID: 0x03f0 (Hewlett Packard)

Version: 0.01

Speed: Up to 1.5 Mb/sec

Manufacturer: HP

Location ID: 0x14300000 / 1

Current Available (mA): 1000

Current Required (mA): 98

Extra Operating Current (mA): 0

Built-In: Yes

Wi-Fi:

Software Versions:

CoreWLAN: 11.0 (1101.20)

CoreWLANKit: 11.0 (1101.20)

Menu Extra: 11.0 (1110.33)

System Information: 11.0 (1100.1)

IO80211 Family: 11.1 (1110.26)

Diagnostics: 5.1 (510.88)

AirPort Utility: 6.3.6 (636.5)